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1 /*
2  * This file is auto-generated. Modifications will be lost.
3  *
4  * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/
5  * for more information.
6  */
7 #ifndef PVR_DRM_UAPI_H
8 #define PVR_DRM_UAPI_H
9 #include "drm.h"
10 #include <linux/const.h>
11 #include <linux/types.h>
12 #ifdef __cplusplus
13 extern "C" {
14 #endif
15 struct drm_pvr_obj_array {
16   __u32 stride;
17   __u32 count;
18   __u64 array;
19 };
20 #define DRM_PVR_OBJ_ARRAY(cnt,ptr) {.stride = sizeof((ptr)[0]),.count = (cnt),.array = (__u64) (uintptr_t) (ptr) }
21 #define PVR_IOCTL(_ioctl,_mode,_data) _mode(DRM_COMMAND_BASE + (_ioctl), struct drm_pvr_ioctl_ ##_data ##_args)
22 #define DRM_IOCTL_PVR_DEV_QUERY PVR_IOCTL(0x00, DRM_IOWR, dev_query)
23 #define DRM_IOCTL_PVR_CREATE_BO PVR_IOCTL(0x01, DRM_IOWR, create_bo)
24 #define DRM_IOCTL_PVR_GET_BO_MMAP_OFFSET PVR_IOCTL(0x02, DRM_IOWR, get_bo_mmap_offset)
25 #define DRM_IOCTL_PVR_CREATE_VM_CONTEXT PVR_IOCTL(0x03, DRM_IOWR, create_vm_context)
26 #define DRM_IOCTL_PVR_DESTROY_VM_CONTEXT PVR_IOCTL(0x04, DRM_IOW, destroy_vm_context)
27 #define DRM_IOCTL_PVR_VM_MAP PVR_IOCTL(0x05, DRM_IOW, vm_map)
28 #define DRM_IOCTL_PVR_VM_UNMAP PVR_IOCTL(0x06, DRM_IOW, vm_unmap)
29 #define DRM_IOCTL_PVR_CREATE_CONTEXT PVR_IOCTL(0x07, DRM_IOWR, create_context)
30 #define DRM_IOCTL_PVR_DESTROY_CONTEXT PVR_IOCTL(0x08, DRM_IOW, destroy_context)
31 #define DRM_IOCTL_PVR_CREATE_FREE_LIST PVR_IOCTL(0x09, DRM_IOWR, create_free_list)
32 #define DRM_IOCTL_PVR_DESTROY_FREE_LIST PVR_IOCTL(0x0a, DRM_IOW, destroy_free_list)
33 #define DRM_IOCTL_PVR_CREATE_HWRT_DATASET PVR_IOCTL(0x0b, DRM_IOWR, create_hwrt_dataset)
34 #define DRM_IOCTL_PVR_DESTROY_HWRT_DATASET PVR_IOCTL(0x0c, DRM_IOW, destroy_hwrt_dataset)
35 #define DRM_IOCTL_PVR_SUBMIT_JOBS PVR_IOCTL(0x0d, DRM_IOW, submit_jobs)
36 struct drm_pvr_dev_query_gpu_info {
37   __u64 gpu_id;
38   __u32 num_phantoms;
39   __u32 _padding_c;
40 };
41 struct drm_pvr_dev_query_runtime_info {
42   __u64 free_list_min_pages;
43   __u64 free_list_max_pages;
44   __u32 common_store_alloc_region_size;
45   __u32 common_store_partition_space_size;
46   __u32 max_coeffs;
47   __u32 cdm_max_local_mem_size_regs;
48 };
49 struct drm_pvr_dev_query_quirks {
50   __u64 quirks;
51   __u16 count;
52   __u16 musthave_count;
53   __u32 _padding_c;
54 };
55 struct drm_pvr_dev_query_enhancements {
56   __u64 enhancements;
57   __u16 count;
58   __u16 _padding_a;
59   __u32 _padding_c;
60 };
61 enum drm_pvr_heap_id {
62   DRM_PVR_HEAP_GENERAL = 0,
63   DRM_PVR_HEAP_PDS_CODE_DATA,
64   DRM_PVR_HEAP_USC_CODE,
65   DRM_PVR_HEAP_RGNHDR,
66   DRM_PVR_HEAP_VIS_TEST,
67   DRM_PVR_HEAP_TRANSFER_FRAG,
68   DRM_PVR_HEAP_COUNT
69 };
70 struct drm_pvr_heap {
71   __u64 base;
72   __u64 size;
73   __u32 flags;
74   __u32 page_size_log2;
75 };
76 struct drm_pvr_dev_query_heap_info {
77   struct drm_pvr_obj_array heaps;
78 };
79 enum drm_pvr_static_data_area_usage {
80   DRM_PVR_STATIC_DATA_AREA_EOT = 0,
81   DRM_PVR_STATIC_DATA_AREA_FENCE,
82   DRM_PVR_STATIC_DATA_AREA_VDM_SYNC,
83   DRM_PVR_STATIC_DATA_AREA_YUV_CSC,
84 };
85 struct drm_pvr_static_data_area {
86   __u16 area_usage;
87   __u16 location_heap_id;
88   __u32 size;
89   __u64 offset;
90 };
91 struct drm_pvr_dev_query_static_data_areas {
92   struct drm_pvr_obj_array static_data_areas;
93 };
94 enum drm_pvr_dev_query {
95   DRM_PVR_DEV_QUERY_GPU_INFO_GET = 0,
96   DRM_PVR_DEV_QUERY_RUNTIME_INFO_GET,
97   DRM_PVR_DEV_QUERY_QUIRKS_GET,
98   DRM_PVR_DEV_QUERY_ENHANCEMENTS_GET,
99   DRM_PVR_DEV_QUERY_HEAP_INFO_GET,
100   DRM_PVR_DEV_QUERY_STATIC_DATA_AREAS_GET,
101 };
102 struct drm_pvr_ioctl_dev_query_args {
103   __u32 type;
104   __u32 size;
105   __u64 pointer;
106 };
107 #define DRM_PVR_BO_BYPASS_DEVICE_CACHE _BITULL(0)
108 #define DRM_PVR_BO_PM_FW_PROTECT _BITULL(1)
109 #define DRM_PVR_BO_ALLOW_CPU_USERSPACE_ACCESS _BITULL(2)
110 #define DRM_PVR_BO_FLAGS_MASK (DRM_PVR_BO_BYPASS_DEVICE_CACHE | DRM_PVR_BO_PM_FW_PROTECT | DRM_PVR_BO_ALLOW_CPU_USERSPACE_ACCESS)
111 struct drm_pvr_ioctl_create_bo_args {
112   __u64 size;
113   __u32 handle;
114   __u32 _padding_c;
115   __u64 flags;
116 };
117 struct drm_pvr_ioctl_get_bo_mmap_offset_args {
118   __u32 handle;
119   __u32 _padding_4;
120   __u64 offset;
121 };
122 struct drm_pvr_ioctl_create_vm_context_args {
123   __u32 handle;
124   __u32 _padding_4;
125 };
126 struct drm_pvr_ioctl_destroy_vm_context_args {
127   __u32 handle;
128   __u32 _padding_4;
129 };
130 struct drm_pvr_ioctl_vm_map_args {
131   __u32 vm_context_handle;
132   __u32 flags;
133   __u64 device_addr;
134   __u32 handle;
135   __u32 _padding_14;
136   __u64 offset;
137   __u64 size;
138 };
139 struct drm_pvr_ioctl_vm_unmap_args {
140   __u32 vm_context_handle;
141   __u32 _padding_4;
142   __u64 device_addr;
143   __u64 size;
144 };
145 enum drm_pvr_ctx_priority {
146   DRM_PVR_CTX_PRIORITY_LOW = - 512,
147   DRM_PVR_CTX_PRIORITY_NORMAL = 0,
148   DRM_PVR_CTX_PRIORITY_HIGH = 512,
149 };
150 enum drm_pvr_ctx_type {
151   DRM_PVR_CTX_TYPE_RENDER = 0,
152   DRM_PVR_CTX_TYPE_COMPUTE,
153   DRM_PVR_CTX_TYPE_TRANSFER_FRAG,
154 };
155 struct drm_pvr_ioctl_create_context_args {
156   __u32 type;
157   __u32 flags;
158   __s32 priority;
159   __u32 handle;
160   __u64 static_context_state;
161   __u32 static_context_state_len;
162   __u32 vm_context_handle;
163   __u64 callstack_addr;
164 };
165 struct drm_pvr_ioctl_destroy_context_args {
166   __u32 handle;
167   __u32 _padding_4;
168 };
169 struct drm_pvr_ioctl_create_free_list_args {
170   __u64 free_list_gpu_addr;
171   __u32 initial_num_pages;
172   __u32 max_num_pages;
173   __u32 grow_num_pages;
174   __u32 grow_threshold;
175   __u32 vm_context_handle;
176   __u32 handle;
177 };
178 struct drm_pvr_ioctl_destroy_free_list_args {
179   __u32 handle;
180   __u32 _padding_4;
181 };
182 struct drm_pvr_create_hwrt_geom_data_args {
183   __u64 tpc_dev_addr;
184   __u32 tpc_size;
185   __u32 tpc_stride;
186   __u64 vheap_table_dev_addr;
187   __u64 rtc_dev_addr;
188 };
189 struct drm_pvr_create_hwrt_rt_data_args {
190   __u64 pm_mlist_dev_addr;
191   __u64 macrotile_array_dev_addr;
192   __u64 region_header_dev_addr;
193 };
194 #define PVR_DRM_HWRT_FREE_LIST_LOCAL 0
195 #define PVR_DRM_HWRT_FREE_LIST_GLOBAL 1U
196 struct drm_pvr_ioctl_create_hwrt_dataset_args {
197   struct drm_pvr_create_hwrt_geom_data_args geom_data_args;
198   struct drm_pvr_create_hwrt_rt_data_args rt_data_args[2];
199   __u32 free_list_handles[2];
200   __u32 width;
201   __u32 height;
202   __u32 samples;
203   __u32 layers;
204   __u32 isp_merge_lower_x;
205   __u32 isp_merge_lower_y;
206   __u32 isp_merge_scale_x;
207   __u32 isp_merge_scale_y;
208   __u32 isp_merge_upper_x;
209   __u32 isp_merge_upper_y;
210   __u32 region_header_size;
211   __u32 handle;
212 };
213 struct drm_pvr_ioctl_destroy_hwrt_dataset_args {
214   __u32 handle;
215   __u32 _padding_4;
216 };
217 #define DRM_PVR_SYNC_OP_FLAG_HANDLE_TYPE_MASK 0xf
218 #define DRM_PVR_SYNC_OP_FLAG_HANDLE_TYPE_SYNCOBJ 0
219 #define DRM_PVR_SYNC_OP_FLAG_HANDLE_TYPE_TIMELINE_SYNCOBJ 1
220 #define DRM_PVR_SYNC_OP_FLAG_SIGNAL _BITULL(31)
221 #define DRM_PVR_SYNC_OP_FLAG_WAIT 0
222 #define DRM_PVR_SYNC_OP_FLAGS_MASK (DRM_PVR_SYNC_OP_FLAG_HANDLE_TYPE_MASK | DRM_PVR_SYNC_OP_FLAG_SIGNAL)
223 struct drm_pvr_sync_op {
224   __u32 handle;
225   __u32 flags;
226   __u64 value;
227 };
228 #define DRM_PVR_SUBMIT_JOB_GEOM_CMD_FIRST _BITULL(0)
229 #define DRM_PVR_SUBMIT_JOB_GEOM_CMD_LAST _BITULL(1)
230 #define DRM_PVR_SUBMIT_JOB_GEOM_CMD_SINGLE_CORE _BITULL(2)
231 #define DRM_PVR_SUBMIT_JOB_GEOM_CMD_FLAGS_MASK (DRM_PVR_SUBMIT_JOB_GEOM_CMD_FIRST | DRM_PVR_SUBMIT_JOB_GEOM_CMD_LAST | DRM_PVR_SUBMIT_JOB_GEOM_CMD_SINGLE_CORE)
232 #define DRM_PVR_SUBMIT_JOB_FRAG_CMD_SINGLE_CORE _BITULL(0)
233 #define DRM_PVR_SUBMIT_JOB_FRAG_CMD_DEPTHBUFFER _BITULL(1)
234 #define DRM_PVR_SUBMIT_JOB_FRAG_CMD_STENCILBUFFER _BITULL(2)
235 #define DRM_PVR_SUBMIT_JOB_FRAG_CMD_PREVENT_CDM_OVERLAP _BITULL(3)
236 #define DRM_PVR_SUBMIT_JOB_FRAG_CMD_SCRATCHBUFFER _BITULL(4)
237 #define DRM_PVR_SUBMIT_JOB_FRAG_CMD_GET_VIS_RESULTS _BITULL(5)
238 #define DRM_PVR_SUBMIT_JOB_FRAG_CMD_PARTIAL_RENDER _BITULL(6)
239 #define DRM_PVR_SUBMIT_JOB_FRAG_CMD_DISABLE_PIXELMERGE _BITULL(7)
240 #define DRM_PVR_SUBMIT_JOB_FRAG_CMD_FLAGS_MASK (DRM_PVR_SUBMIT_JOB_FRAG_CMD_SINGLE_CORE | DRM_PVR_SUBMIT_JOB_FRAG_CMD_DEPTHBUFFER | DRM_PVR_SUBMIT_JOB_FRAG_CMD_STENCILBUFFER | DRM_PVR_SUBMIT_JOB_FRAG_CMD_PREVENT_CDM_OVERLAP | DRM_PVR_SUBMIT_JOB_FRAG_CMD_SCRATCHBUFFER | DRM_PVR_SUBMIT_JOB_FRAG_CMD_GET_VIS_RESULTS | DRM_PVR_SUBMIT_JOB_FRAG_CMD_PARTIAL_RENDER | DRM_PVR_SUBMIT_JOB_FRAG_CMD_DISABLE_PIXELMERGE)
241 #define DRM_PVR_SUBMIT_JOB_COMPUTE_CMD_PREVENT_ALL_OVERLAP _BITULL(0)
242 #define DRM_PVR_SUBMIT_JOB_COMPUTE_CMD_SINGLE_CORE _BITULL(1)
243 #define DRM_PVR_SUBMIT_JOB_COMPUTE_CMD_FLAGS_MASK (DRM_PVR_SUBMIT_JOB_COMPUTE_CMD_PREVENT_ALL_OVERLAP | DRM_PVR_SUBMIT_JOB_COMPUTE_CMD_SINGLE_CORE)
244 #define DRM_PVR_SUBMIT_JOB_TRANSFER_CMD_SINGLE_CORE _BITULL(0)
245 #define DRM_PVR_SUBMIT_JOB_TRANSFER_CMD_FLAGS_MASK DRM_PVR_SUBMIT_JOB_TRANSFER_CMD_SINGLE_CORE
246 enum drm_pvr_job_type {
247   DRM_PVR_JOB_TYPE_GEOMETRY = 0,
248   DRM_PVR_JOB_TYPE_FRAGMENT,
249   DRM_PVR_JOB_TYPE_COMPUTE,
250   DRM_PVR_JOB_TYPE_TRANSFER_FRAG,
251 };
252 struct drm_pvr_hwrt_data_ref {
253   __u32 set_handle;
254   __u32 data_index;
255 };
256 struct drm_pvr_job {
257   __u32 type;
258   __u32 context_handle;
259   __u32 flags;
260   __u32 cmd_stream_len;
261   __u64 cmd_stream;
262   struct drm_pvr_obj_array sync_ops;
263   struct drm_pvr_hwrt_data_ref hwrt;
264 };
265 struct drm_pvr_ioctl_submit_jobs_args {
266   struct drm_pvr_obj_array jobs;
267 };
268 #ifdef __cplusplus
269 }
270 #endif
271 #endif
272