1 /* 2 * This file is auto-generated. Modifications will be lost. 3 * 4 * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/ 5 * for more information. 6 */ 7 #ifndef MLX4_ABI_USER_H 8 #define MLX4_ABI_USER_H 9 #include <linux/types.h> 10 #define MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION 3 11 #define MLX4_IB_UVERBS_ABI_VERSION 4 12 struct mlx4_ib_alloc_ucontext_resp_v3 { 13 __u32 qp_tab_size; 14 __u16 bf_reg_size; 15 __u16 bf_regs_per_page; 16 }; 17 enum { 18 MLX4_USER_DEV_CAP_LARGE_CQE = 1L << 0, 19 }; 20 struct mlx4_ib_alloc_ucontext_resp { 21 __u32 dev_caps; 22 __u32 qp_tab_size; 23 __u16 bf_reg_size; 24 __u16 bf_regs_per_page; 25 __u32 cqe_size; 26 }; 27 struct mlx4_ib_alloc_pd_resp { 28 __u32 pdn; 29 __u32 reserved; 30 }; 31 struct mlx4_ib_create_cq { 32 __aligned_u64 buf_addr; 33 __aligned_u64 db_addr; 34 }; 35 struct mlx4_ib_create_cq_resp { 36 __u32 cqn; 37 __u32 reserved; 38 }; 39 struct mlx4_ib_resize_cq { 40 __aligned_u64 buf_addr; 41 }; 42 struct mlx4_ib_create_srq { 43 __aligned_u64 buf_addr; 44 __aligned_u64 db_addr; 45 }; 46 struct mlx4_ib_create_srq_resp { 47 __u32 srqn; 48 __u32 reserved; 49 }; 50 struct mlx4_ib_create_qp_rss { 51 __aligned_u64 rx_hash_fields_mask; 52 __u8 rx_hash_function; 53 __u8 reserved[7]; 54 __u8 rx_hash_key[40]; 55 __u32 comp_mask; 56 __u32 reserved1; 57 }; 58 struct mlx4_ib_create_qp { 59 __aligned_u64 buf_addr; 60 __aligned_u64 db_addr; 61 __u8 log_sq_bb_count; 62 __u8 log_sq_stride; 63 __u8 sq_no_prefetch; 64 __u8 reserved; 65 __u32 inl_recv_sz; 66 }; 67 struct mlx4_ib_create_wq { 68 __aligned_u64 buf_addr; 69 __aligned_u64 db_addr; 70 __u8 log_range_size; 71 __u8 reserved[3]; 72 __u32 comp_mask; 73 }; 74 struct mlx4_ib_modify_wq { 75 __u32 comp_mask; 76 __u32 reserved; 77 }; 78 struct mlx4_ib_create_rwq_ind_tbl_resp { 79 __u32 response_length; 80 __u32 reserved; 81 }; 82 enum mlx4_ib_rx_hash_function_flags { 83 MLX4_IB_RX_HASH_FUNC_TOEPLITZ = 1 << 0, 84 }; 85 enum mlx4_ib_rx_hash_fields { 86 MLX4_IB_RX_HASH_SRC_IPV4 = 1 << 0, 87 MLX4_IB_RX_HASH_DST_IPV4 = 1 << 1, 88 MLX4_IB_RX_HASH_SRC_IPV6 = 1 << 2, 89 MLX4_IB_RX_HASH_DST_IPV6 = 1 << 3, 90 MLX4_IB_RX_HASH_SRC_PORT_TCP = 1 << 4, 91 MLX4_IB_RX_HASH_DST_PORT_TCP = 1 << 5, 92 MLX4_IB_RX_HASH_SRC_PORT_UDP = 1 << 6, 93 MLX4_IB_RX_HASH_DST_PORT_UDP = 1 << 7, 94 MLX4_IB_RX_HASH_INNER = 1ULL << 31, 95 }; 96 struct mlx4_ib_rss_caps { 97 __aligned_u64 rx_hash_fields_mask; 98 __u8 rx_hash_function; 99 __u8 reserved[7]; 100 }; 101 enum query_device_resp_mask { 102 MLX4_IB_QUERY_DEV_RESP_MASK_CORE_CLOCK_OFFSET = 1UL << 0, 103 }; 104 struct mlx4_ib_tso_caps { 105 __u32 max_tso; 106 __u32 supported_qpts; 107 }; 108 struct mlx4_uverbs_ex_query_device_resp { 109 __u32 comp_mask; 110 __u32 response_length; 111 __aligned_u64 hca_core_clock_offset; 112 __u32 max_inl_recv_sz; 113 __u32 reserved; 114 struct mlx4_ib_rss_caps rss_caps; 115 struct mlx4_ib_tso_caps tso_caps; 116 }; 117 #endif 118