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1 /*
2  * This file is auto-generated. Modifications will be lost.
3  *
4  * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/
5  * for more information.
6  */
7 #ifndef _UAPI_RDMA_NETLINK_H
8 #define _UAPI_RDMA_NETLINK_H
9 #include <linux/types.h>
10 enum {
11   RDMA_NL_IWCM = 2,
12   RDMA_NL_RSVD,
13   RDMA_NL_LS,
14   RDMA_NL_NLDEV,
15   RDMA_NL_NUM_CLIENTS
16 };
17 enum {
18   RDMA_NL_GROUP_IWPM = 2,
19   RDMA_NL_GROUP_LS,
20   RDMA_NL_NUM_GROUPS
21 };
22 #define RDMA_NL_GET_CLIENT(type) ((type & (((1 << 6) - 1) << 10)) >> 10)
23 #define RDMA_NL_GET_OP(type) (type & ((1 << 10) - 1))
24 #define RDMA_NL_GET_TYPE(client,op) ((client << 10) + op)
25 #define IWPM_UABI_VERSION_MIN 3
26 #define IWPM_UABI_VERSION 4
27 enum {
28   IWPM_FLAGS_NO_PORT_MAP = (1 << 0),
29 };
30 enum {
31   RDMA_NL_IWPM_REG_PID = 0,
32   RDMA_NL_IWPM_ADD_MAPPING,
33   RDMA_NL_IWPM_QUERY_MAPPING,
34   RDMA_NL_IWPM_REMOVE_MAPPING,
35   RDMA_NL_IWPM_REMOTE_INFO,
36   RDMA_NL_IWPM_HANDLE_ERR,
37   RDMA_NL_IWPM_MAPINFO,
38   RDMA_NL_IWPM_MAPINFO_NUM,
39   RDMA_NL_IWPM_HELLO,
40   RDMA_NL_IWPM_NUM_OPS
41 };
42 enum {
43   IWPM_NLA_REG_PID_UNSPEC = 0,
44   IWPM_NLA_REG_PID_SEQ,
45   IWPM_NLA_REG_IF_NAME,
46   IWPM_NLA_REG_IBDEV_NAME,
47   IWPM_NLA_REG_ULIB_NAME,
48   IWPM_NLA_REG_PID_MAX
49 };
50 enum {
51   IWPM_NLA_RREG_PID_UNSPEC = 0,
52   IWPM_NLA_RREG_PID_SEQ,
53   IWPM_NLA_RREG_IBDEV_NAME,
54   IWPM_NLA_RREG_ULIB_NAME,
55   IWPM_NLA_RREG_ULIB_VER,
56   IWPM_NLA_RREG_PID_ERR,
57   IWPM_NLA_RREG_PID_MAX
58 };
59 enum {
60   IWPM_NLA_MANAGE_MAPPING_UNSPEC = 0,
61   IWPM_NLA_MANAGE_MAPPING_SEQ,
62   IWPM_NLA_MANAGE_ADDR,
63   IWPM_NLA_MANAGE_FLAGS,
64   IWPM_NLA_MANAGE_MAPPING_MAX
65 };
66 enum {
67   IWPM_NLA_RMANAGE_MAPPING_UNSPEC = 0,
68   IWPM_NLA_RMANAGE_MAPPING_SEQ,
69   IWPM_NLA_RMANAGE_ADDR,
70   IWPM_NLA_RMANAGE_MAPPED_LOC_ADDR,
71   IWPM_NLA_MANAGE_MAPPED_LOC_ADDR = IWPM_NLA_RMANAGE_MAPPED_LOC_ADDR,
72   IWPM_NLA_RMANAGE_MAPPING_ERR,
73   IWPM_NLA_RMANAGE_MAPPING_MAX
74 };
75 #define IWPM_NLA_MAPINFO_SEND_MAX 3
76 #define IWPM_NLA_REMOVE_MAPPING_MAX 3
77 enum {
78   IWPM_NLA_QUERY_MAPPING_UNSPEC = 0,
79   IWPM_NLA_QUERY_MAPPING_SEQ,
80   IWPM_NLA_QUERY_LOCAL_ADDR,
81   IWPM_NLA_QUERY_REMOTE_ADDR,
82   IWPM_NLA_QUERY_FLAGS,
83   IWPM_NLA_QUERY_MAPPING_MAX,
84 };
85 enum {
86   IWPM_NLA_RQUERY_MAPPING_UNSPEC = 0,
87   IWPM_NLA_RQUERY_MAPPING_SEQ,
88   IWPM_NLA_RQUERY_LOCAL_ADDR,
89   IWPM_NLA_RQUERY_REMOTE_ADDR,
90   IWPM_NLA_RQUERY_MAPPED_LOC_ADDR,
91   IWPM_NLA_RQUERY_MAPPED_REM_ADDR,
92   IWPM_NLA_RQUERY_MAPPING_ERR,
93   IWPM_NLA_RQUERY_MAPPING_MAX
94 };
95 enum {
96   IWPM_NLA_MAPINFO_REQ_UNSPEC = 0,
97   IWPM_NLA_MAPINFO_ULIB_NAME,
98   IWPM_NLA_MAPINFO_ULIB_VER,
99   IWPM_NLA_MAPINFO_REQ_MAX
100 };
101 enum {
102   IWPM_NLA_MAPINFO_UNSPEC = 0,
103   IWPM_NLA_MAPINFO_LOCAL_ADDR,
104   IWPM_NLA_MAPINFO_MAPPED_ADDR,
105   IWPM_NLA_MAPINFO_FLAGS,
106   IWPM_NLA_MAPINFO_MAX
107 };
108 enum {
109   IWPM_NLA_MAPINFO_NUM_UNSPEC = 0,
110   IWPM_NLA_MAPINFO_SEQ,
111   IWPM_NLA_MAPINFO_SEND_NUM,
112   IWPM_NLA_MAPINFO_ACK_NUM,
113   IWPM_NLA_MAPINFO_NUM_MAX
114 };
115 enum {
116   IWPM_NLA_ERR_UNSPEC = 0,
117   IWPM_NLA_ERR_SEQ,
118   IWPM_NLA_ERR_CODE,
119   IWPM_NLA_ERR_MAX
120 };
121 enum {
122   IWPM_NLA_HELLO_UNSPEC = 0,
123   IWPM_NLA_HELLO_ABI_VERSION,
124   IWPM_NLA_HELLO_MAX
125 };
126 enum {
127   RDMA_NODE_IB_CA = 1,
128   RDMA_NODE_IB_SWITCH,
129   RDMA_NODE_IB_ROUTER,
130   RDMA_NODE_RNIC,
131   RDMA_NODE_USNIC,
132   RDMA_NODE_USNIC_UDP,
133   RDMA_NODE_UNSPECIFIED,
134 };
135 enum {
136   RDMA_NL_LS_OP_RESOLVE = 0,
137   RDMA_NL_LS_OP_SET_TIMEOUT,
138   RDMA_NL_LS_OP_IP_RESOLVE,
139   RDMA_NL_LS_NUM_OPS
140 };
141 #define RDMA_NL_LS_F_ERR 0x0100
142 enum {
143   LS_RESOLVE_PATH_USE_ALL = 0,
144   LS_RESOLVE_PATH_USE_UNIDIRECTIONAL,
145   LS_RESOLVE_PATH_USE_GMP,
146   LS_RESOLVE_PATH_USE_MAX
147 };
148 #define LS_DEVICE_NAME_MAX 64
149 struct rdma_ls_resolve_header {
150   __u8 device_name[LS_DEVICE_NAME_MAX];
151   __u8 port_num;
152   __u8 path_use;
153 };
154 struct rdma_ls_ip_resolve_header {
155   __u32 ifindex;
156 };
157 #define RDMA_NLA_F_MANDATORY (1 << 13)
158 #define RDMA_NLA_TYPE_MASK (~(NLA_F_NESTED | NLA_F_NET_BYTEORDER | RDMA_NLA_F_MANDATORY))
159 enum {
160   LS_NLA_TYPE_UNSPEC = 0,
161   LS_NLA_TYPE_PATH_RECORD,
162   LS_NLA_TYPE_TIMEOUT,
163   LS_NLA_TYPE_SERVICE_ID,
164   LS_NLA_TYPE_DGID,
165   LS_NLA_TYPE_SGID,
166   LS_NLA_TYPE_TCLASS,
167   LS_NLA_TYPE_PKEY,
168   LS_NLA_TYPE_QOS_CLASS,
169   LS_NLA_TYPE_IPV4,
170   LS_NLA_TYPE_IPV6,
171   LS_NLA_TYPE_MAX
172 };
173 struct rdma_nla_ls_gid {
174   __u8 gid[16];
175 };
176 enum rdma_nldev_command {
177   RDMA_NLDEV_CMD_UNSPEC,
178   RDMA_NLDEV_CMD_GET,
179   RDMA_NLDEV_CMD_SET,
180   RDMA_NLDEV_CMD_NEWLINK,
181   RDMA_NLDEV_CMD_DELLINK,
182   RDMA_NLDEV_CMD_PORT_GET,
183   RDMA_NLDEV_CMD_SYS_GET,
184   RDMA_NLDEV_CMD_SYS_SET,
185   RDMA_NLDEV_CMD_RES_GET = 9,
186   RDMA_NLDEV_CMD_RES_QP_GET,
187   RDMA_NLDEV_CMD_RES_CM_ID_GET,
188   RDMA_NLDEV_CMD_RES_CQ_GET,
189   RDMA_NLDEV_CMD_RES_MR_GET,
190   RDMA_NLDEV_CMD_RES_PD_GET,
191   RDMA_NLDEV_CMD_GET_CHARDEV,
192   RDMA_NLDEV_CMD_STAT_SET,
193   RDMA_NLDEV_CMD_STAT_GET,
194   RDMA_NLDEV_CMD_STAT_DEL,
195   RDMA_NLDEV_CMD_RES_QP_GET_RAW,
196   RDMA_NLDEV_CMD_RES_CQ_GET_RAW,
197   RDMA_NLDEV_CMD_RES_MR_GET_RAW,
198   RDMA_NLDEV_CMD_RES_CTX_GET,
199   RDMA_NLDEV_CMD_RES_SRQ_GET,
200   RDMA_NLDEV_CMD_STAT_GET_STATUS,
201   RDMA_NLDEV_CMD_RES_SRQ_GET_RAW,
202   RDMA_NLDEV_NUM_OPS
203 };
204 enum rdma_nldev_print_type {
205   RDMA_NLDEV_PRINT_TYPE_UNSPEC,
206   RDMA_NLDEV_PRINT_TYPE_HEX,
207 };
208 enum rdma_nldev_attr {
209   RDMA_NLDEV_ATTR_UNSPEC,
210   RDMA_NLDEV_ATTR_PAD = RDMA_NLDEV_ATTR_UNSPEC,
211   RDMA_NLDEV_ATTR_DEV_INDEX,
212   RDMA_NLDEV_ATTR_DEV_NAME,
213   RDMA_NLDEV_ATTR_PORT_INDEX,
214   RDMA_NLDEV_ATTR_CAP_FLAGS,
215   RDMA_NLDEV_ATTR_FW_VERSION,
216   RDMA_NLDEV_ATTR_NODE_GUID,
217   RDMA_NLDEV_ATTR_SYS_IMAGE_GUID,
218   RDMA_NLDEV_ATTR_SUBNET_PREFIX,
219   RDMA_NLDEV_ATTR_LID,
220   RDMA_NLDEV_ATTR_SM_LID,
221   RDMA_NLDEV_ATTR_LMC,
222   RDMA_NLDEV_ATTR_PORT_STATE,
223   RDMA_NLDEV_ATTR_PORT_PHYS_STATE,
224   RDMA_NLDEV_ATTR_DEV_NODE_TYPE,
225   RDMA_NLDEV_ATTR_RES_SUMMARY,
226   RDMA_NLDEV_ATTR_RES_SUMMARY_ENTRY,
227   RDMA_NLDEV_ATTR_RES_SUMMARY_ENTRY_NAME,
228   RDMA_NLDEV_ATTR_RES_SUMMARY_ENTRY_CURR,
229   RDMA_NLDEV_ATTR_RES_QP,
230   RDMA_NLDEV_ATTR_RES_QP_ENTRY,
231   RDMA_NLDEV_ATTR_RES_LQPN,
232   RDMA_NLDEV_ATTR_RES_RQPN,
233   RDMA_NLDEV_ATTR_RES_RQ_PSN,
234   RDMA_NLDEV_ATTR_RES_SQ_PSN,
235   RDMA_NLDEV_ATTR_RES_PATH_MIG_STATE,
236   RDMA_NLDEV_ATTR_RES_TYPE,
237   RDMA_NLDEV_ATTR_RES_STATE,
238   RDMA_NLDEV_ATTR_RES_PID,
239   RDMA_NLDEV_ATTR_RES_KERN_NAME,
240   RDMA_NLDEV_ATTR_RES_CM_ID,
241   RDMA_NLDEV_ATTR_RES_CM_ID_ENTRY,
242   RDMA_NLDEV_ATTR_RES_PS,
243   RDMA_NLDEV_ATTR_RES_SRC_ADDR,
244   RDMA_NLDEV_ATTR_RES_DST_ADDR,
245   RDMA_NLDEV_ATTR_RES_CQ,
246   RDMA_NLDEV_ATTR_RES_CQ_ENTRY,
247   RDMA_NLDEV_ATTR_RES_CQE,
248   RDMA_NLDEV_ATTR_RES_USECNT,
249   RDMA_NLDEV_ATTR_RES_POLL_CTX,
250   RDMA_NLDEV_ATTR_RES_MR,
251   RDMA_NLDEV_ATTR_RES_MR_ENTRY,
252   RDMA_NLDEV_ATTR_RES_RKEY,
253   RDMA_NLDEV_ATTR_RES_LKEY,
254   RDMA_NLDEV_ATTR_RES_IOVA,
255   RDMA_NLDEV_ATTR_RES_MRLEN,
256   RDMA_NLDEV_ATTR_RES_PD,
257   RDMA_NLDEV_ATTR_RES_PD_ENTRY,
258   RDMA_NLDEV_ATTR_RES_LOCAL_DMA_LKEY,
259   RDMA_NLDEV_ATTR_RES_UNSAFE_GLOBAL_RKEY,
260   RDMA_NLDEV_ATTR_NDEV_INDEX,
261   RDMA_NLDEV_ATTR_NDEV_NAME,
262   RDMA_NLDEV_ATTR_DRIVER,
263   RDMA_NLDEV_ATTR_DRIVER_ENTRY,
264   RDMA_NLDEV_ATTR_DRIVER_STRING,
265   RDMA_NLDEV_ATTR_DRIVER_PRINT_TYPE,
266   RDMA_NLDEV_ATTR_DRIVER_S32,
267   RDMA_NLDEV_ATTR_DRIVER_U32,
268   RDMA_NLDEV_ATTR_DRIVER_S64,
269   RDMA_NLDEV_ATTR_DRIVER_U64,
270   RDMA_NLDEV_ATTR_RES_PDN,
271   RDMA_NLDEV_ATTR_RES_CQN,
272   RDMA_NLDEV_ATTR_RES_MRN,
273   RDMA_NLDEV_ATTR_RES_CM_IDN,
274   RDMA_NLDEV_ATTR_RES_CTXN,
275   RDMA_NLDEV_ATTR_LINK_TYPE,
276   RDMA_NLDEV_SYS_ATTR_NETNS_MODE,
277   RDMA_NLDEV_ATTR_DEV_PROTOCOL,
278   RDMA_NLDEV_NET_NS_FD,
279   RDMA_NLDEV_ATTR_CHARDEV_TYPE,
280   RDMA_NLDEV_ATTR_CHARDEV_NAME,
281   RDMA_NLDEV_ATTR_CHARDEV_ABI,
282   RDMA_NLDEV_ATTR_CHARDEV,
283   RDMA_NLDEV_ATTR_UVERBS_DRIVER_ID,
284   RDMA_NLDEV_ATTR_STAT_MODE,
285   RDMA_NLDEV_ATTR_STAT_RES,
286   RDMA_NLDEV_ATTR_STAT_AUTO_MODE_MASK,
287   RDMA_NLDEV_ATTR_STAT_COUNTER,
288   RDMA_NLDEV_ATTR_STAT_COUNTER_ENTRY,
289   RDMA_NLDEV_ATTR_STAT_COUNTER_ID,
290   RDMA_NLDEV_ATTR_STAT_HWCOUNTERS,
291   RDMA_NLDEV_ATTR_STAT_HWCOUNTER_ENTRY,
292   RDMA_NLDEV_ATTR_STAT_HWCOUNTER_ENTRY_NAME,
293   RDMA_NLDEV_ATTR_STAT_HWCOUNTER_ENTRY_VALUE,
294   RDMA_NLDEV_ATTR_DEV_DIM,
295   RDMA_NLDEV_ATTR_RES_RAW,
296   RDMA_NLDEV_ATTR_RES_CTX,
297   RDMA_NLDEV_ATTR_RES_CTX_ENTRY,
298   RDMA_NLDEV_ATTR_RES_SRQ,
299   RDMA_NLDEV_ATTR_RES_SRQ_ENTRY,
300   RDMA_NLDEV_ATTR_RES_SRQN,
301   RDMA_NLDEV_ATTR_MIN_RANGE,
302   RDMA_NLDEV_ATTR_MAX_RANGE,
303   RDMA_NLDEV_SYS_ATTR_COPY_ON_FORK,
304   RDMA_NLDEV_ATTR_STAT_HWCOUNTER_INDEX,
305   RDMA_NLDEV_ATTR_STAT_HWCOUNTER_DYNAMIC,
306   RDMA_NLDEV_SYS_ATTR_PRIVILEGED_QKEY_MODE,
307   RDMA_NLDEV_ATTR_MAX
308 };
309 enum rdma_nl_counter_mode {
310   RDMA_COUNTER_MODE_NONE,
311   RDMA_COUNTER_MODE_AUTO,
312   RDMA_COUNTER_MODE_MANUAL,
313   RDMA_COUNTER_MODE_MAX,
314 };
315 enum rdma_nl_counter_mask {
316   RDMA_COUNTER_MASK_QP_TYPE = 1,
317   RDMA_COUNTER_MASK_PID = 1 << 1,
318 };
319 #endif
320