1 /*
2 * \file trc_pkt_decode_etmv4i.cpp
3 * \brief OpenCSD : ETMv4 decoder
4 *
5 * \copyright Copyright (c) 2015, ARM Limited. All Rights Reserved.
6 */
7
8 /*
9 * Redistribution and use in source and binary forms, with or without modification,
10 * are permitted provided that the following conditions are met:
11 *
12 * 1. Redistributions of source code must retain the above copyright notice,
13 * this list of conditions and the following disclaimer.
14 *
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
18 *
19 * 3. Neither the name of the copyright holder nor the names of its contributors
20 * may be used to endorse or promote products derived from this software without
21 * specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND
24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35 #include "opencsd/etmv4/trc_pkt_decode_etmv4i.h"
36
37 #include "common/trc_gen_elem.h"
38
39
40 #define DCD_NAME "DCD_ETMV4"
41
42 static const uint32_t ETMV4_SUPPORTED_DECODE_OP_FLAGS = OCSD_OPFLG_PKTDEC_COMMON |
43 ETE_OPFLG_PKTDEC_SRCADDR_N_ATOMS;
44
TrcPktDecodeEtmV4I()45 TrcPktDecodeEtmV4I::TrcPktDecodeEtmV4I()
46 : TrcPktDecodeBase(DCD_NAME)
47 {
48 initDecoder();
49 }
50
TrcPktDecodeEtmV4I(int instIDNum)51 TrcPktDecodeEtmV4I::TrcPktDecodeEtmV4I(int instIDNum)
52 : TrcPktDecodeBase(DCD_NAME,instIDNum)
53 {
54 initDecoder();
55 }
56
~TrcPktDecodeEtmV4I()57 TrcPktDecodeEtmV4I::~TrcPktDecodeEtmV4I()
58 {
59 }
60
61 /*********************** implementation packet decoding interface */
62
processPacket()63 ocsd_datapath_resp_t TrcPktDecodeEtmV4I::processPacket()
64 {
65 ocsd_datapath_resp_t resp = OCSD_RESP_CONT;
66 ocsd_err_t err = OCSD_OK;
67 bool bPktDone = false;
68
69 while(!bPktDone)
70 {
71 switch (m_curr_state)
72 {
73 case NO_SYNC:
74 // output the initial not synced packet to the sink
75 err = m_out_elem.resetElemStack();
76 if (!err)
77 err = m_out_elem.addElemType(m_index_curr_pkt, OCSD_GEN_TRC_ELEM_NO_SYNC);
78 if (!err)
79 {
80 outElem().setUnSyncEOTReason(m_unsync_eot_info);
81 resp = m_out_elem.sendElements();
82 m_curr_state = WAIT_SYNC;
83 }
84 else
85 resp = OCSD_RESP_FATAL_SYS_ERR;
86
87 // fall through to check if the current packet is the async we are waiting for.
88 break;
89
90 case WAIT_SYNC:
91 if(m_curr_packet_in->getType() == ETM4_PKT_I_ASYNC)
92 m_curr_state = WAIT_TINFO;
93 bPktDone = true;
94 break;
95
96 case WAIT_TINFO:
97 m_need_ctxt = true;
98 m_need_addr = true;
99 if(m_curr_packet_in->getType() == ETM4_PKT_I_TRACE_INFO)
100 {
101 doTraceInfoPacket();
102 m_curr_state = DECODE_PKTS;
103 m_return_stack.flush();
104 }
105 /* ETE spec allows early event packets. */
106 else if ((m_config->MajVersion() >= 0x5) &&
107 (m_curr_packet_in->getType() == ETM4_PKT_I_EVENT))
108 {
109 err = decodePacket();
110 if (err)
111 resp = OCSD_RESP_FATAL_INVALID_DATA;
112 }
113 bPktDone = true;
114 break;
115
116 case DECODE_PKTS:
117 // this may change the state to RESOLVE_ELEM if required;
118 err = decodePacket();
119 if (err)
120 {
121 #ifdef OCSD_WARN_UNSUPPORTED
122 if (err == OCSD_ERR_UNSUPP_DECODE_PKT)
123 resp = OCSD_RESP_WARN_CONT;
124 else
125 #else
126 resp = OCSD_RESP_FATAL_INVALID_DATA;
127 #endif
128
129 bPktDone = true;
130 }
131 else if (m_curr_state != RESOLVE_ELEM)
132 bPktDone = true;
133 break;
134
135 case RESOLVE_ELEM:
136 // this will change the state to DECODE_PKTS once required elem resolved &
137 // needed generic packets output
138 resp = resolveElements();
139 if ((m_curr_state == DECODE_PKTS) || (!OCSD_DATA_RESP_IS_CONT(resp)))
140 bPktDone = true;
141 break;
142 }
143 }
144 return resp;
145 }
146
onEOT()147 ocsd_datapath_resp_t TrcPktDecodeEtmV4I::onEOT()
148 {
149 ocsd_datapath_resp_t resp = OCSD_RESP_CONT;
150 ocsd_err_t err;
151 if ((err = commitElemOnEOT()) != OCSD_OK)
152 {
153 resp = OCSD_RESP_FATAL_INVALID_DATA;
154 LogError(ocsdError(OCSD_ERR_SEV_ERROR, err, "Error flushing element stack at end of trace data."));
155 }
156 else
157 resp = m_out_elem.sendElements();
158 return resp;
159 }
160
onReset()161 ocsd_datapath_resp_t TrcPktDecodeEtmV4I::onReset()
162 {
163 ocsd_datapath_resp_t resp = OCSD_RESP_CONT;
164 m_unsync_eot_info = UNSYNC_RESET_DECODER;
165 resetDecoder();
166 return resp;
167 }
168
onFlush()169 ocsd_datapath_resp_t TrcPktDecodeEtmV4I::onFlush()
170 {
171 ocsd_datapath_resp_t resp = OCSD_RESP_CONT;
172
173 if (m_curr_state == RESOLVE_ELEM)
174 resp = resolveElements();
175 else
176 resp = m_out_elem.sendElements();
177 return resp;
178 }
179
onProtocolConfig()180 ocsd_err_t TrcPktDecodeEtmV4I::onProtocolConfig()
181 {
182 ocsd_err_t err = OCSD_OK;
183
184 // set some static config elements
185 m_CSID = m_config->getTraceID();
186 m_max_spec_depth = m_config->MaxSpecDepth();
187
188 // elements associated with data trace
189 #ifdef DATA_TRACE_SUPPORTED
190 m_p0_key_max = m_config->P0_Key_Max();
191 m_cond_key_max_incr = m_config->CondKeyMaxIncr();
192 #endif
193
194 m_out_elem.initCSID(m_CSID);
195
196 // set up static trace instruction decode elements
197 m_instr_info.dsb_dmb_waypoints = 0;
198 m_instr_info.wfi_wfe_branch = m_config->wfiwfeBranch() ? 1 : 0;
199 m_instr_info.pe_type.arch = m_config->archVersion();
200 m_instr_info.pe_type.profile = m_config->coreProfile();
201
202 m_IASize64 = (m_config->iaSizeMax() == 64);
203
204 if (m_config->enabledRetStack())
205 {
206 m_return_stack.set_active(true);
207 #ifdef TRC_RET_STACK_DEBUG
208 m_return_stack.set_dbg_logger(this);
209 #endif
210 }
211
212 // check config compatible with current decoder support level.
213 // at present no data trace, no spec depth, no return stack, no QE
214 // Remove these checks as support is added.
215 if(m_config->enabledDataTrace())
216 {
217 err = OCSD_ERR_HW_CFG_UNSUPP;
218 LogError(ocsdError(OCSD_ERR_SEV_ERROR,OCSD_ERR_HW_CFG_UNSUPP,"ETMv4 instruction decode : Data trace elements not supported"));
219 }
220 else if(m_config->enabledLSP0Trace())
221 {
222 err = OCSD_ERR_HW_CFG_UNSUPP;
223 LogError(ocsdError(OCSD_ERR_SEV_ERROR,OCSD_ERR_HW_CFG_UNSUPP,"ETMv4 instruction decode : LSP0 elements not supported."));
224 }
225 else if(m_config->enabledCondITrace() != EtmV4Config::COND_TR_DIS)
226 {
227 err = OCSD_ERR_HW_CFG_UNSUPP;
228 LogError(ocsdError(OCSD_ERR_SEV_ERROR,OCSD_ERR_HW_CFG_UNSUPP,"ETMv4 instruction decode : Trace on conditional non-branch elements not supported."));
229 }
230 return err;
231 }
232
233 /************* local decode methods */
initDecoder()234 void TrcPktDecodeEtmV4I::initDecoder()
235 {
236 // set the operational modes supported.
237 m_supported_op_flags = ETMV4_SUPPORTED_DECODE_OP_FLAGS;
238
239 /* init elements that get set by config */
240 m_max_spec_depth = 0;
241 m_CSID = 0;
242 m_IASize64 = false;
243
244 // set debug range limit - look for debugging env var
245 char* env_var;
246 long env_val;
247
248 m_num_instr_range_limit = 0;
249 if ((env_var = getenv(OCSD_ENV_INSTR_RANGE_LIMIT)) != NULL)
250 {
251 env_val = strtol(env_var, NULL, 0);
252 /* if valid number set limit */
253 if (env_val > 0)
254 m_num_instr_range_limit = env_val;
255
256 }
257
258 // elements associated with data trace
259 #ifdef DATA_TRACE_SUPPORTED
260 m_p0_key_max = 0;
261 m_cond_key_max_incr = 0;
262 #endif
263
264 // reset decoder state to unsynced
265 m_unsync_eot_info = UNSYNC_INIT_DECODER;
266 resetDecoder();
267 }
268
resetDecoder()269 void TrcPktDecodeEtmV4I::resetDecoder()
270 {
271 m_curr_state = NO_SYNC;
272 m_timestamp = 0;
273 m_context_id = 0;
274 m_vmid_id = 0;
275 m_is_secure = true;
276 m_is_64bit = false;
277 m_cc_threshold = 0;
278 m_curr_spec_depth = 0;
279 m_need_ctxt = true;
280 m_need_addr = true;
281 m_elem_pending_addr = false;
282 m_prev_overflow = false;
283 m_P0_stack.delete_all();
284 m_out_elem.resetElemStack();
285 m_last_IS = 0;
286 clearElemRes();
287 m_ete_first_ts_marker = false;
288
289 // elements associated with data trace
290 #ifdef DATA_TRACE_SUPPORTED
291 m_p0_key = 0;
292 m_cond_c_key = 0;
293 m_cond_r_key = 0;
294 #endif
295 }
296
onFirstInitOK()297 void TrcPktDecodeEtmV4I::onFirstInitOK()
298 {
299 // once init, set the output element interface to the out elem list.
300 m_out_elem.initSendIf(this->getTraceElemOutAttachPt());
301 }
302
303 // Changes a packet into stack of trace elements - these will be resolved and output later
decodePacket()304 ocsd_err_t TrcPktDecodeEtmV4I::decodePacket()
305 {
306 ocsd_err_t err = OCSD_OK;
307 bool bAllocErr = false;
308 bool is_addr = false;
309
310 switch(m_curr_packet_in->getType())
311 {
312 case ETM4_PKT_I_ASYNC: // nothing to do with this packet.
313 case ETM4_PKT_I_IGNORE: // or this one.
314 break;
315
316 case ETM4_PKT_I_TRACE_INFO:
317 // skip subsequent TInfo packets.
318 m_return_stack.flush();
319 break;
320
321 case ETM4_PKT_I_TRACE_ON:
322 {
323 if (m_P0_stack.createParamElemNoParam(P0_TRC_ON, false, m_curr_packet_in->getType(), m_index_curr_pkt) == 0)
324 bAllocErr = true;
325 }
326 break;
327
328 case ETM4_PKT_I_ATOM_F1:
329 case ETM4_PKT_I_ATOM_F2:
330 case ETM4_PKT_I_ATOM_F3:
331 case ETM4_PKT_I_ATOM_F4:
332 case ETM4_PKT_I_ATOM_F5:
333 case ETM4_PKT_I_ATOM_F6:
334 {
335 if (m_P0_stack.createAtomElem(m_curr_packet_in->getType(), m_index_curr_pkt, m_curr_packet_in->getAtom()) == 0)
336 bAllocErr = true;
337 else
338 m_curr_spec_depth += m_curr_packet_in->getAtom().num;
339 }
340 break;
341
342 case ETM4_PKT_I_CTXT:
343 {
344 if (m_P0_stack.createContextElem(m_curr_packet_in->getType(), m_index_curr_pkt, m_curr_packet_in->getContext(), m_last_IS) == 0)
345 bAllocErr = true;
346 }
347 break;
348
349 case ETM4_PKT_I_ADDR_MATCH:
350 {
351 etmv4_addr_val_t addr;
352
353 addr.val = m_curr_packet_in->getAddrVal();
354 addr.isa = m_last_IS = m_curr_packet_in->getAddrIS();
355
356 if (m_P0_stack.createAddrElem(m_curr_packet_in->getType(), m_index_curr_pkt, addr) == 0)
357 bAllocErr = true;
358 is_addr = true;
359 }
360 break;
361
362 case ETM4_PKT_I_ADDR_CTXT_L_64IS0:
363 case ETM4_PKT_I_ADDR_CTXT_L_64IS1:
364 case ETM4_PKT_I_ADDR_CTXT_L_32IS0:
365 case ETM4_PKT_I_ADDR_CTXT_L_32IS1:
366 {
367 m_last_IS = m_curr_packet_in->getAddrIS();
368 if (m_P0_stack.createContextElem(m_curr_packet_in->getType(), m_index_curr_pkt, m_curr_packet_in->getContext(), m_last_IS) == 0)
369 bAllocErr = true;
370 }
371 case ETM4_PKT_I_ADDR_L_32IS0:
372 case ETM4_PKT_I_ADDR_L_32IS1:
373 case ETM4_PKT_I_ADDR_L_64IS0:
374 case ETM4_PKT_I_ADDR_L_64IS1:
375 case ETM4_PKT_I_ADDR_S_IS0:
376 case ETM4_PKT_I_ADDR_S_IS1:
377 {
378 etmv4_addr_val_t addr;
379
380 addr.val = m_curr_packet_in->getAddrVal();
381 addr.isa = m_last_IS = m_curr_packet_in->getAddrIS();
382
383 if (m_P0_stack.createAddrElem(m_curr_packet_in->getType(), m_index_curr_pkt, addr) == 0)
384 bAllocErr = true;
385 is_addr = true; // may be waiting for target address from indirect branch
386 }
387 break;
388
389 case ETE_PKT_I_SRC_ADDR_MATCH:
390 case ETE_PKT_I_SRC_ADDR_S_IS0:
391 case ETE_PKT_I_SRC_ADDR_S_IS1:
392 case ETE_PKT_I_SRC_ADDR_L_32IS0:
393 case ETE_PKT_I_SRC_ADDR_L_32IS1:
394 case ETE_PKT_I_SRC_ADDR_L_64IS0:
395 case ETE_PKT_I_SRC_ADDR_L_64IS1:
396 {
397 etmv4_addr_val_t addr;
398
399 addr.val = m_curr_packet_in->getAddrVal();
400 addr.isa = m_curr_packet_in->getAddrIS();
401 if (m_P0_stack.createSrcAddrElem(m_curr_packet_in->getType(), m_index_curr_pkt, addr) == 0)
402 bAllocErr = true;
403 m_curr_spec_depth++;
404 }
405 break;
406
407 // Exceptions
408 case ETM4_PKT_I_EXCEPT:
409 {
410 if (m_P0_stack.createExceptElem(m_curr_packet_in->getType(), m_index_curr_pkt,
411 (m_curr_packet_in->exception_info.addr_interp == 0x2),
412 m_curr_packet_in->exception_info.exceptionType) == 0)
413 bAllocErr = true;
414 else
415 m_elem_pending_addr = true; // wait for following packets before marking for commit.
416 }
417 break;
418
419 case ETM4_PKT_I_EXCEPT_RTN:
420 {
421 // P0 element if V7M profile.
422 bool bV7MProfile = (m_config->archVersion() == ARCH_V7) && (m_config->coreProfile() == profile_CortexM);
423 if (m_P0_stack.createParamElemNoParam(P0_EXCEP_RET, bV7MProfile, m_curr_packet_in->getType(), m_index_curr_pkt) == 0)
424 bAllocErr = true;
425 else if (bV7MProfile)
426 m_curr_spec_depth++;
427 }
428 break;
429
430 case ETM4_PKT_I_FUNC_RET:
431 {
432 // P0 element iff V8M profile, otherwise ignore
433 if (OCSD_IS_V8_ARCH(m_config->archVersion()) && (m_config->coreProfile() == profile_CortexM))
434 {
435 if (m_P0_stack.createParamElemNoParam(P0_FUNC_RET, true, m_curr_packet_in->getType(), m_index_curr_pkt) == 0)
436 bAllocErr = true;
437 else
438 m_curr_spec_depth++;
439 }
440 }
441 break;
442
443 // event trace
444 case ETM4_PKT_I_EVENT:
445 {
446 std::vector<uint32_t> params = { 0 };
447 params[0] = (uint32_t)m_curr_packet_in->event_val;
448 if (m_P0_stack.createParamElem(P0_EVENT, false, m_curr_packet_in->getType(), m_index_curr_pkt, params) == 0)
449 bAllocErr = true;
450
451 }
452 break;
453
454 /* cycle count packets */
455 case ETM4_PKT_I_CCNT_F1:
456 case ETM4_PKT_I_CCNT_F2:
457 case ETM4_PKT_I_CCNT_F3:
458 {
459 std::vector<uint32_t> params = { 0 };
460 params[0] = m_curr_packet_in->getCC();
461 if (m_P0_stack.createParamElem(P0_CC, false, m_curr_packet_in->getType(), m_index_curr_pkt, params) == 0)
462 bAllocErr = true;
463
464 }
465 break;
466
467 // timestamp
468 case ETM4_PKT_I_TIMESTAMP:
469 {
470 bool bTSwithCC = m_config->enabledCCI();
471 uint64_t ts = m_curr_packet_in->getTS();
472 std::vector<uint32_t> params = { 0, 0, 0 };
473 params[0] = (uint32_t)(ts & 0xFFFFFFFF);
474 params[1] = (uint32_t)((ts >> 32) & 0xFFFFFFFF);
475 if (bTSwithCC)
476 params[2] = m_curr_packet_in->getCC();
477 if (m_P0_stack.createParamElem(bTSwithCC ? P0_TS_CC : P0_TS, false, m_curr_packet_in->getType(), m_index_curr_pkt, params) == 0)
478 bAllocErr = true;
479
480 }
481 break;
482
483 case ETE_PKT_I_TS_MARKER:
484 {
485 trace_marker_payload_t marker;
486 marker.type = ELEM_MARKER_TS;
487 marker.value = 0;
488 if (m_P0_stack.createMarkerElem(m_curr_packet_in->getType(), m_index_curr_pkt, marker) == 0)
489 bAllocErr = true;
490 }
491 break;
492
493 case ETM4_PKT_I_BAD_SEQUENCE:
494 err = handleBadPacket("Bad byte sequence in packet.", m_index_curr_pkt);
495 break;
496
497 case ETM4_PKT_I_BAD_TRACEMODE:
498 err = handleBadPacket("Invalid packet type for trace mode.", m_index_curr_pkt);
499 break;
500
501 case ETM4_PKT_I_RESERVED:
502 err = handleBadPacket("Reserved packet header", m_index_curr_pkt);
503 break;
504
505 // speculation
506 case ETM4_PKT_I_MISPREDICT:
507 case ETM4_PKT_I_CANCEL_F1_MISPRED:
508 case ETM4_PKT_I_CANCEL_F2:
509 case ETM4_PKT_I_CANCEL_F3:
510 m_elem_res.mispredict = true;
511 if (m_curr_packet_in->getNumAtoms())
512 {
513 if (m_P0_stack.createAtomElem(m_curr_packet_in->getType(), m_index_curr_pkt, m_curr_packet_in->getAtom()) == 0)
514 bAllocErr = true;
515 else
516 m_curr_spec_depth += m_curr_packet_in->getNumAtoms();
517 }
518
519 case ETM4_PKT_I_CANCEL_F1:
520 m_elem_res.P0_cancel = m_curr_packet_in->getCancelElem();
521 break;
522
523 case ETM4_PKT_I_COMMIT:
524 m_elem_res.P0_commit = m_curr_packet_in->getCommitElem();
525 break;
526
527 case ETM4_PKT_I_OVERFLOW:
528 m_prev_overflow = true;
529 case ETM4_PKT_I_DISCARD:
530 m_curr_spec_depth = 0;
531 m_elem_res.discard = true;
532 break;
533
534 /* Q packets */
535 case ETM4_PKT_I_Q:
536 {
537 TrcStackQElem *pQElem = m_P0_stack.createQElem(m_curr_packet_in->getType(), m_index_curr_pkt, m_curr_packet_in->Q_pkt.q_count);
538 if (pQElem)
539 {
540 if (m_curr_packet_in->Q_pkt.addr_present)
541 {
542 etmv4_addr_val_t addr;
543
544 addr.val = m_curr_packet_in->getAddrVal();
545 addr.isa = m_curr_packet_in->getAddrIS();
546 pQElem->setAddr(addr);
547 m_curr_spec_depth++;
548 }
549 else
550 m_elem_pending_addr = true;
551 }
552 else
553 bAllocErr = true;
554 }
555 break;
556
557 /* transactional memory packets */
558 case ETE_PKT_I_TRANS_ST:
559 {
560 if (m_P0_stack.createParamElemNoParam(P0_TRANS_START, m_config->commTransP0(), m_curr_packet_in->getType(), m_index_curr_pkt) == 0)
561 bAllocErr = true;
562 if (m_config->commTransP0())
563 m_curr_spec_depth++;
564 }
565 break;
566
567 case ETE_PKT_I_TRANS_COMMIT:
568 {
569 if (m_P0_stack.createParamElemNoParam(P0_TRANS_COMMIT, false, m_curr_packet_in->getType(), m_index_curr_pkt) == 0)
570 bAllocErr = true;
571 }
572 break;
573
574 case ETE_PKT_I_TRANS_FAIL:
575 {
576 if (m_P0_stack.createParamElemNoParam(P0_TRANS_FAIL, false, m_curr_packet_in->getType(), m_index_curr_pkt) == 0)
577 bAllocErr = true;
578 }
579 break;
580
581 /* PE Instrumentation packet */
582 case ETE_PKT_I_ITE:
583 {
584 trace_sw_ite_t ite_pkt;
585
586 ite_pkt.el = m_curr_packet_in->getITE_EL();
587 ite_pkt.value = m_curr_packet_in->getITE_value();
588 if (m_P0_stack.createITEElem(m_curr_packet_in->getType(), m_index_curr_pkt, ite_pkt) == 0)
589 bAllocErr = true;
590 }
591 break;
592
593 /*** presently unsupported packets ***/
594 /* conditional instruction tracing */
595 case ETM4_PKT_I_COND_FLUSH:
596 case ETM4_PKT_I_COND_I_F1:
597 case ETM4_PKT_I_COND_I_F2:
598 case ETM4_PKT_I_COND_I_F3:
599 case ETM4_PKT_I_COND_RES_F1:
600 case ETM4_PKT_I_COND_RES_F2:
601 case ETM4_PKT_I_COND_RES_F3:
602 case ETM4_PKT_I_COND_RES_F4:
603 // data synchronisation markers
604 case ETM4_PKT_I_NUM_DS_MKR:
605 case ETM4_PKT_I_UNNUM_DS_MKR:
606 // all currently unsupported
607 {
608 ocsd_err_severity_t sev = OCSD_ERR_SEV_ERROR;
609 #ifdef OCSD_WARN_UNSUPPORTED
610 sev = OCSD_ERR_SEV_WARN;
611 //resp = OCSD_RESP_WARN_CONT;
612 #else
613 //resp = OCSD_RESP_FATAL_INVALID_DATA;
614 #endif
615 err = OCSD_ERR_UNSUPP_DECODE_PKT;
616 if (sev == OCSD_ERR_SEV_WARN)
617 LogError(ocsdError(sev, err, "Data trace related, unsupported packet type."));
618 else
619 err = handlePacketSeqErr(err, m_index_curr_pkt, "Data trace related, unsupported packet type.");
620 }
621 break;
622
623 default:
624 // any other packet - bad packet error
625 err = handleBadPacket("Unknown packet type.", m_index_curr_pkt);
626 break;
627 }
628
629 // we need to wait for following address after certain packets
630 // - work out if we have seen enough here...
631 if (is_addr && m_elem_pending_addr)
632 {
633 m_curr_spec_depth++; // increase spec depth for element waiting on address.
634 m_elem_pending_addr = false; // can't be waiting on both
635 }
636
637 if(bAllocErr)
638 {
639 err = OCSD_ERR_MEM;
640 LogError(ocsdError(OCSD_ERR_SEV_ERROR,OCSD_ERR_MEM,"Memory allocation error."));
641 }
642 else if(m_curr_spec_depth > m_max_spec_depth)
643 {
644 // auto commit anything above max spec depth
645 // (this will auto commit anything if spec depth not supported!)
646 m_elem_res.P0_commit = m_curr_spec_depth - m_max_spec_depth;
647 }
648
649 if (!err && isElemForRes())
650 m_curr_state = RESOLVE_ELEM;
651 return err;
652 }
653
doTraceInfoPacket()654 void TrcPktDecodeEtmV4I::doTraceInfoPacket()
655 {
656 m_trace_info = m_curr_packet_in->getTraceInfo();
657 m_cc_threshold = m_curr_packet_in->getCCThreshold();
658 m_curr_spec_depth = m_curr_packet_in->getCurrSpecDepth();
659 /* put a trans marker in stack if started in trans state */
660 if (m_trace_info.bits.in_trans_state)
661 m_P0_stack.createParamElemNoParam(P0_TRANS_TRACE_INIT, false, m_curr_packet_in->getType(), m_index_curr_pkt);
662
663 // elements associated with data trace
664 #ifdef DATA_TRACE_SUPPORTED
665 m_p0_key = m_curr_packet_in->getP0Key();
666 #endif
667 }
668
669 /* Element resolution
670 * Commit or cancel elements as required
671 * Send any buffered output packets.
672 */
resolveElements()673 ocsd_datapath_resp_t TrcPktDecodeEtmV4I::resolveElements()
674 {
675 ocsd_datapath_resp_t resp = OCSD_RESP_CONT;
676 bool Complete = false;
677
678 while (!Complete)
679 {
680 if (m_out_elem.numElemToSend())
681 resp = m_out_elem.sendElements();
682 else if (isElemForRes())
683 {
684 ocsd_err_t err = OCSD_OK;
685 if (m_elem_res.P0_commit)
686 err = commitElements();
687
688 // allow for early flush on context element
689 if (!m_elem_res.P0_commit) {
690
691 if (!err && m_elem_res.P0_cancel)
692 err = cancelElements();
693
694 if (!err && m_elem_res.mispredict)
695 err = mispredictAtom();
696
697 if (!err && m_elem_res.discard)
698 err = discardElements();
699 }
700
701 if (err != OCSD_OK)
702 resp = OCSD_RESP_FATAL_INVALID_DATA;
703 }
704
705 // break out on error or wait request.
706 if (!OCSD_DATA_RESP_IS_CONT(resp))
707 break;
708
709 // completion is nothing to send and nothing to commit
710 Complete = !m_out_elem.numElemToSend() && !isElemForRes();
711
712 // done all elements - need more packets.
713 if (Complete) {
714 // if we are still in resolve, the goto decode.
715 if (m_curr_state == RESOLVE_ELEM)
716 m_curr_state = DECODE_PKTS;
717 }
718 }
719 return resp;
720 }
721
722 /*
723 * Walks through the element stack, processing from oldest element to the newest,
724 according to the number of P0 elements that need committing.
725 Build a stack of output elements in the process.
726 */
commitElements()727 ocsd_err_t TrcPktDecodeEtmV4I::commitElements()
728 {
729 ocsd_err_t err = OCSD_OK;
730 bool bPopElem = true; // do we remove the element from the stack (multi atom elements may need to stay!)
731 int num_commit_req = m_elem_res.P0_commit;
732 ocsd_trc_index_t err_idx = 0;
733 TrcStackElem *pElem = 0; // stacked element pointer
734 bool contextFlush = false;
735
736 err = m_out_elem.resetElemStack();
737
738 while(m_elem_res.P0_commit && !err && !contextFlush)
739 {
740 if (m_P0_stack.size() > 0)
741 {
742 pElem = m_P0_stack.back(); // get oldest element
743 err_idx = pElem->getRootIndex(); // save index in case of error.
744
745 switch (pElem->getP0Type())
746 {
747 // indicates a trace restart - beginning of trace or discontinuiuty
748 case P0_TRC_ON:
749 err = m_out_elem.addElemType(pElem->getRootIndex(), OCSD_GEN_TRC_ELEM_TRACE_ON);
750 if (!err)
751 {
752 m_out_elem.getCurrElem().trace_on_reason = m_prev_overflow ? TRACE_ON_OVERFLOW : TRACE_ON_NORMAL;
753 m_prev_overflow = false;
754 m_return_stack.flush();
755 }
756 break;
757
758 case P0_ADDR:
759 {
760 TrcStackElemAddr *pAddrElem = dynamic_cast<TrcStackElemAddr *>(pElem);
761 m_return_stack.clear_pop_pending(); // address removes the need to pop the indirect address target from the stack
762 if (pAddrElem)
763 {
764 SetInstrInfoInAddrISA(pAddrElem->getAddr().val, pAddrElem->getAddr().isa);
765 m_need_addr = false;
766 }
767 }
768 break;
769
770 case P0_CTXT:
771 {
772 TrcStackElemCtxt *pCtxtElem = dynamic_cast<TrcStackElemCtxt *>(pElem);
773 if (pCtxtElem)
774 {
775 etmv4_context_t ctxt = pCtxtElem->getContext();
776 // check this is an updated context
777 if(ctxt.updated)
778 {
779 err = m_out_elem.addElem(pElem->getRootIndex());
780 if (!err) {
781 updateContext(pCtxtElem, outElem());
782
783 // updated context - need to force this to be output to the client so correct memory
784 // context can be used.
785 contextFlush = true;
786
787 // invalidate memory accessor cacheing - force next memory access out to client to
788 // ensure that the correct memory context is in play when decoding subsequent atoms.
789 invalidateMemAccCache();
790 }
791 }
792 }
793 }
794 break;
795
796 case P0_EVENT:
797 case P0_TS:
798 case P0_CC:
799 case P0_TS_CC:
800 err = processTS_CC_EventElem(pElem);
801 break;
802
803 case P0_MARKER:
804 err = processMarkerElem(pElem);
805 break;
806
807 case P0_ATOM:
808 {
809 TrcStackElemAtom *pAtomElem = dynamic_cast<TrcStackElemAtom *>(pElem);
810
811 if (pAtomElem)
812 {
813 while(!pAtomElem->isEmpty() && m_elem_res.P0_commit && !err)
814 {
815 ocsd_atm_val atom = pAtomElem->commitOldest();
816
817 // check if prev atom left us an indirect address target on the return stack
818 if ((err = returnStackPop()) != OCSD_OK)
819 break;
820
821 // if address and context do instruction trace follower.
822 // otherwise skip atom and reduce committed elements
823 if (!m_need_ctxt && !m_need_addr)
824 {
825 err = processAtom(atom);
826 }
827 m_elem_res.P0_commit--; // mark committed
828 }
829 if (!pAtomElem->isEmpty())
830 bPopElem = false; // don't remove if still atoms to process.
831 }
832 }
833 break;
834
835 case P0_EXCEP:
836 // check if prev atom left us an indirect address target on the return stack
837 if ((err = returnStackPop()) != OCSD_OK)
838 break;
839
840 err = processException(); // output trace + exception elements.
841 m_elem_res.P0_commit--;
842 break;
843
844 case P0_EXCEP_RET:
845 err = m_out_elem.addElemType(pElem->getRootIndex(), OCSD_GEN_TRC_ELEM_EXCEPTION_RET);
846 if (!err)
847 {
848 if (pElem->isP0()) // are we on a core that counts ERET as P0?
849 m_elem_res.P0_commit--;
850 }
851 break;
852
853 case P0_FUNC_RET:
854 // func ret is V8M - data trace only - hint that data has been popped off the stack.
855 // at this point nothing to do till the decoder starts handling data trace.
856 if (pElem->isP0())
857 m_elem_res.P0_commit--;
858 break;
859
860 case P0_SRC_ADDR:
861 err = processSourceAddress();
862 m_elem_res.P0_commit--;
863 break;
864
865 case P0_Q:
866 err = processQElement();
867 m_elem_res.P0_commit--;
868 break;
869
870 case P0_TRANS_START:
871 if (m_config->commTransP0())
872 m_elem_res.P0_commit--;
873 case P0_TRANS_COMMIT:
874 case P0_TRANS_FAIL:
875 case P0_TRANS_TRACE_INIT:
876 err = processTransElem(pElem);
877 break;
878
879 case P0_ITE:
880 err = processITEElem(pElem);
881 break;
882 }
883
884 if(bPopElem)
885 m_P0_stack.delete_back(); // remove element from stack;
886 }
887 else
888 {
889 // too few elements for commit operation - decode error.
890 err = handlePacketSeqErr(OCSD_ERR_COMMIT_PKT_OVERRUN, err_idx, "Not enough elements to commit");
891 }
892 }
893
894 // reduce the spec depth by number of comitted elements
895 m_curr_spec_depth -= (num_commit_req-m_elem_res.P0_commit);
896 return err;
897 }
898
returnStackPop()899 ocsd_err_t TrcPktDecodeEtmV4I::returnStackPop()
900 {
901 ocsd_err_t err = OCSD_OK;
902 ocsd_isa nextISA;
903
904 if (m_return_stack.pop_pending())
905 {
906 ocsd_vaddr_t popAddr = m_return_stack.pop(nextISA);
907 if (m_return_stack.overflow())
908 {
909 err = OCSD_ERR_RET_STACK_OVERFLOW;
910 err = handlePacketSeqErr(err, OCSD_BAD_TRC_INDEX, "Trace Return Stack Overflow.");
911 }
912 else
913 {
914 m_instr_info.instr_addr = popAddr;
915 m_instr_info.isa = nextISA;
916 m_need_addr = false;
917 }
918 }
919 return err;
920 }
921
commitElemOnEOT()922 ocsd_err_t TrcPktDecodeEtmV4I::commitElemOnEOT()
923 {
924 ocsd_err_t err = OCSD_OK;
925 TrcStackElem *pElem = 0;
926
927 // nothing outstanding - reset the stack before we add more
928 if (!m_out_elem.numElemToSend())
929 m_out_elem.resetElemStack();
930
931 while((m_P0_stack.size() > 0) && !err)
932 {
933 // scan for outstanding events, TS and CC, that appear before any outstanding
934 // uncommited P0 element.
935 pElem = m_P0_stack.back();
936
937 switch(pElem->getP0Type())
938 {
939 // clear stack and stop
940 case P0_UNKNOWN:
941 case P0_ATOM:
942 case P0_TRC_ON:
943 case P0_EXCEP:
944 case P0_EXCEP_RET:
945 case P0_OVERFLOW:
946 case P0_Q:
947 m_P0_stack.delete_all();
948 break;
949
950 //skip
951 case P0_ADDR:
952 case P0_CTXT:
953 break;
954
955 // trans
956 // P0 trans - clear and stop, otherwise skip
957 case P0_TRANS_START:
958 if (m_config->commTransP0())
959 m_P0_stack.delete_all();
960 break;
961
962 // non-speculative trans fail / commit - could appear at EoT after valid trace
963 // but without a subsequent P0 that would force output.
964 case P0_TRANS_FAIL:
965 case P0_TRANS_COMMIT:
966 if (m_max_spec_depth == 0 || m_curr_spec_depth == 0)
967 err = processTransElem(pElem);
968 break;
969
970 // others - skip non P0
971 case P0_TRANS_TRACE_INIT:
972 break;
973
974 // output
975 case P0_EVENT:
976 case P0_TS:
977 case P0_CC:
978 case P0_TS_CC:
979 err = processTS_CC_EventElem(pElem);
980 break;
981
982 case P0_MARKER:
983 err = processMarkerElem(pElem);
984 break;
985
986 case P0_ITE:
987 err = processITEElem(pElem);
988 break;
989 }
990 m_P0_stack.delete_back();
991 }
992
993 if(!err)
994 {
995 err = m_out_elem.addElemType(m_index_curr_pkt, OCSD_GEN_TRC_ELEM_EO_TRACE);
996 outElem().setUnSyncEOTReason(m_prev_overflow ? UNSYNC_OVERFLOW : UNSYNC_EOT);
997 }
998 return err;
999 }
1000
1001 // cancel elements. These not output
cancelElements()1002 ocsd_err_t TrcPktDecodeEtmV4I::cancelElements()
1003 {
1004 ocsd_err_t err = OCSD_OK;
1005 bool P0StackDone = false; // checked all P0 elements on the stack
1006 TrcStackElem *pElem = 0; // stacked element pointer
1007 EtmV4P0Stack temp;
1008 int num_cancel_req = m_elem_res.P0_cancel;
1009
1010 while (m_elem_res.P0_cancel)
1011 {
1012 //search the stack for the newest elements
1013 if (!P0StackDone)
1014 {
1015 if (m_P0_stack.size() == 0)
1016 P0StackDone = true;
1017 else
1018 {
1019 // get the newest element
1020 pElem = m_P0_stack.front();
1021 if (pElem->isP0()) {
1022 if (pElem->getP0Type() == P0_ATOM)
1023 {
1024 TrcStackElemAtom *pAtomElem = (TrcStackElemAtom *)pElem;
1025 // atom - cancel N atoms
1026 m_elem_res.P0_cancel -= pAtomElem->cancelNewest(m_elem_res.P0_cancel);
1027 if (pAtomElem->isEmpty())
1028 m_P0_stack.delete_front(); // remove the element
1029 }
1030 else
1031 {
1032 m_elem_res.P0_cancel--;
1033 m_P0_stack.delete_front(); // remove the element
1034 }
1035 } else {
1036 // not P0, make a keep / remove decision
1037 switch (pElem->getP0Type())
1038 {
1039 // keep these
1040 case P0_EVENT:
1041 case P0_TS:
1042 case P0_CC:
1043 case P0_TS_CC:
1044 case P0_MARKER:
1045 case P0_ITE:
1046 m_P0_stack.pop_front(false);
1047 temp.push_back(pElem);
1048 break;
1049
1050 default:
1051 m_P0_stack.delete_front();
1052 break;
1053 }
1054 }
1055 if (m_P0_stack.size() == 0)
1056 P0StackDone = true;
1057 }
1058 }
1059 // may have some unseen elements
1060 else if (m_unseen_spec_elem)
1061 {
1062 m_unseen_spec_elem--;
1063 m_elem_res.P0_cancel--;
1064 }
1065 // otherwise we have some sort of overrun
1066 else
1067 {
1068 // too few elements for commit operation - decode error.
1069 err = OCSD_ERR_COMMIT_PKT_OVERRUN;
1070 err = handlePacketSeqErr(err, m_index_curr_pkt, "Not enough elements to cancel");
1071 m_elem_res.P0_cancel = 0;
1072 break;
1073 }
1074 }
1075
1076 /* restore any saved elements that are unaffected by cancel. */
1077 if (temp.size())
1078 {
1079 while (temp.size())
1080 {
1081 pElem = temp.back();
1082 m_P0_stack.push_front(pElem);
1083 temp.pop_back(false);
1084 }
1085 }
1086
1087 m_curr_spec_depth -= num_cancel_req - m_elem_res.P0_cancel;
1088 return err;
1089 }
1090
1091 // mispredict an atom
mispredictAtom()1092 ocsd_err_t TrcPktDecodeEtmV4I::mispredictAtom()
1093 {
1094 ocsd_err_t err = OCSD_OK;
1095 bool bFoundAtom = false, bDone = false;
1096 TrcStackElem *pElem = 0;
1097
1098 m_P0_stack.from_front_init(); // init iterator at front.
1099 while (!bDone)
1100 {
1101 pElem = m_P0_stack.from_front_next();
1102 if (pElem)
1103 {
1104 if (pElem->getP0Type() == P0_ATOM)
1105 {
1106 TrcStackElemAtom *pAtomElem = dynamic_cast<TrcStackElemAtom *>(pElem);
1107 if (pAtomElem)
1108 {
1109 pAtomElem->mispredictNewest();
1110 bFoundAtom = true;
1111 }
1112 bDone = true;
1113 }
1114 else if (pElem->getP0Type() == P0_ADDR)
1115 {
1116 // need to disregard any addresses that appear between mispredict and the atom in question
1117 m_P0_stack.erase_curr_from_front();
1118 }
1119 }
1120 else
1121 bDone = true;
1122 }
1123
1124 // if missed atom then either overrun error or mispredict on unseen element
1125 if (!bFoundAtom && !m_unseen_spec_elem)
1126 {
1127 err = OCSD_ERR_COMMIT_PKT_OVERRUN;
1128 err = handlePacketSeqErr(err, m_index_curr_pkt, "Not found mispredict atom");
1129 //LogError(ocsdError(OCSD_ERR_SEV_ERROR, err, m_index_curr_pkt, m_CSID, "Not found mispredict atom"));
1130 }
1131 m_elem_res.mispredict = false;
1132 return err;
1133 }
1134
1135 // discard elements and flush
discardElements()1136 ocsd_err_t TrcPktDecodeEtmV4I::discardElements()
1137 {
1138 ocsd_err_t err = OCSD_OK;
1139 TrcStackElem *pElem = 0; // stacked element pointer
1140
1141 // dump P0, elemnts - output remaining CC / TS
1142 while ((m_P0_stack.size() > 0) && !err)
1143 {
1144 pElem = m_P0_stack.back();
1145 if (pElem->getP0Type() == P0_MARKER)
1146 err = processMarkerElem(pElem);
1147 else if (pElem->getP0Type() == P0_MARKER)
1148 err = processITEElem(pElem);
1149 else
1150 err = processTS_CC_EventElem(pElem);
1151 m_P0_stack.delete_back();
1152 }
1153
1154 // clear all speculation info
1155 clearElemRes();
1156 m_curr_spec_depth = 0;
1157
1158 // set decode state
1159 m_curr_state = NO_SYNC;
1160 m_unsync_eot_info = m_prev_overflow ? UNSYNC_OVERFLOW : UNSYNC_DISCARD;
1161
1162 // unsync so need context & address.
1163 m_need_ctxt = true;
1164 m_need_addr = true;
1165 m_elem_pending_addr = false;
1166 return err;
1167 }
1168
processTS_CC_EventElem(TrcStackElem * pElem)1169 ocsd_err_t TrcPktDecodeEtmV4I::processTS_CC_EventElem(TrcStackElem *pElem)
1170 {
1171 ocsd_err_t err = OCSD_OK;
1172 // ignore ts for ETE if not seen first TS marker on systems that use this.
1173 bool bPermitTS = !m_config->eteHasTSMarker() || m_ete_first_ts_marker;
1174
1175 switch (pElem->getP0Type())
1176 {
1177 case P0_EVENT:
1178 {
1179 TrcStackElemParam *pParamElem = dynamic_cast<TrcStackElemParam *>(pElem);
1180 if (pParamElem)
1181 err = addElemEvent(pParamElem);
1182 }
1183 break;
1184
1185 case P0_TS:
1186 {
1187 TrcStackElemParam *pParamElem = dynamic_cast<TrcStackElemParam *>(pElem);
1188 if (pParamElem && bPermitTS)
1189 err = addElemTS(pParamElem, false);
1190 }
1191 break;
1192
1193 case P0_CC:
1194 {
1195 TrcStackElemParam *pParamElem = dynamic_cast<TrcStackElemParam *>(pElem);
1196 if (pParamElem)
1197 err = addElemCC(pParamElem);
1198 }
1199 break;
1200
1201 case P0_TS_CC:
1202 {
1203 TrcStackElemParam *pParamElem = dynamic_cast<TrcStackElemParam *>(pElem);
1204 if (pParamElem && bPermitTS)
1205 err = addElemTS(pParamElem, true);
1206 }
1207 break;
1208 }
1209 return err;
1210
1211 }
1212
processMarkerElem(TrcStackElem * pElem)1213 ocsd_err_t TrcPktDecodeEtmV4I::processMarkerElem(TrcStackElem *pElem)
1214 {
1215 ocsd_err_t err = OCSD_OK;
1216 TrcStackElemMarker *pMarkerElem = dynamic_cast<TrcStackElemMarker *>(pElem);
1217
1218 if (m_config->eteHasTSMarker() && (pMarkerElem->getMarker().type == ELEM_MARKER_TS))
1219 m_ete_first_ts_marker = true;
1220
1221 if (!err)
1222 {
1223 err = m_out_elem.addElemType(pElem->getRootIndex(), OCSD_GEN_TRC_ELEM_SYNC_MARKER);
1224 if (!err)
1225 m_out_elem.getCurrElem().setSyncMarker(pMarkerElem->getMarker());
1226 }
1227 return err;
1228 }
1229
processTransElem(TrcStackElem * pElem)1230 ocsd_err_t TrcPktDecodeEtmV4I::processTransElem(TrcStackElem *pElem)
1231 {
1232 ocsd_err_t err = m_out_elem.addElemType(pElem->getRootIndex(), OCSD_GEN_TRC_ELEM_MEMTRANS);
1233 if (!err)
1234 {
1235 outElem().setTransactionType((trace_memtrans_t)((int)OCSD_MEM_TRANS_FAIL -
1236 ((int)P0_TRANS_FAIL - (int)pElem->getP0Type())));
1237 }
1238 return err;
1239 }
1240
processITEElem(TrcStackElem * pElem)1241 ocsd_err_t TrcPktDecodeEtmV4I::processITEElem(TrcStackElem *pElem)
1242 {
1243 ocsd_err_t err = OCSD_OK;
1244 TrcStackElemITE *pITEElem = dynamic_cast<TrcStackElemITE *>(pElem);
1245
1246 err = m_out_elem.addElemType(pElem->getRootIndex(), OCSD_GEN_TRC_ELEM_INSTRUMENTATION);
1247 if (!err) {
1248 outElem().setITEInfo(pITEElem->getITE());
1249 }
1250 return err;
1251 }
1252
addElemCC(TrcStackElemParam * pParamElem)1253 ocsd_err_t TrcPktDecodeEtmV4I::addElemCC(TrcStackElemParam *pParamElem)
1254 {
1255 ocsd_err_t err = OCSD_OK;
1256
1257 err = m_out_elem.addElemType(pParamElem->getRootIndex(), OCSD_GEN_TRC_ELEM_CYCLE_COUNT);
1258 if (!err)
1259 outElem().setCycleCount(pParamElem->getParam(0));
1260 return err;
1261 }
1262
addElemTS(TrcStackElemParam * pParamElem,bool withCC)1263 ocsd_err_t TrcPktDecodeEtmV4I::addElemTS(TrcStackElemParam *pParamElem, bool withCC)
1264 {
1265 ocsd_err_t err = OCSD_OK;
1266
1267 err = m_out_elem.addElemType(pParamElem->getRootIndex(), OCSD_GEN_TRC_ELEM_TIMESTAMP);
1268 if (!err)
1269 {
1270 outElem().timestamp = (uint64_t)(pParamElem->getParam(0)) | (((uint64_t)pParamElem->getParam(1)) << 32);
1271 if (withCC)
1272 outElem().setCycleCount(pParamElem->getParam(2));
1273 }
1274 return err;
1275 }
1276
addElemEvent(TrcStackElemParam * pParamElem)1277 ocsd_err_t TrcPktDecodeEtmV4I::addElemEvent(TrcStackElemParam *pParamElem)
1278 {
1279 ocsd_err_t err = OCSD_OK;
1280
1281 err = m_out_elem.addElemType(pParamElem->getRootIndex(), OCSD_GEN_TRC_ELEM_EVENT);
1282 if (!err)
1283 {
1284 outElem().trace_event.ev_type = EVENT_NUMBERED;
1285 outElem().trace_event.ev_number = pParamElem->getParam(0);
1286 }
1287 return err;
1288 }
1289
setElemTraceRange(OcsdTraceElement & elemIn,const instr_range_t & addr_range,const bool executed,ocsd_trc_index_t index)1290 void TrcPktDecodeEtmV4I::setElemTraceRange(OcsdTraceElement &elemIn, const instr_range_t &addr_range,
1291 const bool executed, ocsd_trc_index_t index)
1292 {
1293 setElemTraceRangeInstr(elemIn, addr_range, executed, index, m_instr_info);
1294 }
1295
setElemTraceRangeInstr(OcsdTraceElement & elemIn,const instr_range_t & addr_range,const bool executed,ocsd_trc_index_t index,ocsd_instr_info & instr)1296 void TrcPktDecodeEtmV4I::setElemTraceRangeInstr(OcsdTraceElement &elemIn, const instr_range_t &addr_range,
1297 const bool executed, ocsd_trc_index_t index, ocsd_instr_info &instr)
1298 {
1299 elemIn.setType(OCSD_GEN_TRC_ELEM_INSTR_RANGE);
1300 elemIn.setLastInstrInfo(executed, instr.type, instr.sub_type, instr.instr_size);
1301 elemIn.setISA(instr.isa);
1302 elemIn.setLastInstrCond(instr.is_conditional);
1303 elemIn.setAddrRange(addr_range.st_addr, addr_range.en_addr, addr_range.num_instr);
1304 if (executed)
1305 instr.isa = instr.next_isa;
1306 }
1307
processAtom(const ocsd_atm_val atom)1308 ocsd_err_t TrcPktDecodeEtmV4I::processAtom(const ocsd_atm_val atom)
1309 {
1310 ocsd_err_t err;
1311 TrcStackElem *pElem = m_P0_stack.back(); // get the atom element
1312 WP_res_t WPRes;
1313 instr_range_t addr_range;
1314 bool ETE_ERET = false;
1315
1316 // new element for this processed atom
1317 if ((err = m_out_elem.addElem(pElem->getRootIndex())) != OCSD_OK)
1318 return err;
1319
1320 err = traceInstrToWP(addr_range, WPRes);
1321 if(err != OCSD_OK)
1322 {
1323 if(err == OCSD_ERR_UNSUPPORTED_ISA)
1324 {
1325 m_need_addr = true;
1326 m_need_ctxt = true;
1327 LogError(ocsdError(OCSD_ERR_SEV_WARN,err,pElem->getRootIndex(),m_CSID,"Warning: unsupported instruction set processing atom packet."));
1328 // wait for next context
1329 return OCSD_OK;
1330 }
1331 else
1332 {
1333 err = handlePacketSeqErr(err, pElem->getRootIndex(), "Error processing atom packet.");
1334 //LogError(ocsdError(OCSD_ERR_SEV_ERROR,err,pElem->getRootIndex(),m_CSID,"Error processing atom packet."));
1335 return err;
1336 }
1337 }
1338
1339 if(WPFound(WPRes))
1340 {
1341 // save recorded next instuction address
1342 ocsd_vaddr_t nextAddr = m_instr_info.instr_addr;
1343
1344 // action according to waypoint type and atom value
1345 switch(m_instr_info.type)
1346 {
1347 case OCSD_INSTR_BR:
1348 if (atom == ATOM_E)
1349 {
1350 m_instr_info.instr_addr = m_instr_info.branch_addr;
1351 if (m_instr_info.is_link)
1352 m_return_stack.push(nextAddr, m_instr_info.isa);
1353
1354 }
1355 break;
1356
1357 case OCSD_INSTR_BR_INDIRECT:
1358 if (atom == ATOM_E)
1359 {
1360 m_need_addr = true; // indirect branch taken - need new address.
1361 if (m_instr_info.is_link)
1362 m_return_stack.push(nextAddr,m_instr_info.isa);
1363 m_return_stack.set_pop_pending(); // need to know next packet before we know what is to happen
1364
1365 /* ETE does not have ERET trace packets - however to maintain the illusion if we see an ERET
1366 output a gen elem ERET packet */
1367 if (isETEConfig() && (m_instr_info.sub_type == OCSD_S_INSTR_V8_ERET))
1368 ETE_ERET = true;
1369 }
1370 break;
1371 }
1372 setElemTraceRange(outElem(), addr_range, (atom == ATOM_E), pElem->getRootIndex());
1373
1374 if (ETE_ERET)
1375 {
1376 err = m_out_elem.addElemType(pElem->getRootIndex(), OCSD_GEN_TRC_ELEM_EXCEPTION_RET);
1377 if (err)
1378 return err;
1379 }
1380 }
1381 else
1382 {
1383 // no waypoint - likely inaccessible memory range.
1384 m_need_addr = true; // need an address update
1385
1386 if(addr_range.st_addr != addr_range.en_addr)
1387 {
1388 // some trace before we were out of memory access range
1389 setElemTraceRange(outElem(), addr_range, true, pElem->getRootIndex());
1390
1391 // another element for the nacc...
1392 if (WPNacc(WPRes))
1393 err = m_out_elem.addElem(pElem->getRootIndex());
1394 }
1395
1396 if(WPNacc(WPRes) && !err)
1397 {
1398 outElem().setType(OCSD_GEN_TRC_ELEM_ADDR_NACC);
1399 outElem().st_addr = m_instr_info.instr_addr;
1400 outElem().exception_number = (uint32_t)getCurrMemSpace();
1401 }
1402 }
1403 return err;
1404 }
1405
1406 // Exception processor
1407 #define M_CLASS_TAIL_ADDR 0xFFFFFFFE
1408
processException()1409 ocsd_err_t TrcPktDecodeEtmV4I::processException()
1410 {
1411 ocsd_err_t err;
1412 TrcStackElem *pElem = 0;
1413 TrcStackElemExcept *pExceptElem = 0;
1414 TrcStackElemAddr *pAddressElem = 0;
1415 TrcStackElemCtxt *pCtxtElem = 0;
1416 bool branch_target = false; // exception address implies prior branch target address
1417 ocsd_vaddr_t excep_ret_addr = 0;
1418 ocsd_trc_index_t excep_pkt_index;
1419 WP_res_t WPRes = WP_NOT_FOUND;
1420 bool ETE_resetPkt = false;
1421 bool bMTailChain = false;
1422
1423 // grab the exception element off the stack
1424 pExceptElem = dynamic_cast<TrcStackElemExcept *>(m_P0_stack.back()); // get the exception element
1425 excep_pkt_index = pExceptElem->getRootIndex();
1426 branch_target = pExceptElem->getPrevSame();
1427 if (pExceptElem->getRootPkt() == ETE_PKT_I_PE_RESET)
1428 ETE_resetPkt = true;
1429 m_P0_stack.pop_back(); // remove the exception element
1430
1431 // ETE reset has no follow up address, the rest of the exceptions do....
1432 if (!ETE_resetPkt)
1433 {
1434 pElem = m_P0_stack.back(); // look at next element.
1435 if (pElem->getP0Type() == P0_CTXT)
1436 {
1437 pCtxtElem = dynamic_cast<TrcStackElemCtxt *>(pElem);
1438 m_P0_stack.pop_back(); // remove the context element
1439 pElem = m_P0_stack.back(); // next one should be an address element
1440 }
1441
1442 if (pElem->getP0Type() != P0_ADDR)
1443 {
1444 // no following address element - indicate processing error.
1445
1446 err = handlePacketSeqErr(OCSD_ERR_BAD_PACKET_SEQ, m_index_curr_pkt, "Address missing in exception packet.");
1447 //LogError(ocsdError(OCSD_ERR_SEV_ERROR, OCSD_ERR_BAD_PACKET_SEQ, excep_pkt_index, m_CSID, "Address missing in exception packet."));
1448 return err;
1449 }
1450 else
1451 {
1452 // extract address
1453 pAddressElem = static_cast<TrcStackElemAddr *>(pElem);
1454 excep_ret_addr = pAddressElem->getAddr().val;
1455
1456 // see if there is an address + optional context element implied
1457 // prior to the exception.
1458 if (branch_target)
1459 {
1460 // this was a branch target address - update current setting
1461 bool b64bit = m_instr_info.isa == ocsd_isa_aarch64;
1462 if (pCtxtElem) {
1463 b64bit = pCtxtElem->getContext().SF;
1464 }
1465
1466 // as the exception address was also a branch target address then update the
1467 // current maintained address value. This also means that there is no range to
1468 // output before the exception packet.
1469 m_instr_info.instr_addr = excep_ret_addr;
1470 m_instr_info.isa = (pAddressElem->getAddr().isa == 0) ?
1471 (b64bit ? ocsd_isa_aarch64 : ocsd_isa_arm) : ocsd_isa_thumb2;
1472 m_need_addr = false;
1473 }
1474 }
1475 }
1476
1477 // need to output something - set up an element
1478 if ((err = m_out_elem.addElem(excep_pkt_index)))
1479 return err;
1480
1481 // output a context element if present
1482 if (pCtxtElem)
1483 {
1484 updateContext(pCtxtElem, outElem());
1485
1486 // used the element - need another for later stages
1487 if ((err = m_out_elem.addElem(excep_pkt_index)))
1488 return err;
1489 }
1490
1491 if (!ETE_resetPkt)
1492 {
1493 /* check for M class tail chain / deferred exceptions */
1494 if (m_config->coreProfile() == profile_CortexM)
1495 bMTailChain = (excep_ret_addr == M_CLASS_TAIL_ADDR);
1496
1497 // if the preferred return address is not the end of the last output range...
1498 if ((m_instr_info.instr_addr < excep_ret_addr) && !bMTailChain)
1499 {
1500 bool range_out = false;
1501 instr_range_t addr_range;
1502
1503 // look for match to return address.
1504 err = traceInstrToWP(addr_range, WPRes, true, excep_ret_addr);
1505
1506 if (err != OCSD_OK)
1507 {
1508 if (err == OCSD_ERR_UNSUPPORTED_ISA)
1509 {
1510 m_need_addr = true;
1511 m_need_ctxt = true;
1512 LogError(ocsdError(OCSD_ERR_SEV_WARN, err, excep_pkt_index, m_CSID, "Warning: unsupported instruction set processing exception packet."));
1513 }
1514 else
1515 {
1516 LogError(ocsdError(OCSD_ERR_SEV_ERROR, err, excep_pkt_index, m_CSID, "Error processing exception packet."));
1517 }
1518 return err;
1519 }
1520
1521 if (WPFound(WPRes))
1522 {
1523 // waypoint address found - output range
1524 setElemTraceRange(outElem(), addr_range, true, excep_pkt_index);
1525 range_out = true;
1526 }
1527 else
1528 {
1529 // no waypoint - likely inaccessible memory range.
1530 m_need_addr = true; // need an address update
1531
1532 if (addr_range.st_addr != addr_range.en_addr)
1533 {
1534 // some trace before we were out of memory access range
1535 setElemTraceRange(outElem(), addr_range, true, excep_pkt_index);
1536 range_out = true;
1537 }
1538 }
1539
1540 // used the element need another for NACC or EXCEP.
1541 if (range_out)
1542 {
1543 if ((err = m_out_elem.addElem(excep_pkt_index)))
1544 return err;
1545 }
1546 }
1547
1548 // watchpoint walk resulted in inaccessible memory call...
1549 if (WPNacc(WPRes))
1550 {
1551
1552 outElem().setType(OCSD_GEN_TRC_ELEM_ADDR_NACC);
1553 outElem().st_addr = m_instr_info.instr_addr;
1554 outElem().exception_number = (uint32_t)getCurrMemSpace();
1555
1556 // used the element - need another for the final exception packet.
1557 if ((err = m_out_elem.addElem(excep_pkt_index)))
1558 return err;
1559 }
1560 }
1561
1562 // output exception element.
1563 outElem().setType(OCSD_GEN_TRC_ELEM_EXCEPTION);
1564
1565 // add end address as preferred return address to end addr in element
1566 outElem().en_addr = excep_ret_addr;
1567
1568 outElem().excep_ret_addr = 1;
1569 if (bMTailChain)
1570 {
1571 outElem().excep_ret_addr = 0;
1572 outElem().excep_M_tail_chain = 1;
1573 }
1574 outElem().excep_ret_addr_br_tgt = branch_target;
1575 outElem().exception_number = pExceptElem->getExcepNum();
1576
1577 m_P0_stack.delete_popped(); // clear the used elements from the stack
1578 return err;
1579 }
1580
processQElement()1581 ocsd_err_t TrcPktDecodeEtmV4I::processQElement()
1582 {
1583 ocsd_err_t err = OCSD_OK;
1584 TrcStackQElem *pQElem;
1585 etmv4_addr_val_t QAddr; // address where trace restarts
1586 int iCount = 0;
1587
1588 pQElem = dynamic_cast<TrcStackQElem *>(m_P0_stack.back()); // get the exception element
1589 m_P0_stack.pop_back(); // remove the Q element.
1590
1591 if (!pQElem->hasAddr()) // no address - it must be next on the stack....
1592 {
1593 TrcStackElemAddr *pAddressElem = 0;
1594 TrcStackElemCtxt *pCtxtElem = 0;
1595 TrcStackElem *pElem = 0;
1596
1597 pElem = m_P0_stack.back(); // look at next element.
1598 if (pElem->getP0Type() == P0_CTXT)
1599 {
1600 pCtxtElem = dynamic_cast<TrcStackElemCtxt *>(pElem);
1601 m_P0_stack.pop_back(); // remove the context element
1602 pElem = m_P0_stack.back(); // next one should be an address element
1603 }
1604
1605 if (pElem->getP0Type() != P0_ADDR)
1606 {
1607 // no following address element - indicate processing error.
1608 err = OCSD_ERR_BAD_PACKET_SEQ;
1609 LogError(ocsdError(OCSD_ERR_SEV_ERROR, err, pQElem->getRootIndex(), m_CSID, "Address missing in Q packet."));
1610 m_P0_stack.delete_popped();
1611 return err;
1612 }
1613 pAddressElem = dynamic_cast<TrcStackElemAddr *>(pElem);
1614 QAddr = pAddressElem->getAddr();
1615 m_P0_stack.pop_back(); // remove the address element
1616 m_P0_stack.delete_popped(); // clear used elements
1617
1618 // return the context element for processing next time.
1619 if (pCtxtElem)
1620 {
1621 // need a new copy at the back - old one will be deleted as popped.
1622 m_P0_stack.createContextElem(pCtxtElem->getRootPkt(), pCtxtElem->getRootIndex(), pCtxtElem->getContext(),true);
1623 }
1624 }
1625 else
1626 QAddr = pQElem->getAddr();
1627
1628 // process the Q element with address.
1629 iCount = pQElem->getInstrCount();
1630
1631 bool isBranch = false;
1632
1633 // need to output something - set up an element
1634 if ((err = m_out_elem.addElem(pQElem->getRootIndex())))
1635 return err;
1636
1637 instr_range_t addr_range;
1638 addr_range.st_addr = addr_range.en_addr = m_instr_info.instr_addr;
1639 addr_range.num_instr = 0;
1640
1641 // walk iCount instructions
1642 for (int i = 0; i < iCount; i++)
1643 {
1644 uint32_t opcode;
1645 uint32_t bytesReq = 4;
1646
1647 err = accessMemory(m_instr_info.instr_addr, getCurrMemSpace(), &bytesReq, (uint8_t *)&opcode);
1648 if (err != OCSD_OK) break;
1649
1650 if (bytesReq == 4) // got data back
1651 {
1652 m_instr_info.opcode = opcode;
1653 err = instrDecode(&m_instr_info);
1654 if (err != OCSD_OK) break;
1655
1656 // increment address - may be adjusted by direct branch value later
1657 m_instr_info.instr_addr += m_instr_info.instr_size;
1658 addr_range.num_instr++;
1659
1660 isBranch = (m_instr_info.type == OCSD_INSTR_BR) ||
1661 (m_instr_info.type == OCSD_INSTR_BR_INDIRECT);
1662
1663 // on a branch no way of knowing if taken - bail out
1664 if (isBranch)
1665 break;
1666 }
1667 else
1668 break; // missing memory
1669
1670 }
1671
1672 if (err == OCSD_OK)
1673 {
1674 bool inCompleteRange = true;
1675 if (iCount && (addr_range.num_instr == (unsigned)iCount))
1676 {
1677 if ((m_instr_info.instr_addr == QAddr.val) || // complete range
1678 (isBranch)) // or ends on branch - only way we know if branch taken.
1679 {
1680 // output a range and continue
1681 inCompleteRange = false;
1682 // update the range decoded address in the output packet.
1683 addr_range.en_addr = m_instr_info.instr_addr;
1684 setElemTraceRange(outElem(), addr_range, true, pQElem->getRootIndex());
1685 }
1686 }
1687
1688 if (inCompleteRange)
1689 {
1690 // unknown instructions executed.
1691 addr_range.en_addr = QAddr.val;
1692 addr_range.num_instr = iCount;
1693
1694 outElem().setType(OCSD_GEN_TRC_ELEM_I_RANGE_NOPATH);
1695 outElem().setAddrRange(addr_range.st_addr, addr_range.en_addr, addr_range.num_instr);
1696 outElem().setISA(calcISA(m_is_64bit, QAddr.isa));
1697 }
1698
1699 // after the Q element, tracing resumes at the address supplied
1700 SetInstrInfoInAddrISA(QAddr.val, QAddr.isa);
1701 m_need_addr = false;
1702 }
1703 else
1704 {
1705 // output error and halt decode.
1706 LogError(ocsdError(OCSD_ERR_SEV_ERROR, err, pQElem->getRootIndex(), m_CSID, "Error processing Q packet"));
1707 }
1708 m_P0_stack.delete_popped();
1709 return err;
1710 }
1711
processSourceAddress()1712 ocsd_err_t TrcPktDecodeEtmV4I::processSourceAddress()
1713 {
1714 ocsd_err_t err = OCSD_OK;
1715 TrcStackElemAddr *pElem = dynamic_cast<TrcStackElemAddr *>(m_P0_stack.back()); // get the address element
1716 etmv4_addr_val_t srcAddr = pElem->getAddr();
1717 uint32_t opcode, bytesReq = 4;
1718 ocsd_vaddr_t currAddr = m_instr_info.instr_addr; // get the latest decoded address.
1719 instr_range_t out_range;
1720 bool bSplitRangeOnN = getComponentOpMode() & ETE_OPFLG_PKTDEC_SRCADDR_N_ATOMS ? true : false;
1721
1722 // check we can read instruction @ source address
1723 err = accessMemory(srcAddr.val, getCurrMemSpace(), &bytesReq, (uint8_t *)&opcode);
1724 if (err != OCSD_OK)
1725 {
1726 LogError(ocsdError(OCSD_ERR_SEV_ERROR, err, pElem->getRootIndex(), m_CSID, "Mem access error processing source address packet."));
1727 return err;
1728 }
1729
1730 if (bytesReq != 4)
1731 {
1732 // can't access - no bytes returned - output nacc.
1733 err = m_out_elem.addElemType(pElem->getRootIndex(), OCSD_GEN_TRC_ELEM_ADDR_NACC);
1734 outElem().setAddrStart(srcAddr.val);
1735 outElem().exception_number = (uint32_t)getCurrMemSpace();
1736 return err;
1737 }
1738
1739 // analyze opcode @ source address.
1740 m_instr_info.opcode = opcode;
1741 m_instr_info.instr_addr = srcAddr.val;
1742 err = instrDecode(&m_instr_info);
1743 if (err != OCSD_OK)
1744 {
1745 LogError(ocsdError(OCSD_ERR_SEV_ERROR, err, pElem->getRootIndex(), m_CSID, "Instruction decode error processing source address packet."));
1746 return err;
1747 }
1748 m_instr_info.instr_addr += m_instr_info.instr_size;
1749
1750 // initial instruction count for the range.
1751 out_range.num_instr = 1;
1752
1753 // calculate range traced...
1754 if (m_need_addr || (currAddr > srcAddr.val))
1755 {
1756 // we were waiting for a target address, or missing trace
1757 // that indicates how we got to the source address.
1758 m_need_addr = false;
1759 out_range.st_addr = srcAddr.val;
1760 }
1761 else
1762 out_range.st_addr = currAddr;
1763 out_range.en_addr = m_instr_info.instr_addr;
1764
1765 // count instructions
1766 if (out_range.en_addr - out_range.st_addr > m_instr_info.instr_size)
1767 {
1768 if ((m_instr_info.isa != ocsd_isa_thumb2) && !bSplitRangeOnN)
1769 {
1770 // all 4 byte instructions - just calculate...
1771 out_range.num_instr = (uint32_t)(out_range.en_addr - out_range.st_addr) / 4;
1772 }
1773 else
1774 {
1775 // need to count T32 - 2 or 4 byte instructions or we are spotting N atoms
1776 ocsd_instr_info instr; // going back to start of range so make a copy of info.
1777 bool bMemAccErr = false;
1778
1779 instr.instr_addr = out_range.st_addr;
1780 instr.isa = m_instr_info.isa;
1781 instr.pe_type = m_instr_info.pe_type;
1782 instr.dsb_dmb_waypoints = m_instr_info.dsb_dmb_waypoints;
1783 instr.wfi_wfe_branch = m_instr_info.wfi_wfe_branch;
1784 out_range.num_instr = 0;
1785
1786 while ((instr.instr_addr < out_range.en_addr) && !bMemAccErr)
1787 {
1788 bytesReq = 4;
1789 err = accessMemory(instr.instr_addr, getCurrMemSpace(), &bytesReq, (uint8_t *)&opcode);
1790 if (err != OCSD_OK)
1791 {
1792 LogError(ocsdError(OCSD_ERR_SEV_ERROR, err, pElem->getRootIndex(), m_CSID, "Mem access error processing source address packet."));
1793 return err;
1794 }
1795
1796 if (bytesReq == 4)
1797 {
1798 instr.opcode = opcode;
1799 err = instrDecode(&instr);
1800 if (err != OCSD_OK)
1801 {
1802 LogError(ocsdError(OCSD_ERR_SEV_ERROR, err, pElem->getRootIndex(), m_CSID, "Instruction decode error processing source address packet."));
1803 return err;
1804 }
1805
1806 instr.instr_addr += instr.instr_size;
1807 out_range.num_instr++;
1808
1809 /* if we are doing N atom ranges ...*/
1810 if (bSplitRangeOnN && (instr.instr_addr < out_range.en_addr))
1811 {
1812 if (instr.type != OCSD_INSTR_OTHER)
1813 {
1814 instr_range_t mid_range = out_range;
1815 mid_range.en_addr = instr.instr_addr;
1816
1817 err = m_out_elem.addElem(pElem->getRootIndex());
1818 if (err)
1819 return err;
1820 setElemTraceRangeInstr(outElem(), mid_range, false, pElem->getRootIndex(), instr);
1821
1822 out_range.st_addr = mid_range.en_addr;
1823 out_range.num_instr = 0;
1824 }
1825 }
1826 }
1827 else
1828 {
1829 // something inaccessible between last and current...
1830 bMemAccErr = true;
1831
1832 err = m_out_elem.addElemType(pElem->getRootIndex(), OCSD_GEN_TRC_ELEM_ADDR_NACC);
1833 if (err)
1834 return err;
1835 outElem().setAddrStart(srcAddr.val);
1836 outElem().exception_number = (uint32_t)getCurrMemSpace();
1837
1838 // force range to the one instruction
1839 out_range.num_instr = 1;
1840 out_range.st_addr = srcAddr.val;
1841 out_range.en_addr = m_instr_info.instr_addr; // instr after the decoded instruction @ srcAddr.
1842 }
1843 }
1844 }
1845 }
1846
1847 // got to the source address - output trace range, and instruction as E atom.
1848 switch (m_instr_info.type)
1849 {
1850 case OCSD_INSTR_BR:
1851 if (m_instr_info.is_link)
1852 m_return_stack.push(m_instr_info.instr_addr, m_instr_info.isa);
1853 m_instr_info.instr_addr = m_instr_info.branch_addr;
1854 break;
1855
1856 case OCSD_INSTR_BR_INDIRECT:
1857 m_need_addr = true; // indirect branch taken - need new address.
1858 if (m_instr_info.is_link)
1859 m_return_stack.push(m_instr_info.instr_addr, m_instr_info.isa);
1860 m_return_stack.set_pop_pending(); // need to know next packet before we know what is to happen
1861 break;
1862 }
1863 m_instr_info.isa = m_instr_info.next_isa;
1864
1865 // set the trace range element.
1866 m_out_elem.addElem(pElem->getRootIndex());
1867 setElemTraceRange(outElem(), out_range, true, pElem->getRootIndex());
1868 return err;
1869 }
1870
SetInstrInfoInAddrISA(const ocsd_vaddr_t addr_val,const uint8_t isa)1871 void TrcPktDecodeEtmV4I::SetInstrInfoInAddrISA(const ocsd_vaddr_t addr_val, const uint8_t isa)
1872 {
1873 m_instr_info.instr_addr = addr_val;
1874 m_instr_info.isa = calcISA(m_is_64bit, isa);
1875 }
1876
1877 // trace an instruction range to a waypoint - and set next address to restart from.
traceInstrToWP(instr_range_t & range,WP_res_t & WPRes,const bool traceToAddrNext,const ocsd_vaddr_t nextAddrMatch)1878 ocsd_err_t TrcPktDecodeEtmV4I::traceInstrToWP(instr_range_t &range, WP_res_t &WPRes, const bool traceToAddrNext /*= false*/, const ocsd_vaddr_t nextAddrMatch /*= 0*/)
1879 {
1880 uint32_t opcode;
1881 uint32_t bytesReq;
1882 ocsd_err_t err = OCSD_OK;
1883
1884 range.st_addr = range.en_addr = m_instr_info.instr_addr;
1885 range.num_instr = 0;
1886
1887 WPRes = WP_NOT_FOUND;
1888
1889 while(WPRes == WP_NOT_FOUND)
1890 {
1891 // start off by reading next opcode;
1892 bytesReq = 4;
1893 err = accessMemory(m_instr_info.instr_addr, getCurrMemSpace(),&bytesReq,(uint8_t *)&opcode);
1894 if(err != OCSD_OK) break;
1895
1896 if(bytesReq == 4) // got data back
1897 {
1898 m_instr_info.opcode = opcode;
1899 err = instrDecode(&m_instr_info);
1900 if(err != OCSD_OK) break;
1901
1902 // increment address - may be adjusted by direct branch value later
1903 m_instr_info.instr_addr += m_instr_info.instr_size;
1904 range.num_instr++;
1905
1906 // either walking to match the next instruction address or a real watchpoint
1907 if (traceToAddrNext)
1908 {
1909 if (m_instr_info.instr_addr == nextAddrMatch)
1910 WPRes = WP_FOUND;
1911 }
1912 else if (m_instr_info.type != OCSD_INSTR_OTHER)
1913 WPRes = WP_FOUND;
1914 }
1915 else
1916 {
1917 // not enough memory accessible.
1918 WPRes = WP_NACC;
1919 }
1920
1921 if (m_num_instr_range_limit)
1922 {
1923 if (range.num_instr > (uint32_t)m_num_instr_range_limit)
1924 {
1925 err = OCSD_ERR_I_RANGE_LIMIT_OVERRUN;
1926 LogError(ocsdError(OCSD_ERR_SEV_ERROR, err, "Decode Instruction Range Limit Overrun"));
1927 }
1928 }
1929 }
1930 // update the range decoded address in the output packet.
1931 range.en_addr = m_instr_info.instr_addr;
1932 return err;
1933 }
1934
updateContext(TrcStackElemCtxt * pCtxtElem,OcsdTraceElement & elem)1935 void TrcPktDecodeEtmV4I::updateContext(TrcStackElemCtxt *pCtxtElem, OcsdTraceElement &elem)
1936 {
1937 etmv4_context_t ctxt = pCtxtElem->getContext();
1938
1939 elem.setType(OCSD_GEN_TRC_ELEM_PE_CONTEXT);
1940
1941 // map to output element and local saved state.
1942 m_is_64bit = (ctxt.SF != 0);
1943 elem.context.bits64 = ctxt.SF;
1944 m_is_secure = (ctxt.NS == 0);
1945 if (ctxt.NSE)
1946 elem.context.security_level = ctxt.NS ? ocsd_sec_realm : ocsd_sec_root;
1947 else
1948 elem.context.security_level = ctxt.NS ? ocsd_sec_nonsecure : ocsd_sec_secure;
1949 elem.context.exception_level = (ocsd_ex_level)ctxt.EL;
1950 elem.context.el_valid = 1;
1951 if(ctxt.updated_c)
1952 {
1953 elem.context.ctxt_id_valid = 1;
1954 m_context_id = elem.context.context_id = ctxt.ctxtID;
1955 }
1956 if(ctxt.updated_v)
1957 {
1958 elem.context.vmid_valid = 1;
1959 m_vmid_id = elem.context.vmid = ctxt.VMID;
1960 }
1961
1962 // need to update ISA in case context follows address.
1963 elem.isa = m_instr_info.isa = calcISA(m_is_64bit, pCtxtElem->getIS());
1964 m_need_ctxt = false;
1965 }
1966
handleBadPacket(const char * reason,ocsd_trc_index_t index)1967 ocsd_err_t TrcPktDecodeEtmV4I::handleBadPacket(const char *reason, ocsd_trc_index_t index /* = OCSD_BAD_TRC_INDEX */)
1968 {
1969 ocsd_err_severity_t sev = OCSD_ERR_SEV_WARN;
1970 if (getComponentOpMode() & OCSD_OPFLG_PKTDEC_ERROR_BAD_PKTS)
1971 sev = OCSD_ERR_SEV_ERROR;
1972
1973 return handlePacketErr(OCSD_ERR_BAD_DECODE_PKT, sev, index, reason);
1974 }
1975
handlePacketSeqErr(ocsd_err_t err,ocsd_trc_index_t index,const char * reason)1976 ocsd_err_t TrcPktDecodeEtmV4I::handlePacketSeqErr(ocsd_err_t err, ocsd_trc_index_t index, const char *reason)
1977 {
1978 return handlePacketErr(err, OCSD_ERR_SEV_ERROR, index, reason);
1979 }
1980
handlePacketErr(ocsd_err_t err,ocsd_err_severity_t sev,ocsd_trc_index_t index,const char * reason)1981 ocsd_err_t TrcPktDecodeEtmV4I::handlePacketErr(ocsd_err_t err, ocsd_err_severity_t sev, ocsd_trc_index_t index, const char *reason)
1982 {
1983 bool resetOnBadPackets = true;
1984
1985 if(getComponentOpMode() & OCSD_OPFLG_PKTDEC_HALT_BAD_PKTS)
1986 resetOnBadPackets = false;
1987
1988 LogError(ocsdError(sev, err, index, getCoreSightTraceID(), reason));
1989
1990 if (resetOnBadPackets)
1991 {
1992 // switch to unsync - clear decode state
1993 resetDecoder();
1994 m_curr_state = NO_SYNC;
1995 m_unsync_eot_info = UNSYNC_BAD_PACKET;
1996 err = OCSD_OK;
1997 }
1998 return err;
1999
2000 }
2001
getCurrMemSpace()2002 inline ocsd_mem_space_acc_t TrcPktDecodeEtmV4I::getCurrMemSpace()
2003 {
2004 static ocsd_mem_space_acc_t SMemSpace[] = {
2005 OCSD_MEM_SPACE_EL1S,
2006 OCSD_MEM_SPACE_EL1S,
2007 OCSD_MEM_SPACE_EL2S,
2008 OCSD_MEM_SPACE_EL3
2009 };
2010
2011 static ocsd_mem_space_acc_t NSMemSpace[] = {
2012 OCSD_MEM_SPACE_EL1N,
2013 OCSD_MEM_SPACE_EL1N,
2014 OCSD_MEM_SPACE_EL2,
2015 OCSD_MEM_SPACE_EL3
2016 };
2017
2018 static ocsd_mem_space_acc_t RMemSpace[] = {
2019 OCSD_MEM_SPACE_EL1R,
2020 OCSD_MEM_SPACE_EL1R,
2021 OCSD_MEM_SPACE_EL2R,
2022 OCSD_MEM_SPACE_ROOT
2023 };
2024
2025 /* if no valid EL value - just use S/NS */
2026 if (!outElem().context.el_valid)
2027 return m_is_secure ? OCSD_MEM_SPACE_S : OCSD_MEM_SPACE_N;
2028
2029 /* mem space according to EL + S/NS */
2030 ocsd_mem_space_acc_t mem_space = OCSD_MEM_SPACE_NONE;
2031 int el = (int)(outElem().context.exception_level) & 0x3;
2032
2033 switch (outElem().context.security_level)
2034 {
2035 case ocsd_sec_root:
2036 mem_space = OCSD_MEM_SPACE_ROOT;
2037 break;
2038 case ocsd_sec_realm:
2039 mem_space = RMemSpace[el];
2040 break;
2041 case ocsd_sec_nonsecure:
2042 mem_space = NSMemSpace[el];
2043 break;
2044 case ocsd_sec_secure:
2045 mem_space = SMemSpace[el];
2046 break;
2047 };
2048
2049 return mem_space;
2050 }
2051 /* End of File trc_pkt_decode_etmv4i.cpp */
2052