1 /*
2 * Copyright (c) 2016, Alliance for Open Media. All rights reserved
3 *
4 * This source code is subject to the terms of the BSD 2 Clause License and
5 * the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
6 * was not distributed with this source code in the LICENSE file, you can
7 * obtain it at www.aomedia.org/license/software. If the Alliance for Open
8 * Media Patent License 1.0 was not distributed with this source code in the
9 * PATENTS file, you can obtain it at www.aomedia.org/license/patent.
10 */
11
12 #include <arm_neon.h>
13
14 #include "aom/aom_integer.h"
15 #include "aom_dsp/arm/mem_neon.h"
16 #include "aom_dsp/arm/sum_neon.h"
17 #include "aom_ports/mem.h"
18 #include "config/aom_config.h"
19 #include "config/aom_dsp_rtcd.h"
20
variance_4xh_neon(const uint8_t * src,int src_stride,const uint8_t * ref,int ref_stride,int h,uint32_t * sse,int * sum)21 static INLINE void variance_4xh_neon(const uint8_t *src, int src_stride,
22 const uint8_t *ref, int ref_stride, int h,
23 uint32_t *sse, int *sum) {
24 int16x8_t sum_s16 = vdupq_n_s16(0);
25 int32x4_t sse_s32 = vdupq_n_s32(0);
26
27 // Number of rows we can process before 'sum_s16' overflows:
28 // 32767 / 255 ~= 128, but we use an 8-wide accumulator; so 256 4-wide rows.
29 assert(h <= 256);
30
31 int i = h;
32 do {
33 uint8x8_t s = load_unaligned_u8(src, src_stride);
34 uint8x8_t r = load_unaligned_u8(ref, ref_stride);
35 int16x8_t diff = vreinterpretq_s16_u16(vsubl_u8(s, r));
36
37 sum_s16 = vaddq_s16(sum_s16, diff);
38
39 sse_s32 = vmlal_s16(sse_s32, vget_low_s16(diff), vget_low_s16(diff));
40 sse_s32 = vmlal_s16(sse_s32, vget_high_s16(diff), vget_high_s16(diff));
41
42 src += 2 * src_stride;
43 ref += 2 * ref_stride;
44 i -= 2;
45 } while (i != 0);
46
47 *sum = horizontal_add_s16x8(sum_s16);
48 *sse = (uint32_t)horizontal_add_s32x4(sse_s32);
49 }
50
variance_8xh_neon(const uint8_t * src,int src_stride,const uint8_t * ref,int ref_stride,int h,uint32_t * sse,int * sum)51 static INLINE void variance_8xh_neon(const uint8_t *src, int src_stride,
52 const uint8_t *ref, int ref_stride, int h,
53 uint32_t *sse, int *sum) {
54 int16x8_t sum_s16 = vdupq_n_s16(0);
55 int32x4_t sse_s32[2] = { vdupq_n_s32(0), vdupq_n_s32(0) };
56
57 // Number of rows we can process before 'sum_s16' overflows:
58 // 32767 / 255 ~= 128
59 assert(h <= 128);
60
61 int i = h;
62 do {
63 uint8x8_t s = vld1_u8(src);
64 uint8x8_t r = vld1_u8(ref);
65 int16x8_t diff = vreinterpretq_s16_u16(vsubl_u8(s, r));
66
67 sum_s16 = vaddq_s16(sum_s16, diff);
68
69 sse_s32[0] = vmlal_s16(sse_s32[0], vget_low_s16(diff), vget_low_s16(diff));
70 sse_s32[1] =
71 vmlal_s16(sse_s32[1], vget_high_s16(diff), vget_high_s16(diff));
72
73 src += src_stride;
74 ref += ref_stride;
75 } while (--i != 0);
76
77 *sum = horizontal_add_s16x8(sum_s16);
78 *sse = (uint32_t)horizontal_add_s32x4(vaddq_s32(sse_s32[0], sse_s32[1]));
79 }
80
variance_16xh_neon(const uint8_t * src,int src_stride,const uint8_t * ref,int ref_stride,int h,uint32_t * sse,int * sum)81 static INLINE void variance_16xh_neon(const uint8_t *src, int src_stride,
82 const uint8_t *ref, int ref_stride, int h,
83 uint32_t *sse, int *sum) {
84 int16x8_t sum_s16[2] = { vdupq_n_s16(0), vdupq_n_s16(0) };
85 int32x4_t sse_s32[2] = { vdupq_n_s32(0), vdupq_n_s32(0) };
86
87 // Number of rows we can process before 'sum_s16' accumulators overflow:
88 // 32767 / 255 ~= 128, so 128 16-wide rows.
89 assert(h <= 128);
90
91 int i = h;
92 do {
93 uint8x16_t s = vld1q_u8(src);
94 uint8x16_t r = vld1q_u8(ref);
95
96 int16x8_t diff_l =
97 vreinterpretq_s16_u16(vsubl_u8(vget_low_u8(s), vget_low_u8(r)));
98 int16x8_t diff_h =
99 vreinterpretq_s16_u16(vsubl_u8(vget_high_u8(s), vget_high_u8(r)));
100
101 sum_s16[0] = vaddq_s16(sum_s16[0], diff_l);
102 sum_s16[1] = vaddq_s16(sum_s16[1], diff_h);
103
104 sse_s32[0] =
105 vmlal_s16(sse_s32[0], vget_low_s16(diff_l), vget_low_s16(diff_l));
106 sse_s32[1] =
107 vmlal_s16(sse_s32[1], vget_high_s16(diff_l), vget_high_s16(diff_l));
108 sse_s32[0] =
109 vmlal_s16(sse_s32[0], vget_low_s16(diff_h), vget_low_s16(diff_h));
110 sse_s32[1] =
111 vmlal_s16(sse_s32[1], vget_high_s16(diff_h), vget_high_s16(diff_h));
112
113 src += src_stride;
114 ref += ref_stride;
115 } while (--i != 0);
116
117 *sum = horizontal_add_s16x8(vaddq_s16(sum_s16[0], sum_s16[1]));
118 *sse = (uint32_t)horizontal_add_s32x4(vaddq_s32(sse_s32[0], sse_s32[1]));
119 }
120
variance_large_neon(const uint8_t * src,int src_stride,const uint8_t * ref,int ref_stride,int w,int h,int h_limit,uint32_t * sse,int * sum)121 static INLINE void variance_large_neon(const uint8_t *src, int src_stride,
122 const uint8_t *ref, int ref_stride,
123 int w, int h, int h_limit, uint32_t *sse,
124 int *sum) {
125 int32x4_t sum_s32 = vdupq_n_s32(0);
126 int32x4_t sse_s32[2] = { vdupq_n_s32(0), vdupq_n_s32(0) };
127
128 // 'h_limit' is the number of 'w'-width rows we can process before our 16-bit
129 // accumulator overflows. After hitting this limit we accumulate into 32-bit
130 // elements.
131 int h_tmp = h > h_limit ? h_limit : h;
132
133 int i = 0;
134 do {
135 int16x8_t sum_s16[2] = { vdupq_n_s16(0), vdupq_n_s16(0) };
136 do {
137 int j = 0;
138 do {
139 uint8x16_t s = vld1q_u8(src + j);
140 uint8x16_t r = vld1q_u8(ref + j);
141
142 int16x8_t diff_l =
143 vreinterpretq_s16_u16(vsubl_u8(vget_low_u8(s), vget_low_u8(r)));
144 int16x8_t diff_h =
145 vreinterpretq_s16_u16(vsubl_u8(vget_high_u8(s), vget_high_u8(r)));
146
147 sum_s16[0] = vaddq_s16(sum_s16[0], diff_l);
148 sum_s16[1] = vaddq_s16(sum_s16[1], diff_h);
149
150 sse_s32[0] =
151 vmlal_s16(sse_s32[0], vget_low_s16(diff_l), vget_low_s16(diff_l));
152 sse_s32[1] =
153 vmlal_s16(sse_s32[1], vget_high_s16(diff_l), vget_high_s16(diff_l));
154 sse_s32[0] =
155 vmlal_s16(sse_s32[0], vget_low_s16(diff_h), vget_low_s16(diff_h));
156 sse_s32[1] =
157 vmlal_s16(sse_s32[1], vget_high_s16(diff_h), vget_high_s16(diff_h));
158
159 j += 16;
160 } while (j < w);
161
162 src += src_stride;
163 ref += ref_stride;
164 i++;
165 } while (i < h_tmp);
166
167 sum_s32 = vpadalq_s16(sum_s32, sum_s16[0]);
168 sum_s32 = vpadalq_s16(sum_s32, sum_s16[1]);
169
170 h_tmp += h_limit;
171 } while (i < h);
172
173 *sum = horizontal_add_s32x4(sum_s32);
174 *sse = (uint32_t)horizontal_add_s32x4(vaddq_s32(sse_s32[0], sse_s32[1]));
175 }
176
variance_32xh_neon(const uint8_t * src,int src_stride,const uint8_t * ref,int ref_stride,int h,uint32_t * sse,int * sum)177 static INLINE void variance_32xh_neon(const uint8_t *src, int src_stride,
178 const uint8_t *ref, int ref_stride, int h,
179 uint32_t *sse, int *sum) {
180 variance_large_neon(src, src_stride, ref, ref_stride, 32, h, 64, sse, sum);
181 }
182
variance_64xh_neon(const uint8_t * src,int src_stride,const uint8_t * ref,int ref_stride,int h,uint32_t * sse,int * sum)183 static INLINE void variance_64xh_neon(const uint8_t *src, int src_stride,
184 const uint8_t *ref, int ref_stride, int h,
185 uint32_t *sse, int *sum) {
186 variance_large_neon(src, src_stride, ref, ref_stride, 64, h, 32, sse, sum);
187 }
188
variance_128xh_neon(const uint8_t * src,int src_stride,const uint8_t * ref,int ref_stride,int h,uint32_t * sse,int * sum)189 static INLINE void variance_128xh_neon(const uint8_t *src, int src_stride,
190 const uint8_t *ref, int ref_stride,
191 int h, uint32_t *sse, int *sum) {
192 variance_large_neon(src, src_stride, ref, ref_stride, 128, h, 16, sse, sum);
193 }
194
195 #define VARIANCE_WXH_NEON(w, h, shift) \
196 unsigned int aom_variance##w##x##h##_neon( \
197 const uint8_t *src, int src_stride, const uint8_t *ref, int ref_stride, \
198 unsigned int *sse) { \
199 int sum; \
200 variance_##w##xh_neon(src, src_stride, ref, ref_stride, h, sse, &sum); \
201 return *sse - (uint32_t)(((int64_t)sum * sum) >> shift); \
202 }
203
204 VARIANCE_WXH_NEON(4, 4, 4)
205 VARIANCE_WXH_NEON(4, 8, 5)
206 VARIANCE_WXH_NEON(4, 16, 6)
207
208 VARIANCE_WXH_NEON(8, 4, 5)
209 VARIANCE_WXH_NEON(8, 8, 6)
210 VARIANCE_WXH_NEON(8, 16, 7)
211 VARIANCE_WXH_NEON(8, 32, 8)
212
213 VARIANCE_WXH_NEON(16, 4, 6)
214 VARIANCE_WXH_NEON(16, 8, 7)
215 VARIANCE_WXH_NEON(16, 16, 8)
216 VARIANCE_WXH_NEON(16, 32, 9)
217 VARIANCE_WXH_NEON(16, 64, 10)
218
219 VARIANCE_WXH_NEON(32, 8, 8)
220 VARIANCE_WXH_NEON(32, 16, 9)
221 VARIANCE_WXH_NEON(32, 32, 10)
222 VARIANCE_WXH_NEON(32, 64, 11)
223
224 VARIANCE_WXH_NEON(64, 16, 10)
225 VARIANCE_WXH_NEON(64, 32, 11)
226 VARIANCE_WXH_NEON(64, 64, 12)
227 VARIANCE_WXH_NEON(64, 128, 13)
228
229 VARIANCE_WXH_NEON(128, 64, 13)
230 VARIANCE_WXH_NEON(128, 128, 14)
231
232 #undef VARIANCE_WXH_NEON
233
234 // TODO(yunqingwang): Perform variance of two/four 8x8 blocks similar to that of
235 // AVX2. Also, implement the NEON for variance computation present in this
236 // function.
aom_get_var_sse_sum_8x8_quad_neon(const uint8_t * src,int src_stride,const uint8_t * ref,int ref_stride,uint32_t * sse8x8,int * sum8x8,unsigned int * tot_sse,int * tot_sum,uint32_t * var8x8)237 void aom_get_var_sse_sum_8x8_quad_neon(const uint8_t *src, int src_stride,
238 const uint8_t *ref, int ref_stride,
239 uint32_t *sse8x8, int *sum8x8,
240 unsigned int *tot_sse, int *tot_sum,
241 uint32_t *var8x8) {
242 // Loop over four 8x8 blocks. Process one 8x32 block.
243 for (int k = 0; k < 4; k++) {
244 variance_8xh_neon(src + (k * 8), src_stride, ref + (k * 8), ref_stride, 8,
245 &sse8x8[k], &sum8x8[k]);
246 }
247
248 *tot_sse += sse8x8[0] + sse8x8[1] + sse8x8[2] + sse8x8[3];
249 *tot_sum += sum8x8[0] + sum8x8[1] + sum8x8[2] + sum8x8[3];
250 for (int i = 0; i < 4; i++) {
251 var8x8[i] = sse8x8[i] - (uint32_t)(((int64_t)sum8x8[i] * sum8x8[i]) >> 6);
252 }
253 }
254
aom_get_var_sse_sum_16x16_dual_neon(const uint8_t * src,int src_stride,const uint8_t * ref,int ref_stride,uint32_t * sse16x16,unsigned int * tot_sse,int * tot_sum,uint32_t * var16x16)255 void aom_get_var_sse_sum_16x16_dual_neon(const uint8_t *src, int src_stride,
256 const uint8_t *ref, int ref_stride,
257 uint32_t *sse16x16,
258 unsigned int *tot_sse, int *tot_sum,
259 uint32_t *var16x16) {
260 int sum16x16[2] = { 0 };
261 // Loop over two 16x16 blocks. Process one 16x32 block.
262 for (int k = 0; k < 2; k++) {
263 variance_16xh_neon(src + (k * 16), src_stride, ref + (k * 16), ref_stride,
264 16, &sse16x16[k], &sum16x16[k]);
265 }
266
267 *tot_sse += sse16x16[0] + sse16x16[1];
268 *tot_sum += sum16x16[0] + sum16x16[1];
269 for (int i = 0; i < 2; i++) {
270 var16x16[i] =
271 sse16x16[i] - (uint32_t)(((int64_t)sum16x16[i] * sum16x16[i]) >> 8);
272 }
273 }
274
mse8xh_neon(const uint8_t * src,int src_stride,const uint8_t * ref,int ref_stride,unsigned int * sse,int h)275 static INLINE unsigned int mse8xh_neon(const uint8_t *src, int src_stride,
276 const uint8_t *ref, int ref_stride,
277 unsigned int *sse, int h) {
278 uint8x8_t s[2], r[2];
279 int16x4_t diff_lo[2], diff_hi[2];
280 uint16x8_t diff[2];
281 int32x4_t sse_s32[2] = { vdupq_n_s32(0), vdupq_n_s32(0) };
282
283 int i = h;
284 do {
285 s[0] = vld1_u8(src);
286 src += src_stride;
287 s[1] = vld1_u8(src);
288 src += src_stride;
289 r[0] = vld1_u8(ref);
290 ref += ref_stride;
291 r[1] = vld1_u8(ref);
292 ref += ref_stride;
293
294 diff[0] = vsubl_u8(s[0], r[0]);
295 diff[1] = vsubl_u8(s[1], r[1]);
296
297 diff_lo[0] = vreinterpret_s16_u16(vget_low_u16(diff[0]));
298 diff_lo[1] = vreinterpret_s16_u16(vget_low_u16(diff[1]));
299 sse_s32[0] = vmlal_s16(sse_s32[0], diff_lo[0], diff_lo[0]);
300 sse_s32[1] = vmlal_s16(sse_s32[1], diff_lo[1], diff_lo[1]);
301
302 diff_hi[0] = vreinterpret_s16_u16(vget_high_u16(diff[0]));
303 diff_hi[1] = vreinterpret_s16_u16(vget_high_u16(diff[1]));
304 sse_s32[0] = vmlal_s16(sse_s32[0], diff_hi[0], diff_hi[0]);
305 sse_s32[1] = vmlal_s16(sse_s32[1], diff_hi[1], diff_hi[1]);
306
307 i -= 2;
308 } while (i != 0);
309
310 sse_s32[0] = vaddq_s32(sse_s32[0], sse_s32[1]);
311
312 *sse = horizontal_add_u32x4(vreinterpretq_u32_s32(sse_s32[0]));
313 return horizontal_add_u32x4(vreinterpretq_u32_s32(sse_s32[0]));
314 }
315
mse16xh_neon(const uint8_t * src,int src_stride,const uint8_t * ref,int ref_stride,unsigned int * sse,int h)316 static INLINE unsigned int mse16xh_neon(const uint8_t *src, int src_stride,
317 const uint8_t *ref, int ref_stride,
318 unsigned int *sse, int h) {
319 uint8x16_t s[2], r[2];
320 int16x4_t diff_lo[4], diff_hi[4];
321 uint16x8_t diff[4];
322 int32x4_t sse_s32[4] = { vdupq_n_s32(0), vdupq_n_s32(0), vdupq_n_s32(0),
323 vdupq_n_s32(0) };
324
325 int i = h;
326 do {
327 s[0] = vld1q_u8(src);
328 src += src_stride;
329 s[1] = vld1q_u8(src);
330 src += src_stride;
331 r[0] = vld1q_u8(ref);
332 ref += ref_stride;
333 r[1] = vld1q_u8(ref);
334 ref += ref_stride;
335
336 diff[0] = vsubl_u8(vget_low_u8(s[0]), vget_low_u8(r[0]));
337 diff[1] = vsubl_u8(vget_high_u8(s[0]), vget_high_u8(r[0]));
338 diff[2] = vsubl_u8(vget_low_u8(s[1]), vget_low_u8(r[1]));
339 diff[3] = vsubl_u8(vget_high_u8(s[1]), vget_high_u8(r[1]));
340
341 diff_lo[0] = vreinterpret_s16_u16(vget_low_u16(diff[0]));
342 diff_lo[1] = vreinterpret_s16_u16(vget_low_u16(diff[1]));
343 sse_s32[0] = vmlal_s16(sse_s32[0], diff_lo[0], diff_lo[0]);
344 sse_s32[1] = vmlal_s16(sse_s32[1], diff_lo[1], diff_lo[1]);
345
346 diff_lo[2] = vreinterpret_s16_u16(vget_low_u16(diff[2]));
347 diff_lo[3] = vreinterpret_s16_u16(vget_low_u16(diff[3]));
348 sse_s32[2] = vmlal_s16(sse_s32[2], diff_lo[2], diff_lo[2]);
349 sse_s32[3] = vmlal_s16(sse_s32[3], diff_lo[3], diff_lo[3]);
350
351 diff_hi[0] = vreinterpret_s16_u16(vget_high_u16(diff[0]));
352 diff_hi[1] = vreinterpret_s16_u16(vget_high_u16(diff[1]));
353 sse_s32[0] = vmlal_s16(sse_s32[0], diff_hi[0], diff_hi[0]);
354 sse_s32[1] = vmlal_s16(sse_s32[1], diff_hi[1], diff_hi[1]);
355
356 diff_hi[2] = vreinterpret_s16_u16(vget_high_u16(diff[2]));
357 diff_hi[3] = vreinterpret_s16_u16(vget_high_u16(diff[3]));
358 sse_s32[2] = vmlal_s16(sse_s32[2], diff_hi[2], diff_hi[2]);
359 sse_s32[3] = vmlal_s16(sse_s32[3], diff_hi[3], diff_hi[3]);
360
361 i -= 2;
362 } while (i != 0);
363
364 sse_s32[0] = vaddq_s32(sse_s32[0], sse_s32[1]);
365 sse_s32[2] = vaddq_s32(sse_s32[2], sse_s32[3]);
366 sse_s32[0] = vaddq_s32(sse_s32[0], sse_s32[2]);
367
368 *sse = horizontal_add_u32x4(vreinterpretq_u32_s32(sse_s32[0]));
369 return horizontal_add_u32x4(vreinterpretq_u32_s32(sse_s32[0]));
370 }
371
372 #define MSE_WXH_NEON(w, h) \
373 unsigned int aom_mse##w##x##h##_neon(const uint8_t *src, int src_stride, \
374 const uint8_t *ref, int ref_stride, \
375 unsigned int *sse) { \
376 return mse##w##xh_neon(src, src_stride, ref, ref_stride, sse, h); \
377 }
378
379 MSE_WXH_NEON(8, 8)
380 MSE_WXH_NEON(8, 16)
381
382 MSE_WXH_NEON(16, 8)
383 MSE_WXH_NEON(16, 16)
384
385 #undef MSE_WXH_NEON
386
mse_accumulate_u16_u8_8x2(uint64x2_t sum,uint16x8_t s0,uint16x8_t s1,uint8x8_t d0,uint8x8_t d1)387 static INLINE uint64x2_t mse_accumulate_u16_u8_8x2(uint64x2_t sum,
388 uint16x8_t s0, uint16x8_t s1,
389 uint8x8_t d0, uint8x8_t d1) {
390 int16x8_t e0 = vreinterpretq_s16_u16(vsubw_u8(s0, d0));
391 int16x8_t e1 = vreinterpretq_s16_u16(vsubw_u8(s1, d1));
392
393 int32x4_t mse = vmull_s16(vget_low_s16(e0), vget_low_s16(e0));
394 mse = vmlal_s16(mse, vget_high_s16(e0), vget_high_s16(e0));
395 mse = vmlal_s16(mse, vget_low_s16(e1), vget_low_s16(e1));
396 mse = vmlal_s16(mse, vget_high_s16(e1), vget_high_s16(e1));
397
398 return vpadalq_u32(sum, vreinterpretq_u32_s32(mse));
399 }
400
mse_wxh_16bit(uint8_t * dst,int dstride,const uint16_t * src,int sstride,int w,int h)401 static uint64x2_t mse_wxh_16bit(uint8_t *dst, int dstride, const uint16_t *src,
402 int sstride, int w, int h) {
403 assert((w == 8 || w == 4) && (h == 8 || h == 4));
404
405 uint64x2_t sum = vdupq_n_u64(0);
406
407 if (w == 8) {
408 do {
409 uint8x8_t d0 = vld1_u8(dst + 0 * dstride);
410 uint8x8_t d1 = vld1_u8(dst + 1 * dstride);
411 uint16x8_t s0 = vld1q_u16(src + 0 * sstride);
412 uint16x8_t s1 = vld1q_u16(src + 1 * sstride);
413
414 sum = mse_accumulate_u16_u8_8x2(sum, s0, s1, d0, d1);
415
416 dst += 2 * dstride;
417 src += 2 * sstride;
418 h -= 2;
419 } while (h != 0);
420 } else {
421 do {
422 uint8x8_t d0 = load_unaligned_u8_4x2(dst + 0 * dstride, dstride);
423 uint8x8_t d1 = load_unaligned_u8_4x2(dst + 2 * dstride, dstride);
424 uint16x8_t s0 = load_unaligned_u16_4x2(src + 0 * sstride, sstride);
425 uint16x8_t s1 = load_unaligned_u16_4x2(src + 2 * sstride, sstride);
426
427 sum = mse_accumulate_u16_u8_8x2(sum, s0, s1, d0, d1);
428
429 dst += 4 * dstride;
430 src += 4 * sstride;
431 h -= 4;
432 } while (h != 0);
433 }
434
435 return sum;
436 }
437
438 // Computes mse for a given block size. This function gets called for specific
439 // block sizes, which are 8x8, 8x4, 4x8 and 4x4.
aom_mse_wxh_16bit_neon(uint8_t * dst,int dstride,uint16_t * src,int sstride,int w,int h)440 uint64_t aom_mse_wxh_16bit_neon(uint8_t *dst, int dstride, uint16_t *src,
441 int sstride, int w, int h) {
442 return horizontal_add_u64x2(mse_wxh_16bit(dst, dstride, src, sstride, w, h));
443 }
444
aom_get_mb_ss_neon(const int16_t * a)445 uint32_t aom_get_mb_ss_neon(const int16_t *a) {
446 int32x4_t sse[2] = { vdupq_n_s32(0), vdupq_n_s32(0) };
447
448 for (int i = 0; i < 256; i = i + 8) {
449 int16x8_t a_s16 = vld1q_s16(a + i);
450
451 sse[0] = vmlal_s16(sse[0], vget_low_s16(a_s16), vget_low_s16(a_s16));
452 sse[1] = vmlal_s16(sse[1], vget_high_s16(a_s16), vget_high_s16(a_s16));
453 }
454
455 return horizontal_add_s32x4(vaddq_s32(sse[0], sse[1]));
456 }
457
aom_mse_16xh_16bit_neon(uint8_t * dst,int dstride,uint16_t * src,int w,int h)458 uint64_t aom_mse_16xh_16bit_neon(uint8_t *dst, int dstride, uint16_t *src,
459 int w, int h) {
460 uint64x2_t sum = vdupq_n_u64(0);
461
462 int num_blks = 16 / w;
463 do {
464 sum = vaddq_u64(sum, mse_wxh_16bit(dst, dstride, src, w, w, h));
465 dst += w;
466 src += w * h;
467 } while (--num_blks != 0);
468
469 return horizontal_add_u64x2(sum);
470 }
471