1 /* 2 ************************************************************************************************************************ 3 * 4 * Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. 5 * SPDX-License-Identifier: MIT 6 * 7 ***********************************************************************************************************************/ 8 9 /** 10 ************************************************************************************************************************ 11 * @file gfx11addrlib.h 12 * @brief Contains the Gfx11Lib class definition. 13 ************************************************************************************************************************ 14 */ 15 16 #ifndef __GFX11_ADDR_LIB_H__ 17 #define __GFX11_ADDR_LIB_H__ 18 19 #include "addrlib2.h" 20 #include "coord.h" 21 #include "gfx11SwizzlePattern.h" 22 23 namespace Addr 24 { 25 namespace V2 26 { 27 28 /** 29 ************************************************************************************************************************ 30 * @brief GFX11 specific settings structure. 31 ************************************************************************************************************************ 32 */ 33 struct Gfx11ChipSettings 34 { 35 struct 36 { 37 UINT_32 isGfx1150 : 1; 38 UINT_32 isGfx1103 : 1; 39 UINT_32 reserved1 : 30; 40 41 // Misc configuration bits 42 UINT_32 reserved2 : 32; 43 }; 44 }; 45 46 /** 47 ************************************************************************************************************************ 48 * @brief GFX11 data surface type. 49 ************************************************************************************************************************ 50 */ 51 enum Gfx11DataType 52 { 53 Gfx11DataColor, 54 Gfx11DataDepthStencil, 55 }; 56 57 const UINT_32 Gfx11LinearSwModeMask = (1u << ADDR_SW_LINEAR); 58 59 const UINT_32 Gfx11Blk256BSwModeMask = (1u << ADDR_SW_256B_D); 60 61 const UINT_32 Gfx11Blk4KBSwModeMask = (1u << ADDR_SW_4KB_S) | 62 (1u << ADDR_SW_4KB_D) | 63 (1u << ADDR_SW_4KB_S_X) | 64 (1u << ADDR_SW_4KB_D_X); 65 66 const UINT_32 Gfx11Blk64KBSwModeMask = (1u << ADDR_SW_64KB_S) | 67 (1u << ADDR_SW_64KB_D) | 68 (1u << ADDR_SW_64KB_S_T) | 69 (1u << ADDR_SW_64KB_D_T) | 70 (1u << ADDR_SW_64KB_Z_X) | 71 (1u << ADDR_SW_64KB_S_X) | 72 (1u << ADDR_SW_64KB_D_X) | 73 (1u << ADDR_SW_64KB_R_X); 74 75 const UINT_32 Gfx11Blk256KBSwModeMask = (1u << ADDR_SW_256KB_Z_X) | 76 (1u << ADDR_SW_256KB_S_X) | 77 (1u << ADDR_SW_256KB_D_X) | 78 (1u << ADDR_SW_256KB_R_X); 79 80 const UINT_32 Gfx11ZSwModeMask = (1u << ADDR_SW_64KB_Z_X) | 81 (1u << ADDR_SW_256KB_Z_X); 82 83 const UINT_32 Gfx11StandardSwModeMask = (1u << ADDR_SW_4KB_S) | 84 (1u << ADDR_SW_64KB_S) | 85 (1u << ADDR_SW_64KB_S_T) | 86 (1u << ADDR_SW_4KB_S_X) | 87 (1u << ADDR_SW_64KB_S_X) | 88 (1u << ADDR_SW_256KB_S_X); 89 90 const UINT_32 Gfx11DisplaySwModeMask = (1u << ADDR_SW_256B_D) | 91 (1u << ADDR_SW_4KB_D) | 92 (1u << ADDR_SW_64KB_D) | 93 (1u << ADDR_SW_64KB_D_T) | 94 (1u << ADDR_SW_4KB_D_X) | 95 (1u << ADDR_SW_64KB_D_X) | 96 (1u << ADDR_SW_256KB_D_X); 97 98 const UINT_32 Gfx11RenderSwModeMask = (1u << ADDR_SW_64KB_R_X) | 99 (1u << ADDR_SW_256KB_R_X); 100 101 const UINT_32 Gfx11XSwModeMask = (1u << ADDR_SW_4KB_S_X) | 102 (1u << ADDR_SW_4KB_D_X) | 103 (1u << ADDR_SW_64KB_Z_X) | 104 (1u << ADDR_SW_64KB_S_X) | 105 (1u << ADDR_SW_64KB_D_X) | 106 (1u << ADDR_SW_64KB_R_X) | 107 Gfx11Blk256KBSwModeMask; 108 109 const UINT_32 Gfx11TSwModeMask = (1u << ADDR_SW_64KB_S_T) | 110 (1u << ADDR_SW_64KB_D_T); 111 112 const UINT_32 Gfx11XorSwModeMask = Gfx11XSwModeMask | 113 Gfx11TSwModeMask; 114 115 const UINT_32 Gfx11Rsrc1dSwModeMask = (1u << ADDR_SW_LINEAR) | 116 (1u << ADDR_SW_64KB_R_X) | 117 (1u << ADDR_SW_64KB_Z_X) ; 118 119 const UINT_32 Gfx11Rsrc2dSwModeMask = Gfx11LinearSwModeMask | 120 Gfx11DisplaySwModeMask | 121 Gfx11ZSwModeMask | 122 Gfx11RenderSwModeMask; 123 124 const UINT_32 Gfx11Rsrc3dSwModeMask = Gfx11LinearSwModeMask | 125 Gfx11StandardSwModeMask | 126 Gfx11ZSwModeMask | 127 Gfx11RenderSwModeMask | 128 (1u << ADDR_SW_64KB_D_X) | 129 (1u << ADDR_SW_256KB_D_X); 130 131 const UINT_32 Gfx11Rsrc2dPrtSwModeMask = 132 (Gfx11Blk4KBSwModeMask | Gfx11Blk64KBSwModeMask) & ~Gfx11XSwModeMask & Gfx11Rsrc2dSwModeMask; 133 134 const UINT_32 Gfx11Rsrc3dPrtSwModeMask = 135 (Gfx11Blk4KBSwModeMask | Gfx11Blk64KBSwModeMask) & ~Gfx11XSwModeMask & Gfx11Rsrc3dSwModeMask; 136 137 const UINT_32 Gfx11Rsrc3dThin64KBSwModeMask = (1u << ADDR_SW_64KB_Z_X) | 138 (1u << ADDR_SW_64KB_R_X); 139 140 const UINT_32 Gfx11Rsrc3dThin256KBSwModeMask = (1u << ADDR_SW_256KB_Z_X) | 141 (1u << ADDR_SW_256KB_R_X); 142 143 const UINT_32 Gfx11Rsrc3dThinSwModeMask = Gfx11Rsrc3dThin64KBSwModeMask | Gfx11Rsrc3dThin256KBSwModeMask; 144 145 const UINT_32 Gfx11Rsrc3dThickSwModeMask = Gfx11Rsrc3dSwModeMask & ~(Gfx11Rsrc3dThinSwModeMask | Gfx11LinearSwModeMask); 146 147 const UINT_32 Gfx11Rsrc3dThick4KBSwModeMask = Gfx11Rsrc3dThickSwModeMask & Gfx11Blk4KBSwModeMask; 148 149 const UINT_32 Gfx11Rsrc3dThick64KBSwModeMask = Gfx11Rsrc3dThickSwModeMask & Gfx11Blk64KBSwModeMask; 150 151 const UINT_32 Gfx11Rsrc3dThick256KBSwModeMask = Gfx11Rsrc3dThickSwModeMask & Gfx11Blk256KBSwModeMask; 152 153 const UINT_32 Gfx11MsaaSwModeMask = Gfx11ZSwModeMask | 154 Gfx11RenderSwModeMask; 155 156 const UINT_32 Dcn32SwModeMask = (1u << ADDR_SW_LINEAR) | 157 (1u << ADDR_SW_64KB_D) | 158 (1u << ADDR_SW_64KB_D_T) | 159 (1u << ADDR_SW_64KB_D_X) | 160 (1u << ADDR_SW_64KB_R_X) | 161 (1u << ADDR_SW_256KB_D_X) | 162 (1u << ADDR_SW_256KB_R_X); 163 164 const UINT_32 Size256K = 262144u; 165 const UINT_32 Log2Size256K = 18u; 166 167 /** 168 ************************************************************************************************************************ 169 * @brief This class is the GFX11 specific address library 170 * function set. 171 ************************************************************************************************************************ 172 */ 173 class Gfx11Lib : public Lib 174 { 175 public: 176 /// Creates Gfx11Lib object CreateObj(const Client * pClient)177 static Addr::Lib* CreateObj(const Client* pClient) 178 { 179 VOID* pMem = Object::ClientAlloc(sizeof(Gfx11Lib), pClient); 180 return (pMem != NULL) ? new (pMem) Gfx11Lib(pClient) : NULL; 181 } 182 183 protected: 184 Gfx11Lib(const Client* pClient); 185 virtual ~Gfx11Lib(); 186 HwlIsStandardSwizzle(AddrResourceType resourceType,AddrSwizzleMode swizzleMode)187 virtual BOOL_32 HwlIsStandardSwizzle( 188 AddrResourceType resourceType, 189 AddrSwizzleMode swizzleMode) const 190 { 191 return m_swizzleModeTable[swizzleMode].isStd; 192 } 193 HwlIsDisplaySwizzle(AddrResourceType resourceType,AddrSwizzleMode swizzleMode)194 virtual BOOL_32 HwlIsDisplaySwizzle( 195 AddrResourceType resourceType, 196 AddrSwizzleMode swizzleMode) const 197 { 198 return m_swizzleModeTable[swizzleMode].isDisp; 199 } 200 HwlIsThin(AddrResourceType resourceType,AddrSwizzleMode swizzleMode)201 virtual BOOL_32 HwlIsThin( 202 AddrResourceType resourceType, 203 AddrSwizzleMode swizzleMode) const 204 { 205 return ((IsTex1d(resourceType) == TRUE) || 206 (IsTex2d(resourceType) == TRUE) || 207 ((IsTex3d(resourceType) == TRUE) && 208 (m_swizzleModeTable[swizzleMode].isStd == FALSE) && 209 (m_swizzleModeTable[swizzleMode].isDisp == FALSE))); 210 } 211 HwlIsThick(AddrResourceType resourceType,AddrSwizzleMode swizzleMode)212 virtual BOOL_32 HwlIsThick( 213 AddrResourceType resourceType, 214 AddrSwizzleMode swizzleMode) const 215 { 216 return ((IsTex3d(resourceType) == TRUE) && 217 (m_swizzleModeTable[swizzleMode].isStd || m_swizzleModeTable[swizzleMode].isDisp)); 218 } 219 220 virtual ADDR_E_RETURNCODE HwlComputeHtileInfo( 221 const ADDR2_COMPUTE_HTILE_INFO_INPUT* pIn, 222 ADDR2_COMPUTE_HTILE_INFO_OUTPUT* pOut) const; 223 224 virtual ADDR_E_RETURNCODE HwlComputeDccInfo( 225 const ADDR2_COMPUTE_DCCINFO_INPUT* pIn, 226 ADDR2_COMPUTE_DCCINFO_OUTPUT* pOut) const; 227 228 virtual ADDR_E_RETURNCODE HwlComputeHtileAddrFromCoord( 229 const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, 230 ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut); 231 232 virtual ADDR_E_RETURNCODE HwlComputeHtileCoordFromAddr( 233 const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, 234 ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut); 235 236 virtual ADDR_E_RETURNCODE HwlSupportComputeDccAddrFromCoord( 237 const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn); 238 239 virtual VOID HwlComputeDccAddrFromCoord( 240 const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn, 241 ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut); 242 243 virtual UINT_32 HwlGetEquationIndex( 244 const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, 245 ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 246 HwlGetEquationTableInfo(const ADDR_EQUATION ** ppEquationTable)247 virtual UINT_32 HwlGetEquationTableInfo(const ADDR_EQUATION** ppEquationTable) const 248 { 249 *ppEquationTable = m_equationTable; 250 251 return m_numEquations; 252 } 253 254 virtual ADDR_E_RETURNCODE HwlComputePipeBankXor( 255 const ADDR2_COMPUTE_PIPEBANKXOR_INPUT* pIn, 256 ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT* pOut) const; 257 258 virtual ADDR_E_RETURNCODE HwlComputeSlicePipeBankXor( 259 const ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT* pIn, 260 ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT* pOut) const; 261 262 virtual ADDR_E_RETURNCODE HwlComputeSubResourceOffsetForSwizzlePattern( 263 const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn, 264 ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT* pOut) const; 265 266 virtual ADDR_E_RETURNCODE HwlComputeNonBlockCompressedView( 267 const ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT* pIn, 268 ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT* pOut) const; 269 270 virtual ADDR_E_RETURNCODE HwlGetPreferredSurfaceSetting( 271 const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn, 272 ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut) const; 273 274 virtual ADDR_E_RETURNCODE HwlGetPossibleSwizzleModes( 275 const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn, 276 ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut) const; 277 278 virtual ADDR_E_RETURNCODE HwlGetAllowedBlockSet( 279 ADDR2_SWMODE_SET allowedSwModeSet, 280 AddrResourceType rsrcType, 281 ADDR2_BLOCK_SET* pAllowedBlockSet) const; 282 283 virtual ADDR_E_RETURNCODE HwlGetAllowedSwSet( 284 ADDR2_SWMODE_SET allowedSwModeSet, 285 ADDR2_SWTYPE_SET* pAllowedSwSet) const; 286 287 virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoSanityCheck( 288 const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const; 289 290 virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoTiled( 291 const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, 292 ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 293 294 virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoLinear( 295 const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, 296 ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 297 298 virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoordTiled( 299 const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, 300 ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; 301 302 virtual UINT_32 HwlComputeMaxBaseAlignments() const; 303 304 virtual UINT_32 HwlComputeMaxMetaBaseAlignments() const; 305 306 virtual BOOL_32 HwlInitGlobalParams(const ADDR_CREATE_INPUT* pCreateIn); 307 308 virtual ChipFamily HwlConvertChipFamily(UINT_32 uChipFamily, UINT_32 uChipRevision); 309 310 private: 311 // Initialize equation table 312 VOID InitEquationTable(); 313 314 ADDR_E_RETURNCODE ComputeSurfaceInfoMacroTiled( 315 const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, 316 ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 317 318 ADDR_E_RETURNCODE ComputeSurfaceInfoMicroTiled( 319 const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, 320 ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 321 322 ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoordMacroTiled( 323 const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, 324 ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; 325 326 ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoordMicroTiled( 327 const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, 328 ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; 329 330 UINT_32 ComputeOffsetFromSwizzlePattern( 331 const UINT_64* pPattern, 332 UINT_32 numBits, 333 UINT_32 x, 334 UINT_32 y, 335 UINT_32 z, 336 UINT_32 s) const; 337 338 UINT_32 ComputeOffsetFromEquation( 339 const ADDR_EQUATION* pEq, 340 UINT_32 x, 341 UINT_32 y, 342 UINT_32 z) const; 343 344 ADDR_E_RETURNCODE ComputeStereoInfo( 345 const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, 346 UINT_32* pAlignY, 347 UINT_32* pRightXor) const; 348 349 static void GetMipSize( 350 UINT_32 mip0Width, 351 UINT_32 mip0Height, 352 UINT_32 mip0Depth, 353 UINT_32 mipId, 354 UINT_32* pMipWidth, 355 UINT_32* pMipHeight, 356 UINT_32* pMipDepth = NULL) 357 { 358 *pMipWidth = ShiftCeil(Max(mip0Width, 1u), mipId); 359 *pMipHeight = ShiftCeil(Max(mip0Height, 1u), mipId); 360 361 if (pMipDepth != NULL) 362 { 363 *pMipDepth = ShiftCeil(Max(mip0Depth, 1u), mipId); 364 } 365 } 366 367 const ADDR_SW_PATINFO* GetSwizzlePatternInfo( 368 AddrSwizzleMode swizzleMode, 369 AddrResourceType resourceType, 370 UINT_32 log2Elem, 371 UINT_32 numFrag) const; 372 GetSwizzlePatternFromPatternInfo(const ADDR_SW_PATINFO * pPatInfo,ADDR_BIT_SETTING (& pSwizzle)[20])373 VOID GetSwizzlePatternFromPatternInfo( 374 const ADDR_SW_PATINFO* pPatInfo, 375 ADDR_BIT_SETTING (&pSwizzle)[20]) const 376 { 377 memcpy(pSwizzle, 378 GFX11_SW_PATTERN_NIBBLE01[pPatInfo->nibble01Idx], 379 sizeof(GFX11_SW_PATTERN_NIBBLE01[pPatInfo->nibble01Idx])); 380 381 memcpy(&pSwizzle[8], 382 GFX11_SW_PATTERN_NIBBLE2[pPatInfo->nibble2Idx], 383 sizeof(GFX11_SW_PATTERN_NIBBLE2[pPatInfo->nibble2Idx])); 384 385 memcpy(&pSwizzle[12], 386 GFX11_SW_PATTERN_NIBBLE3[pPatInfo->nibble3Idx], 387 sizeof(GFX11_SW_PATTERN_NIBBLE3[pPatInfo->nibble3Idx])); 388 389 memcpy(&pSwizzle[16], 390 GFX11_SW_PATTERN_NIBBLE4[pPatInfo->nibble4Idx], 391 sizeof(GFX11_SW_PATTERN_NIBBLE4[pPatInfo->nibble4Idx])); 392 } 393 394 VOID ConvertSwizzlePatternToEquation( 395 UINT_32 elemLog2, 396 AddrResourceType rsrcType, 397 AddrSwizzleMode swMode, 398 const ADDR_SW_PATINFO* pPatInfo, 399 ADDR_EQUATION* pEquation) const; 400 401 static INT_32 GetMetaElementSizeLog2(Gfx11DataType dataType); 402 403 static INT_32 GetMetaCacheSizeLog2(Gfx11DataType dataType); 404 405 void GetBlk256SizeLog2( 406 AddrResourceType resourceType, 407 AddrSwizzleMode swizzleMode, 408 UINT_32 elemLog2, 409 UINT_32 numSamplesLog2, 410 Dim3d* pBlock) const; 411 412 void GetCompressedBlockSizeLog2( 413 Gfx11DataType dataType, 414 AddrResourceType resourceType, 415 AddrSwizzleMode swizzleMode, 416 UINT_32 elemLog2, 417 UINT_32 numSamplesLog2, 418 Dim3d* pBlock) const; 419 420 INT_32 GetMetaOverlapLog2( 421 Gfx11DataType dataType, 422 AddrResourceType resourceType, 423 AddrSwizzleMode swizzleMode, 424 UINT_32 elemLog2, 425 UINT_32 numSamplesLog2) const; 426 427 INT_32 Get3DMetaOverlapLog2( 428 AddrResourceType resourceType, 429 AddrSwizzleMode swizzleMode, 430 UINT_32 elemLog2) const; 431 432 UINT_32 GetMetaBlkSize( 433 Gfx11DataType dataType, 434 AddrResourceType resourceType, 435 AddrSwizzleMode swizzleMode, 436 UINT_32 elemLog2, 437 UINT_32 numSamplesLog2, 438 BOOL_32 pipeAlign, 439 Dim3d* pBlock) const; 440 441 INT_32 GetPipeRotateAmount( 442 AddrResourceType resourceType, 443 AddrSwizzleMode swizzleMode) const; 444 GetEffectiveNumPipes()445 INT_32 GetEffectiveNumPipes() const 446 { 447 return ((m_numSaLog2 + 1) >= m_pipesLog2) ? m_pipesLog2 : m_numSaLog2 + 1; 448 } 449 IsRbAligned(AddrResourceType resourceType,AddrSwizzleMode swizzleMode)450 BOOL_32 IsRbAligned( 451 AddrResourceType resourceType, 452 AddrSwizzleMode swizzleMode) const 453 { 454 const BOOL_32 isRtopt = IsRtOptSwizzle(swizzleMode); 455 const BOOL_32 isZ = IsZOrderSwizzle(swizzleMode); 456 const BOOL_32 isDisplay = IsDisplaySwizzle(swizzleMode); 457 458 return (IsTex2d(resourceType) && (isRtopt || isZ)) || 459 (IsTex3d(resourceType) && isDisplay); 460 461 } 462 463 UINT_32 GetValidDisplaySwizzleModes(UINT_32 bpp) const; 464 465 BOOL_32 IsValidDisplaySwizzleMode(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const; 466 467 UINT_32 GetMaxNumMipsInTail(UINT_32 blockSizeLog2, BOOL_32 isThin) const; 468 IsInMipTail(Dim3d mipTailDim,UINT_32 maxNumMipsInTail,UINT_32 mipWidth,UINT_32 mipHeight,UINT_32 numMipsToTheEnd)469 BOOL_32 IsInMipTail( 470 Dim3d mipTailDim, 471 UINT_32 maxNumMipsInTail, 472 UINT_32 mipWidth, 473 UINT_32 mipHeight, 474 UINT_32 numMipsToTheEnd) const 475 { 476 BOOL_32 inTail = ((mipWidth <= mipTailDim.w) && 477 (mipHeight <= mipTailDim.h) && 478 (numMipsToTheEnd <= maxNumMipsInTail)); 479 480 return inTail; 481 } 482 GetBankXorBits(UINT_32 blockBits)483 UINT_32 GetBankXorBits(UINT_32 blockBits) const 484 { 485 return (blockBits > m_pipeInterleaveLog2 + m_pipesLog2 + ColumnBits) ? 486 Min(blockBits - m_pipeInterleaveLog2 - m_pipesLog2 - ColumnBits, BankBits) : 0; 487 } 488 489 BOOL_32 ValidateNonSwModeParams(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const; 490 BOOL_32 ValidateSwModeParams(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const; 491 IsBlock256kb(AddrSwizzleMode swizzleMode)492 BOOL_32 IsBlock256kb(AddrSwizzleMode swizzleMode) const { return IsBlockVariable(swizzleMode); } 493 494 // TODO: figure out if there is any Column bits on GFX11... 495 static const UINT_32 ColumnBits = 2; 496 static const UINT_32 BankBits = 4; 497 static const UINT_32 UnalignedDccType = 3; 498 499 static const Dim3d Block256_3d[MaxNumOfBpp]; 500 static const Dim3d Block256K_Log2_3d[MaxNumOfBpp]; 501 static const Dim3d Block64K_Log2_3d[MaxNumOfBpp]; 502 static const Dim3d Block4K_Log2_3d[MaxNumOfBpp]; 503 504 static const SwizzleModeFlags SwizzleModeTable[ADDR_SW_MAX_TYPE]; 505 506 // Number of packers log2 507 UINT_32 m_numPkrLog2; 508 // Number of shader array log2 509 UINT_32 m_numSaLog2; 510 511 Gfx11ChipSettings m_settings; 512 513 UINT_32 m_colorBaseIndex; 514 UINT_32 m_htileBaseIndex; 515 UINT_32 m_dccBaseIndex; 516 }; 517 518 } // V2 519 } // Addr 520 521 #endif 522 523