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1 /**************************************************************************
2  *
3  * Copyright 2017 Advanced Micro Devices, Inc.
4  *
5  * SPDX-License-Identifier: MIT
6  *
7  **************************************************************************/
8 
9 #ifndef _AC_VCN_DEC_H
10 #define _AC_VCN_DEC_H
11 
12 /* VCN programming information shared between gallium/vulkan */
13 #define RDECODE_PKT_TYPE_S(x)        (((unsigned)(x)&0x3) << 30)
14 #define RDECODE_PKT_TYPE_G(x)        (((x) >> 30) & 0x3)
15 #define RDECODE_PKT_TYPE_C           0x3FFFFFFF
16 #define RDECODE_PKT_COUNT_S(x)       (((unsigned)(x)&0x3FFF) << 16)
17 #define RDECODE_PKT_COUNT_G(x)       (((x) >> 16) & 0x3FFF)
18 #define RDECODE_PKT_COUNT_C          0xC000FFFF
19 #define RDECODE_PKT0_BASE_INDEX_S(x) (((unsigned)(x)&0xFFFF) << 0)
20 #define RDECODE_PKT0_BASE_INDEX_G(x) (((x) >> 0) & 0xFFFF)
21 #define RDECODE_PKT0_BASE_INDEX_C    0xFFFF0000
22 #define RDECODE_PKT0(index, count)                                                                 \
23    (RDECODE_PKT_TYPE_S(0) | RDECODE_PKT0_BASE_INDEX_S(index) | RDECODE_PKT_COUNT_S(count))
24 
25 #define RDECODE_PKT2() (RDECODE_PKT_TYPE_S(2))
26 
27 #define RDECODE_PKT_REG_J(x)  ((unsigned)(x)&0x3FFFF)
28 #define RDECODE_PKT_RES_J(x)  (((unsigned)(x)&0x3F) << 18)
29 #define RDECODE_PKT_COND_J(x) (((unsigned)(x)&0xF) << 24)
30 #define RDECODE_PKT_TYPE_J(x) (((unsigned)(x)&0xF) << 28)
31 #define RDECODE_PKTJ(reg, cond, type)                                                              \
32    (RDECODE_PKT_REG_J(reg) | RDECODE_PKT_RES_J(0) | RDECODE_PKT_COND_J(cond) |                     \
33     RDECODE_PKT_TYPE_J(type))
34 
35 #define RDECODE_IB_PARAM_DECODE_BUFFER                               (0x00000001)
36 #define RDECODE_IB_PARAM_QUERY_BUFFER                                (0x00000002)
37 #define RDECODE_IB_PARAM_PREDICATION_BUFFER                          (0x00000003)
38 #define RDECODE_IB_PARAM_UMD_64BIT_FENCE                             (0x00000005)
39 #define RDECODE_IB_PARAM_UMD_RECORD_TIMESTAMP                        (0x00000006)
40 #define RDECODE_IB_PARAM_UMD_REPORT_EVENT_STATUS                     (0x00000007)
41 #define RDECODE_IB_PARAM_UMD_COPY_MEMORY                             (0x00000008)
42 #define RDECODE_IB_PARAM_UMD_WRITE_MEMORY                            (0x00000009)
43 #define RDECODE_IB_PARAM_FEEDBACK_BUFFER                             (0x0000000A)
44 
45 #define RDECODE_CMDBUF_FLAGS_MSG_BUFFER                              (0x00000001)
46 #define RDECODE_CMDBUF_FLAGS_DPB_BUFFER                              (0x00000002)
47 #define RDECODE_CMDBUF_FLAGS_BITSTREAM_BUFFER                        (0x00000004)
48 #define RDECODE_CMDBUF_FLAGS_DECODING_TARGET_BUFFER                  (0x00000008)
49 #define RDECODE_CMDBUF_FLAGS_FEEDBACK_BUFFER                         (0x00000010)
50 #define RDECODE_CMDBUF_FLAGS_PICTURE_PARAM_BUFFER                    (0x00000020)
51 #define RDECODE_CMDBUF_FLAGS_MB_CONTROL_BUFFER                       (0x00000040)
52 #define RDECODE_CMDBUF_FLAGS_IDCT_COEF_BUFFER                        (0x00000080)
53 #define RDECODE_CMDBUF_FLAGS_PREEMPT_BUFFER                          (0x00000100)
54 #define RDECODE_CMDBUF_FLAGS_IT_SCALING_BUFFER                       (0x00000200)
55 #define RDECODE_CMDBUF_FLAGS_SCALER_TARGET_BUFFER                    (0x00000400)
56 #define RDECODE_CMDBUF_FLAGS_CONTEXT_BUFFER                          (0x00000800)
57 #define RDECODE_CMDBUF_FLAGS_PROB_TBL_BUFFER                         (0x00001000)
58 #define RDECODE_CMDBUF_FLAGS_QUERY_BUFFER                            (0x00002000)
59 #define RDECODE_CMDBUF_FLAGS_PREDICATION_BUFFER                      (0x00004000)
60 #define RDECODE_CMDBUF_FLAGS_SCLR_COEF_BUFFER                        (0x00008000)
61 #define RDECODE_CMDBUF_FLAGS_RECORD_TIMESTAMP                        (0x00010000)
62 #define RDECODE_CMDBUF_FLAGS_REPORT_EVENT_STATUS                     (0x00020000)
63 #define RDECODE_CMDBUF_FLAGS_RESERVED_SIZE_INFO_BUFFER               (0x00040000)
64 #define RDECODE_CMDBUF_FLAGS_LUMA_HIST_BUFFER                        (0x00080000)
65 #define RDECODE_CMDBUF_FLAGS_SESSION_CONTEXT_BUFFER                  (0x00100000)
66 
67 #define RDECODE_CMD_MSG_BUFFER                              0x00000000
68 #define RDECODE_CMD_DPB_BUFFER                              0x00000001
69 #define RDECODE_CMD_DECODING_TARGET_BUFFER                  0x00000002
70 #define RDECODE_CMD_FEEDBACK_BUFFER                         0x00000003
71 #define RDECODE_CMD_PROB_TBL_BUFFER                         0x00000004
72 #define RDECODE_CMD_SESSION_CONTEXT_BUFFER                  0x00000005
73 #define RDECODE_CMD_BITSTREAM_BUFFER                        0x00000100
74 #define RDECODE_CMD_IT_SCALING_TABLE_BUFFER                 0x00000204
75 #define RDECODE_CMD_CONTEXT_BUFFER                          0x00000206
76 
77 #define RDECODE_MSG_CREATE                                  0x00000000
78 #define RDECODE_MSG_DECODE                                  0x00000001
79 #define RDECODE_MSG_DESTROY                                 0x00000002
80 
81 #define RDECODE_CODEC_H264                                  0x00000000
82 #define RDECODE_CODEC_VC1                                   0x00000001
83 #define RDECODE_CODEC_MPEG2_VLD                             0x00000003
84 #define RDECODE_CODEC_MPEG4                                 0x00000004
85 #define RDECODE_CODEC_H264_PERF                             0x00000007
86 #define RDECODE_CODEC_JPEG                                  0x00000008
87 #define RDECODE_CODEC_H265                                  0x00000010
88 #define RDECODE_CODEC_VP9                                   0x00000011
89 #define RDECODE_CODEC_AV1                                   0x00000013
90 #define RDECODE_MESSAGE_HEVC_DIRECT_REF_LIST                0x00000015
91 
92 #define RDECODE_ARRAY_MODE_LINEAR                           0x00000000
93 #define RDECODE_ARRAY_MODE_MACRO_LINEAR_MICRO_TILED         0x00000001
94 #define RDECODE_ARRAY_MODE_1D_THIN                          0x00000002
95 #define RDECODE_ARRAY_MODE_2D_THIN                          0x00000004
96 #define RDECODE_ARRAY_MODE_MACRO_TILED_MICRO_LINEAR         0x00000004
97 #define RDECODE_ARRAY_MODE_MACRO_TILED_MICRO_TILED          0x00000005
98 
99 #define RDECODE_ARRAY_MODE_ADDRLIB_SEL_GFX10                0x00000000
100 #define RDECODE_ARRAY_MODE_ADDRLIB_SEL_GFX9                 0x00000001
101 #define RDECODE_ARRAY_MODE_ADDRLIB_SEL_GFX8                 0x00000002
102 #define RDECODE_ARRAY_MODE_ADDRLIB_SEL_GFX11                0x00000003
103 
104 #define RDECODE_H264_PROFILE_BASELINE                       0x00000000
105 #define RDECODE_H264_PROFILE_MAIN                           0x00000001
106 #define RDECODE_H264_PROFILE_HIGH                           0x00000002
107 #define RDECODE_H264_PROFILE_STEREO_HIGH                    0x00000003
108 #define RDECODE_H264_PROFILE_MVC                            0x00000004
109 
110 #define RDECODE_VC1_PROFILE_SIMPLE                          0x00000000
111 #define RDECODE_VC1_PROFILE_MAIN                            0x00000001
112 #define RDECODE_VC1_PROFILE_ADVANCED                        0x00000002
113 
114 #define RDECODE_SW_MODE_LINEAR                              0x00000000
115 #define RDECODE_256B_S                                      0x00000001
116 #define RDECODE_256B_D                                      0x00000002
117 #define RDECODE_4KB_S                                       0x00000005
118 #define RDECODE_4KB_D                                       0x00000006
119 #define RDECODE_64KB_S                                      0x00000009
120 #define RDECODE_64KB_D                                      0x0000000A
121 #define RDECODE_4KB_S_X                                     0x00000015
122 #define RDECODE_4KB_D_X                                     0x00000016
123 #define RDECODE_64KB_S_X                                    0x00000019
124 #define RDECODE_64KB_D_X                                    0x0000001A
125 
126 #define RDECODE_MESSAGE_NOT_SUPPORTED                       0x00000000
127 #define RDECODE_MESSAGE_CREATE                              0x00000001
128 #define RDECODE_MESSAGE_DECODE                              0x00000002
129 #define RDECODE_MESSAGE_DRM                                 0x00000003
130 #define RDECODE_MESSAGE_AVC                                 0x00000006
131 #define RDECODE_MESSAGE_VC1                                 0x00000007
132 #define RDECODE_MESSAGE_MPEG2_VLD                           0x0000000A
133 #define RDECODE_MESSAGE_MPEG4_ASP_VLD                       0x0000000B
134 #define RDECODE_MESSAGE_HEVC                                0x0000000D
135 #define RDECODE_MESSAGE_VP9                                 0x0000000E
136 #define RDECODE_MESSAGE_DYNAMIC_DPB                         0x00000010
137 #define RDECODE_MESSAGE_AV1                                 0x00000011
138 
139 #define RDECODE_FEEDBACK_PROFILING                          0x00000001
140 
141 #define RDECODE_SPS_INFO_H264_EXTENSION_SUPPORT_FLAG_SHIFT  7
142 
143 #define RDECODE_VP9_PROBS_DATA_SIZE                         2304
144 
145 /* *** decode flags *** */
146 #define RDECODE_FLAGS_USE_DYNAMIC_DPB_MASK                  0x00000001
147 #define RDECODE_FLAGS_USE_PAL_MASK                          0x00000008
148 #define RDECODE_FLAGS_DPB_RESIZE_MASK                       0x00000100
149 
150 #define mmUVD_JPEG_CNTL                                     0x0200
151 #define mmUVD_JPEG_CNTL_BASE_IDX                            1
152 #define mmUVD_JPEG_RB_BASE                                  0x0201
153 #define mmUVD_JPEG_RB_BASE_BASE_IDX                         1
154 #define mmUVD_JPEG_RB_WPTR                                  0x0202
155 #define mmUVD_JPEG_RB_WPTR_BASE_IDX                         1
156 #define mmUVD_JPEG_RB_RPTR                                  0x0203
157 #define mmUVD_JPEG_RB_RPTR_BASE_IDX                         1
158 #define mmUVD_JPEG_RB_SIZE                                  0x0204
159 #define mmUVD_JPEG_RB_SIZE_BASE_IDX                         1
160 #define mmUVD_JPEG_TIER_CNTL2                               0x021a
161 #define mmUVD_JPEG_TIER_CNTL2_BASE_IDX                      1
162 #define mmUVD_JPEG_UV_TILING_CTRL                           0x021c
163 #define mmUVD_JPEG_UV_TILING_CTRL_BASE_IDX                  1
164 #define mmUVD_JPEG_TILING_CTRL                              0x021e
165 #define mmUVD_JPEG_TILING_CTRL_BASE_IDX                     1
166 #define mmUVD_JPEG_OUTBUF_RPTR                              0x0220
167 #define mmUVD_JPEG_OUTBUF_RPTR_BASE_IDX                     1
168 #define mmUVD_JPEG_OUTBUF_WPTR                              0x0221
169 #define mmUVD_JPEG_OUTBUF_WPTR_BASE_IDX                     1
170 #define mmUVD_JPEG_PITCH                                    0x0222
171 #define mmUVD_JPEG_PITCH_BASE_IDX                           1
172 #define mmUVD_JPEG_INT_EN                                   0x0229
173 #define mmUVD_JPEG_INT_EN_BASE_IDX                          1
174 #define mmUVD_JPEG_UV_PITCH                                 0x022b
175 #define mmUVD_JPEG_UV_PITCH_BASE_IDX                        1
176 #define mmUVD_JPEG_INDEX                                    0x023e
177 #define mmUVD_JPEG_INDEX_BASE_IDX                           1
178 #define mmUVD_JPEG_DATA                                     0x023f
179 #define mmUVD_JPEG_DATA_BASE_IDX                            1
180 #define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_HIGH                 0x0438
181 #define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_HIGH_BASE_IDX        1
182 #define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_LOW                  0x0439
183 #define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_LOW_BASE_IDX         1
184 #define mmUVD_LMI_JPEG_READ_64BIT_BAR_HIGH                  0x045a
185 #define mmUVD_LMI_JPEG_READ_64BIT_BAR_HIGH_BASE_IDX         1
186 #define mmUVD_LMI_JPEG_READ_64BIT_BAR_LOW                   0x045b
187 #define mmUVD_LMI_JPEG_READ_64BIT_BAR_LOW_BASE_IDX          1
188 #define mmUVD_CTX_INDEX                                     0x0528
189 #define mmUVD_CTX_INDEX_BASE_IDX                            1
190 #define mmUVD_CTX_DATA                                      0x0529
191 #define mmUVD_CTX_DATA_BASE_IDX                             1
192 #define mmUVD_SOFT_RESET                                    0x05a0
193 #define mmUVD_SOFT_RESET_BASE_IDX                           1
194 
195 #define vcnipUVD_JPEG_DEC_SOFT_RST                          0x402f
196 #define vcnipUVD_JRBC_IB_COND_RD_TIMER                      0x408e
197 #define vcnipUVD_JRBC_IB_REF_DATA                           0x408f
198 #define vcnipUVD_LMI_JPEG_READ_64BIT_BAR_HIGH               0x40e1
199 #define vcnipUVD_LMI_JPEG_READ_64BIT_BAR_LOW                0x40e0
200 #define vcnipUVD_JPEG_RB_BASE                               0x4001
201 #define vcnipUVD_JPEG_RB_SIZE                               0x4004
202 #define vcnipUVD_JPEG_RB_WPTR                               0x4002
203 #define vcnipUVD_JPEG_PITCH                                 0x401f
204 #define vcnipUVD_JPEG_UV_PITCH                              0x4020
205 #define vcnipJPEG_DEC_ADDR_MODE                             0x4027
206 #define vcnipJPEG_DEC_Y_GFX10_TILING_SURFACE                0x4024
207 #define vcnipJPEG_DEC_UV_GFX10_TILING_SURFACE               0x4025
208 #define vcnipUVD_LMI_JPEG_WRITE_64BIT_BAR_HIGH              0x40e3
209 #define vcnipUVD_LMI_JPEG_WRITE_64BIT_BAR_LOW               0x40e2
210 #define vcnipUVD_JPEG_INDEX                                 0x402c
211 #define vcnipUVD_JPEG_DATA                                  0x402d
212 #define vcnipUVD_JPEG_TIER_CNTL2                            0x400f
213 #define vcnipUVD_JPEG_OUTBUF_RPTR                           0x401e
214 #define vcnipUVD_JPEG_OUTBUF_CNTL                           0x401c
215 #define vcnipUVD_JPEG_INT_EN                                0x400a
216 #define vcnipUVD_JPEG_CNTL                                  0x4000
217 #define vcnipUVD_JPEG_RB_RPTR                               0x4003
218 #define vcnipUVD_JPEG_OUTBUF_WPTR                           0x401d
219 #define vcnipUVD_JPEG_DEC_SOFT_RST_1                        0x4051
220 #define vcnipUVD_JPEG_PITCH_1                               0x4043
221 #define vcnipUVD_JPEG_UV_PITCH_1                            0x4044
222 #define vcnipJPEG_DEC_ADDR_MODE_1                           0x404B
223 #define vcnipUVD_JPEG_TIER_CNTL2_1                          0x400E
224 #define vcnipUVD_JPEG_OUTBUF_CNTL_1                         0x4040
225 #define vcnipUVD_JPEG_OUTBUF_WPTR_1                         0x4041
226 #define vcnipUVD_JPEG_OUTBUF_RPTR_1                         0x4042
227 #define vcnipUVD_JPEG_LUMA_BASE0_0                          0x41C0
228 #define vcnipUVD_JPEG_CHROMA_BASE0_0                        0x41C1
229 #define vcnipUVD_JPEG_CHROMAV_BASE0_0                       0x41C2
230 #define vcnipJPEG_DEC_Y_GFX10_TILING_SURFACE_1              0x4048
231 #define vcnipJPEG_DEC_UV_GFX10_TILING_SURFACE_1             0x4049
232 #define vcnipUVD_LMI_JPEG_WRITE_64BIT_BAR_HIGH_1            0x40B5
233 #define vcnipUVD_LMI_JPEG_WRITE_64BIT_BAR_LOW_1             0x40B4
234 #define vcnipUVD_LMI_JPEG_READ_64BIT_BAR_HIGH_1             0x40B3
235 #define vcnipUVD_LMI_JPEG_READ_64BIT_BAR_LOW_1              0x40B2
236 #define vcnipUVD_JPEG_ROI_CROP_POS_START                    0x401B
237 #define vcnipUVD_JPEG_ROI_CROP_POS_STRIDE                   0x401C
238 #define vcnipUVD_JPEG_INT_STAT                              0x400B
239 #define vcnipUVD_JPEG_FC_SPS_INFO                           0x4052
240 #define vcnipUVD_JPEG_SPS_INFO                              0x4006
241 #define vcnipUVD_JPEG_FC_R_COEF                             0x4018
242 #define vcnipUVD_JPEG_FC_G_COEF                             0x4019
243 #define vcnipUVD_JPEG_FC_B_COEF                             0x401A
244 #define vcnipUVD_JPEG_FC_VUP_COEF_CNTL0                     0x4010
245 #define vcnipUVD_JPEG_FC_VUP_COEF_CNTL1                     0x4011
246 #define vcnipUVD_JPEG_FC_VUP_COEF_CNTL2                     0x4012
247 #define vcnipUVD_JPEG_FC_VUP_COEF_CNTL3                     0x4013
248 #define vcnipUVD_JPEG_FC_HUP_COEF_CNTL0                     0x4014
249 #define vcnipUVD_JPEG_FC_HUP_COEF_CNTL1                     0x4015
250 #define vcnipUVD_JPEG_FC_HUP_COEF_CNTL2                     0x4016
251 #define vcnipUVD_JPEG_FC_HUP_COEF_CNTL3                     0x4017
252 #define vcnipUVD_JPEG_FC_TMEOUT_CNT                         0x4183
253 #define vcnipUVD_JPEG_SPS1_INFO                             0x4007
254 
255 #define UVD_BASE_INST0_SEG0                                 0x00007800
256 #define UVD_BASE_INST0_SEG1                                 0x00007E00
257 #define UVD_BASE_INST0_SEG2                                 0
258 #define UVD_BASE_INST0_SEG3                                 0
259 #define UVD_BASE_INST0_SEG4                                 0
260 
261 #define SOC15_REG_ADDR(reg) (UVD_BASE_INST0_SEG1 + reg)
262 
263 #define COND0 0
264 #define COND1 1
265 #define COND2 2
266 #define COND3 3
267 #define COND4 4
268 #define COND5 5
269 #define COND6 6
270 #define COND7 7
271 
272 #define TYPE0 0
273 #define TYPE1 1
274 #define TYPE2 2
275 #define TYPE3 3
276 #define TYPE4 4
277 #define TYPE5 5
278 #define TYPE6 6
279 #define TYPE7 7
280 
281 /* VP9 Frame header flags */
282 #define RDECODE_FRAME_HDR_INFO_VP9_USE_UNCOMPRESSED_HEADER_SHIFT      (14)
283 #define RDECODE_FRAME_HDR_INFO_VP9_USE_PREV_IN_FIND_MV_REFS_SHIFT     (13)
284 #define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_UPDATE_SHIFT        (12)
285 #define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_ENABLED_SHIFT       (11)
286 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_DATA_SHIFT     (10)
287 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_TEMPORAL_UPDATE_SHIFT (9)
288 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_MAP_SHIFT      (8)
289 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_ENABLED_SHIFT         (7)
290 #define RDECODE_FRAME_HDR_INFO_VP9_FRAME_PARALLEL_DECODING_MODE_SHIFT (6)
291 #define RDECODE_FRAME_HDR_INFO_VP9_REFRESH_FRAME_CONTEXT_SHIFT        (5)
292 #define RDECODE_FRAME_HDR_INFO_VP9_ALLOW_HIGH_PRECISION_MV_SHIFT      (4)
293 #define RDECODE_FRAME_HDR_INFO_VP9_INTRA_ONLY_SHIFT                   (3)
294 #define RDECODE_FRAME_HDR_INFO_VP9_ERROR_RESILIENT_MODE_SHIFT         (2)
295 #define RDECODE_FRAME_HDR_INFO_VP9_FRAME_TYPE_SHIFT                   (1)
296 #define RDECODE_FRAME_HDR_INFO_VP9_SHOW_EXISTING_FRAME_SHIFT          (0)
297 
298 
299 #define RDECODE_FRAME_HDR_INFO_VP9_USE_UNCOMPRESSED_HEADER_MASK      (0x00004000)
300 #define RDECODE_FRAME_HDR_INFO_VP9_USE_PREV_IN_FIND_MV_REFS_MASK     (0x00002000)
301 #define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_UPDATE_MASK        (0x00001000)
302 #define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_ENABLED_MASK       (0x00000800)
303 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_DATA_MASK     (0x00000400)
304 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_TEMPORAL_UPDATE_MASK (0x00000200)
305 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_MAP_MASK      (0x00000100)
306 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_ENABLED_MASK         (0x00000080)
307 #define RDECODE_FRAME_HDR_INFO_VP9_FRAME_PARALLEL_DECODING_MODE_MASK (0x00000040)
308 #define RDECODE_FRAME_HDR_INFO_VP9_REFRESH_FRAME_CONTEXT_MASK        (0x00000020)
309 #define RDECODE_FRAME_HDR_INFO_VP9_ALLOW_HIGH_PRECISION_MV_MASK      (0x00000010)
310 #define RDECODE_FRAME_HDR_INFO_VP9_INTRA_ONLY_MASK                   (0x00000008)
311 #define RDECODE_FRAME_HDR_INFO_VP9_ERROR_RESILIENT_MODE_MASK         (0x00000004)
312 #define RDECODE_FRAME_HDR_INFO_VP9_FRAME_TYPE_MASK                   (0x00000002)
313 #define RDECODE_FRAME_HDR_INFO_VP9_SHOW_EXISTING_FRAME_MASK          (0x00000001)
314 
315 /* Drm definitions */
316 #define DRM_CMD_KEY_SHIFT              0
317 #define DRM_CMD_CNT_KEY_SHIFT          1
318 #define DRM_CMD_CNT_DATA_SHIFT         2
319 #define DRM_CMD_OFFSET_SHIFT           3
320 #define DRM_CMD_SESSION_SEL_SHIFT      4
321 #define DRM_CMD_UNWRAP_KEY_SHIFT       8
322 #define DRM_CMD_GEN_MASK_SHIFT         9
323 #define DRM_CMD_ALGORITHM_SHIFT        10
324 #define DRM_CMD_BYTE_MASK_SHIFT        16
325 #define DRM_CMD_DRM_BYPASS_SHIFT       31
326 
327 #define DRM_CMD_KEY_MASK               (0x00000001)
328 #define DRM_CMD_CNT_KEY_MASK           (0x00000002)
329 #define DRM_CMD_CNT_DATA_MASK          (0x00000004)
330 #define DRM_CMD_OFFSET_MASK            (0x00000008)
331 #define DRM_CMD_SESSION_SEL_MASK       (0x000000F0)
332 #define DRM_CMD_UNWRAP_KEY_MASK        (0x00000100)
333 #define DRM_CMD_GEN_MASK_MASK          (0x00000200)
334 #define DRM_CMD_ALGORITHM_MASK         (0x00000C00)
335 #define DRM_CMD_BYTE_MASK_MASK         (0x00FF0000)
336 #define DRM_CMD_DRM_BYPASS_MASK        (0x80000000)
337 
338 /* Drm_cntl definitions */
339 #define DRM_CNTL_ENC_BYTECNT_SHIFT     (6)
340 #define DRM_CNTL_CLR_BYTECNT_SHIFT     (16)
341 #define DRM_CNTL_BYPASS_SHIFT          (24)
342 #define DRM_CNTL_PARTIAL_MODE_SHIFT    (25)
343 #define DRM_CNTL_OFFSET_MODE_SHIFT     (26)
344 #define DRM_CNTL_HEADER_MODE_SHIFT     (27)
345 #define DRM_CNTL_HEADER_BYTECNT_SHIFT  (28)
346 
347 #define DRM_CNTL_ENC_BYTECNT_MASK      (0x00000FC0)
348 #define DRM_CNTL_CLR_BYTECNT_MASK      (0x003F0000)
349 #define DRM_CNTL_BYPASS_MASK           (0x01000000)
350 #define DRM_CNTL_PARTIAL_MODE_MASK     (0x02000000)
351 #define DRM_CNTL_OFFSET_MODE_MASK      (0x04000000)
352 #define DRM_CNTL_HEADER_MODE_MASK      (0x08000000)
353 #define DRM_CNTL_HEADER_BYTECNT_MASK   (0xF0000000)
354 
355 #define SAMU_DRM_DISABLE 0x00000000
356 #define SAMU_DRM_ENABLE  0x00000001
357 
358 /* AV1 Frame header flags */
359 #define RDECODE_FRAME_HDR_INFO_AV1_DISABLE_REF_FRAME_MVS_SHIFT        (31)
360 #define RDECODE_FRAME_HDR_INFO_AV1_SKIP_REFERENCE_UPDATE_SHIFT        (30)
361 #define RDECODE_FRAME_HDR_INFO_AV1_SWITCHABLE_SKIP_MODE_SHIFT         (29)
362 #define RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_MULTI_SHIFT               (28)
363 #define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_TEMPORAL_UPDATE_SHIFT (27)
364 #define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_UPDATE_MAP_SHIFT      (26)
365 #define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_ENABLED_SHIFT         (25)
366 #define RDECODE_FRAME_HDR_INFO_AV1_REDUCED_TX_SET_USED_SHIFT          (24)
367 #define RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_PRESENT_FLAG_SHIFT        (23)
368 #define RDECODE_FRAME_HDR_INFO_AV1_DELTA_Q_PRESENT_FLAG_SHIFT         (22)
369 #define RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_UPDATE_SHIFT        (21)
370 #define RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_ENABLED_SHIFT       (20)
371 #define RDECODE_FRAME_HDR_INFO_AV1_CUR_FRAME_FORCE_INTEGER_MV_SHIFT   (19)
372 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_SCREEN_CONTENT_TOOLS_SHIFT   (18)
373 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_REF_FRAME_MVS_SHIFT          (17)
374 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_JNT_COMP_SHIFT              (16)
375 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_ORDER_HINT_SHIFT            (15)
376 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_DUAL_FILTER_SHIFT           (14)
377 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_WARPED_MOTION_SHIFT          (13)
378 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_MASKED_COMPOUND_SHIFT       (12)
379 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTERINTRA_COMPOUND_SHIFT   (11)
380 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTRA_EDGE_FILTER_SHIFT     (10)
381 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_FILTER_INTRA_SHIFT          (9)
382 #define RDECODE_FRAME_HDR_INFO_AV1_USING_QMATRIX_SHIFT                (8)
383 #define RDECODE_FRAME_HDR_INFO_AV1_SKIP_MODE_FLAG_SHIFT               (7)
384 #define RDECODE_FRAME_HDR_INFO_AV1_MONOCHROME_SHIFT                   (6)
385 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_HIGH_PRECISION_MV_SHIFT      (5)
386 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_INTRABC_SHIFT                (4)
387 #define RDECODE_FRAME_HDR_INFO_AV1_INTRA_ONLY_SHIFT                   (3)
388 #define RDECODE_FRAME_HDR_INFO_AV1_REFRESH_FRAME_CONTEXT_SHIFT        (2)
389 #define RDECODE_FRAME_HDR_INFO_AV1_DISABLE_CDF_UPDATE_SHIFT           (1)
390 #define RDECODE_FRAME_HDR_INFO_AV1_SHOW_FRAME_SHIFT                   (0)
391 
392 #define RDECODE_FRAME_HDR_INFO_AV1_DISABLE_REF_FRAME_MVS_MASK         (0x80000000)
393 #define RDECODE_FRAME_HDR_INFO_AV1_SKIP_REFERENCE_UPDATE_MASK         (0x40000000)
394 #define RDECODE_FRAME_HDR_INFO_AV1_SWITCHABLE_SKIP_MODE_MASK          (0x20000000)
395 #define RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_MULTI_MASK                (0x10000000)
396 #define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_TEMPORAL_UPDATE_MASK  (0x08000000)
397 #define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_UPDATE_MAP_MASK       (0x04000000)
398 #define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_ENABLED_MASK          (0x02000000)
399 #define RDECODE_FRAME_HDR_INFO_AV1_REDUCED_TX_SET_USED_MASK           (0x01000000)
400 #define RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_PRESENT_FLAG_MASK         (0x00800000)
401 #define RDECODE_FRAME_HDR_INFO_AV1_DELTA_Q_PRESENT_FLAG_MASK          (0x00400000)
402 #define RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_UPDATE_MASK         (0x00200000)
403 #define RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_ENABLED_MASK        (0x00100000)
404 #define RDECODE_FRAME_HDR_INFO_AV1_CUR_FRAME_FORCE_INTEGER_MV_MASK    (0x00080000)
405 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_SCREEN_CONTENT_TOOLS_MASK    (0x00040000)
406 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_REF_FRAME_MVS_MASK           (0x00020000)
407 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_JNT_COMP_MASK               (0x00010000)
408 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_ORDER_HINT_MASK             (0x00008000)
409 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_DUAL_FILTER_MASK            (0x00004000)
410 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_WARPED_MOTION_MASK           (0x00002000)
411 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_MASKED_COMPOUND_MASK        (0x00001000)
412 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTERINTRA_COMPOUND_MASK    (0x00000800)
413 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTRA_EDGE_FILTER_MASK      (0x00000400)
414 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_FILTER_INTRA_MASK           (0x00000200)
415 #define RDECODE_FRAME_HDR_INFO_AV1_USING_QMATRIX_MASK                 (0x00000100)
416 #define RDECODE_FRAME_HDR_INFO_AV1_SKIP_MODE_FLAG_MASK                (0x00000080)
417 #define RDECODE_FRAME_HDR_INFO_AV1_MONOCHROME_MASK                    (0x08000040)
418 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_HIGH_PRECISION_MV_MASK       (0x00000020)
419 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_INTRABC_MASK                 (0x00000010)
420 #define RDECODE_FRAME_HDR_INFO_AV1_INTRA_ONLY_MASK                    (0x00000008)
421 #define RDECODE_FRAME_HDR_INFO_AV1_REFRESH_FRAME_CONTEXT_MASK         (0x00000004)
422 #define RDECODE_FRAME_HDR_INFO_AV1_DISABLE_CDF_UPDATE_MASK            (0x00000002)
423 #define RDECODE_FRAME_HDR_INFO_AV1_SHOW_FRAME_MASK                    (0x00000001)
424 
425 #define RDECODE_AV1_VER_0  0
426 #define RDECODE_AV1_VER_1  1
427 
428 typedef struct rvcn_decode_buffer_s {
429    unsigned int valid_buf_flag;
430    unsigned int msg_buffer_address_hi;
431    unsigned int msg_buffer_address_lo;
432    unsigned int dpb_buffer_address_hi;
433    unsigned int dpb_buffer_address_lo;
434    unsigned int target_buffer_address_hi;
435    unsigned int target_buffer_address_lo;
436    unsigned int session_contex_buffer_address_hi;
437    unsigned int session_contex_buffer_address_lo;
438    unsigned int bitstream_buffer_address_hi;
439    unsigned int bitstream_buffer_address_lo;
440    unsigned int context_buffer_address_hi;
441    unsigned int context_buffer_address_lo;
442    unsigned int feedback_buffer_address_hi;
443    unsigned int feedback_buffer_address_lo;
444    unsigned int luma_hist_buffer_address_hi;
445    unsigned int luma_hist_buffer_address_lo;
446    unsigned int prob_tbl_buffer_address_hi;
447    unsigned int prob_tbl_buffer_address_lo;
448    unsigned int sclr_coeff_buffer_address_hi;
449    unsigned int sclr_coeff_buffer_address_lo;
450    unsigned int it_sclr_table_buffer_address_hi;
451    unsigned int it_sclr_table_buffer_address_lo;
452    unsigned int sclr_target_buffer_address_hi;
453    unsigned int sclr_target_buffer_address_lo;
454    unsigned int reserved_size_info_buffer_address_hi;
455    unsigned int reserved_size_info_buffer_address_lo;
456    unsigned int mpeg2_pic_param_buffer_address_hi;
457    unsigned int mpeg2_pic_param_buffer_address_lo;
458    unsigned int mpeg2_mb_control_buffer_address_hi;
459    unsigned int mpeg2_mb_control_buffer_address_lo;
460    unsigned int mpeg2_idct_coeff_buffer_address_hi;
461    unsigned int mpeg2_idct_coeff_buffer_address_lo;
462 } rvcn_decode_buffer_t;
463 
464 typedef struct rvcn_decode_ib_package_s {
465    unsigned int package_size;
466    unsigned int package_type;
467 } rvcn_decode_ib_package_t;
468 
469 typedef struct rvcn_dec_message_index_s {
470    unsigned int message_id;
471    unsigned int offset;
472    unsigned int size;
473    unsigned int filled;
474 } rvcn_dec_message_index_t;
475 
476 typedef struct rvcn_dec_message_header_s {
477    unsigned int header_size;
478    unsigned int total_size;
479    unsigned int num_buffers;
480    unsigned int msg_type;
481    unsigned int stream_handle;
482    unsigned int status_report_feedback_number;
483 
484    rvcn_dec_message_index_t index[1];
485 } rvcn_dec_message_header_t;
486 
487 typedef struct rvcn_dec_message_create_s {
488    unsigned int stream_type;
489    unsigned int session_flags;
490    unsigned int width_in_samples;
491    unsigned int height_in_samples;
492 } rvcn_dec_message_create_t;
493 
494 typedef struct rvcn_dec_message_decode_s {
495    unsigned int stream_type;
496    unsigned int decode_flags;
497    unsigned int width_in_samples;
498    unsigned int height_in_samples;
499 
500    unsigned int bsd_size;
501    unsigned int dpb_size;
502    unsigned int dt_size;
503    unsigned int sct_size;
504    unsigned int sc_coeff_size;
505    unsigned int hw_ctxt_size;
506    unsigned int sw_ctxt_size;
507    unsigned int pic_param_size;
508    unsigned int mb_cntl_size;
509    unsigned int reserved0[4];
510    unsigned int decode_buffer_flags;
511 
512    unsigned int db_pitch;
513    unsigned int db_aligned_height;
514    unsigned int db_tiling_mode;
515    unsigned int db_swizzle_mode;
516    unsigned int db_array_mode;
517    unsigned int db_field_mode;
518    unsigned int db_surf_tile_config;
519 
520    unsigned int dt_pitch;
521    unsigned int dt_uv_pitch;
522    unsigned int dt_tiling_mode;
523    unsigned int dt_swizzle_mode;
524    unsigned int dt_array_mode;
525    unsigned int dt_field_mode;
526    unsigned int dt_out_format;
527    unsigned int dt_surf_tile_config;
528    unsigned int dt_uv_surf_tile_config;
529    unsigned int dt_luma_top_offset;
530    unsigned int dt_luma_bottom_offset;
531    unsigned int dt_chroma_top_offset;
532    unsigned int dt_chroma_bottom_offset;
533    unsigned int dt_chromaV_top_offset;
534    unsigned int dt_chromaV_bottom_offset;
535 
536    unsigned int mif_wrc_en;
537    unsigned int db_pitch_uv;
538 
539    unsigned char reserved1[20];
540 } rvcn_dec_message_decode_t;
541 
542 typedef struct rvcn_dec_message_drm_s {
543    unsigned int	drm_key[4];
544    unsigned int	drm_counter[4];
545    unsigned int	drm_wrapped_key[4];
546    unsigned int	drm_offset;
547    unsigned int	drm_cmd;
548    unsigned int	drm_cntl;
549    unsigned int	drm_reserved;
550 } rvcn_dec_message_drm_t;
551 
552 typedef struct rvcn_dec_message_dynamic_dpb_s {
553    unsigned int dpbConfigFlags;
554    unsigned int dpbLumaPitch;
555    unsigned int dpbLumaAlignedHeight;
556    unsigned int dpbLumaAlignedSize;
557    unsigned int dpbChromaPitch;
558    unsigned int dpbChromaAlignedHeight;
559    unsigned int dpbChromaAlignedSize;
560 
561    unsigned char dpbArraySize;
562    unsigned char dpbCurArraySlice;
563    unsigned char dpbRefArraySlice[16];
564    unsigned char dpbReserved0[2];
565 
566    unsigned int dpbCurrOffset;
567    unsigned int dpbAddrOffset[16];
568 } rvcn_dec_message_dynamic_dpb_t;
569 
570 typedef struct rvcn_dec_message_dynamic_dpb_t2_s {
571     unsigned int dpbConfigFlags;
572     unsigned int dpbLumaPitch;
573     unsigned int dpbLumaAlignedHeight;
574     unsigned int dpbLumaAlignedSize;
575     unsigned int dpbChromaPitch;
576     unsigned int dpbChromaAlignedHeight;
577     unsigned int dpbChromaAlignedSize;
578     unsigned int dpbArraySize;
579 
580     unsigned int dpbCurrLo;
581     unsigned int dpbCurrHi;
582     unsigned int dpbAddrLo[16];
583     unsigned int dpbAddrHi[16];
584 } rvcn_dec_message_dynamic_dpb_t2_t;
585 
586 typedef struct rvcn_dec_message_hevc_direct_ref_list_s {
587    unsigned int num_direct_reflist;
588    unsigned char multi_direct_reflist[128][2][15];
589 } rvcn_dec_message_hevc_direct_ref_list_t;
590 
591 typedef struct {
592    unsigned short viewOrderIndex;
593    unsigned short viewId;
594    unsigned short numOfAnchorRefsInL0;
595    unsigned short viewIdOfAnchorRefsInL0[15];
596    unsigned short numOfAnchorRefsInL1;
597    unsigned short viewIdOfAnchorRefsInL1[15];
598    unsigned short numOfNonAnchorRefsInL0;
599    unsigned short viewIdOfNonAnchorRefsInL0[15];
600    unsigned short numOfNonAnchorRefsInL1;
601    unsigned short viewIdOfNonAnchorRefsInL1[15];
602 } radeon_mvcElement_t;
603 
604 typedef struct rvcn_dec_message_avc_s {
605    unsigned int profile;
606    unsigned int level;
607 
608    unsigned int sps_info_flags;
609    unsigned int pps_info_flags;
610    unsigned char chroma_format;
611    unsigned char bit_depth_luma_minus8;
612    unsigned char bit_depth_chroma_minus8;
613    unsigned char log2_max_frame_num_minus4;
614 
615    unsigned char pic_order_cnt_type;
616    unsigned char log2_max_pic_order_cnt_lsb_minus4;
617    unsigned char num_ref_frames;
618    unsigned char reserved_8bit;
619 
620    signed char pic_init_qp_minus26;
621    signed char pic_init_qs_minus26;
622    signed char chroma_qp_index_offset;
623    signed char second_chroma_qp_index_offset;
624 
625    unsigned char num_slice_groups_minus1;
626    unsigned char slice_group_map_type;
627    unsigned char num_ref_idx_l0_active_minus1;
628    unsigned char num_ref_idx_l1_active_minus1;
629 
630    unsigned short slice_group_change_rate_minus1;
631    unsigned short reserved_16bit_1;
632 
633    unsigned char scaling_list_4x4[6][16];
634    unsigned char scaling_list_8x8[2][64];
635 
636    unsigned int frame_num;
637    unsigned int frame_num_list[16];
638    int curr_field_order_cnt_list[2];
639    int field_order_cnt_list[16][2];
640 
641    unsigned int decoded_pic_idx;
642    unsigned int curr_pic_ref_frame_num;
643    unsigned char ref_frame_list[16];
644 
645    unsigned int reserved[122];
646 
647    struct {
648       unsigned int numViews;
649       unsigned int viewId0;
650       radeon_mvcElement_t mvcElements[1];
651    } mvc;
652 
653    unsigned short non_existing_frame_flags;
654    unsigned int used_for_reference_flags;
655 } rvcn_dec_message_avc_t;
656 
657 typedef struct rvcn_dec_message_vc1_s {
658    unsigned int profile;
659    unsigned int level;
660    unsigned int sps_info_flags;
661    unsigned int pps_info_flags;
662    unsigned int pic_structure;
663    unsigned int chroma_format;
664    unsigned short decoded_pic_idx;
665    unsigned short deblocked_pic_idx;
666    unsigned short forward_ref_idx;
667    unsigned short backward_ref_idx;
668    unsigned int cached_frame_flag;
669 } rvcn_dec_message_vc1_t;
670 
671 typedef struct rvcn_dec_message_mpeg2_vld_s {
672    unsigned int decoded_pic_idx;
673    unsigned int forward_ref_pic_idx;
674    unsigned int backward_ref_pic_idx;
675 
676    unsigned char load_intra_quantiser_matrix;
677    unsigned char load_nonintra_quantiser_matrix;
678    unsigned char reserved_quantiser_alignement[2];
679    unsigned char intra_quantiser_matrix[64];
680    unsigned char nonintra_quantiser_matrix[64];
681 
682    unsigned char profile_and_level_indication;
683    unsigned char chroma_format;
684 
685    unsigned char picture_coding_type;
686 
687    unsigned char reserved_1;
688 
689    unsigned char f_code[2][2];
690    unsigned char intra_dc_precision;
691    unsigned char pic_structure;
692    unsigned char top_field_first;
693    unsigned char frame_pred_frame_dct;
694    unsigned char concealment_motion_vectors;
695    unsigned char q_scale_type;
696    unsigned char intra_vlc_format;
697    unsigned char alternate_scan;
698 } rvcn_dec_message_mpeg2_vld_t;
699 
700 typedef struct rvcn_dec_message_mpeg4_asp_vld_s {
701    unsigned int decoded_pic_idx;
702    unsigned int forward_ref_pic_idx;
703    unsigned int backward_ref_pic_idx;
704 
705    unsigned int variant_type;
706    unsigned char profile_and_level_indication;
707 
708    unsigned char video_object_layer_verid;
709    unsigned char video_object_layer_shape;
710 
711    unsigned char reserved_1;
712 
713    unsigned short video_object_layer_width;
714    unsigned short video_object_layer_height;
715 
716    unsigned short vop_time_increment_resolution;
717 
718    unsigned short reserved_2;
719 
720    struct {
721       unsigned int short_video_header : 1;
722       unsigned int obmc_disable : 1;
723       unsigned int interlaced : 1;
724       unsigned int load_intra_quant_mat : 1;
725       unsigned int load_nonintra_quant_mat : 1;
726       unsigned int quarter_sample : 1;
727       unsigned int complexity_estimation_disable : 1;
728       unsigned int resync_marker_disable : 1;
729       unsigned int data_partitioned : 1;
730       unsigned int reversible_vlc : 1;
731       unsigned int newpred_enable : 1;
732       unsigned int reduced_resolution_vop_enable : 1;
733       unsigned int scalability : 1;
734       unsigned int is_object_layer_identifier : 1;
735       unsigned int fixed_vop_rate : 1;
736       unsigned int newpred_segment_type : 1;
737       unsigned int reserved_bits : 16;
738    };
739 
740    unsigned char quant_type;
741    unsigned char reserved_3[3];
742    unsigned char intra_quant_mat[64];
743    unsigned char nonintra_quant_mat[64];
744 
745    struct {
746       unsigned char sprite_enable;
747 
748       unsigned char reserved_4[3];
749 
750       unsigned short sprite_width;
751       unsigned short sprite_height;
752       short sprite_left_coordinate;
753       short sprite_top_coordinate;
754 
755       unsigned char no_of_sprite_warping_points;
756       unsigned char sprite_warping_accuracy;
757       unsigned char sprite_brightness_change;
758       unsigned char low_latency_sprite_enable;
759    } sprite_config;
760 
761    struct {
762       struct {
763          unsigned int check_skip : 1;
764          unsigned int switch_rounding : 1;
765          unsigned int t311 : 1;
766          unsigned int reserved_bits : 29;
767       };
768 
769       unsigned char vol_mode;
770 
771       unsigned char reserved_5[3];
772    } divx_311_config;
773 
774    struct {
775       unsigned char vop_data_present;
776       unsigned char vop_coding_type;
777       unsigned char vop_quant;
778       unsigned char vop_coded;
779       unsigned char vop_rounding_type;
780       unsigned char intra_dc_vlc_thr;
781       unsigned char top_field_first;
782       unsigned char alternate_vertical_scan_flag;
783       unsigned char vop_fcode_forward;
784       unsigned char vop_fcode_backward;
785       unsigned int TRB[2];
786       unsigned int TRD[2];
787    } vop;
788 
789 } rvcn_dec_message_mpeg4_asp_vld_t;
790 
791 typedef struct rvcn_dec_message_hevc_s {
792    unsigned int sps_info_flags;
793    unsigned int pps_info_flags;
794    unsigned char chroma_format;
795    unsigned char bit_depth_luma_minus8;
796    unsigned char bit_depth_chroma_minus8;
797    unsigned char log2_max_pic_order_cnt_lsb_minus4;
798 
799    unsigned char sps_max_dec_pic_buffering_minus1;
800    unsigned char log2_min_luma_coding_block_size_minus3;
801    unsigned char log2_diff_max_min_luma_coding_block_size;
802    unsigned char log2_min_transform_block_size_minus2;
803 
804    unsigned char log2_diff_max_min_transform_block_size;
805    unsigned char max_transform_hierarchy_depth_inter;
806    unsigned char max_transform_hierarchy_depth_intra;
807    unsigned char pcm_sample_bit_depth_luma_minus1;
808 
809    unsigned char pcm_sample_bit_depth_chroma_minus1;
810    unsigned char log2_min_pcm_luma_coding_block_size_minus3;
811    unsigned char log2_diff_max_min_pcm_luma_coding_block_size;
812    unsigned char num_extra_slice_header_bits;
813 
814    unsigned char num_short_term_ref_pic_sets;
815    unsigned char num_long_term_ref_pic_sps;
816    unsigned char num_ref_idx_l0_default_active_minus1;
817    unsigned char num_ref_idx_l1_default_active_minus1;
818 
819    signed char pps_cb_qp_offset;
820    signed char pps_cr_qp_offset;
821    signed char pps_beta_offset_div2;
822    signed char pps_tc_offset_div2;
823 
824    unsigned char diff_cu_qp_delta_depth;
825    unsigned char num_tile_columns_minus1;
826    unsigned char num_tile_rows_minus1;
827    unsigned char log2_parallel_merge_level_minus2;
828 
829    unsigned short column_width_minus1[19];
830    unsigned short row_height_minus1[21];
831 
832    signed char init_qp_minus26;
833    unsigned char num_delta_pocs_ref_rps_idx;
834    unsigned char curr_idx;
835    unsigned char reserved[1];
836    int curr_poc;
837    unsigned char ref_pic_list[16];
838    int poc_list[16];
839    unsigned char ref_pic_set_st_curr_before[8];
840    unsigned char ref_pic_set_st_curr_after[8];
841    unsigned char ref_pic_set_lt_curr[8];
842 
843    unsigned char ucScalingListDCCoefSizeID2[6];
844    unsigned char ucScalingListDCCoefSizeID3[2];
845 
846    unsigned char highestTid;
847    unsigned char isNonRef;
848 
849    unsigned char p010_mode;
850    unsigned char msb_mode;
851    unsigned char luma_10to8;
852    unsigned char chroma_10to8;
853 
854    unsigned char hevc_reserved[2];
855 
856    unsigned char direct_reflist[2][15];
857    unsigned int st_rps_bits;
858 } rvcn_dec_message_hevc_t;
859 
860 typedef struct rvcn_dec_message_vp9_s {
861    unsigned int frame_header_flags;
862 
863    unsigned char frame_context_idx;
864    unsigned char reset_frame_context;
865 
866    unsigned char curr_pic_idx;
867    unsigned char interp_filter;
868 
869    unsigned char filter_level;
870    unsigned char sharpness_level;
871    unsigned char lf_adj_level[8][4][2];
872    unsigned char base_qindex;
873    signed char y_dc_delta_q;
874    signed char uv_ac_delta_q;
875    signed char uv_dc_delta_q;
876 
877    unsigned char log2_tile_cols;
878    unsigned char log2_tile_rows;
879    unsigned char tx_mode;
880    unsigned char reference_mode;
881    unsigned char chroma_format;
882 
883    unsigned char ref_frame_map[8];
884 
885    unsigned char frame_refs[3];
886    unsigned char ref_frame_sign_bias[3];
887    unsigned char frame_to_show;
888    unsigned char bit_depth_luma_minus8;
889    unsigned char bit_depth_chroma_minus8;
890 
891    unsigned char p010_mode;
892    unsigned char msb_mode;
893    unsigned char luma_10to8;
894    unsigned char chroma_10to8;
895 
896    unsigned int vp9_frame_size;
897    unsigned int compressed_header_size;
898    unsigned int uncompressed_header_size;
899 } rvcn_dec_message_vp9_t;
900 
901 typedef enum {
902    RVCN_DEC_AV1_IDENTITY = 0,
903    RVCN_DEC_AV1_TRANSLATION = 1,
904    RVCN_DEC_AV1_ROTZOOM = 2,
905    RVCN_DEC_AV1_AFFINE = 3,
906    RVCN_DEC_AV1_HORTRAPEZOID = 4,
907    RVCN_DEC_AV1_VERTRAPEZOID = 5,
908    RVCN_DEC_AV1_HOMOGRAPHY = 6,
909    RVCN_DEC_AV1_TRANS_TYPES = 7,
910 } rvcn_dec_transformation_type_e;
911 
912 typedef struct {
913    rvcn_dec_transformation_type_e wmtype;
914    int wmmat[8];
915    short alpha, beta, gamma, delta;
916 } rvcn_dec_warped_motion_params_t;
917 
918 typedef struct {
919    unsigned char apply_grain;
920    unsigned char scaling_points_y[14][2];
921    unsigned char num_y_points;
922    unsigned char scaling_points_cb[10][2];
923    unsigned char num_cb_points;
924    unsigned char scaling_points_cr[10][2];
925    unsigned char num_cr_points;
926    unsigned char scaling_shift;
927    unsigned char ar_coeff_lag;
928    signed char ar_coeffs_y[24];
929    signed char ar_coeffs_cb[25];
930    signed char ar_coeffs_cr[25];
931    unsigned char ar_coeff_shift;
932    unsigned char cb_mult;
933    unsigned char cb_luma_mult;
934    unsigned short cb_offset;
935    unsigned char cr_mult;
936    unsigned char cr_luma_mult;
937    unsigned short cr_offset;
938    unsigned char overlap_flag;
939    unsigned char clip_to_restricted_range;
940    unsigned char bit_depth_minus_8;
941    unsigned char chroma_scaling_from_luma;
942    unsigned char grain_scale_shift;
943    unsigned short random_seed;
944 } rvcn_dec_film_grain_params_t;
945 
946 typedef struct rvcn_dec_av1_tile_info_s {
947    unsigned int offset;
948    unsigned int size;
949 } rvcn_dec_av1_tile_info_t;
950 
951 typedef struct rvcn_dec_message_av1_s {
952    unsigned int frame_header_flags;
953    unsigned int current_frame_id;
954    unsigned int frame_offset;
955 
956    unsigned char profile;
957    unsigned char is_annexb;
958    unsigned char frame_type;
959    unsigned char primary_ref_frame;
960    unsigned char curr_pic_idx;
961 
962    unsigned char sb_size;
963    unsigned char interp_filter;
964    unsigned char filter_level[2];
965    unsigned char filter_level_u;
966    unsigned char filter_level_v;
967    unsigned char sharpness_level;
968    signed char ref_deltas[8];
969    signed char mode_deltas[2];
970    unsigned char base_qindex;
971    signed char y_dc_delta_q;
972    signed char u_dc_delta_q;
973    signed char v_dc_delta_q;
974    signed char u_ac_delta_q;
975    signed char v_ac_delta_q;
976    signed char qm_y;
977    signed char qm_u;
978    signed char qm_v;
979    signed char delta_q_res;
980    signed char delta_lf_res;
981 
982    unsigned char tile_cols;
983    unsigned char tile_rows;
984    unsigned char tx_mode;
985    unsigned char reference_mode;
986    unsigned char chroma_format;
987    unsigned int tile_size_bytes;
988    unsigned int context_update_tile_id;
989    unsigned int tile_col_start_sb[65];
990    unsigned int tile_row_start_sb[65];
991    unsigned int max_width;
992    unsigned int max_height;
993    unsigned int width;
994    unsigned int height;
995    unsigned int superres_upscaled_width;
996    unsigned char superres_scale_denominator;
997    unsigned char order_hint_bits;
998 
999    unsigned char ref_frame_map[8];
1000    unsigned int ref_frame_offset[8];
1001    unsigned char frame_refs[7];
1002    unsigned char ref_frame_sign_bias[7];
1003 
1004    unsigned char bit_depth_luma_minus8;
1005    unsigned char bit_depth_chroma_minus8;
1006 
1007    int feature_data[8][8];
1008    unsigned char feature_mask[8];
1009 
1010    unsigned char cdef_damping;
1011    unsigned char cdef_bits;
1012    unsigned short cdef_strengths[16];
1013    unsigned short cdef_uv_strengths[16];
1014    unsigned char frame_restoration_type[3];
1015    unsigned char log2_restoration_unit_size_minus5[3];
1016 
1017    unsigned char p010_mode;
1018    unsigned char msb_mode;
1019    unsigned char luma_10to8;
1020    unsigned char chroma_10to8;
1021    unsigned char preskip_segid;
1022    unsigned char last_active_segid;
1023    unsigned char seg_lossless_flag;
1024    unsigned char coded_lossless;
1025    rvcn_dec_film_grain_params_t film_grain;
1026    unsigned int uncompressed_header_size;
1027    rvcn_dec_warped_motion_params_t global_motion[8];
1028    rvcn_dec_av1_tile_info_t tile_info[256];
1029 } rvcn_dec_message_av1_t;
1030 
1031 typedef struct rvcn_dec_feature_index_s {
1032    unsigned int feature_id;
1033    unsigned int offset;
1034    unsigned int size;
1035    unsigned int filled;
1036 } rvcn_dec_feature_index_t;
1037 
1038 typedef struct rvcn_dec_feedback_header_s {
1039    unsigned int header_size;
1040    unsigned int total_size;
1041    unsigned int num_buffers;
1042    unsigned int status_report_feedback_number;
1043    unsigned int status;
1044    unsigned int value;
1045    unsigned int errorBits;
1046    rvcn_dec_feature_index_t index[1];
1047 } rvcn_dec_feedback_header_t;
1048 
1049 typedef struct rvcn_dec_feedback_profiling_s {
1050    unsigned int size;
1051 
1052    unsigned int decodingTime;
1053    unsigned int decodePlusOverhead;
1054    unsigned int masterTimerHits;
1055    unsigned int uvdLBSIREWaitCount;
1056 
1057    unsigned int avgMPCMemLatency;
1058    unsigned int maxMPCMemLatency;
1059    unsigned int uvdMPCLumaHits;
1060    unsigned int uvdMPCLumaHitPend;
1061    unsigned int uvdMPCLumaSearch;
1062    unsigned int uvdMPCChromaHits;
1063    unsigned int uvdMPCChromaHitPend;
1064    unsigned int uvdMPCChromaSearch;
1065 
1066    unsigned int uvdLMIPerfCountLo;
1067    unsigned int uvdLMIPerfCountHi;
1068    unsigned int uvdLMIAvgLatCntrEnvHit;
1069    unsigned int uvdLMILatCntr;
1070 
1071    unsigned int frameCRC0;
1072    unsigned int frameCRC1;
1073    unsigned int frameCRC2;
1074    unsigned int frameCRC3;
1075 
1076    unsigned int uvdLMIPerfMonCtrl;
1077    unsigned int uvdLMILatCtrl;
1078    unsigned int uvdMPCCntl;
1079    unsigned int reserved0[4];
1080    unsigned int decoderID;
1081    unsigned int codec;
1082 
1083    unsigned int dmaHwCrc32Enable;
1084    unsigned int dmaHwCrc32Value;
1085    unsigned int dmaHwCrc32Value2;
1086 } rvcn_dec_feedback_profiling_t;
1087 
1088 typedef struct rvcn_dec_vp9_nmv_ctx_mask_s {
1089    unsigned short classes_mask[2];
1090    unsigned short bits_mask[2];
1091    unsigned char joints_mask;
1092    unsigned char sign_mask[2];
1093    unsigned char class0_mask[2];
1094    unsigned char class0_fp_mask[2];
1095    unsigned char fp_mask[2];
1096    unsigned char class0_hp_mask[2];
1097    unsigned char hp_mask[2];
1098    unsigned char reserve[11];
1099 } rvcn_dec_vp9_nmv_ctx_mask_t;
1100 
1101 typedef struct rvcn_dec_vp9_nmv_component_s {
1102    unsigned char sign;
1103    unsigned char classes[10];
1104    unsigned char class0[1];
1105    unsigned char bits[10];
1106    unsigned char class0_fp[2][3];
1107    unsigned char fp[3];
1108    unsigned char class0_hp;
1109    unsigned char hp;
1110 } rvcn_dec_vp9_nmv_component_t;
1111 
1112 typedef struct rvcn_dec_vp9_probs_s {
1113    rvcn_dec_vp9_nmv_ctx_mask_t nmvc_mask;
1114    unsigned char coef_probs[4][2][2][6][6][3];
1115    unsigned char y_mode_prob[4][9];
1116    unsigned char uv_mode_prob[10][9];
1117    unsigned char single_ref_prob[5][2];
1118    unsigned char switchable_interp_prob[4][2];
1119    unsigned char partition_prob[16][3];
1120    unsigned char inter_mode_probs[7][3];
1121    unsigned char mbskip_probs[3];
1122    unsigned char intra_inter_prob[4];
1123    unsigned char comp_inter_prob[5];
1124    unsigned char comp_ref_prob[5];
1125    unsigned char tx_probs_32x32[2][3];
1126    unsigned char tx_probs_16x16[2][2];
1127    unsigned char tx_probs_8x8[2][1];
1128    unsigned char mv_joints[3];
1129    rvcn_dec_vp9_nmv_component_t mv_comps[2];
1130 } rvcn_dec_vp9_probs_t;
1131 
1132 typedef struct rvcn_dec_vp9_probs_segment_s {
1133    union {
1134       rvcn_dec_vp9_probs_t probs;
1135       unsigned char probs_data[RDECODE_VP9_PROBS_DATA_SIZE];
1136    };
1137 
1138    union {
1139       struct {
1140          unsigned int feature_data[8];
1141          unsigned char tree_probs[7];
1142          unsigned char pred_probs[3];
1143          unsigned char abs_delta;
1144          unsigned char feature_mask[8];
1145       } seg;
1146       unsigned char segment_data[256];
1147    };
1148 } rvcn_dec_vp9_probs_segment_t;
1149 
1150 struct rvcn_av1_prob_funcs
1151 {
1152    void (*init_mode_probs)(void * prob);
1153    void (*init_mv_probs)(void *prob);
1154    void (*default_coef_probs)(void *prob, int index);
1155 };
1156 
1157 typedef struct rvcn_dec_av1_fg_init_buf_s {
1158    short luma_grain_block[64][96];
1159    short cb_grain_block[32][48];
1160    short cr_grain_block[32][48];
1161    short scaling_lut_y[256];
1162    short scaling_lut_cb[256];
1163    short scaling_lut_cr[256];
1164    unsigned short temp_tile_left_seed[256];
1165 } rvcn_dec_av1_fg_init_buf_t;
1166 
1167 typedef struct rvcn_dec_av1_segment_fg_s {
1168    union {
1169       struct {
1170          unsigned char feature_data[128];
1171          unsigned char feature_mask[8];
1172       } seg;
1173       unsigned char segment_data[256];
1174    };
1175    rvcn_dec_av1_fg_init_buf_t fg_buf;
1176 } rvcn_dec_av1_segment_fg_t;
1177 
1178 struct jpeg_params {
1179    unsigned bsd_size;
1180    unsigned dt_pitch;
1181    unsigned dt_uv_pitch;
1182    unsigned dt_luma_top_offset;
1183    unsigned dt_chroma_top_offset;
1184    unsigned dt_chromav_top_offset;
1185    uint16_t crop_x;
1186    uint16_t crop_y;
1187    uint16_t crop_width;
1188    uint16_t crop_height;
1189 };
1190 
1191 #define RDECODE_VCN1_GPCOM_VCPU_CMD   0x2070c
1192 #define RDECODE_VCN1_GPCOM_VCPU_DATA0 0x20710
1193 #define RDECODE_VCN1_GPCOM_VCPU_DATA1 0x20714
1194 #define RDECODE_VCN1_ENGINE_CNTL      0x20718
1195 
1196 #define RDECODE_VCN2_GPCOM_VCPU_CMD   (0x503 << 2)
1197 #define RDECODE_VCN2_GPCOM_VCPU_DATA0 (0x504 << 2)
1198 #define RDECODE_VCN2_GPCOM_VCPU_DATA1 (0x505 << 2)
1199 #define RDECODE_VCN2_ENGINE_CNTL      (0x506 << 2)
1200 
1201 #define RDECODE_VCN2_5_GPCOM_VCPU_CMD   0x3c
1202 #define RDECODE_VCN2_5_GPCOM_VCPU_DATA0 0x40
1203 #define RDECODE_VCN2_5_GPCOM_VCPU_DATA1 0x44
1204 #define RDECODE_VCN2_5_ENGINE_CNTL      0x9b4
1205 
1206 #define RDECODE_SESSION_CONTEXT_SIZE (128 * 1024)
1207 
1208 #endif
1209