1 /*
2 * Copyright © 2016 Red Hat
3 *
4 * based on anv driver:
5 * Copyright © 2016 Intel Corporation
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * IN THE SOFTWARE.
25 */
26
27 #include "nir/nir_builder.h"
28 #include "radv_meta.h"
29 #include "vk_common_entrypoints.h"
30 #include "vk_format.h"
31
32 enum blit2d_src_type {
33 BLIT2D_SRC_TYPE_IMAGE,
34 BLIT2D_SRC_TYPE_IMAGE_3D,
35 BLIT2D_SRC_TYPE_BUFFER,
36 BLIT2D_NUM_SRC_TYPES,
37 };
38
39 static VkResult blit2d_init_color_pipeline(struct radv_device *device, enum blit2d_src_type src_type, VkFormat format,
40 uint32_t log2_samples);
41
42 static VkResult blit2d_init_depth_only_pipeline(struct radv_device *device, enum blit2d_src_type src_type,
43 uint32_t log2_samples);
44
45 static VkResult blit2d_init_stencil_only_pipeline(struct radv_device *device, enum blit2d_src_type src_type,
46 uint32_t log2_samples);
47
48 static void
create_iview(struct radv_cmd_buffer * cmd_buffer,struct radv_meta_blit2d_surf * surf,struct radv_image_view * iview,VkFormat depth_format,VkImageAspectFlagBits aspects)49 create_iview(struct radv_cmd_buffer *cmd_buffer, struct radv_meta_blit2d_surf *surf, struct radv_image_view *iview,
50 VkFormat depth_format, VkImageAspectFlagBits aspects)
51 {
52 VkFormat format;
53
54 if (depth_format)
55 format = depth_format;
56 else
57 format = surf->format;
58
59 radv_image_view_init(iview, cmd_buffer->device,
60 &(VkImageViewCreateInfo){
61 .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO,
62 .image = radv_image_to_handle(surf->image),
63 .viewType = radv_meta_get_view_type(surf->image),
64 .format = format,
65 .subresourceRange = {.aspectMask = aspects,
66 .baseMipLevel = surf->level,
67 .levelCount = 1,
68 .baseArrayLayer = surf->layer,
69 .layerCount = 1},
70 },
71 0, &(struct radv_image_view_extra_create_info){.disable_dcc_mrt = surf->disable_compression});
72 }
73
74 static void
create_bview(struct radv_cmd_buffer * cmd_buffer,struct radv_meta_blit2d_buffer * src,struct radv_buffer_view * bview,VkFormat depth_format)75 create_bview(struct radv_cmd_buffer *cmd_buffer, struct radv_meta_blit2d_buffer *src, struct radv_buffer_view *bview,
76 VkFormat depth_format)
77 {
78 VkFormat format;
79
80 if (depth_format)
81 format = depth_format;
82 else
83 format = src->format;
84 radv_buffer_view_init(bview, cmd_buffer->device,
85 &(VkBufferViewCreateInfo){
86 .sType = VK_STRUCTURE_TYPE_BUFFER_VIEW_CREATE_INFO,
87 .flags = 0,
88 .buffer = radv_buffer_to_handle(src->buffer),
89 .format = format,
90 .offset = src->offset,
91 .range = VK_WHOLE_SIZE,
92 });
93 }
94
95 struct blit2d_src_temps {
96 struct radv_image_view iview;
97 struct radv_buffer_view bview;
98 };
99
100 static void
blit2d_bind_src(struct radv_cmd_buffer * cmd_buffer,struct radv_meta_blit2d_surf * src_img,struct radv_meta_blit2d_buffer * src_buf,struct blit2d_src_temps * tmp,enum blit2d_src_type src_type,VkFormat depth_format,VkImageAspectFlagBits aspects,uint32_t log2_samples)101 blit2d_bind_src(struct radv_cmd_buffer *cmd_buffer, struct radv_meta_blit2d_surf *src_img,
102 struct radv_meta_blit2d_buffer *src_buf, struct blit2d_src_temps *tmp, enum blit2d_src_type src_type,
103 VkFormat depth_format, VkImageAspectFlagBits aspects, uint32_t log2_samples)
104 {
105 struct radv_device *device = cmd_buffer->device;
106
107 if (src_type == BLIT2D_SRC_TYPE_BUFFER) {
108 create_bview(cmd_buffer, src_buf, &tmp->bview, depth_format);
109
110 radv_meta_push_descriptor_set(
111 cmd_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS, device->meta_state.blit2d[log2_samples].p_layouts[src_type],
112 0, /* set */
113 1, /* descriptorWriteCount */
114 (VkWriteDescriptorSet[]){{.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET,
115 .dstBinding = 0,
116 .dstArrayElement = 0,
117 .descriptorCount = 1,
118 .descriptorType = VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER,
119 .pTexelBufferView = (VkBufferView[]){radv_buffer_view_to_handle(&tmp->bview)}}});
120
121 vk_common_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer),
122 device->meta_state.blit2d[log2_samples].p_layouts[src_type],
123 VK_SHADER_STAGE_FRAGMENT_BIT, 16, 4, &src_buf->pitch);
124 } else {
125 create_iview(cmd_buffer, src_img, &tmp->iview, depth_format, aspects);
126
127 if (src_type == BLIT2D_SRC_TYPE_IMAGE_3D)
128 vk_common_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer),
129 device->meta_state.blit2d[log2_samples].p_layouts[src_type],
130 VK_SHADER_STAGE_FRAGMENT_BIT, 16, 4, &src_img->layer);
131
132 radv_meta_push_descriptor_set(cmd_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS,
133 device->meta_state.blit2d[log2_samples].p_layouts[src_type], 0, /* set */
134 1, /* descriptorWriteCount */
135 (VkWriteDescriptorSet[]){{.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET,
136 .dstBinding = 0,
137 .dstArrayElement = 0,
138 .descriptorCount = 1,
139 .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,
140 .pImageInfo = (VkDescriptorImageInfo[]){
141 {
142 .sampler = VK_NULL_HANDLE,
143 .imageView = radv_image_view_to_handle(&tmp->iview),
144 .imageLayout = VK_IMAGE_LAYOUT_GENERAL,
145 },
146 }}});
147 }
148 }
149
150 struct blit2d_dst_temps {
151 VkImage image;
152 struct radv_image_view iview;
153 VkFramebuffer fb;
154 };
155
156 static void
bind_pipeline(struct radv_cmd_buffer * cmd_buffer,enum blit2d_src_type src_type,unsigned fs_key,uint32_t log2_samples)157 bind_pipeline(struct radv_cmd_buffer *cmd_buffer, enum blit2d_src_type src_type, unsigned fs_key, uint32_t log2_samples)
158 {
159 VkPipeline pipeline = cmd_buffer->device->meta_state.blit2d[log2_samples].pipelines[src_type][fs_key];
160
161 radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_GRAPHICS, pipeline);
162 }
163
164 static void
bind_depth_pipeline(struct radv_cmd_buffer * cmd_buffer,enum blit2d_src_type src_type,uint32_t log2_samples)165 bind_depth_pipeline(struct radv_cmd_buffer *cmd_buffer, enum blit2d_src_type src_type, uint32_t log2_samples)
166 {
167 VkPipeline pipeline = cmd_buffer->device->meta_state.blit2d[log2_samples].depth_only_pipeline[src_type];
168
169 radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_GRAPHICS, pipeline);
170 }
171
172 static void
bind_stencil_pipeline(struct radv_cmd_buffer * cmd_buffer,enum blit2d_src_type src_type,uint32_t log2_samples)173 bind_stencil_pipeline(struct radv_cmd_buffer *cmd_buffer, enum blit2d_src_type src_type, uint32_t log2_samples)
174 {
175 VkPipeline pipeline = cmd_buffer->device->meta_state.blit2d[log2_samples].stencil_only_pipeline[src_type];
176
177 radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_GRAPHICS, pipeline);
178 }
179
180 static void
radv_meta_blit2d_normal_dst(struct radv_cmd_buffer * cmd_buffer,struct radv_meta_blit2d_surf * src_img,struct radv_meta_blit2d_buffer * src_buf,struct radv_meta_blit2d_surf * dst,unsigned num_rects,struct radv_meta_blit2d_rect * rects,enum blit2d_src_type src_type,uint32_t log2_samples)181 radv_meta_blit2d_normal_dst(struct radv_cmd_buffer *cmd_buffer, struct radv_meta_blit2d_surf *src_img,
182 struct radv_meta_blit2d_buffer *src_buf, struct radv_meta_blit2d_surf *dst,
183 unsigned num_rects, struct radv_meta_blit2d_rect *rects, enum blit2d_src_type src_type,
184 uint32_t log2_samples)
185 {
186 struct radv_device *device = cmd_buffer->device;
187
188 for (unsigned r = 0; r < num_rects; ++r) {
189 radv_CmdSetViewport(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1,
190 &(VkViewport){.x = rects[r].dst_x,
191 .y = rects[r].dst_y,
192 .width = rects[r].width,
193 .height = rects[r].height,
194 .minDepth = 0.0f,
195 .maxDepth = 1.0f});
196
197 radv_CmdSetScissor(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1,
198 &(VkRect2D){
199 .offset = (VkOffset2D){rects[r].dst_x, rects[r].dst_y},
200 .extent = (VkExtent2D){rects[r].width, rects[r].height},
201 });
202
203 u_foreach_bit (i, dst->aspect_mask) {
204 unsigned aspect_mask = 1u << i;
205 unsigned src_aspect_mask = aspect_mask;
206 VkFormat depth_format = 0;
207 if (aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT)
208 depth_format = vk_format_stencil_only(dst->image->vk.format);
209 else if (aspect_mask == VK_IMAGE_ASPECT_DEPTH_BIT)
210 depth_format = vk_format_depth_only(dst->image->vk.format);
211 else if (src_img)
212 src_aspect_mask = src_img->aspect_mask;
213
214 struct blit2d_src_temps src_temps;
215 blit2d_bind_src(cmd_buffer, src_img, src_buf, &src_temps, src_type, depth_format, src_aspect_mask,
216 log2_samples);
217
218 struct blit2d_dst_temps dst_temps;
219 create_iview(cmd_buffer, dst, &dst_temps.iview, depth_format, aspect_mask);
220
221 float vertex_push_constants[4] = {
222 rects[r].src_x,
223 rects[r].src_y,
224 rects[r].src_x + rects[r].width,
225 rects[r].src_y + rects[r].height,
226 };
227
228 vk_common_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer),
229 device->meta_state.blit2d[log2_samples].p_layouts[src_type],
230 VK_SHADER_STAGE_VERTEX_BIT, 0, 16, vertex_push_constants);
231
232 if (aspect_mask == VK_IMAGE_ASPECT_COLOR_BIT || aspect_mask == VK_IMAGE_ASPECT_PLANE_0_BIT ||
233 aspect_mask == VK_IMAGE_ASPECT_PLANE_1_BIT || aspect_mask == VK_IMAGE_ASPECT_PLANE_2_BIT) {
234 unsigned fs_key = radv_format_meta_fs_key(device, dst_temps.iview.vk.format);
235
236 if (device->meta_state.blit2d[log2_samples].pipelines[src_type][fs_key] == VK_NULL_HANDLE) {
237 VkResult ret =
238 blit2d_init_color_pipeline(device, src_type, radv_fs_key_format_exemplars[fs_key], log2_samples);
239 if (ret != VK_SUCCESS) {
240 vk_command_buffer_set_error(&cmd_buffer->vk, ret);
241 goto fail_pipeline;
242 }
243 }
244
245 const VkRenderingAttachmentInfo color_att_info = {
246 .sType = VK_STRUCTURE_TYPE_RENDERING_ATTACHMENT_INFO,
247 .imageView = radv_image_view_to_handle(&dst_temps.iview),
248 .imageLayout = dst->current_layout,
249 .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
250 .storeOp = VK_ATTACHMENT_STORE_OP_STORE,
251 };
252
253 const VkRenderingInfo rendering_info = {
254 .sType = VK_STRUCTURE_TYPE_RENDERING_INFO,
255 .renderArea =
256 {
257 .offset = {rects[r].dst_x, rects[r].dst_y},
258 .extent = {rects[r].width, rects[r].height},
259 },
260 .layerCount = 1,
261 .colorAttachmentCount = 1,
262 .pColorAttachments = &color_att_info,
263 };
264
265 radv_CmdBeginRendering(radv_cmd_buffer_to_handle(cmd_buffer), &rendering_info);
266
267 bind_pipeline(cmd_buffer, src_type, fs_key, log2_samples);
268 } else if (aspect_mask == VK_IMAGE_ASPECT_DEPTH_BIT) {
269 if (device->meta_state.blit2d[log2_samples].depth_only_pipeline[src_type] == VK_NULL_HANDLE) {
270 VkResult ret = blit2d_init_depth_only_pipeline(device, src_type, log2_samples);
271 if (ret != VK_SUCCESS) {
272 vk_command_buffer_set_error(&cmd_buffer->vk, ret);
273 goto fail_pipeline;
274 }
275 }
276
277 const VkRenderingAttachmentInfo depth_att_info = {
278 .sType = VK_STRUCTURE_TYPE_RENDERING_ATTACHMENT_INFO,
279 .imageView = radv_image_view_to_handle(&dst_temps.iview),
280 .imageLayout = dst->current_layout,
281 .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
282 .storeOp = VK_ATTACHMENT_STORE_OP_STORE,
283 };
284
285 const VkRenderingInfo rendering_info = {
286 .sType = VK_STRUCTURE_TYPE_RENDERING_INFO,
287 .renderArea =
288 {
289 .offset = {rects[r].dst_x, rects[r].dst_y},
290 .extent = {rects[r].width, rects[r].height},
291 },
292 .layerCount = 1,
293 .pDepthAttachment = &depth_att_info,
294 .pStencilAttachment = (dst->image->vk.aspects & VK_IMAGE_ASPECT_STENCIL_BIT) ? &depth_att_info : NULL,
295 };
296
297 radv_CmdBeginRendering(radv_cmd_buffer_to_handle(cmd_buffer), &rendering_info);
298
299 bind_depth_pipeline(cmd_buffer, src_type, log2_samples);
300
301 } else if (aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT) {
302 if (device->meta_state.blit2d[log2_samples].stencil_only_pipeline[src_type] == VK_NULL_HANDLE) {
303 VkResult ret = blit2d_init_stencil_only_pipeline(device, src_type, log2_samples);
304 if (ret != VK_SUCCESS) {
305 vk_command_buffer_set_error(&cmd_buffer->vk, ret);
306 goto fail_pipeline;
307 }
308 }
309
310 const VkRenderingAttachmentInfo stencil_att_info = {
311 .sType = VK_STRUCTURE_TYPE_RENDERING_ATTACHMENT_INFO,
312 .imageView = radv_image_view_to_handle(&dst_temps.iview),
313 .imageLayout = dst->current_layout,
314 .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
315 .storeOp = VK_ATTACHMENT_STORE_OP_STORE,
316 };
317
318 const VkRenderingInfo rendering_info = {
319 .sType = VK_STRUCTURE_TYPE_RENDERING_INFO,
320 .renderArea =
321 {
322 .offset = {rects[r].dst_x, rects[r].dst_y},
323 .extent = {rects[r].width, rects[r].height},
324 },
325 .layerCount = 1,
326 .pDepthAttachment = (dst->image->vk.aspects & VK_IMAGE_ASPECT_DEPTH_BIT) ? &stencil_att_info : NULL,
327 .pStencilAttachment = &stencil_att_info,
328 };
329
330 radv_CmdBeginRendering(radv_cmd_buffer_to_handle(cmd_buffer), &rendering_info);
331
332 bind_stencil_pipeline(cmd_buffer, src_type, log2_samples);
333 } else
334 unreachable("Processing blit2d with multiple aspects.");
335
336 radv_CmdDraw(radv_cmd_buffer_to_handle(cmd_buffer), 3, 1, 0, 0);
337
338 radv_CmdEndRendering(radv_cmd_buffer_to_handle(cmd_buffer));
339
340 fail_pipeline:
341
342 if (src_type == BLIT2D_SRC_TYPE_BUFFER)
343 radv_buffer_view_finish(&src_temps.bview);
344 else
345 radv_image_view_finish(&src_temps.iview);
346
347 radv_image_view_finish(&dst_temps.iview);
348 }
349 }
350 }
351
352 void
radv_meta_blit2d(struct radv_cmd_buffer * cmd_buffer,struct radv_meta_blit2d_surf * src_img,struct radv_meta_blit2d_buffer * src_buf,struct radv_meta_blit2d_surf * dst,unsigned num_rects,struct radv_meta_blit2d_rect * rects)353 radv_meta_blit2d(struct radv_cmd_buffer *cmd_buffer, struct radv_meta_blit2d_surf *src_img,
354 struct radv_meta_blit2d_buffer *src_buf, struct radv_meta_blit2d_surf *dst, unsigned num_rects,
355 struct radv_meta_blit2d_rect *rects)
356 {
357 bool use_3d = (src_img && src_img->image->vk.image_type == VK_IMAGE_TYPE_3D);
358 enum blit2d_src_type src_type = src_buf ? BLIT2D_SRC_TYPE_BUFFER
359 : use_3d ? BLIT2D_SRC_TYPE_IMAGE_3D
360 : BLIT2D_SRC_TYPE_IMAGE;
361 radv_meta_blit2d_normal_dst(cmd_buffer, src_img, src_buf, dst, num_rects, rects, src_type,
362 src_img ? util_logbase2(src_img->image->vk.samples) : 0);
363 }
364
365 static nir_shader *
build_nir_vertex_shader(struct radv_device * device)366 build_nir_vertex_shader(struct radv_device *device)
367 {
368 const struct glsl_type *vec4 = glsl_vec4_type();
369 const struct glsl_type *vec2 = glsl_vector_type(GLSL_TYPE_FLOAT, 2);
370 nir_builder b = radv_meta_init_shader(device, MESA_SHADER_VERTEX, "meta_blit2d_vs");
371
372 nir_variable *pos_out = nir_variable_create(b.shader, nir_var_shader_out, vec4, "gl_Position");
373 pos_out->data.location = VARYING_SLOT_POS;
374
375 nir_variable *tex_pos_out = nir_variable_create(b.shader, nir_var_shader_out, vec2, "v_tex_pos");
376 tex_pos_out->data.location = VARYING_SLOT_VAR0;
377 tex_pos_out->data.interpolation = INTERP_MODE_SMOOTH;
378
379 nir_def *outvec = nir_gen_rect_vertices(&b, NULL, NULL);
380 nir_store_var(&b, pos_out, outvec, 0xf);
381
382 nir_def *src_box = nir_load_push_constant(&b, 4, 32, nir_imm_int(&b, 0), .range = 16);
383 nir_def *vertex_id = nir_load_vertex_id_zero_base(&b);
384
385 /* vertex 0 - src_x, src_y */
386 /* vertex 1 - src_x, src_y+h */
387 /* vertex 2 - src_x+w, src_y */
388 /* so channel 0 is vertex_id != 2 ? src_x : src_x + w
389 channel 1 is vertex id != 1 ? src_y : src_y + w */
390
391 nir_def *c0cmp = nir_ine_imm(&b, vertex_id, 2);
392 nir_def *c1cmp = nir_ine_imm(&b, vertex_id, 1);
393
394 nir_def *comp[2];
395 comp[0] = nir_bcsel(&b, c0cmp, nir_channel(&b, src_box, 0), nir_channel(&b, src_box, 2));
396
397 comp[1] = nir_bcsel(&b, c1cmp, nir_channel(&b, src_box, 1), nir_channel(&b, src_box, 3));
398 nir_def *out_tex_vec = nir_vec(&b, comp, 2);
399 nir_store_var(&b, tex_pos_out, out_tex_vec, 0x3);
400 return b.shader;
401 }
402
403 typedef nir_def *(*texel_fetch_build_func)(struct nir_builder *, struct radv_device *, nir_def *, bool, bool);
404
405 static nir_def *
build_nir_texel_fetch(struct nir_builder * b,struct radv_device * device,nir_def * tex_pos,bool is_3d,bool is_multisampled)406 build_nir_texel_fetch(struct nir_builder *b, struct radv_device *device, nir_def *tex_pos, bool is_3d,
407 bool is_multisampled)
408 {
409 enum glsl_sampler_dim dim = is_3d ? GLSL_SAMPLER_DIM_3D
410 : is_multisampled ? GLSL_SAMPLER_DIM_MS
411 : GLSL_SAMPLER_DIM_2D;
412 const struct glsl_type *sampler_type = glsl_sampler_type(dim, false, false, GLSL_TYPE_UINT);
413 nir_variable *sampler = nir_variable_create(b->shader, nir_var_uniform, sampler_type, "s_tex");
414 sampler->data.descriptor_set = 0;
415 sampler->data.binding = 0;
416
417 nir_def *tex_pos_3d = NULL;
418 nir_def *sample_idx = NULL;
419 if (is_3d) {
420 nir_def *layer = nir_load_push_constant(b, 1, 32, nir_imm_int(b, 0), .base = 16, .range = 4);
421
422 nir_def *chans[3];
423 chans[0] = nir_channel(b, tex_pos, 0);
424 chans[1] = nir_channel(b, tex_pos, 1);
425 chans[2] = layer;
426 tex_pos_3d = nir_vec(b, chans, 3);
427 }
428 if (is_multisampled) {
429 sample_idx = nir_load_sample_id(b);
430 }
431
432 nir_deref_instr *tex_deref = nir_build_deref_var(b, sampler);
433
434 if (is_multisampled) {
435 return nir_txf_ms_deref(b, tex_deref, tex_pos, sample_idx);
436 } else {
437 return nir_txf_deref(b, tex_deref, is_3d ? tex_pos_3d : tex_pos, NULL);
438 }
439 }
440
441 static nir_def *
build_nir_buffer_fetch(struct nir_builder * b,struct radv_device * device,nir_def * tex_pos,bool is_3d,bool is_multisampled)442 build_nir_buffer_fetch(struct nir_builder *b, struct radv_device *device, nir_def *tex_pos, bool is_3d,
443 bool is_multisampled)
444 {
445 const struct glsl_type *sampler_type = glsl_sampler_type(GLSL_SAMPLER_DIM_BUF, false, false, GLSL_TYPE_UINT);
446 nir_variable *sampler = nir_variable_create(b->shader, nir_var_uniform, sampler_type, "s_tex");
447 sampler->data.descriptor_set = 0;
448 sampler->data.binding = 0;
449
450 nir_def *width = nir_load_push_constant(b, 1, 32, nir_imm_int(b, 0), .base = 16, .range = 4);
451
452 nir_def *pos_x = nir_channel(b, tex_pos, 0);
453 nir_def *pos_y = nir_channel(b, tex_pos, 1);
454 pos_y = nir_imul(b, pos_y, width);
455 pos_x = nir_iadd(b, pos_x, pos_y);
456
457 nir_deref_instr *tex_deref = nir_build_deref_var(b, sampler);
458 return nir_txf_deref(b, tex_deref, pos_x, NULL);
459 }
460
461 static const VkPipelineVertexInputStateCreateInfo normal_vi_create_info = {
462 .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
463 .vertexBindingDescriptionCount = 0,
464 .vertexAttributeDescriptionCount = 0,
465 };
466
467 static nir_shader *
build_nir_copy_fragment_shader(struct radv_device * device,texel_fetch_build_func txf_func,const char * name,bool is_3d,bool is_multisampled)468 build_nir_copy_fragment_shader(struct radv_device *device, texel_fetch_build_func txf_func, const char *name,
469 bool is_3d, bool is_multisampled)
470 {
471 const struct glsl_type *vec4 = glsl_vec4_type();
472 const struct glsl_type *vec2 = glsl_vector_type(GLSL_TYPE_FLOAT, 2);
473 nir_builder b = radv_meta_init_shader(device, MESA_SHADER_FRAGMENT, "%s", name);
474
475 nir_variable *tex_pos_in = nir_variable_create(b.shader, nir_var_shader_in, vec2, "v_tex_pos");
476 tex_pos_in->data.location = VARYING_SLOT_VAR0;
477
478 nir_variable *color_out = nir_variable_create(b.shader, nir_var_shader_out, vec4, "f_color");
479 color_out->data.location = FRAG_RESULT_DATA0;
480
481 nir_def *pos_int = nir_f2i32(&b, nir_load_var(&b, tex_pos_in));
482 nir_def *tex_pos = nir_trim_vector(&b, pos_int, 2);
483
484 nir_def *color = txf_func(&b, device, tex_pos, is_3d, is_multisampled);
485 nir_store_var(&b, color_out, color, 0xf);
486
487 b.shader->info.fs.uses_sample_shading = is_multisampled;
488
489 return b.shader;
490 }
491
492 static nir_shader *
build_nir_copy_fragment_shader_depth(struct radv_device * device,texel_fetch_build_func txf_func,const char * name,bool is_3d,bool is_multisampled)493 build_nir_copy_fragment_shader_depth(struct radv_device *device, texel_fetch_build_func txf_func, const char *name,
494 bool is_3d, bool is_multisampled)
495 {
496 const struct glsl_type *vec4 = glsl_vec4_type();
497 const struct glsl_type *vec2 = glsl_vector_type(GLSL_TYPE_FLOAT, 2);
498 nir_builder b = radv_meta_init_shader(device, MESA_SHADER_FRAGMENT, "%s", name);
499
500 nir_variable *tex_pos_in = nir_variable_create(b.shader, nir_var_shader_in, vec2, "v_tex_pos");
501 tex_pos_in->data.location = VARYING_SLOT_VAR0;
502
503 nir_variable *color_out = nir_variable_create(b.shader, nir_var_shader_out, vec4, "f_color");
504 color_out->data.location = FRAG_RESULT_DEPTH;
505
506 nir_def *pos_int = nir_f2i32(&b, nir_load_var(&b, tex_pos_in));
507 nir_def *tex_pos = nir_trim_vector(&b, pos_int, 2);
508
509 nir_def *color = txf_func(&b, device, tex_pos, is_3d, is_multisampled);
510 nir_store_var(&b, color_out, color, 0x1);
511
512 b.shader->info.fs.uses_sample_shading = is_multisampled;
513
514 return b.shader;
515 }
516
517 static nir_shader *
build_nir_copy_fragment_shader_stencil(struct radv_device * device,texel_fetch_build_func txf_func,const char * name,bool is_3d,bool is_multisampled)518 build_nir_copy_fragment_shader_stencil(struct radv_device *device, texel_fetch_build_func txf_func, const char *name,
519 bool is_3d, bool is_multisampled)
520 {
521 const struct glsl_type *vec4 = glsl_vec4_type();
522 const struct glsl_type *vec2 = glsl_vector_type(GLSL_TYPE_FLOAT, 2);
523 nir_builder b = radv_meta_init_shader(device, MESA_SHADER_FRAGMENT, "%s", name);
524
525 nir_variable *tex_pos_in = nir_variable_create(b.shader, nir_var_shader_in, vec2, "v_tex_pos");
526 tex_pos_in->data.location = VARYING_SLOT_VAR0;
527
528 nir_variable *color_out = nir_variable_create(b.shader, nir_var_shader_out, vec4, "f_color");
529 color_out->data.location = FRAG_RESULT_STENCIL;
530
531 nir_def *pos_int = nir_f2i32(&b, nir_load_var(&b, tex_pos_in));
532 nir_def *tex_pos = nir_trim_vector(&b, pos_int, 2);
533
534 nir_def *color = txf_func(&b, device, tex_pos, is_3d, is_multisampled);
535 nir_store_var(&b, color_out, color, 0x1);
536
537 b.shader->info.fs.uses_sample_shading = is_multisampled;
538
539 return b.shader;
540 }
541
542 void
radv_device_finish_meta_blit2d_state(struct radv_device * device)543 radv_device_finish_meta_blit2d_state(struct radv_device *device)
544 {
545 struct radv_meta_state *state = &device->meta_state;
546
547 for (unsigned log2_samples = 0; log2_samples < MAX_SAMPLES_LOG2; ++log2_samples) {
548 for (unsigned src = 0; src < BLIT2D_NUM_SRC_TYPES; src++) {
549 radv_DestroyPipelineLayout(radv_device_to_handle(device), state->blit2d[log2_samples].p_layouts[src],
550 &state->alloc);
551 device->vk.dispatch_table.DestroyDescriptorSetLayout(
552 radv_device_to_handle(device), state->blit2d[log2_samples].ds_layouts[src], &state->alloc);
553
554 for (unsigned j = 0; j < NUM_META_FS_KEYS; ++j) {
555 radv_DestroyPipeline(radv_device_to_handle(device), state->blit2d[log2_samples].pipelines[src][j],
556 &state->alloc);
557 }
558
559 radv_DestroyPipeline(radv_device_to_handle(device), state->blit2d[log2_samples].depth_only_pipeline[src],
560 &state->alloc);
561 radv_DestroyPipeline(radv_device_to_handle(device), state->blit2d[log2_samples].stencil_only_pipeline[src],
562 &state->alloc);
563 }
564 }
565 }
566
567 static VkResult
blit2d_init_color_pipeline(struct radv_device * device,enum blit2d_src_type src_type,VkFormat format,uint32_t log2_samples)568 blit2d_init_color_pipeline(struct radv_device *device, enum blit2d_src_type src_type, VkFormat format,
569 uint32_t log2_samples)
570 {
571 VkResult result;
572 unsigned fs_key = radv_format_meta_fs_key(device, format);
573 const char *name;
574
575 mtx_lock(&device->meta_state.mtx);
576 if (device->meta_state.blit2d[log2_samples].pipelines[src_type][fs_key]) {
577 mtx_unlock(&device->meta_state.mtx);
578 return VK_SUCCESS;
579 }
580
581 texel_fetch_build_func src_func;
582 switch (src_type) {
583 case BLIT2D_SRC_TYPE_IMAGE:
584 src_func = build_nir_texel_fetch;
585 name = "meta_blit2d_image_fs";
586 break;
587 case BLIT2D_SRC_TYPE_IMAGE_3D:
588 src_func = build_nir_texel_fetch;
589 name = "meta_blit3d_image_fs";
590 break;
591 case BLIT2D_SRC_TYPE_BUFFER:
592 src_func = build_nir_buffer_fetch;
593 name = "meta_blit2d_buffer_fs";
594 break;
595 default:
596 unreachable("unknown blit src type\n");
597 break;
598 }
599
600 const VkPipelineVertexInputStateCreateInfo *vi_create_info;
601 nir_shader *fs =
602 build_nir_copy_fragment_shader(device, src_func, name, src_type == BLIT2D_SRC_TYPE_IMAGE_3D, log2_samples > 0);
603 nir_shader *vs = build_nir_vertex_shader(device);
604
605 vi_create_info = &normal_vi_create_info;
606
607 VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = {
608 {.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
609 .stage = VK_SHADER_STAGE_VERTEX_BIT,
610 .module = vk_shader_module_handle_from_nir(vs),
611 .pName = "main",
612 .pSpecializationInfo = NULL},
613 {.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
614 .stage = VK_SHADER_STAGE_FRAGMENT_BIT,
615 .module = vk_shader_module_handle_from_nir(fs),
616 .pName = "main",
617 .pSpecializationInfo = NULL},
618 };
619
620 const VkPipelineRenderingCreateInfo rendering_create_info = {
621 .sType = VK_STRUCTURE_TYPE_PIPELINE_RENDERING_CREATE_INFO,
622 .colorAttachmentCount = 1,
623 .pColorAttachmentFormats = &format,
624 };
625
626 const VkGraphicsPipelineCreateInfo vk_pipeline_info = {
627 .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
628 .pNext = &rendering_create_info,
629 .stageCount = ARRAY_SIZE(pipeline_shader_stages),
630 .pStages = pipeline_shader_stages,
631 .pVertexInputState = vi_create_info,
632 .pInputAssemblyState =
633 &(VkPipelineInputAssemblyStateCreateInfo){
634 .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
635 .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
636 .primitiveRestartEnable = false,
637 },
638 .pViewportState =
639 &(VkPipelineViewportStateCreateInfo){
640 .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
641 .viewportCount = 1,
642 .scissorCount = 1,
643 },
644 .pRasterizationState =
645 &(VkPipelineRasterizationStateCreateInfo){.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
646 .rasterizerDiscardEnable = false,
647 .polygonMode = VK_POLYGON_MODE_FILL,
648 .cullMode = VK_CULL_MODE_NONE,
649 .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE,
650 .depthBiasConstantFactor = 0.0f,
651 .depthBiasClamp = 0.0f,
652 .depthBiasSlopeFactor = 0.0f,
653 .lineWidth = 1.0f},
654 .pMultisampleState =
655 &(VkPipelineMultisampleStateCreateInfo){
656 .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
657 .rasterizationSamples = 1 << log2_samples,
658 .sampleShadingEnable = log2_samples > 1,
659 .minSampleShading = 1.0,
660 .pSampleMask = (VkSampleMask[]){UINT32_MAX},
661 },
662 .pColorBlendState =
663 &(VkPipelineColorBlendStateCreateInfo){
664 .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
665 .attachmentCount = 1,
666 .pAttachments =
667 (VkPipelineColorBlendAttachmentState[]){
668 {.colorWriteMask = VK_COLOR_COMPONENT_A_BIT | VK_COLOR_COMPONENT_R_BIT | VK_COLOR_COMPONENT_G_BIT |
669 VK_COLOR_COMPONENT_B_BIT},
670 },
671 .blendConstants = {0.0f, 0.0f, 0.0f, 0.0f}},
672 .pDynamicState =
673 &(VkPipelineDynamicStateCreateInfo){
674 .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
675 .dynamicStateCount = 2,
676 .pDynamicStates =
677 (VkDynamicState[]){
678 VK_DYNAMIC_STATE_VIEWPORT,
679 VK_DYNAMIC_STATE_SCISSOR,
680 },
681 },
682 .flags = 0,
683 .layout = device->meta_state.blit2d[log2_samples].p_layouts[src_type],
684 .renderPass = VK_NULL_HANDLE,
685 .subpass = 0,
686 };
687
688 const struct radv_graphics_pipeline_create_info radv_pipeline_info = {.use_rectlist = true};
689
690 result = radv_graphics_pipeline_create(radv_device_to_handle(device), device->meta_state.cache, &vk_pipeline_info,
691 &radv_pipeline_info, &device->meta_state.alloc,
692 &device->meta_state.blit2d[log2_samples].pipelines[src_type][fs_key]);
693
694 ralloc_free(vs);
695 ralloc_free(fs);
696
697 mtx_unlock(&device->meta_state.mtx);
698 return result;
699 }
700
701 static VkResult
blit2d_init_depth_only_pipeline(struct radv_device * device,enum blit2d_src_type src_type,uint32_t log2_samples)702 blit2d_init_depth_only_pipeline(struct radv_device *device, enum blit2d_src_type src_type, uint32_t log2_samples)
703 {
704 VkResult result;
705 const char *name;
706
707 mtx_lock(&device->meta_state.mtx);
708 if (device->meta_state.blit2d[log2_samples].depth_only_pipeline[src_type]) {
709 mtx_unlock(&device->meta_state.mtx);
710 return VK_SUCCESS;
711 }
712
713 texel_fetch_build_func src_func;
714 switch (src_type) {
715 case BLIT2D_SRC_TYPE_IMAGE:
716 src_func = build_nir_texel_fetch;
717 name = "meta_blit2d_depth_image_fs";
718 break;
719 case BLIT2D_SRC_TYPE_IMAGE_3D:
720 src_func = build_nir_texel_fetch;
721 name = "meta_blit3d_depth_image_fs";
722 break;
723 case BLIT2D_SRC_TYPE_BUFFER:
724 src_func = build_nir_buffer_fetch;
725 name = "meta_blit2d_depth_buffer_fs";
726 break;
727 default:
728 unreachable("unknown blit src type\n");
729 break;
730 }
731
732 const VkPipelineVertexInputStateCreateInfo *vi_create_info;
733 nir_shader *fs = build_nir_copy_fragment_shader_depth(device, src_func, name, src_type == BLIT2D_SRC_TYPE_IMAGE_3D,
734 log2_samples > 0);
735 nir_shader *vs = build_nir_vertex_shader(device);
736
737 vi_create_info = &normal_vi_create_info;
738
739 VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = {
740 {.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
741 .stage = VK_SHADER_STAGE_VERTEX_BIT,
742 .module = vk_shader_module_handle_from_nir(vs),
743 .pName = "main",
744 .pSpecializationInfo = NULL},
745 {.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
746 .stage = VK_SHADER_STAGE_FRAGMENT_BIT,
747 .module = vk_shader_module_handle_from_nir(fs),
748 .pName = "main",
749 .pSpecializationInfo = NULL},
750 };
751
752 const VkPipelineRenderingCreateInfo rendering_create_info = {
753 .sType = VK_STRUCTURE_TYPE_PIPELINE_RENDERING_CREATE_INFO,
754 .depthAttachmentFormat = VK_FORMAT_D32_SFLOAT,
755 };
756
757 const VkGraphicsPipelineCreateInfo vk_pipeline_info = {
758 .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
759 .pNext = &rendering_create_info,
760 .stageCount = ARRAY_SIZE(pipeline_shader_stages),
761 .pStages = pipeline_shader_stages,
762 .pVertexInputState = vi_create_info,
763 .pInputAssemblyState =
764 &(VkPipelineInputAssemblyStateCreateInfo){
765 .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
766 .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
767 .primitiveRestartEnable = false,
768 },
769 .pViewportState =
770 &(VkPipelineViewportStateCreateInfo){
771 .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
772 .viewportCount = 1,
773 .scissorCount = 1,
774 },
775 .pRasterizationState =
776 &(VkPipelineRasterizationStateCreateInfo){.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
777 .rasterizerDiscardEnable = false,
778 .polygonMode = VK_POLYGON_MODE_FILL,
779 .cullMode = VK_CULL_MODE_NONE,
780 .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE,
781 .depthBiasConstantFactor = 0.0f,
782 .depthBiasClamp = 0.0f,
783 .depthBiasSlopeFactor = 0.0f,
784 .lineWidth = 1.0f},
785 .pMultisampleState =
786 &(VkPipelineMultisampleStateCreateInfo){
787 .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
788 .rasterizationSamples = 1 << log2_samples,
789 .sampleShadingEnable = false,
790 .pSampleMask = (VkSampleMask[]){UINT32_MAX},
791 },
792 .pColorBlendState =
793 &(VkPipelineColorBlendStateCreateInfo){
794 .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
795 .attachmentCount = 0,
796 .pAttachments = NULL,
797 .blendConstants = {0.0f, 0.0f, 0.0f, 0.0f},
798 },
799 .pDepthStencilState =
800 &(VkPipelineDepthStencilStateCreateInfo){
801 .sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
802 .depthTestEnable = true,
803 .depthWriteEnable = true,
804 .depthCompareOp = VK_COMPARE_OP_ALWAYS,
805 .front =
806 {
807 .failOp = VK_STENCIL_OP_KEEP,
808 .passOp = VK_STENCIL_OP_KEEP,
809 .depthFailOp = VK_STENCIL_OP_KEEP,
810 .compareOp = VK_COMPARE_OP_NEVER,
811 .compareMask = UINT32_MAX,
812 .writeMask = UINT32_MAX,
813 .reference = 0u,
814 },
815 .back =
816 {
817 .failOp = VK_STENCIL_OP_KEEP,
818 .passOp = VK_STENCIL_OP_KEEP,
819 .depthFailOp = VK_STENCIL_OP_KEEP,
820 .compareOp = VK_COMPARE_OP_NEVER,
821 .compareMask = UINT32_MAX,
822 .writeMask = UINT32_MAX,
823 .reference = 0u,
824 },
825 .minDepthBounds = 0.0f,
826 .maxDepthBounds = 1.0f,
827 },
828 .pDynamicState =
829 &(VkPipelineDynamicStateCreateInfo){
830 .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
831 .dynamicStateCount = 2,
832 .pDynamicStates =
833 (VkDynamicState[]){
834 VK_DYNAMIC_STATE_VIEWPORT,
835 VK_DYNAMIC_STATE_SCISSOR,
836 },
837 },
838 .flags = 0,
839 .layout = device->meta_state.blit2d[log2_samples].p_layouts[src_type],
840 .renderPass = VK_NULL_HANDLE,
841 .subpass = 0,
842 };
843
844 const struct radv_graphics_pipeline_create_info radv_pipeline_info = {.use_rectlist = true};
845
846 result = radv_graphics_pipeline_create(radv_device_to_handle(device), device->meta_state.cache, &vk_pipeline_info,
847 &radv_pipeline_info, &device->meta_state.alloc,
848 &device->meta_state.blit2d[log2_samples].depth_only_pipeline[src_type]);
849
850 ralloc_free(vs);
851 ralloc_free(fs);
852
853 mtx_unlock(&device->meta_state.mtx);
854 return result;
855 }
856
857 static VkResult
blit2d_init_stencil_only_pipeline(struct radv_device * device,enum blit2d_src_type src_type,uint32_t log2_samples)858 blit2d_init_stencil_only_pipeline(struct radv_device *device, enum blit2d_src_type src_type, uint32_t log2_samples)
859 {
860 VkResult result;
861 const char *name;
862
863 mtx_lock(&device->meta_state.mtx);
864 if (device->meta_state.blit2d[log2_samples].stencil_only_pipeline[src_type]) {
865 mtx_unlock(&device->meta_state.mtx);
866 return VK_SUCCESS;
867 }
868
869 texel_fetch_build_func src_func;
870 switch (src_type) {
871 case BLIT2D_SRC_TYPE_IMAGE:
872 src_func = build_nir_texel_fetch;
873 name = "meta_blit2d_stencil_image_fs";
874 break;
875 case BLIT2D_SRC_TYPE_IMAGE_3D:
876 src_func = build_nir_texel_fetch;
877 name = "meta_blit3d_stencil_image_fs";
878 break;
879 case BLIT2D_SRC_TYPE_BUFFER:
880 src_func = build_nir_buffer_fetch;
881 name = "meta_blit2d_stencil_buffer_fs";
882 break;
883 default:
884 unreachable("unknown blit src type\n");
885 break;
886 }
887
888 const VkPipelineVertexInputStateCreateInfo *vi_create_info;
889 nir_shader *fs = build_nir_copy_fragment_shader_stencil(device, src_func, name, src_type == BLIT2D_SRC_TYPE_IMAGE_3D,
890 log2_samples > 0);
891 nir_shader *vs = build_nir_vertex_shader(device);
892
893 vi_create_info = &normal_vi_create_info;
894
895 VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = {
896 {.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
897 .stage = VK_SHADER_STAGE_VERTEX_BIT,
898 .module = vk_shader_module_handle_from_nir(vs),
899 .pName = "main",
900 .pSpecializationInfo = NULL},
901 {.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
902 .stage = VK_SHADER_STAGE_FRAGMENT_BIT,
903 .module = vk_shader_module_handle_from_nir(fs),
904 .pName = "main",
905 .pSpecializationInfo = NULL},
906 };
907
908 const VkPipelineRenderingCreateInfo rendering_create_info = {
909 .sType = VK_STRUCTURE_TYPE_PIPELINE_RENDERING_CREATE_INFO,
910 .stencilAttachmentFormat = VK_FORMAT_S8_UINT,
911 };
912
913 const VkGraphicsPipelineCreateInfo vk_pipeline_info = {
914 .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
915 .pNext = &rendering_create_info,
916 .stageCount = ARRAY_SIZE(pipeline_shader_stages),
917 .pStages = pipeline_shader_stages,
918 .pVertexInputState = vi_create_info,
919 .pInputAssemblyState =
920 &(VkPipelineInputAssemblyStateCreateInfo){
921 .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
922 .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
923 .primitiveRestartEnable = false,
924 },
925 .pViewportState =
926 &(VkPipelineViewportStateCreateInfo){
927 .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
928 .viewportCount = 1,
929 .scissorCount = 1,
930 },
931 .pRasterizationState =
932 &(VkPipelineRasterizationStateCreateInfo){.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
933 .rasterizerDiscardEnable = false,
934 .polygonMode = VK_POLYGON_MODE_FILL,
935 .cullMode = VK_CULL_MODE_NONE,
936 .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE,
937 .depthBiasConstantFactor = 0.0f,
938 .depthBiasClamp = 0.0f,
939 .depthBiasSlopeFactor = 0.0f,
940 .lineWidth = 1.0f},
941 .pMultisampleState =
942 &(VkPipelineMultisampleStateCreateInfo){
943 .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
944 .rasterizationSamples = 1 << log2_samples,
945 .sampleShadingEnable = false,
946 .pSampleMask = (VkSampleMask[]){UINT32_MAX},
947 },
948 .pColorBlendState =
949 &(VkPipelineColorBlendStateCreateInfo){
950 .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
951 .attachmentCount = 0,
952 .pAttachments = NULL,
953 .blendConstants = {0.0f, 0.0f, 0.0f, 0.0f},
954 },
955 .pDepthStencilState =
956 &(VkPipelineDepthStencilStateCreateInfo){
957 .sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
958 .depthTestEnable = false,
959 .depthWriteEnable = false,
960 .stencilTestEnable = true,
961 .front = {.failOp = VK_STENCIL_OP_REPLACE,
962 .passOp = VK_STENCIL_OP_REPLACE,
963 .depthFailOp = VK_STENCIL_OP_REPLACE,
964 .compareOp = VK_COMPARE_OP_ALWAYS,
965 .compareMask = 0xff,
966 .writeMask = 0xff,
967 .reference = 0},
968 .back = {.failOp = VK_STENCIL_OP_REPLACE,
969 .passOp = VK_STENCIL_OP_REPLACE,
970 .depthFailOp = VK_STENCIL_OP_REPLACE,
971 .compareOp = VK_COMPARE_OP_ALWAYS,
972 .compareMask = 0xff,
973 .writeMask = 0xff,
974 .reference = 0},
975 .depthCompareOp = VK_COMPARE_OP_ALWAYS,
976 .minDepthBounds = 0.0f,
977 .maxDepthBounds = 1.0f,
978 },
979 .pDynamicState =
980 &(VkPipelineDynamicStateCreateInfo){
981 .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
982 .dynamicStateCount = 2,
983 .pDynamicStates =
984 (VkDynamicState[]){
985 VK_DYNAMIC_STATE_VIEWPORT,
986 VK_DYNAMIC_STATE_SCISSOR,
987 },
988 },
989 .flags = 0,
990 .layout = device->meta_state.blit2d[log2_samples].p_layouts[src_type],
991 .renderPass = VK_NULL_HANDLE,
992 .subpass = 0,
993 };
994
995 const struct radv_graphics_pipeline_create_info radv_pipeline_info = {.use_rectlist = true};
996
997 result = radv_graphics_pipeline_create(radv_device_to_handle(device), device->meta_state.cache, &vk_pipeline_info,
998 &radv_pipeline_info, &device->meta_state.alloc,
999 &device->meta_state.blit2d[log2_samples].stencil_only_pipeline[src_type]);
1000
1001 ralloc_free(vs);
1002 ralloc_free(fs);
1003
1004 mtx_unlock(&device->meta_state.mtx);
1005 return result;
1006 }
1007
1008 static VkResult
meta_blit2d_create_pipe_layout(struct radv_device * device,int idx,uint32_t log2_samples)1009 meta_blit2d_create_pipe_layout(struct radv_device *device, int idx, uint32_t log2_samples)
1010 {
1011 VkResult result;
1012 VkDescriptorType desc_type =
1013 (idx == BLIT2D_SRC_TYPE_BUFFER) ? VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER : VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE;
1014 const VkPushConstantRange push_constant_ranges[] = {
1015 {VK_SHADER_STAGE_VERTEX_BIT, 0, 16},
1016 {VK_SHADER_STAGE_FRAGMENT_BIT, 16, 4},
1017 };
1018 int num_push_constant_range = (idx != BLIT2D_SRC_TYPE_IMAGE || log2_samples > 0) ? 2 : 1;
1019
1020 result = radv_CreateDescriptorSetLayout(
1021 radv_device_to_handle(device),
1022 &(VkDescriptorSetLayoutCreateInfo){.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO,
1023 .flags = VK_DESCRIPTOR_SET_LAYOUT_CREATE_PUSH_DESCRIPTOR_BIT_KHR,
1024 .bindingCount = 1,
1025 .pBindings =
1026 (VkDescriptorSetLayoutBinding[]){
1027 {.binding = 0,
1028 .descriptorType = desc_type,
1029 .descriptorCount = 1,
1030 .stageFlags = VK_SHADER_STAGE_FRAGMENT_BIT,
1031 .pImmutableSamplers = NULL},
1032 }},
1033 &device->meta_state.alloc, &device->meta_state.blit2d[log2_samples].ds_layouts[idx]);
1034 if (result != VK_SUCCESS)
1035 goto fail;
1036
1037 result =
1038 radv_CreatePipelineLayout(radv_device_to_handle(device),
1039 &(VkPipelineLayoutCreateInfo){
1040 .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO,
1041 .setLayoutCount = 1,
1042 .pSetLayouts = &device->meta_state.blit2d[log2_samples].ds_layouts[idx],
1043 .pushConstantRangeCount = num_push_constant_range,
1044 .pPushConstantRanges = push_constant_ranges,
1045 },
1046 &device->meta_state.alloc, &device->meta_state.blit2d[log2_samples].p_layouts[idx]);
1047 if (result != VK_SUCCESS)
1048 goto fail;
1049 return VK_SUCCESS;
1050 fail:
1051 return result;
1052 }
1053
1054 VkResult
radv_device_init_meta_blit2d_state(struct radv_device * device,bool on_demand)1055 radv_device_init_meta_blit2d_state(struct radv_device *device, bool on_demand)
1056 {
1057 VkResult result;
1058
1059 for (unsigned log2_samples = 0; log2_samples < MAX_SAMPLES_LOG2; log2_samples++) {
1060 for (unsigned src = 0; src < BLIT2D_NUM_SRC_TYPES; src++) {
1061 /* Don't need to handle copies between buffers and multisample images. */
1062 if (src == BLIT2D_SRC_TYPE_BUFFER && log2_samples > 0)
1063 continue;
1064
1065 /* There are no multisampled 3D images. */
1066 if (src == BLIT2D_SRC_TYPE_IMAGE_3D && log2_samples > 0)
1067 continue;
1068
1069 result = meta_blit2d_create_pipe_layout(device, src, log2_samples);
1070 if (result != VK_SUCCESS)
1071 return result;
1072
1073 if (on_demand)
1074 continue;
1075
1076 for (unsigned j = 0; j < NUM_META_FS_KEYS; ++j) {
1077 result = blit2d_init_color_pipeline(device, src, radv_fs_key_format_exemplars[j], log2_samples);
1078 if (result != VK_SUCCESS)
1079 return result;
1080 }
1081
1082 result = blit2d_init_depth_only_pipeline(device, src, log2_samples);
1083 if (result != VK_SUCCESS)
1084 return result;
1085
1086 result = blit2d_init_stencil_only_pipeline(device, src, log2_samples);
1087 if (result != VK_SUCCESS)
1088 return result;
1089 }
1090 }
1091
1092 return VK_SUCCESS;
1093 }
1094