1 /*
2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
4 *
5 * based on amdgpu winsys.
6 * Copyright © 2011 Marek Olšák <maraeo@gmail.com>
7 * Copyright © 2015 Advanced Micro Devices, Inc.
8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice (including the next
17 * paragraph) shall be included in all copies or substantial portions of the
18 * Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
24 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
25 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
26 * IN THE SOFTWARE.
27 */
28
29 #ifndef RADV_AMDGPU_BO_H
30 #define RADV_AMDGPU_BO_H
31
32 #include "radv_amdgpu_winsys.h"
33
34 struct radv_amdgpu_winsys_bo_log {
35 struct list_head list;
36 uint64_t va;
37 uint64_t size;
38 uint64_t timestamp; /* CPU timestamp */
39 uint8_t is_virtual : 1;
40 uint8_t destroyed : 1;
41 };
42
43 struct radv_amdgpu_map_range {
44 uint64_t offset;
45 uint64_t size;
46 struct radv_amdgpu_winsys_bo *bo;
47 uint64_t bo_offset;
48 };
49
50 struct radv_amdgpu_winsys_bo {
51 struct radeon_winsys_bo base;
52 amdgpu_va_handle va_handle;
53 uint64_t size;
54 bool is_virtual;
55 uint8_t priority;
56
57 union {
58 /* physical bo */
59 struct {
60 amdgpu_bo_handle bo;
61 uint32_t bo_handle;
62 };
63 /* virtual bo */
64 struct {
65 struct u_rwlock lock;
66
67 struct radv_amdgpu_map_range *ranges;
68 uint32_t range_count;
69 uint32_t range_capacity;
70
71 struct radv_amdgpu_winsys_bo **bos;
72 uint32_t bo_count;
73 uint32_t bo_capacity;
74 };
75 };
76 };
77
78 static inline struct radv_amdgpu_winsys_bo *
radv_amdgpu_winsys_bo(struct radeon_winsys_bo * bo)79 radv_amdgpu_winsys_bo(struct radeon_winsys_bo *bo)
80 {
81 return (struct radv_amdgpu_winsys_bo *)bo;
82 }
83
84 void radv_amdgpu_bo_init_functions(struct radv_amdgpu_winsys *ws);
85
86 #endif /* RADV_AMDGPU_BO_H */
87