1<?xml version="1.0" encoding="UTF-8"?> 2<!-- 3Copyright © 2020 Google, Inc. 4 5Permission is hereby granted, free of charge, to any person obtaining a 6copy of this software and associated documentation files (the "Software"), 7to deal in the Software without restriction, including without limitation 8the rights to use, copy, modify, merge, publish, distribute, sublicense, 9and/or sell copies of the Software, and to permit persons to whom the 10Software is furnished to do so, subject to the following conditions: 11 12The above copyright notice and this permission notice (including the next 13paragraph) shall be included in all copies or substantial portions of the 14Software. 15 16THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22SOFTWARE. 23 --> 24 25<isa> 26 27<!-- 28 Cat0 Instructions: 29 --> 30 31<bitset name="#instruction-cat0" extends="#instruction"> 32 <!-- 33 TODO immed size is 16b for a3xx, 20b for a4xx, 32b for a5xx+.. should we 34 try to express this? Also, not all cat0 take an immed, so maybe push 35 this further down the hierarchy? 36 --> 37 <field name="IMMED" low="0" high="31" type="branch"/> 38 39 <field name="REPEAT" low="40" high="42" type="#rptN"/> 40 <pattern pos="43">x</pattern> 41 <field name="SS" pos="44" type="bool" display="(ss)"/> 42 <field name="EQ" pos="48" type="bool" display="(eq)"/> 43 <field name="JP" pos="59" type="bool" display="(jp)"/> 44 <field name="SY" pos="60" type="bool" display="(sy)"/> 45 <pattern low="61" high="63">000</pattern> <!-- cat0 --> 46 <encode> 47 <map name="IMMED">src->cat0.immed</map> 48 <map name="COMP1">src->cat0.comp1</map> 49 <map name="COMP2">src->cat0.comp2</map> 50 <map name="INV1">src->cat0.inv1</map> 51 <map name="INV2">src->cat0.inv2</map> 52 <map name="EQ">!!(src->flags & IR3_INSTR_EQ)</map> 53 </encode> 54</bitset> 55 56 57<bitset name="#instruction-cat0-0src" extends="#instruction-cat0"> 58 <display> 59 {SY}{SS}{EQ}{JP}{REPEAT}{NAME} 60 </display> 61 <pattern low="32" high="36">xxxxx</pattern> 62 <pattern low="37" high="39">000</pattern> <!-- BRTYPE --> 63 <pattern low="45" high="47">000</pattern> <!-- src1 --> 64 <pattern low="52" high="54">000</pattern> <!-- src0 --> 65</bitset> 66 67<bitset name="nop" extends="#instruction-cat0-0src"> 68 <pattern low="49" high="51">xx0</pattern> <!-- OPC_HI --> 69 <pattern low="55" high="58">0000</pattern> <!-- OPC --> 70</bitset> 71 72<bitset name="end" extends="#instruction-cat0-0src"> 73 <pattern low="49" high="51">xx0</pattern> <!-- OPC_HI --> 74 <pattern low="55" high="58">0110</pattern> <!-- OPC --> 75</bitset> 76 77<bitset name="ret" extends="#instruction-cat0-0src"> 78 <pattern low="49" high="51">xx0</pattern> <!-- OPC_HI --> 79 <pattern low="55" high="58">0100</pattern> <!-- OPC --> 80</bitset> 81 82<bitset name="emit" extends="#instruction-cat0-0src"> 83 <pattern low="49" high="51">xx0</pattern> <!-- OPC_HI --> 84 <pattern low="55" high="58">0111</pattern> <!-- OPC --> 85</bitset> 86 87<bitset name="cut" extends="#instruction-cat0-0src"> 88 <pattern low="49" high="51">xx0</pattern> <!-- OPC_HI --> 89 <pattern low="55" high="58">1000</pattern> <!-- OPC --> 90</bitset> 91 92<bitset name="chmask" extends="#instruction-cat0-0src"> 93 <pattern low="49" high="51">xx0</pattern> <!-- OPC_HI --> 94 <pattern low="55" high="58">1001</pattern> <!-- OPC --> 95</bitset> 96 97<bitset name="chsh" extends="#instruction-cat0-0src"> 98 <pattern low="49" high="51">xx0</pattern> <!-- OPC_HI --> 99 <pattern low="55" high="58">1010</pattern> <!-- OPC --> 100</bitset> 101 102<bitset name="flow_rev" extends="#instruction-cat0-0src"> 103 <pattern low="49" high="51">xx0</pattern> <!-- OPC_HI --> 104 <pattern low="55" high="58">1011</pattern> <!-- OPC --> 105</bitset> 106 107<bitset name="shpe" extends="#instruction-cat0-0src"> 108 <doc>SHader Prologue End</doc> 109 <pattern low="49" high="51">xx1</pattern> <!-- OPC_HI --> 110 <pattern low="55" high="58">1000</pattern> <!-- OPC --> 111</bitset> 112 113<bitset name="prede" extends="#instruction-cat0-0src"> 114 <pattern low="49" high="51">xx1</pattern> <!-- OPC_HI --> 115 <pattern low="55" high="58">1111</pattern> <!-- OPC --> 116</bitset> 117 118 119<bitset name="#instruction-cat0-1src" extends="#instruction-cat0"> 120 <display> 121 {SY}{SS}{EQ}{JP}{NAME} {INV1}p0.{COMP1} 122 </display> 123 <pattern low="32" high="36">00000</pattern> 124 <pattern low="37" high="39">000</pattern> <!-- BRTYPE --> 125 <pattern low="45" high="47">000</pattern> <!-- src1 --> 126 <field name="INV1" pos="52" type="bool" display="!"> 127 <doc>Invert source condition</doc> 128 </field> 129 <field name="COMP1" low="53" high="54" type="#swiz"> 130 <doc>Predicate register (p0.c) component for source</doc> 131 </field> 132</bitset> 133 134<bitset name="kill" extends="#instruction-cat0-1src"> 135 <pattern low="49" high="51">xx0</pattern> <!-- OPC_HI --> 136 <pattern low="55" high="58">0101</pattern> <!-- OPC --> 137</bitset> 138 139<bitset name="predt" extends="#instruction-cat0-1src"> 140 <pattern low="49" high="51">xx1</pattern> <!-- OPC_HI --> 141 <pattern low="55" high="58">1101</pattern> <!-- OPC --> 142</bitset> 143 144<bitset name="predf" extends="#instruction-cat0-1src"> 145 <pattern low="49" high="51">xx1</pattern> <!-- OPC_HI --> 146 <pattern low="55" high="58">1110</pattern> <!-- OPC --> 147</bitset> 148 149 150<bitset name="#instruction-cat0-immed" extends="#instruction-cat0"> 151 <display> 152 {SY}{SS}{JP}{NAME} #{IMMED} 153 </display> 154 <pattern low="32" high="36">xxxxx</pattern> <!-- INDEX --> 155 <pattern low="37" high="39">xxx</pattern> <!-- BRTYPE --> 156 <pattern low="45" high="47">xxx</pattern> <!-- src1 --> 157 <pattern low="52" high="54">xxx</pattern> <!-- src0 --> 158</bitset> 159 160<bitset name="jump" extends="#instruction-cat0-immed"> 161 <pattern low="49" high="51">xx0</pattern> <!-- OPC_HI --> 162 <pattern low="55" high="58">0010</pattern> <!-- OPC --> 163</bitset> 164 165<bitset name="call" extends="#instruction-cat0-immed"> 166 <pattern low="49" high="51">xx0</pattern> <!-- OPC_HI --> 167 <pattern low="55" high="58">0011</pattern> <!-- OPC --> 168</bitset> 169 170<bitset name="bkt" extends="#instruction-cat0-immed"> 171 <pattern low="49" high="51">xx1</pattern> <!-- OPC_HI --> 172 <pattern low="55" high="58">0000</pattern> <!-- OPC --> 173</bitset> 174 175<bitset name="getlast" extends="#instruction-cat0"> 176 <doc> 177 Perform a jump for all fibers in the first cluster with any active 178 fibers, except for the last fiber in the cluster. 179 While there is a separate field for CLUSTER_SIZE its value does 180 not change the behaviour in any observable way, it behaves as if 181 CLUSTER_SIZE is always 8. 182 </doc> 183 184 <gen min="600"/> 185 186 <display> 187 {SY}{SS}{JP}{NAME}.w{CLUSTER_SIZE} #{IMMED} 188 </display> 189 <derived name="CLUSTER_SIZE" type="uint"> 190 <expr> 191 2ULL << {W} 192 </expr> 193 </derived> 194 <pattern low="32" high="36">xxxxx</pattern> <!-- INDEX --> 195 <pattern low="37" high="39">xxx</pattern> <!-- BRTYPE --> 196 <pattern low="45" high="47">xxx</pattern> <!-- src1 --> 197 <pattern low="49" high="51">xx1</pattern> <!-- OPC_HI --> 198 <pattern low="55" high="58">0100</pattern> <!-- OPC --> 199 200 <field name="W" low="52" high="54" type="uint"/> 201 202 <encode> 203 <map name="W">util_logbase2(8) - 1</map> 204 </encode> 205</bitset> 206 207<bitset name="getone" extends="#instruction-cat0-immed"> 208 <pattern low="49" high="51">xx1</pattern> <!-- OPC_HI --> 209 <pattern low="55" high="58">0101</pattern> <!-- OPC --> 210</bitset> 211 212<bitset name="shps" extends="#instruction-cat0-immed"> 213 <doc>SHader Prologue Start</doc> 214 <pattern low="49" high="51">xx1</pattern> <!-- OPC_HI --> 215 <pattern low="55" high="58">0111</pattern> <!-- OPC --> 216</bitset> 217 218<bitset name="#instruction-cat0-branch" extends="#instruction-cat0"> 219 <pattern low="49" high="51">xx0</pattern> <!-- OPC_HI --> 220 <pattern low="55" high="58">0001</pattern> <!-- OPC --> 221</bitset> 222 223<bitset name="brac" extends="#instruction-cat0-branch"> 224 <display> 225 {SY}{SS}{EQ}{JP}{NAME}.{INDEX} #{IMMED} 226 </display> 227 <field name="INDEX" low="32" high="36" type="uint"/> 228 <pattern low="37" high="39">011</pattern> <!-- BRTYPE --> 229 <pattern low="45" high="47">xxx</pattern> <!-- src1 --> 230 <pattern low="52" high="54">xxx</pattern> <!-- src0 --> 231 <encode> 232 <map name="INDEX">src->cat0.idx</map> 233 </encode> 234</bitset> 235 236<bitset name="brax" extends="#instruction-cat0-branch"> 237 <pattern low="32" high="36">xxxxx</pattern> 238 <pattern low="37" high="39">110</pattern> <!-- BRTYPE --> 239 <pattern low="45" high="47">xxx</pattern> <!-- src1 --> 240 <pattern low="52" high="54">xxx</pattern> <!-- src0 --> 241</bitset> 242 243<bitset name="#instruction-cat0-branch-1src" extends="#instruction-cat0-branch"> 244 <display> 245 {SY}{SS}{EQ}{JP}{NAME} {INV1}p0.{COMP1}, #{IMMED} 246 </display> 247 <pattern low="32" high="36">xxxxx</pattern> 248 <pattern low="45" high="47">xxx</pattern> <!-- src1 --> 249 <field name="INV1" pos="52" type="bool" display="!"> 250 <doc>Invert source condition</doc> 251 </field> 252 <field name="COMP1" low="53" high="54" type="#swiz"> 253 <doc>Predicate register (p0.c) component for source</doc> 254 </field> 255</bitset> 256 257<bitset name="br" extends="#instruction-cat0-branch-1src"> 258 <pattern low="37" high="39">000</pattern> <!-- BRTYPE --> 259</bitset> 260 261<bitset name="bany" extends="#instruction-cat0-branch-1src"> 262 <pattern low="37" high="39">100</pattern> <!-- BRTYPE --> 263</bitset> 264 265<bitset name="ball" extends="#instruction-cat0-branch-1src"> 266 <pattern low="37" high="39">101</pattern> <!-- BRTYPE --> 267</bitset> 268 269<bitset name="#instruction-cat0-branch-2src" extends="#instruction-cat0-branch"> 270 <display> 271 {SY}{SS}{EQ}{JP}{NAME} {INV1}p0.{COMP1}, {INV2}p0.{COMP2}, #{IMMED} 272 </display> 273 <pattern low="32" high="36">xxxxx</pattern> 274 <!-- src1: --> 275 <field name="INV2" pos="45" type="bool" display="!"> 276 <doc>Invert source 2 condition</doc> 277 </field> 278 <field name="COMP2" low="46" high="47" type="#swiz"> 279 <doc>Predicate register (p0.c) component for source 2</doc> 280 </field> 281 <!-- src0: --> 282 <field name="INV1" pos="52" type="bool" display="!"> 283 <doc>Invert source 1 condition</doc> 284 </field> 285 <field name="COMP1" low="53" high="54" type="#swiz"> 286 <doc>Predicate register (p0.c) component for source 1</doc> 287 </field> 288</bitset> 289 290<bitset name="brao" extends="#instruction-cat0-branch-2src"> 291 <pattern low="37" high="39">001</pattern> <!-- BRTYPE --> 292</bitset> 293 294<bitset name="braa" extends="#instruction-cat0-branch-2src"> 295 <pattern low="37" high="39">010</pattern> <!-- BRTYPE --> 296</bitset> 297 298<!-- TODO rest of cat0 --> 299 300</isa> 301