1<?xml version="1.0" encoding="UTF-8"?> 2<!-- 3Copyright © 2020 Google, Inc. 4 5Permission is hereby granted, free of charge, to any person obtaining a 6copy of this software and associated documentation files (the "Software"), 7to deal in the Software without restriction, including without limitation 8the rights to use, copy, modify, merge, publish, distribute, sublicense, 9and/or sell copies of the Software, and to permit persons to whom the 10Software is furnished to do so, subject to the following conditions: 11 12The above copyright notice and this permission notice (including the next 13paragraph) shall be included in all copies or substantial portions of the 14Software. 15 16THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22SOFTWARE. 23 --> 24 25<isa> 26 27<!-- 28 Cat1 Instruction(s): 29 --> 30 31<bitset name="#cat1-dst" size="8"> 32 <doc> 33 Unlike other instruction categories, cat1 can have relative dest 34 </doc> 35 <override> 36 <expr> 37 ({OFFSET} == 0) && {DST_REL} 38 </expr> 39 <display> 40 r<a0.x> 41 </display> 42 <field name="OFFSET" low="0" high="7" type="uint"/> 43 </override> 44 <override> 45 <expr> 46 {DST_REL} 47 </expr> 48 <display> 49 r<a0.x + {OFFSET}> 50 </display> 51 <field name="OFFSET" low="0" high="7" type="uint"/> 52 </override> 53 <display> 54 {DST} 55 </display> 56 <field name="DST" low="0" high="7" type="#reg-gpr"/> 57 <encode type="struct ir3_register *"> 58 <map name="DST">src</map> 59 <map name="OFFSET">src->array.offset</map> 60 </encode> 61</bitset> 62 63<enum name="#round"> 64 <value val="0" display=""/> 65 <value val="1" display="(even)"/> 66 <value val="2" display="(pos_infinity)"/> 67 <value val="3" display="(neg_infinity)"/> 68</enum> 69 70<bitset name="#instruction-cat1" extends="#instruction"> 71 <pattern pos="42">0</pattern> 72 <field name="SS" pos="44" type="bool" display="(ss)"/> 73 <field name="UL" pos="45" type="bool" display="(ul)"/> 74 <field name="ROUND" low="55" high="56" type="#round"/> 75 <field name="JP" pos="59" type="bool" display="(jp)"/> 76 <field name="SY" pos="60" type="bool" display="(sy)"/> 77 <pattern low="61" high="63">001</pattern> <!-- cat1 --> 78 <encode> 79 <map name="SRC">src->srcs[0]</map> 80 <map name="SRC_R">!!(src->srcs[0]->flags & IR3_REG_R)</map> 81 <map name="UL">!!(src->flags & IR3_INSTR_UL)</map> 82 <map name="DST_REL">!!(src->dsts[0]->flags & IR3_REG_RELATIV)</map> 83 <map name="ROUND">src->cat1.round</map> 84 </encode> 85</bitset> 86 87<bitset name="#instruction-cat1-typed" extends="#instruction-cat1"> 88 <derived name="HALF" type="bool" display="h"> 89 <expr> 90 ({SRC_TYPE} == 0) /* f16 */ || 91 ({SRC_TYPE} == 2) /* u16 */ || 92 ({SRC_TYPE} == 4) /* s16 */ || 93 ({SRC_TYPE} == 6) /* u8 */ || 94 ({SRC_TYPE} == 7) /* s8 */ 95 </expr> 96 </derived> 97 <derived name="DST_HALF" type="bool" display="h"> 98 <expr> 99 ({DST_TYPE} == 0) /* f16 */ || 100 ({DST_TYPE} == 2) /* u16 */ || 101 ({DST_TYPE} == 4) /* s16 */ || 102 ({DST_TYPE} == 6) /* u8 */ || 103 ({DST_TYPE} == 7) /* s8 */ 104 </expr> 105 </derived> 106 <field name="DST_TYPE" low="46" high="48" type="#type"/> 107 <field name="SRC_TYPE" low="50" high="52" type="#type"/> 108 109 <encode> 110 <map name="DST_TYPE">src->cat1.dst_type</map> 111 <map name="SRC_TYPE">src->cat1.src_type</map> 112 </encode> 113</bitset> 114 115<bitset name="#instruction-cat1-mov" extends="#instruction-cat1-typed"> 116 <override> 117 <expr> 118 ({DST} == 0xf4 /* a0.x */) && ({SRC_TYPE} == 4 /* s16 */) && ({DST_TYPE} == 4) 119 </expr> 120 <display> 121 {SY}{SS}{JP}{REPEAT}{UL}mova {ROUND}a0.x, {SRC} 122 </display> 123 <assert low="32" high="39">11110100</assert> <!-- DST==a0.x --> 124 <assert low="46" high="48">100</assert> <!-- DST_TYPE==s16 --> 125 <assert low="50" high="52">100</assert> <!-- SRC_TYPE==s16 --> 126 </override> 127 <override> 128 <expr> 129 ({DST} == 0xf5 /* a0.y */) && ({SRC_TYPE} == 2 /* u16 */) && ({DST_TYPE} == 2) 130 </expr> 131 <display> 132 {SY}{SS}{JP}{REPEAT}{UL}mova1 {ROUND}a1.x, {SRC} 133 </display> 134 <assert low="32" high="39">11110101</assert> <!-- DST==a0.y --> 135 <assert low="46" high="48">010</assert> <!-- DST_TYPE==u16 --> 136 <assert low="50" high="52">010</assert> <!-- SRC_TYPE==u16 --> 137 </override> 138 <override> 139 <expr> 140 {SRC_TYPE} != {DST_TYPE} 141 </expr> 142 <display> 143 {SY}{SS}{JP}{REPEAT}{UL}cov.{SRC_TYPE}{DST_TYPE} {ROUND}{DST_HALF}{DST}, {SRC} 144 </display> 145 </override> 146 <display> 147 {SY}{SS}{JP}{REPEAT}{UL}mov.{SRC_TYPE}{DST_TYPE} {ROUND}{DST_HALF}{DST}, {SRC} 148 </display> 149 <field name="DST" low="32" high="39" type="#cat1-dst"> 150 <param name="DST_REL"/> 151 </field> 152 <field name="REPEAT" low="40" high="41" type="#rptN"/> 153 <field name="DST_REL" pos="49" type="bool"/> 154 <pattern low="57" high="58">00</pattern> <!-- OPC --> 155</bitset> 156 157<!-- 158 Helpers for displaying cat1 source forms.. split out so the toplevel 159 instruction can just refer to {SRC}. This decouples the cov/mov/mova 160 permultations from the different src type permutations 161 --> 162 163<bitset name="#cat1-immed-src" size="32"> 164 <override> 165 <expr> 166 {SRC_TYPE} == 0 /* f16 */ 167 </expr> 168 <display> 169 h({IMMED}) 170 </display> 171 <field name="IMMED" low="0" high="15" type="float"/> 172 </override> 173 <override> 174 <expr> 175 {SRC_TYPE} == 1 /* f32 */ 176 </expr> 177 <display> 178 ({IMMED}) 179 </display> 180 <field name="IMMED" low="0" high="31" type="float"/> 181 </override> 182 <override> 183 <expr> 184 ({SRC_TYPE} == 3 /* u32 */) && ({IMMED} > 0x1000) 185 </expr> 186 <display> 187 0x{IMMED} 188 </display> 189 <field name="IMMED" low="0" high="31" type="hex"/> 190 </override> 191 <override> 192 <expr> 193 {SRC_TYPE} == 4 /* s16 */ 194 </expr> 195 <field name="IMMED" low="0" high="15" type="int"/> 196 </override> 197 <override> 198 <expr> 199 {SRC_TYPE} == 5 /* s32 */ 200 </expr> 201 <field name="IMMED" low="0" high="31" type="int"/> 202 </override> 203 204 <display> 205 {IMMED} 206 </display> 207 208 <field name="IMMED" low="0" high="31" type="uint"/> 209 <encode type="struct ir3_register *"> 210 <map name="IMMED">extract_reg_uim(src)</map> 211 </encode> 212</bitset> 213 214<bitset name="#cat1-const-src" size="11"> 215 <display> 216 {SRC_R}{HALF}{CONST} 217 </display> 218 <field name="CONST" low="0" high="10" type="#reg-const"/> 219 <encode type="struct ir3_register *"> 220 <map name="CONST">src</map> 221 </encode> 222</bitset> 223 224<bitset name="#cat1-gpr-src" size="8"> 225 <display> 226 {LAST}{SRC_R}{HALF}{SRC} 227 </display> 228 <field name="SRC" low="0" high="7" type="#reg-gpr"/> 229 <encode type="struct ir3_register *"> 230 <map name="SRC">src</map> 231 </encode> 232</bitset> 233 234<bitset name="#cat1-relative-gpr-src" size="10"> 235 <display> 236 {SRC_R}{HALF}{SRC} 237 </display> 238 <field name="SRC" low="0" high="9" type="#reg-relative-gpr"/> 239 <encode type="struct ir3_register *"> 240 <map name="SRC">src</map> 241 </encode> 242</bitset> 243 244<bitset name="#cat1-relative-const-src" size="10"> 245 <display> 246 {SRC_R}{HALF}{SRC} 247 </display> 248 <field name="SRC" low="0" high="9" type="#reg-relative-const"/> 249 <encode type="struct ir3_register *"> 250 <map name="SRC">src</map> 251 </encode> 252</bitset> 253 254<!-- 255 cov/mov/mova permutations based on src type: 256 --> 257 258<bitset name="mov-immed" extends="#instruction-cat1-mov"> 259 <field name="SRC" low="0" high="31" type="#cat1-immed-src"> 260 <param name="SRC_TYPE"/> 261 </field> 262 <pattern pos="43">0</pattern> <!-- SRC_R --> 263 <pattern low="53" high="54">10</pattern> 264</bitset> 265 266<bitset name="mov-const" extends="#instruction-cat1-mov"> 267 <field name="SRC" low="0" high="10" type="#cat1-const-src"> 268 <param name="SRC_R"/> 269 <param name="HALF"/> 270 </field> 271 <pattern low="11" high="31">000000000000000000000</pattern> 272 <field name="SRC_R" pos="43" type="bool" display="(r)"/> 273 <pattern low="53" high="54">01</pattern> 274</bitset> 275 276<bitset name="mov-gpr" extends="#instruction-cat1-mov"> 277 <field name="SRC" low="0" high="7" type="#cat1-gpr-src"> 278 <param name="LAST"/> 279 <param name="SRC_R"/> 280 <param name="HALF"/> 281 </field> 282 <pattern low="8" high="9">00</pattern> 283 <field name="LAST" pos="10" type="bool" display="(last)"/> 284 <pattern low="11" high="31">000000000000000000000</pattern> 285 <field name="SRC_R" pos="43" type="bool" display="(r)"/> 286 <pattern low="53" high="54">00</pattern> 287 <encode> 288 <map name="LAST">!!(src->srcs[0]->flags & IR3_REG_LAST_USE)</map> 289 </encode> 290</bitset> 291 292<bitset name="#instruction-cat1-relative" extends="#instruction-cat1-mov"> 293 <pattern pos="11">1</pattern> 294 <pattern low="12" high="31">00000000000000000000</pattern> 295 <field name="SRC_R" pos="43" type="bool" display="(r)"/> 296 <pattern low="53" high="54">00</pattern> 297</bitset> 298 299<bitset name="mov-relgpr" extends="#instruction-cat1-relative"> 300 <field name="SRC" low="0" high="9" type="#cat1-relative-gpr-src"> 301 <param name="SRC_R"/> 302 <param name="HALF"/> 303 </field> 304 <pattern pos="10">0</pattern> 305</bitset> 306 307<bitset name="mov-relconst" extends="#instruction-cat1-relative"> 308 <field name="SRC" low="0" high="9" type="#cat1-relative-const-src"> 309 <param name="SRC_R"/> 310 <param name="HALF"/> 311 </field> 312 <pattern pos="10">1</pattern> 313</bitset> 314 315<!-- 316 Other newer cat1 instructions 317 --> 318 319<bitset name="#cat1-multi-src" size="8"> 320 <display> 321 {HALF}{REG} 322 </display> 323 <field name="REG" low="0" high="7" type="#reg-gpr"/> 324 325 <encode type="struct ir3_register *"> 326 <map name="REG">src</map> 327 </encode> 328</bitset> 329 330<bitset name="#cat1-multi-dst" size="8"> 331 <display> 332 {DST_HALF}{REG} 333 </display> 334 335 <field name="REG" low="0" high="7" type="#reg-gpr"/> 336 337 <encode type="struct ir3_register *"> 338 <map name="REG">src</map> 339 </encode> 340</bitset> 341 342<bitset name="#instruction-cat1-multi" extends="#instruction-cat1-typed"> 343 <doc> 344 These instructions all expand to a series of mov instructions, 345 like (rptN) but more flexible. They aren't any faster than the 346 equivalent sequence of mov/cov, but they guarantee that all 347 sources are read before any destination is written, so they 348 behave as-if the moves are executed in parallel. 349 </doc> 350 351 <gen min="500"/> <!-- TODO does a4xx support these? --> 352 353 <field name="SRC0" low="0" high="7" type="#cat1-multi-src"> 354 <param name="HALF"/> 355 </field> 356 <field name="DST0" low="32" high="39" type="#cat1-multi-dst"> 357 <param name="DST_HALF"/> 358 </field> 359 <pattern pos="43">0</pattern> <!-- SRC_R --> 360 <pattern pos="49">0</pattern> <!-- DST_REL --> 361 <pattern low="53" high="54">00</pattern> 362 <pattern low="57" high="58">10</pattern> <!-- OPC --> 363 364 <encode> 365 <map name="DST0">src->dsts[0]</map> 366 </encode> 367</bitset> 368 369<bitset name="swz" extends="#instruction-cat1-multi"> 370 <doc> 371 SWiZzle. Move SRC0 to DST0 and SRC1 to DST1 in parallel. In 372 particular this can be used to swap two registers. 373 </doc> 374 <display> 375 {SY}{SS}{JP}{UL}swz.{SRC_TYPE}{DST_TYPE} {ROUND}{DST0}, {DST1}, {SRC0}, {SRC1} 376 </display> 377 <field name="SRC1" low="8" high="15" type="#cat1-multi-src"> 378 <param name="HALF"/> 379 </field> 380 <field name="DST1" low="16" high="23" type="#cat1-multi-dst"> 381 <param name="DST_HALF"/> 382 </field> 383 <pattern low="24" high="31">00000000</pattern> 384 385 <pattern low="40" high="41">00</pattern> <!-- SUB_OPC --> 386 387 <encode> 388 <map name="SRC0">src->srcs[0]</map> 389 <map name="SRC1">src->srcs[1]</map> 390 <map name="DST1">src->dsts[1]</map> 391 </encode> 392</bitset> 393 394<bitset name="gat" extends="#instruction-cat1-multi"> 395 <doc> 396 GATher. Move SRC0 to DST0, SRC1 to DST0 + 1, SRC2 to DST0 + 2, and SRC3 to DST0 + 3. 397 </doc> 398 <display> 399 {SY}{SS}{JP}{UL}gat.{SRC_TYPE}{DST_TYPE} {ROUND}{DST0}, {SRC0}, {SRC1}, {SRC2}, {SRC3} 400 </display> 401 <field name="SRC1" low="8" high="15" type="#cat1-multi-src"> 402 <param name="HALF"/> 403 </field> 404 <field name="SRC2" low="16" high="23" type="#cat1-multi-src"> 405 <param name="HALF"/> 406 </field> 407 <field name="SRC3" low="24" high="31" type="#cat1-multi-src"> 408 <param name="HALF"/> 409 </field> 410 <pattern low="40" high="41">01</pattern> <!-- SUB_OPC --> 411 412 <encode> 413 <map name="SRC0">src->srcs[0]</map> 414 <map name="SRC1">src->srcs[1]</map> 415 <map name="SRC2">src->srcs[2]</map> 416 <map name="SRC3">src->srcs[3]</map> 417 </encode> 418</bitset> 419 420<bitset name="sct" extends="#instruction-cat1-multi"> 421 <doc> 422 SCaTter. Move SRC0 to DST0, SRC0 + 1 to DST1, SRC0 + 2 to DST2 + 3, and SRC0 + 3 to DST3. 423 </doc> 424 <display> 425 {SY}{SS}{JP}{UL}sct.{SRC_TYPE}{DST_TYPE} {ROUND}{DST0}, {DST1}, {DST2}, {DST3}, {SRC0} 426 </display> 427 <field name="DST1" low="8" high="15" type="#cat1-multi-dst"> 428 <param name="DST_HALF"/> 429 </field> 430 <field name="DST2" low="16" high="23" type="#cat1-multi-dst"> 431 <param name="DST_HALF"/> 432 </field> 433 <field name="DST3" low="24" high="31" type="#cat1-multi-dst"> 434 <param name="DST_HALF"/> 435 </field> 436 <pattern low="40" high="41">10</pattern> <!-- SUB_OPC --> 437 438 <encode> 439 <map name="SRC0">src->srcs[0]</map> 440 <map name="DST1">src->dsts[1]</map> 441 <map name="DST2">src->dsts[2]</map> 442 <map name="DST3">src->dsts[3]</map> 443 </encode> 444</bitset> 445 446<bitset name="movmsk" extends="#instruction-cat1"> 447 <display> 448 {SY}{SS}{JP}{UL}movmsk.w{W} {DST} 449 </display> 450 <derived name="W" type="uint"> 451 <expr> 452 ({REPEAT} + 1) * 32 453 </expr> 454 </derived> 455 <pattern low="0" high="31">00000000000000000000000000000000</pattern> 456 <field name="DST" low="32" high="39" type="#cat1-dst"> 457 <param name="DST_REL"/> 458 </field> 459 <field name="REPEAT" low="40" high="41" type="#rptN"/> 460 <pattern pos="43">0</pattern> <!-- SRC_R --> 461 <pattern low="46" high="48">011</pattern> <!-- DST_TYPE==u32 --> 462 <field name="DST_REL" pos="49" type="bool"/> 463 <pattern low="50" high="52">011</pattern> <!-- SRC_TYPE==u32 --> 464 <pattern low="53" high="54">00</pattern> 465 <pattern low="57" high="58">11</pattern> <!-- OPC --> 466</bitset> 467 468 469</isa> 470