1<?xml version="1.0" encoding="UTF-8"?> 2<!-- 3Copyright © 2020 Google, Inc. 4 5Permission is hereby granted, free of charge, to any person obtaining a 6copy of this software and associated documentation files (the "Software"), 7to deal in the Software without restriction, including without limitation 8the rights to use, copy, modify, merge, publish, distribute, sublicense, 9and/or sell copies of the Software, and to permit persons to whom the 10Software is furnished to do so, subject to the following conditions: 11 12The above copyright notice and this permission notice (including the next 13paragraph) shall be included in all copies or substantial portions of the 14Software. 15 16THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22SOFTWARE. 23 --> 24 25<isa> 26 27<!-- 28 Cat5 Instructions: texture instructions 29 --> 30 31<bitset name="#cat5-s2en-bindless-base" size="1"> 32 <doc> 33 The BASE field is actually split across BASE_LO and BASE_HI, 34 but '.baseN' should only appear in the bindless case.. the 35 easiest way to accomplish that is by splitting it out into a 36 bitset. We just arbitrarily map this to BASE_LO 37 </doc> 38 <override> 39 <expr>{BINDLESS}</expr> 40 <display> 41 .base{BASE} 42 </display> 43 </override> 44 <display/> 45 <field name="BASE_LO" pos="0" type="uint"/> 46 <derived name="BASE" type="uint"> 47 <expr>({BASE_HI} * 2) | {BASE_LO}</expr> 48 </derived> 49 <encode type="struct ir3_instruction *"> 50 <map name="BASE_LO">src->cat5.tex_base & 0x1</map> 51 </encode> 52</bitset> 53 54<bitset name="#instruction-cat5" extends="#instruction"> 55 <doc> 56 The "normal" case, ie. not s2en (indirect) and/or bindless 57 </doc> 58 <display> 59 {SY}{JP}{NAME}{3D}{A}{O}{P}{S} {TYPE}({WRMASK}){DST_HALF}{DST}{SRC1}{SRC2}{SAMP}{TEX} 60 </display> 61 <derived name="DST_HALF" expr="#type-half" type="bool" display="h"/> 62 <field name="FULL" pos="0" type="bool"/> 63 <derived name="HALF" expr="#multisrc-half" type="bool" display="h"/> 64 <field name="SRC1" low="1" high="8" type="#cat5-src1"> 65 <param name="NUM_SRC"/> 66 <param name="HALF"/> 67 </field> 68 <field name="SRC2" low="9" high="16" type="#cat5-src2"> 69 <param name="NUM_SRC"/> 70 <param name="HALF"/> 71 <param name="O"/> 72 </field> 73 <!-- 74 TODO remainder of first 32b differ depending on s2en/bindless.. 75 possibly use overrides? Need to sort-out how to display.. 76 77 Note b17 seems to show up in some blob traces (samgpN), need 78 to figure out what this bit does 79 --> 80 <pattern low="17" high="18">0x</pattern> 81 82 <field name="SAMP" low="21" high="24" type="#cat5-samp"> 83 <param name="HAS_SAMP"/> 84 </field> 85 <field name="TEX" low="25" high="31" type="#cat5-tex"> 86 <param name="HAS_TEX"/> 87 </field> 88 89 <field name="DST" low="32" high="39" type="#reg-gpr"/> 90 <field name="WRMASK" low="40" high="43" type="#wrmask"/> 91 <field name="TYPE" low="44" high="46" type="#cat5-type"> 92 <param name="HAS_TYPE"/> 93 </field> 94 <assert pos="47">0</assert> <!-- BASE_LO --> 95 <field name="3D" pos="48" type="bool" display=".3d"/> 96 <field name="A" pos="49" type="bool" display=".a"/> 97 <field name="S" pos="50" type="bool" display=".s"/> 98 <field name="S2EN_BINDLESS" pos="51" type="bool"/> 99 <field name="O" pos="52" type="bool" display=".o"/> 100 <!-- OPC --> 101 <field name="JP" pos="59" type="bool" display="(jp)"/> 102 <field name="SY" pos="60" type="bool" display="(sy)"/> 103 <pattern low="61" high="63">101</pattern> <!-- cat5 --> 104 <encode> 105 <map name="FULL">extract_cat5_FULL(src)</map> 106 <map name="TEX">src</map> 107 <map name="SAMP">src</map> 108 <map name="WRMASK">src->dsts[0]->wrmask</map> 109 <map name="BASE">src</map> 110 <map name="TYPE">src</map> 111 <map name="BASE_HI">src->cat5.tex_base >> 1</map> 112 <map name="3D">!!(src->flags & IR3_INSTR_3D)</map> 113 <map name="A">!!(src->flags & IR3_INSTR_A)</map> 114 <map name="S">!!(src->flags & IR3_INSTR_S)</map> 115 <map name="S2EN_BINDLESS">!!(src->flags & (IR3_INSTR_S2EN | IR3_INSTR_B))</map> 116 <map name="O">!!(src->flags & IR3_INSTR_O)</map> 117 <map name="DESC_MODE">extract_cat5_DESC_MODE(src)</map> 118 <!-- 119 TODO the src order is currently a bit messy due to ir3 using srcs[0] 120 for s2en src in the s2en case 121 --> 122 <map name="SRC1">extract_cat5_SRC(src, 0)</map> 123 <map name="SRC2">extract_cat5_SRC(src, 1)</map> 124 <map name="SRC3">(src->srcs_count > 0) ? src->srcs[0] : NULL</map> 125 </encode> 126</bitset> 127 128<bitset name="#instruction-cat5-tex" extends="#instruction-cat5"> 129 <override> 130 <expr>{S2EN_BINDLESS}</expr> 131 <doc> 132 The s2en (indirect) or bindless case 133 </doc> 134 <display> 135 {SY}{JP}{NAME}{3D}{A}{O}{P}{S}{S2EN}{UNIFORM}{NONUNIFORM}{BASE} {TYPE}({WRMASK}){DST_HALF}{DST}{SRC1}{SRC2}{SRC3}{A1} 136 </display> 137 <field name="BASE_HI" low="19" high="20" type="uint"/> 138 <field name="SRC3" low="21" high="28" type="#cat5-src3"> 139 <param name="BINDLESS"/> 140 <param name="DESC_MODE"/> 141 <param name="HAS_SAMP"/> 142 <param name="HAS_TEX"/> 143 </field> 144 <field name="DESC_MODE" low="29" high="31" type="#cat5-s2en-bindless-desc-mode"/> 145 <field name="BASE" pos="47" type="#cat5-s2en-bindless-base"> 146 <param name="BINDLESS"/> 147 <param name="BASE_HI"/> 148 </field> 149 <derived name="BINDLESS" expr="#cat5-s2enb-is-bindless" type="bool"/> 150 <derived name="S2EN" expr="#cat5-s2enb-is-indirect" type="bool" display=".s2en"/> 151 <derived name="UNIFORM" expr="#cat5-s2enb-is-uniform" type="bool" display=".uniform"/> 152 <derived name="NONUNIFORM" expr="#cat5-s2enb-is-nonuniform" type="bool" display=".nonuniform"/> 153 <derived name="A1" expr="#cat5-s2enb-uses_a1" type="bool" display=", a1.x"/> 154 </override> 155 156 <assert low="19" high="20">00</assert> <!-- BASE_HI --> 157 <field name="P" pos="53" type="bool" display=".p"/> 158 159 <encode> 160 <map name="P">!!(src->flags & IR3_INSTR_P)</map> 161 </encode> 162</bitset> 163 164<bitset name="isam" extends="#instruction-cat5-tex"> 165 <pattern low="54" high="58">00000</pattern> 166 <derived name="NUM_SRC" expr="#one" type="uint"/> 167 <derived name="HAS_SAMP" expr="#true" type="bool"/> 168 <derived name="HAS_TEX" expr="#true" type="bool"/> 169 <derived name="HAS_TYPE" expr="#true" type="bool"/> 170</bitset> 171 172<bitset name="isaml" extends="#instruction-cat5-tex"> 173 <pattern low="54" high="58">00001</pattern> 174 <derived name="NUM_SRC" expr="#two" type="uint"/> 175 <derived name="HAS_SAMP" expr="#true" type="bool"/> 176 <derived name="HAS_TEX" expr="#true" type="bool"/> 177 <derived name="HAS_TYPE" expr="#true" type="bool"/> 178</bitset> 179 180<bitset name="isamm" extends="#instruction-cat5-tex"> 181 <pattern low="54" high="58">00010</pattern> 182 <derived name="NUM_SRC" expr="#one" type="uint"/> 183 <derived name="HAS_SAMP" expr="#true" type="bool"/> 184 <derived name="HAS_TEX" expr="#true" type="bool"/> 185 <derived name="HAS_TYPE" expr="#true" type="bool"/> 186</bitset> 187 188<bitset name="sam" extends="#instruction-cat5-tex"> 189 <pattern low="54" high="58">00011</pattern> 190 <derived name="NUM_SRC" expr="#one" type="uint"/> 191 <derived name="HAS_SAMP" expr="#true" type="bool"/> 192 <derived name="HAS_TEX" expr="#true" type="bool"/> 193 <derived name="HAS_TYPE" expr="#true" type="bool"/> 194</bitset> 195 196<bitset name="samb" extends="#instruction-cat5-tex"> 197 <pattern low="54" high="58">00100</pattern> 198 <derived name="NUM_SRC" expr="#two" type="uint"/> 199 <derived name="HAS_SAMP" expr="#true" type="bool"/> 200 <derived name="HAS_TEX" expr="#true" type="bool"/> 201 <derived name="HAS_TYPE" expr="#true" type="bool"/> 202</bitset> 203 204<bitset name="saml" extends="#instruction-cat5-tex"> 205 <pattern low="54" high="58">00101</pattern> 206 <derived name="NUM_SRC" expr="#two" type="uint"/> 207 <derived name="HAS_SAMP" expr="#true" type="bool"/> 208 <derived name="HAS_TEX" expr="#true" type="bool"/> 209 <derived name="HAS_TYPE" expr="#true" type="bool"/> 210</bitset> 211 212<bitset name="samgq" extends="#instruction-cat5-tex"> 213 <pattern low="54" high="58">00110</pattern> 214 <derived name="NUM_SRC" expr="#one" type="uint"/> 215 <derived name="HAS_SAMP" expr="#true" type="bool"/> 216 <derived name="HAS_TEX" expr="#true" type="bool"/> 217 <derived name="HAS_TYPE" expr="#true" type="bool"/> 218</bitset> 219 220<bitset name="getlod" extends="#instruction-cat5-tex"> 221 <pattern low="54" high="58">00111</pattern> 222 <derived name="NUM_SRC" expr="#one" type="uint"/> 223 <derived name="HAS_SAMP" expr="#true" type="bool"/> 224 <derived name="HAS_TEX" expr="#true" type="bool"/> 225 <derived name="HAS_TYPE" expr="#true" type="bool"/> 226</bitset> 227 228<bitset name="conv" extends="#instruction-cat5-tex"> 229 <pattern low="54" high="58">01000</pattern> 230 <derived name="NUM_SRC" expr="#two" type="uint"/> 231 <derived name="HAS_SAMP" expr="#true" type="bool"/> 232 <derived name="HAS_TEX" expr="#true" type="bool"/> 233 <derived name="HAS_TYPE" expr="#true" type="bool"/> 234</bitset> 235 236<bitset name="convm" extends="#instruction-cat5-tex"> 237 <pattern low="54" high="58">01001</pattern> 238 <derived name="NUM_SRC" expr="#two" type="uint"/> 239 <derived name="HAS_SAMP" expr="#true" type="bool"/> 240 <derived name="HAS_TEX" expr="#true" type="bool"/> 241 <derived name="HAS_TYPE" expr="#true" type="bool"/> 242</bitset> 243 244<bitset name="getsize" extends="#instruction-cat5-tex"> 245 <pattern low="54" high="58">01010</pattern> 246 <derived name="NUM_SRC" expr="#one" type="uint"/> 247 <derived name="HAS_SAMP" expr="#false" type="bool"/> 248 <derived name="HAS_TEX" expr="#true" type="bool"/> 249 <derived name="HAS_TYPE" expr="#true" type="bool"/> 250</bitset> 251 252<bitset name="getbuf" extends="#instruction-cat5-tex"> 253 <pattern low="54" high="58">01011</pattern> 254 <derived name="NUM_SRC" expr="#zero" type="uint"/> 255 <derived name="HAS_SAMP" expr="#false" type="bool"/> 256 <derived name="HAS_TEX" expr="#true" type="bool"/> 257 <derived name="HAS_TYPE" expr="#true" type="bool"/> 258</bitset> 259 260<bitset name="getpos" extends="#instruction-cat5-tex"> 261 <pattern low="54" high="58">01100</pattern> 262 <derived name="NUM_SRC" expr="#one" type="uint"/> 263 <derived name="HAS_SAMP" expr="#false" type="bool"/> 264 <derived name="HAS_TEX" expr="#true" type="bool"/> 265 <derived name="HAS_TYPE" expr="#true" type="bool"/> 266</bitset> 267 268<bitset name="getinfo" extends="#instruction-cat5-tex"> 269 <doc> 270 GETINFO returns 4 values, in .xyzw: 271 272 x: A value associated with the channel type, i.e. OpenCL's 273 get_image_channel_data_type: 274 275 The below was RE'd on A420 and confirmed with the 276 blob's headers. 277 278 8_SNORM: 0 (CLK_SNORM_INT8) 279 16_SNORM: 1 (CLK_SNORM_INT16) 280 8_UNORM: 2 (CLK_UNORM_INT8) 281 16_UNORM: 3 (CLK_UNORM_INT16) 282 5_6_5_UNORM: 4 (CLK_UNORM_SHORT_565) 283 5_5_5_1_UNORM: 5 (CLK_UNORM_SHORT_555) 284 10_10_10_2_UNORM: 6 (CLK_UNORM_INT_101010, CLK_UNORM_SHORT_101010) 285 8_SINT: 7 (CLK_SIGNED_INT8) 286 16_SINT: 8 (CLK_SIGNED_INT16) 287 32_SINT: 9 (CLK_SIGNED_INT32) 288 8_UINT: 10 (CLK_UNSIGNED_INT8) 289 16_UINT: 11 (CLK_UNSIGNED_INT16) 290 32_UINT: 12 (CLK_UNSIGNED_INT32) 291 16_FLOAT: 13 (CLK_HALF_FLOAT) 292 32_FLOAT: 14 (CLK_FLOAT) 293 9_9_9_E5_FLOAT: 15 (CLK_FLOAT_10F_11F_11F) 294 11_11_10_FLOAT: 15 (CLK_FLOAT_10F_11F_11F) 295 10_10_10_2_UINT: 16 (CLK_UNSIGNED_SHORT_101010) 296 4_4_4_4_UNORM: 17 (CLK_UNORM_INT4) 297 X8Z24_UNORM: 18 (CLK_UNORM_INT32) 298 299 y: A value associated with the number of components 300 and swizzle, i.e. OpenCL's get_image_channel_order: 301 302 The below was largely taken from the blob's headers. 303 304 A3xx/A4xx: 305 306 0: CLK_A 307 1: CLK_R 308 2: CLK_Rx 309 3: CLK_RG 310 4: CLK_RGx 311 5: CLK_RA 312 6: CLK_RGB 313 7: CLK_RGBx 314 8: CLK_RGBA 315 9: CLK_ARGB 316 10: CLK_BGRA 317 11: CLK_LUMINANCE 318 12: CLK_INTENSITY 319 13: CLK_ABGR 320 14: CLK_BGR 321 15: CLK_sRGB 322 16: CLK_sRGBA 323 17: CLK_DEPTH 324 325 A5xx/A6xx: 326 327 0: CLK_A 328 1: CLK_R 329 2: CLK_RX 330 3: CLK_RG 331 4: CLK_RGX 332 5: CLK_RA 333 6: CLK_RGB 334 7: CLK_RGBX 335 8: CLK_RGBA 336 9: CLK_ARGB 337 10: CLK_BGRA 338 11: CLK_INTENSITY 339 12: CLK_LUMINANCE 340 13: CLK_ABGR 341 14: CLK_DEPTH 342 15: CLK_sRGB 343 16: CLK_sRGBx 344 17: CLK_sRGBA 345 18: CLK_sBGRA 346 19: CLK_sARGB 347 20: CLK_sABGR 348 21: CLK_BGR 349 350 z: Number of levels 351 352 w: Number of samples 353 </doc> 354 <pattern low="54" high="58">01101</pattern> 355 <derived name="NUM_SRC" expr="#zero" type="uint"/> 356 <derived name="HAS_SAMP" expr="#false" type="bool"/> 357 <derived name="HAS_TEX" expr="#true" type="bool"/> 358 <derived name="HAS_TYPE" expr="#true" type="bool"/> 359</bitset> 360 361<bitset name="dsx" extends="#instruction-cat5-tex"> 362 <pattern low="54" high="58">01110</pattern> 363 <derived name="NUM_SRC" expr="#one" type="uint"/> 364 <derived name="HAS_SAMP" expr="#false" type="bool"/> 365 <derived name="HAS_TEX" expr="#false" type="bool"/> 366 <derived name="HAS_TYPE" expr="#true" type="bool"/> 367</bitset> 368 369<bitset name="dsy" extends="#instruction-cat5-tex"> 370 <pattern low="54" high="58">01111</pattern> 371 <derived name="NUM_SRC" expr="#one" type="uint"/> 372 <derived name="HAS_SAMP" expr="#false" type="bool"/> 373 <derived name="HAS_TEX" expr="#false" type="bool"/> 374 <derived name="HAS_TYPE" expr="#true" type="bool"/> 375</bitset> 376 377<bitset name="gather4r" extends="#instruction-cat5-tex"> 378 <pattern low="54" high="58">10000</pattern> 379 <derived name="NUM_SRC" expr="#one" type="uint"/> 380 <derived name="HAS_SAMP" expr="#true" type="bool"/> 381 <derived name="HAS_TEX" expr="#true" type="bool"/> 382 <derived name="HAS_TYPE" expr="#true" type="bool"/> 383</bitset> 384 385<bitset name="gather4g" extends="#instruction-cat5-tex"> 386 <pattern low="54" high="58">10001</pattern> 387 <derived name="NUM_SRC" expr="#one" type="uint"/> 388 <derived name="HAS_SAMP" expr="#true" type="bool"/> 389 <derived name="HAS_TEX" expr="#true" type="bool"/> 390 <derived name="HAS_TYPE" expr="#true" type="bool"/> 391</bitset> 392 393<bitset name="gather4b" extends="#instruction-cat5-tex"> 394 <pattern low="54" high="58">10010</pattern> 395 <derived name="NUM_SRC" expr="#one" type="uint"/> 396 <derived name="HAS_SAMP" expr="#true" type="bool"/> 397 <derived name="HAS_TEX" expr="#true" type="bool"/> 398 <derived name="HAS_TYPE" expr="#true" type="bool"/> 399</bitset> 400 401<bitset name="gather4a" extends="#instruction-cat5-tex"> 402 <pattern low="54" high="58">10011</pattern> 403 <derived name="NUM_SRC" expr="#one" type="uint"/> 404 <derived name="HAS_SAMP" expr="#true" type="bool"/> 405 <derived name="HAS_TEX" expr="#true" type="bool"/> 406 <derived name="HAS_TYPE" expr="#true" type="bool"/> 407</bitset> 408 409<bitset name="samgp0" extends="#instruction-cat5-tex"> 410 <pattern low="54" high="58">10100</pattern> 411 <derived name="NUM_SRC" expr="#one" type="uint"/> 412 <derived name="HAS_SAMP" expr="#true" type="bool"/> 413 <derived name="HAS_TEX" expr="#true" type="bool"/> 414 <derived name="HAS_TYPE" expr="#true" type="bool"/> 415</bitset> 416 417<bitset name="samgp1" extends="#instruction-cat5-tex"> 418 <pattern low="54" high="58">10101</pattern> 419 <derived name="NUM_SRC" expr="#one" type="uint"/> 420 <derived name="HAS_SAMP" expr="#true" type="bool"/> 421 <derived name="HAS_TEX" expr="#true" type="bool"/> 422 <derived name="HAS_TYPE" expr="#true" type="bool"/> 423</bitset> 424 425<bitset name="samgp2" extends="#instruction-cat5-tex"> 426 <pattern low="54" high="58">10110</pattern> 427 <derived name="NUM_SRC" expr="#one" type="uint"/> 428 <derived name="HAS_SAMP" expr="#true" type="bool"/> 429 <derived name="HAS_TEX" expr="#true" type="bool"/> 430 <derived name="HAS_TYPE" expr="#true" type="bool"/> 431</bitset> 432 433<bitset name="samgp3" extends="#instruction-cat5-tex"> 434 <pattern low="54" high="58">10111</pattern> 435 <derived name="NUM_SRC" expr="#one" type="uint"/> 436 <derived name="HAS_SAMP" expr="#true" type="bool"/> 437 <derived name="HAS_TEX" expr="#true" type="bool"/> 438 <derived name="HAS_TYPE" expr="#true" type="bool"/> 439</bitset> 440 441<bitset name="dsxpp.1" extends="#instruction-cat5-tex"> 442 <pattern low="54" high="58">11000</pattern> 443 <derived name="NUM_SRC" expr="#one" type="uint"/> 444 <derived name="HAS_SAMP" expr="#false" type="bool"/> 445 <derived name="HAS_TEX" expr="#false" type="bool"/> 446 <derived name="HAS_TYPE" expr="#false" type="bool"/> 447</bitset> 448 449<bitset name="dsypp.1" extends="#instruction-cat5-tex"> 450 <pattern low="54" high="58">11001</pattern> 451 <derived name="NUM_SRC" expr="#one" type="uint"/> 452 <derived name="HAS_SAMP" expr="#false" type="bool"/> 453 <derived name="HAS_TEX" expr="#false" type="bool"/> 454 <derived name="HAS_TYPE" expr="#false" type="bool"/> 455</bitset> 456 457<bitset name="rgetpos" extends="#instruction-cat5-tex"> 458 <pattern low="54" high="58">11010</pattern> 459 <derived name="NUM_SRC" expr="#one" type="uint"/> 460 <derived name="HAS_SAMP" expr="#false" type="bool"/> 461 <derived name="HAS_TEX" expr="#false" type="bool"/> 462 <derived name="HAS_TYPE" expr="#true" type="bool"/> 463</bitset> 464 465<bitset name="rgetinfo" extends="#instruction-cat5-tex"> 466 <pattern low="54" high="58">11011</pattern> 467 <derived name="NUM_SRC" expr="#zero" type="uint"/> 468 <derived name="HAS_SAMP" expr="#false" type="bool"/> 469 <derived name="HAS_TEX" expr="#false" type="bool"/> 470 <derived name="HAS_TYPE" expr="#true" type="bool"/> 471</bitset> 472 473<bitset name="tcinv" extends="#instruction"> 474 <doc> 475 Texture Cache Invalidate ? 476 </doc> 477 <display> 478 {SY}{JP}{NAME} 479 </display> 480 <pattern low="0" high="31">xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx</pattern> 481 <pattern low="32" high="53">xxxxxxxxxxxxxxxxxxxxxx</pattern> 482 <pattern low="54" high="58">11100</pattern> 483 <field name="JP" pos="59" type="bool" display="(jp)"/> 484 <field name="SY" pos="60" type="bool" display="(sy)"/> 485 <pattern low="61" high="63">101</pattern> <!-- cat5 --> 486</bitset> 487 488<bitset name="brcst.active" extends="#instruction-cat5"> 489 <doc> 490 The subgroup is divided into (subgroup_size / CLUSTER_SIZE) 491 clusters. For each cluster brcst.active.w does: 492 493 Given a cluster of fibers f_0, f_1, ..., f_{CLUSTER_SIZE-1} brcst 494 broadcasts the SRC value from the fiber f_{CLUSTER_SIZE/2-1} 495 to fibers f_{CLUSTER_SIZE/2}, ..., f_{CLUSTER_SIZE-1}. The DST reg 496 in other fibers is unaffected. If fiber f_{CLUSTER_SIZE/2-1} is 497 inactive the value to broadcast is taken from lower fibers 498 f_{CLUSTER_SIZE/2-2}, f_{CLUSTER_SIZE/2-3}, ... 499 If all fibers f_0, f_1, ..., f_{CLUSTER_SIZE/2-1} are inactive 500 the DST reg remains unchanged for all fibers. 501 502 It is necessary in order to implement arithmetic subgroup 503 operations with prefix sum (https://en.wikipedia.org/wiki/Prefix_sum). 504 505 For brcst.active.w8 without inactive fibers: 506 Fiber | 0 1 2 3 4 5 6 7 | 8 9 10 11 12 13 14 15 507 SRC | s0 s1 s2 s3 ... s7 | s8 ... s11 ... s15 508 DST_before | d0 d1 ... d7 | d8 ... d15 509 DST_after | d0 d1 d2 d3 s3 s3 s3 s3 | d8 ... d11 s11 s11 s11 s11 510 511 If fibers 2 and 3 are inactive: 512 Fiber | 0 1 X X 4 5 6 7 | ... 513 SRC | s0 s1 X X ... s7 | ... 514 DST_before | d0 d1 ... d7 | ... 515 DST_after | d0 d1 X X s1 s1 s1 s1 | ... 516 </doc> 517 518 <gen min="600"/> 519 520 <display> 521 {SY}{JP}{NAME}.w{CLUSTER_SIZE} {TYPE}({WRMASK}){DST_HALF}{DST}{SRC1} 522 </display> 523 524 <field name="W" low="19" high="20" type="uint"/> 525 <pattern low="53" high="58">111110</pattern> <!-- OPC --> 526 527 <derived name="CLUSTER_SIZE" type="uint"> 528 <expr> 529 2 << {W} 530 </expr> 531 </derived> 532 <derived name="NUM_SRC" expr="#one" type="uint"/> 533 <derived name="HAS_SAMP" expr="#false" type="bool"/> 534 <derived name="HAS_TEX" expr="#false" type="bool"/> 535 <derived name="HAS_TYPE" expr="#true" type="bool"/> 536 537 <encode> 538 <map name="W">util_logbase2(src->cat5.cluster_size) - 1</map> 539 </encode> 540</bitset> 541 542<bitset name="#instruction-cat5-quad-shuffle" extends="#instruction-cat5"> 543 <gen min="600"/> 544 545 <display> 546 {SY}{JP}{NAME} {TYPE}({WRMASK}){DST_HALF}{DST}{SRC1}{SRC2} 547 </display> 548 549 <pattern low="53" high="58">111111</pattern> <!-- OPC --> 550 551 <derived name="HAS_SAMP" expr="#false" type="bool"/> 552 <derived name="HAS_TEX" expr="#false" type="bool"/> 553 <derived name="HAS_TYPE" expr="#true" type="bool"/> 554</bitset> 555 556<bitset name="quad_shuffle.brcst" extends="#instruction-cat5-quad-shuffle"> 557 <doc>subgroupQuadBroadcast</doc> 558 559 <pattern low="19" high="20">00</pattern> <!-- Quad-shuffle variant --> 560 561 <derived name="NUM_SRC" expr="#two" type="uint"/> 562</bitset> 563 564<bitset name="quad_shuffle.horiz" extends="#instruction-cat5-quad-shuffle"> 565 <doc>subgroupQuadSwapHorizontal</doc> 566 567 <pattern low="19" high="20">01</pattern> <!-- Quad-shuffle variant --> 568 569 <derived name="NUM_SRC" expr="#one" type="uint"/> 570</bitset> 571 572<bitset name="quad_shuffle.vert" extends="#instruction-cat5-quad-shuffle"> 573 <doc>subgroupQuadSwapVertical</doc> 574 575 <pattern low="19" high="20">10</pattern> <!-- Quad-shuffle variant --> 576 577 <derived name="NUM_SRC" expr="#one" type="uint"/> 578</bitset> 579 580<bitset name="quad_shuffle.diag" extends="#instruction-cat5-quad-shuffle"> 581 <doc>subgroupQuadSwapDiagonal</doc> 582 583 <pattern low="19" high="20">11</pattern> <!-- Quad-shuffle variant --> 584 585 <derived name="NUM_SRC" expr="#one" type="uint"/> 586</bitset> 587 588<!-- 589 All the magic for conditionally displaying various srcs, etc 590 for the non-bindless / non-indirect case, or things that are in 591 common with the bindless / indirect case 592 --> 593 594<bitset name="#cat5-src1" size="8"> 595 <override> 596 <expr>{NUM_SRC} > 0</expr> 597 <display> 598 , {HALF}{SRC} 599 </display> 600 <field name="SRC" low="0" high="7" type="#reg-gpr"/> 601 </override> 602 <display/> 603 <assert low="0" high="7">00000000</assert> 604 <encode type="struct ir3_register *"> 605 <map name="SRC">src</map> 606 </encode> 607</bitset> 608 609<bitset name="#cat5-src2" size="8"> 610 <override> 611 <expr>{O} || ({NUM_SRC} > 1)</expr> 612 <display> 613 , {HALF}{SRC} 614 </display> 615 <field name="SRC" low="0" high="7" type="#reg-gpr"/> 616 </override> 617 <display/> 618 <assert low="0" high="7">00000000</assert> 619 <encode type="struct ir3_register *"> 620 <map name="SRC">src</map> 621 </encode> 622</bitset> 623 624<bitset name="#cat5-samp" size="4"> 625 <override> 626 <expr>{HAS_SAMP}</expr> 627 <display> 628 , s#{SAMP} 629 </display> 630 <field name="SAMP" low="0" high="3" type="uint"/> 631 </override> 632 <display/> 633 <assert low="0" high="3">0000</assert> 634 <encode type="struct ir3_instruction *"> 635 <map name="SAMP">src->cat5.samp</map> 636 </encode> 637</bitset> 638 639<bitset name="#cat5-samp-s2en-bindless-a1" size="8"> 640 <doc>s2en (indirect) / bindless case with tex in a1.x</doc> 641 <override> 642 <expr>{HAS_SAMP}</expr> 643 <display> 644 , s#{SAMP} 645 </display> 646 <field name="SAMP" low="0" high="7" type="uint"/> 647 </override> 648 <display/> 649 <assert low="0" high="7">00000000</assert> 650 <encode type="struct ir3_instruction *"> 651 <map name="SAMP">src->cat5.samp</map> 652 </encode> 653</bitset> 654 655<bitset name="#cat5-tex-s2en-bindless-a1" size="8"> 656 <doc>s2en (indirect) / bindless case with samp in a1.x</doc> 657 <override> 658 <expr>{HAS_TEX}</expr> 659 <display> 660 , t#{TEX} 661 </display> 662 <field name="TEX" low="0" high="7" type="uint"/> 663 </override> 664 <display/> 665 <assert low="0" high="7">00000000</assert> 666 <encode type="struct ir3_instruction *"> 667 <map name="TEX">src->cat5.tex</map> 668 </encode> 669</bitset> 670 671<bitset name="#cat5-tex" size="7"> 672 <override> 673 <expr>{HAS_TEX}</expr> 674 <display> 675 , t#{TEX} 676 </display> 677 <field name="TEX" low="0" high="6" type="uint"/> 678 </override> 679 <display/> 680 <assert low="0" high="6">0000000</assert> 681 <encode type="struct ir3_instruction *"> 682 <map name="TEX">src->cat5.tex</map> 683 </encode> 684</bitset> 685 686<bitset name="#cat5-tex-s2en-bindless" size="4"> 687 <doc>s2en (indirect) / bindless case only has 4b tex</doc> 688 <override> 689 <expr>{HAS_TEX}</expr> 690 <display> 691 , t#{TEX} 692 </display> 693 <field name="TEX" low="0" high="3" type="uint"/> 694 </override> 695 <display/> 696 <assert low="0" high="3">0000</assert> 697 <encode type="struct ir3_instruction *"> 698 <map name="TEX">src->cat5.tex</map> 699 </encode> 700</bitset> 701 702<bitset name="#cat5-type" size="3"> 703 <display/> 704 <override> 705 <expr>{HAS_TYPE}</expr> 706 <display> 707 ({TYPE}) 708 </display> 709 </override> 710 <field name="TYPE" low="0" high="2" type="#type"/> 711 <encode type="struct ir3_instruction *"> 712 <!-- 713 Normally we only encode fields that have visible impact on 714 the decoded disasm, but the type field is one of those 715 special exceptions 716 --> 717 <map name="TYPE" force="true">src->cat5.type</map> 718 </encode> 719</bitset> 720 721<!-- 722 Helpers/bitsets/etc for dealing with the bindless/indirect case: 723 --> 724 725<enum name="#cat5-s2en-bindless-desc-mode"> 726 <doc> 727 We don't actually display this enum, but it is useful to 728 document the various cases 729 730 TODO we should probably have an option for uniforms w/out 731 display strings, but which have 'C' names that can be used 732 to generate header that the compiler can use 733 </doc> 734 <value val="0" display="CAT5_UNIFORM"> 735 <doc> 736 Use traditional GL binding model, get texture and sampler index 737 from src3 which is presumed to be uniform on a4xx+ (a3xx doesn't 738 have the other modes, but does handle non-uniform indexing). 739 </doc> 740 </value> 741 <value val="1" display="CAT5_BINDLESS_A1_UNIFORM"> 742 <doc> 743 The sampler base comes from the low 3 bits of a1.x, and the sampler 744 and texture index come from src3 which is presumed to be uniform. 745 </doc> 746 </value> 747 <value val="2" display="CAT5_BINDLESS_NONUNIFORM"> 748 <doc> 749 The texture and sampler share the same base, and the sampler and 750 texture index come from src3 which is *not* presumed to be uniform. 751 </doc> 752 </value> 753 <value val="3" display="CAT5_BINDLESS_A1_NONUNIFORM"> 754 <doc> 755 The sampler base comes from the low 3 bits of a1.x, and the sampler 756 and texture index come from src3 which is *not* presumed to be 757 uniform. 758 </doc> 759 </value> 760 <value val="4" display="CAT5_NONUNIFORM"> 761 <doc> 762 Use traditional GL binding model, get texture and sampler index 763 from src3 which is *not* presumed to be uniform. 764 </doc> 765 </value> 766 <value val="5" display="CAT5_BINDLESS_UNIFORM"> 767 <doc> 768 The texture and sampler share the same base, and the sampler and 769 texture index come from src3 which is presumed to be uniform. 770 </doc> 771 </value> 772 <value val="6" display="CAT5_BINDLESS_IMM"> 773 <doc> 774 The texture and sampler share the same base, get sampler index from low 775 4 bits of src3 and texture index from high 4 bits. 776 </doc> 777 </value> 778 <value val="7" display="CAT5_BINDLESS_A1_IMM"> 779 <doc> 780 The sampler base comes from the low 3 bits of a1.x, and the texture 781 index comes from the next 8 bits of a1.x. The sampler index is an 782 immediate in src3. 783 </doc> 784 </value> 785</enum> 786 787<!-- Helper to map s2en/bindless DESC_MODE to whether it is an indirect mode --> 788<expr name="#cat5-s2enb-is-indirect"> 789 {DESC_MODE} < 6 /* CAT5_BINDLESS_IMM */ 790</expr> 791 792<!-- Helper to map s2en/bindless DESC_MODE to whether it is a bindless mode --> 793<expr name="#cat5-s2enb-is-bindless"> 794 ({DESC_MODE} == 1) /* CAT5_BINDLESS_A1_UNIFORM */ || 795 ({DESC_MODE} == 2) /* CAT5_BINDLESS_NONUNIFORM */ || 796 ({DESC_MODE} == 3) /* CAT5_BINDLESS_A1_NONUNIFORM */ || 797 ({DESC_MODE} == 5) /* CAT5_BINDLESS_UNIFORM */ || 798 ({DESC_MODE} == 6) /* CAT5_BINDLESS_IMM */ || 799 ({DESC_MODE} == 7) /* CAT5_BINDLESS_A1_IMM */ 800</expr> 801 802<!-- Helper to map s2en/bindless DESC_MODE to whether it uses a1.x --> 803<expr name="#cat5-s2enb-uses_a1"> 804 ({DESC_MODE} == 1) /* CAT5_BINDLESS_A1_UNIFORM */ || 805 ({DESC_MODE} == 3) /* CAT5_BINDLESS_A1_NONUNIFORM */ || 806 ({DESC_MODE} == 7) /* CAT5_BINDLESS_A1_IMM */ 807</expr> 808 809<expr name="#cat5-s2enb-uses_a1-gen6"> 810 ISA_GPU_ID() >= 600 && ISA_GPU_ID() < 700 && 811 (({DESC_MODE} == 1) /* CAT5_BINDLESS_A1_UNIFORM */ || 812 ({DESC_MODE} == 3) /* CAT5_BINDLESS_A1_NONUNIFORM */ || 813 ({DESC_MODE} == 7))/* CAT5_BINDLESS_A1_IMM */ 814</expr> 815 816<expr name="#cat5-s2enb-uses_a1-gen7"> 817 ISA_GPU_ID() >= 700 && 818 (({DESC_MODE} == 1) /* CAT5_BINDLESS_A1_UNIFORM */ || 819 ({DESC_MODE} == 3) /* CAT5_BINDLESS_A1_NONUNIFORM */ || 820 ({DESC_MODE} == 7))/* CAT5_BINDLESS_A1_IMM */ 821</expr> 822 823<!-- Helper to map s2en/bindless DESC_MODE to whether it is uniform (flow control) mode --> 824<expr name="#cat5-s2enb-is-uniform"> 825 ({DESC_MODE} == 0) /* CAT5_UNIFORM */ || 826 ({DESC_MODE} == 1) /* CAT5_BINDLESS_A1_UNIFORM */ || 827 ({DESC_MODE} == 5) /* CAT5_BINDLESS_UNIFORM */ 828</expr> 829 830<!-- Helper to map s2en/bindless DESC_MODE to whether it is non-uniform mode. --> 831<expr name="#cat5-s2enb-is-nonuniform"> 832 ({DESC_MODE} == 2) /* CAT5_BINDLESS_NONUNIFORM */ || 833 ({DESC_MODE} == 3) /* CAT5_BINDLESS_A1_NONUNIFORM */ || 834 ({DESC_MODE} == 4) /* CAT5_NONUNIFORM */ 835</expr> 836 837<bitset name="#cat5-src3" size="8"> 838 <doc>bindless/indirect src3, which can either be GPR or samp/tex</doc> 839 <override expr="#cat5-s2enb-is-indirect"> 840 <display> 841 , {SRC_HALF}{SRC} 842 </display> 843 <field name="SRC" low="0" high="7" type="#reg-gpr"/> 844 <derived name="SRC_HALF" type="bool" display="h"> 845 <expr>!{BINDLESS}</expr> 846 </derived> 847 </override> 848 <override expr="#cat5-s2enb-uses_a1-gen6"> 849 <doc> 850 In the case that a1.x is used, all 8 bits encode sampler 851 </doc> 852 <display> 853 {SAMP} 854 </display> 855 <field name="SAMP" low="0" high="7" type="#cat5-samp-s2en-bindless-a1"> 856 <param name="HAS_SAMP"/> 857 </field> 858 </override> 859 <override expr="#cat5-s2enb-uses_a1-gen7"> 860 <doc> 861 In the case that a1.x is used, all 8 bits encode texture 862 </doc> 863 <display> 864 {TEX} 865 </display> 866 <field name="TEX" low="0" high="7" type="#cat5-tex-s2en-bindless-a1"> 867 <param name="HAS_TEX"/> 868 </field> 869 </override> 870 <display> 871 {SAMP}{TEX} 872 </display> 873 <field name="SAMP" low="0" high="3" type="#cat5-samp"> 874 <param name="HAS_SAMP"/> 875 </field> 876 <field name="TEX" low="4" high="7" type="#cat5-tex-s2en-bindless"> 877 <param name="HAS_TEX"/> 878 </field> 879 <encode type="struct ir3_register *"> 880 <map name="SAMP">s->instr</map> 881 <map name="TEX">s->instr</map> 882 <map name="SRC">src</map> 883 </encode> 884</bitset> 885 886</isa> 887