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1 /*
2  * Copyright (C) 2016 Rob Clark <robclark@freedesktop.org>
3  * Copyright © 2018 Google, Inc.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22  * SOFTWARE.
23  *
24  * Authors:
25  *    Rob Clark <robclark@freedesktop.org>
26  */
27 
28 #ifndef FD6_CONTEXT_H_
29 #define FD6_CONTEXT_H_
30 
31 #include "util/u_upload_mgr.h"
32 
33 #include "freedreno_context.h"
34 #include "freedreno_resource.h"
35 
36 #include "ir3/ir3_shader.h"
37 #include "ir3/ir3_descriptor.h"
38 
39 #include "a6xx.xml.h"
40 
41 struct fd6_lrz_state {
42    union {
43       struct {
44          bool enable : 1;
45          bool write : 1;
46          bool test : 1;
47          bool z_bounds_enable : 1;
48          enum fd_lrz_direction direction : 2;
49 
50          /* this comes from the fs program state, rather than zsa: */
51          enum a6xx_ztest_mode z_mode : 2;
52       };
53       uint32_t val : 8;
54    };
55 };
56 
57 /**
58  * Bindless descriptor set state for a single descriptor set.
59  */
60 struct fd6_descriptor_set {
61    /**
62     * Pre-baked descriptor state, updated when image/SSBO is bound
63     */
64    uint32_t descriptor[IR3_BINDLESS_DESC_COUNT][FDL6_TEX_CONST_DWORDS];
65 
66    /**
67     * The current seqn of the backed in resource, for detecting if the
68     * resource has been rebound
69     */
70    uint16_t seqno[IR3_BINDLESS_DESC_COUNT];
71 
72    /**
73     * Current GPU copy of the desciptor set
74     */
75    struct fd_bo *bo;
76 };
77 
78 static inline void
fd6_descriptor_set_invalidate(struct fd6_descriptor_set * set)79 fd6_descriptor_set_invalidate(struct fd6_descriptor_set *set)
80 {
81    if (!set->bo)
82       return;
83    fd_bo_del(set->bo);
84    set->bo = NULL;
85 }
86 
87 struct fd6_context {
88    struct fd_context base;
89 
90    /* Two buffers related to hw binning / visibility stream (VSC).
91     * Compared to previous generations
92     *   (1) we cannot specify individual buffers per VSC, instead
93     *       just a pitch and base address
94     *   (2) there is a second smaller buffer.. we also stash
95     *       VSC_BIN_SIZE at end of 2nd buffer.
96     */
97    struct fd_bo *vsc_draw_strm, *vsc_prim_strm;
98 
99    unsigned vsc_draw_strm_pitch, vsc_prim_strm_pitch;
100 
101    /* The 'control' mem BO is used for various housekeeping
102     * functions.  See 'struct fd6_control'
103     */
104    struct fd_bo *control_mem;
105    uint32_t seqno;
106 
107    /* pre-baked stateobj for stream-out disable: */
108    struct fd_ringbuffer *streamout_disable_stateobj;
109 
110    /* pre-baked stateobj for sample-locations disable: */
111    struct fd_ringbuffer *sample_locations_disable_stateobj;
112 
113    /* storage for ctx->last.key: */
114    struct ir3_shader_key last_key;
115 
116    /* Is there current VS driver-param state set? */
117    bool has_dp_state;
118 
119    /* cached stateobjs to avoid hashtable lookup when not dirty: */
120    const struct fd6_program_state *prog;
121 
122    /* We expect to see a finite # of unique border-color entry values,
123     * which are a function of the color value and (to a limited degree)
124     * the border color format.  These unique border-color entry values
125     * get populated into a global border-color buffer, and a hash-table
126     * is used to map to the matching entry in the table.
127     */
128    struct hash_table *bcolor_cache;
129    struct fd_bo *bcolor_mem;
130 
131    struct util_idalloc tex_ids;
132    struct hash_table *tex_cache;
133    bool tex_cache_needs_invalidate;
134 
135    /**
136     * Descriptor sets for 3d shader stages
137     */
138    struct fd6_descriptor_set descriptor_sets[5] dt;
139 
140    /**
141     * Descriptor set for compute shaders
142     */
143    struct fd6_descriptor_set cs_descriptor_set dt;
144 
145    struct {
146       /* previous lrz state, which is a function of multiple gallium
147        * stateobjs, but doesn't necessarily change as frequently:
148        */
149       struct fd6_lrz_state lrz;
150    } last;
151 };
152 
153 static inline struct fd6_context *
fd6_context(struct fd_context * ctx)154 fd6_context(struct fd_context *ctx)
155 {
156    return (struct fd6_context *)ctx;
157 }
158 
159 template <chip CHIP>
160 struct pipe_context *fd6_context_create(struct pipe_screen *pscreen, void *priv,
161                                         unsigned flags);
162 
163 /* This struct defines the layout of the fd6_context::control buffer: */
164 struct fd6_control {
165    uint32_t seqno; /* seqno for async CP_EVENT_WRITE, etc */
166    uint32_t _pad0;
167    volatile uint32_t vsc_overflow;
168    uint32_t _pad1[5];
169 
170    /* scratch space for VPC_SO[i].FLUSH_BASE_LO/HI, start on 32 byte boundary. */
171    struct {
172       uint32_t offset;
173       uint32_t pad[7];
174    } flush_base[4];
175 };
176 
177 #define control_ptr(fd6_ctx, member)                                           \
178    (fd6_ctx)->control_mem, offsetof(struct fd6_control, member), 0, 0
179 
180 static inline void
emit_marker6(struct fd_ringbuffer * ring,int scratch_idx)181 emit_marker6(struct fd_ringbuffer *ring, int scratch_idx)
182 {
183    extern int32_t marker_cnt;
184    unsigned reg = REG_A6XX_CP_SCRATCH_REG(scratch_idx);
185    if (__EMIT_MARKER) {
186       OUT_WFI5(ring);
187       OUT_PKT4(ring, reg, 1);
188       OUT_RING(ring, p_atomic_inc_return(&marker_cnt));
189    }
190 }
191 
192 struct fd6_vertex_stateobj {
193    struct fd_vertex_stateobj base;
194    struct fd_ringbuffer *stateobj;
195 };
196 
197 static inline struct fd6_vertex_stateobj *
fd6_vertex_stateobj(void * p)198 fd6_vertex_stateobj(void *p)
199 {
200    return (struct fd6_vertex_stateobj *)p;
201 }
202 
203 #endif /* FD6_CONTEXT_H_ */
204