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1 /*
2  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21  * SOFTWARE.
22  *
23  * Authors:
24  *    Rob Clark <robclark@freedesktop.org>
25  */
26 
27 #include "util/format/u_format.h"
28 #include "util/format/u_format_rgtc.h"
29 #include "util/format/u_format_zs.h"
30 #include "util/set.h"
31 #include "util/u_drm.h"
32 #include "util/u_inlines.h"
33 #include "util/u_sample_positions.h"
34 #include "util/u_string.h"
35 #include "util/u_surface.h"
36 #include "util/u_transfer.h"
37 
38 #include "decode/util.h"
39 
40 #include "freedreno_batch_cache.h"
41 #include "freedreno_blitter.h"
42 #include "freedreno_context.h"
43 #include "freedreno_fence.h"
44 #include "freedreno_query_hw.h"
45 #include "freedreno_resource.h"
46 #include "freedreno_screen.h"
47 #include "freedreno_surface.h"
48 #include "freedreno_util.h"
49 
50 #include <errno.h>
51 #include "drm-uapi/drm_fourcc.h"
52 
53 /* XXX this should go away, needed for 'struct winsys_handle' */
54 #include "frontend/drm_driver.h"
55 
56 /**
57  * Go through the entire state and see if the resource is bound
58  * anywhere. If it is, mark the relevant state as dirty. This is
59  * called on realloc_bo to ensure the necessary state is re-
60  * emitted so the GPU looks at the new backing bo.
61  */
62 static void
rebind_resource_in_ctx(struct fd_context * ctx,struct fd_resource * rsc)63 rebind_resource_in_ctx(struct fd_context *ctx,
64                        struct fd_resource *rsc) assert_dt
65 {
66    struct pipe_resource *prsc = &rsc->b.b;
67 
68    if (ctx->rebind_resource)
69       ctx->rebind_resource(ctx, rsc);
70 
71    /* VBOs */
72    if (rsc->dirty & FD_DIRTY_VTXBUF) {
73       struct fd_vertexbuf_stateobj *vb = &ctx->vtx.vertexbuf;
74       for (unsigned i = 0; i < vb->count && !(ctx->dirty & FD_DIRTY_VTXBUF);
75            i++) {
76          if (vb->vb[i].buffer.resource == prsc)
77             fd_dirty_resource(ctx, prsc, FD_DIRTY_VTXBUF, false);
78       }
79    }
80 
81    /* xfb/so buffers: */
82    if (rsc->dirty & FD_DIRTY_STREAMOUT) {
83       struct fd_streamout_stateobj *so = &ctx->streamout;
84 
85       for (unsigned i = 0;
86             i < so->num_targets && !(ctx->dirty & FD_DIRTY_STREAMOUT);
87             i++) {
88          if (so->targets[i]->buffer == prsc)
89             fd_dirty_resource(ctx, prsc, FD_DIRTY_STREAMOUT, true);
90       }
91    }
92 
93    const enum fd_dirty_3d_state per_stage_dirty =
94       FD_DIRTY_CONST | FD_DIRTY_TEX | FD_DIRTY_IMAGE | FD_DIRTY_SSBO;
95 
96    if (!(rsc->dirty & per_stage_dirty))
97       return;
98 
99    /* per-shader-stage resources: */
100    for (unsigned stage = 0; stage < PIPE_SHADER_TYPES; stage++) {
101       /* Constbufs.. note that constbuf[0] is normal uniforms emitted in
102        * cmdstream rather than by pointer..
103        */
104       if ((rsc->dirty & FD_DIRTY_CONST) &&
105           !(ctx->dirty_shader[stage] & FD_DIRTY_CONST)) {
106          struct fd_constbuf_stateobj *cb = &ctx->constbuf[stage];
107          const unsigned num_ubos = util_last_bit(cb->enabled_mask);
108          for (unsigned i = 1; i < num_ubos; i++) {
109             if (cb->cb[i].buffer == prsc) {
110                fd_dirty_shader_resource(ctx, prsc, stage,
111                                         FD_DIRTY_SHADER_CONST, false);
112                break;
113             }
114          }
115       }
116 
117       /* Textures */
118       if ((rsc->dirty & FD_DIRTY_TEX) &&
119           !(ctx->dirty_shader[stage] & FD_DIRTY_TEX)) {
120          struct fd_texture_stateobj *tex = &ctx->tex[stage];
121          for (unsigned i = 0; i < tex->num_textures; i++) {
122             if (tex->textures[i] && (tex->textures[i]->texture == prsc)) {
123                fd_dirty_shader_resource(ctx, prsc, stage,
124                                         FD_DIRTY_SHADER_TEX, false);
125                break;
126             }
127          }
128       }
129 
130       /* Images */
131       if ((rsc->dirty & FD_DIRTY_IMAGE) &&
132           !(ctx->dirty_shader[stage] & FD_DIRTY_IMAGE)) {
133          struct fd_shaderimg_stateobj *si = &ctx->shaderimg[stage];
134          const unsigned num_images = util_last_bit(si->enabled_mask);
135          for (unsigned i = 0; i < num_images; i++) {
136             if (si->si[i].resource == prsc) {
137                bool write = si->si[i].access & PIPE_IMAGE_ACCESS_WRITE;
138                fd_dirty_shader_resource(ctx, prsc, stage,
139                                         FD_DIRTY_SHADER_IMAGE, write);
140                break;
141             }
142          }
143       }
144 
145       /* SSBOs */
146       if ((rsc->dirty & FD_DIRTY_SSBO) &&
147           !(ctx->dirty_shader[stage] & FD_DIRTY_SSBO)) {
148          struct fd_shaderbuf_stateobj *sb = &ctx->shaderbuf[stage];
149          const unsigned num_ssbos = util_last_bit(sb->enabled_mask);
150          for (unsigned i = 0; i < num_ssbos; i++) {
151             if (sb->sb[i].buffer == prsc) {
152                bool write = sb->writable_mask & BIT(i);
153                fd_dirty_shader_resource(ctx, prsc, stage,
154                                         FD_DIRTY_SHADER_SSBO, write);
155                break;
156             }
157          }
158       }
159    }
160 }
161 
162 static void
rebind_resource(struct fd_resource * rsc)163 rebind_resource(struct fd_resource *rsc) assert_dt
164 {
165    struct fd_screen *screen = fd_screen(rsc->b.b.screen);
166 
167    fd_screen_lock(screen);
168    fd_resource_lock(rsc);
169 
170    if (rsc->dirty)
171       list_for_each_entry (struct fd_context, ctx, &screen->context_list, node)
172          rebind_resource_in_ctx(ctx, rsc);
173 
174    fd_resource_unlock(rsc);
175    fd_screen_unlock(screen);
176 }
177 
178 static inline void
fd_resource_set_bo(struct fd_resource * rsc,struct fd_bo * bo)179 fd_resource_set_bo(struct fd_resource *rsc, struct fd_bo *bo)
180 {
181    struct fd_screen *screen = fd_screen(rsc->b.b.screen);
182 
183    rsc->bo = bo;
184    rsc->seqno = seqno_next_u16(&screen->rsc_seqno);
185 }
186 
187 int
__fd_resource_wait(struct fd_context * ctx,struct fd_resource * rsc,unsigned op,const char * func)188 __fd_resource_wait(struct fd_context *ctx, struct fd_resource *rsc, unsigned op,
189                    const char *func)
190 {
191    if (op & FD_BO_PREP_NOSYNC)
192       return fd_bo_cpu_prep(rsc->bo, ctx->pipe, op);
193 
194    int ret;
195 
196    perf_time_ctx (ctx, 10000, "%s: a busy \"%" PRSC_FMT "\" BO stalled", func,
197                   PRSC_ARGS(&rsc->b.b)) {
198       ret = fd_bo_cpu_prep(rsc->bo, ctx->pipe, op);
199    }
200 
201    return ret;
202 }
203 
204 static void
realloc_bo(struct fd_resource * rsc,uint32_t size)205 realloc_bo(struct fd_resource *rsc, uint32_t size)
206 {
207    struct pipe_resource *prsc = &rsc->b.b;
208    struct fd_screen *screen = fd_screen(rsc->b.b.screen);
209    uint32_t flags =
210       COND(rsc->layout.tile_mode, FD_BO_NOMAP) |
211       COND((prsc->usage & PIPE_USAGE_STAGING) &&
212            (prsc->flags & PIPE_RESOURCE_FLAG_MAP_COHERENT),
213            FD_BO_CACHED_COHERENT) |
214       COND(prsc->bind & PIPE_BIND_SHARED, FD_BO_SHARED) |
215       COND(prsc->bind & PIPE_BIND_SCANOUT, FD_BO_SCANOUT);
216    /* TODO other flags? */
217 
218    /* if we start using things other than write-combine,
219     * be sure to check for PIPE_RESOURCE_FLAG_MAP_COHERENT
220     */
221 
222    if (rsc->bo)
223       fd_bo_del(rsc->bo);
224 
225    struct fd_bo *bo =
226       fd_bo_new(screen->dev, size, flags, "%ux%ux%u@%u:%x", prsc->width0,
227                 prsc->height0, prsc->depth0, rsc->layout.cpp, prsc->bind);
228    fd_resource_set_bo(rsc, bo);
229 
230    /* Zero out the UBWC area on allocation.  This fixes intermittent failures
231     * with UBWC, which I suspect are due to the HW having a hard time
232     * interpreting arbitrary values populating the flags buffer when the BO
233     * was recycled through the bo cache (instead of fresh allocations from
234     * the kernel, which are zeroed).  sleep(1) in this spot didn't work
235     * around the issue, but any memset value seems to.
236     */
237    if (rsc->layout.ubwc) {
238       rsc->needs_ubwc_clear = true;
239    }
240 
241    util_range_set_empty(&rsc->valid_buffer_range);
242    fd_bc_invalidate_resource(rsc, true);
243 }
244 
245 static void
do_blit(struct fd_context * ctx,const struct pipe_blit_info * blit,bool fallback)246 do_blit(struct fd_context *ctx, const struct pipe_blit_info *blit,
247         bool fallback) assert_dt
248 {
249    struct pipe_context *pctx = &ctx->base;
250 
251    assert(!ctx->in_blit);
252    ctx->in_blit = true;
253 
254    /* TODO size threshold too?? */
255    if (fallback || !fd_blit(pctx, blit)) {
256       /* do blit on cpu: */
257       util_resource_copy_region(pctx, blit->dst.resource, blit->dst.level,
258                                 blit->dst.box.x, blit->dst.box.y,
259                                 blit->dst.box.z, blit->src.resource,
260                                 blit->src.level, &blit->src.box);
261    }
262 
263    ctx->in_blit = false;
264 }
265 
266 /**
267  * Replace the storage of dst with src.  This is only used by TC in the
268  * DISCARD_WHOLE_RESOURCE path, and src is a freshly allocated buffer.
269  */
270 void
fd_replace_buffer_storage(struct pipe_context * pctx,struct pipe_resource * pdst,struct pipe_resource * psrc,unsigned num_rebinds,uint32_t rebind_mask,uint32_t delete_buffer_id)271 fd_replace_buffer_storage(struct pipe_context *pctx, struct pipe_resource *pdst,
272                           struct pipe_resource *psrc, unsigned num_rebinds, uint32_t rebind_mask,
273                           uint32_t delete_buffer_id)
274 {
275    struct fd_context *ctx = fd_context(pctx);
276    struct fd_resource *dst = fd_resource(pdst);
277    struct fd_resource *src = fd_resource(psrc);
278 
279    DBG("pdst=%p, psrc=%p", pdst, psrc);
280 
281    /* This should only be called with buffers.. which side-steps some tricker
282     * cases, like a rsc that is in a batch-cache key...
283     */
284    assert(pdst->target == PIPE_BUFFER);
285    assert(psrc->target == PIPE_BUFFER);
286    assert(dst->track->bc_batch_mask == 0);
287    assert(src->track->bc_batch_mask == 0);
288    assert(src->track->batch_mask == 0);
289    assert(src->track->write_batch == NULL);
290    assert(memcmp(&dst->layout, &src->layout, sizeof(dst->layout)) == 0);
291 
292    /* get rid of any references that batch-cache might have to us (which
293     * should empty/destroy rsc->batches hashset)
294     *
295     * Note that we aren't actually destroying dst, but we are replacing
296     * it's storage so we want to go thru the same motions of decoupling
297     * it's batch connections.
298     */
299    fd_bc_invalidate_resource(dst, true);
300    rebind_resource(dst);
301 
302    util_idalloc_mt_free(&ctx->screen->buffer_ids, delete_buffer_id);
303 
304    fd_screen_lock(ctx->screen);
305 
306    fd_bo_del(dst->bo);
307    dst->bo = fd_bo_ref(src->bo);
308 
309    fd_resource_tracking_reference(&dst->track, src->track);
310    src->is_replacement = true;
311 
312    dst->seqno = seqno_next_u16(&ctx->screen->rsc_seqno);
313 
314    fd_screen_unlock(ctx->screen);
315 }
316 
317 static unsigned
translate_usage(unsigned usage)318 translate_usage(unsigned usage)
319 {
320    uint32_t op = 0;
321 
322    if (usage & PIPE_MAP_READ)
323       op |= FD_BO_PREP_READ;
324 
325    if (usage & PIPE_MAP_WRITE)
326       op |= FD_BO_PREP_WRITE;
327 
328    return op;
329 }
330 
331 bool
fd_resource_busy(struct pipe_screen * pscreen,struct pipe_resource * prsc,unsigned usage)332 fd_resource_busy(struct pipe_screen *pscreen, struct pipe_resource *prsc,
333                  unsigned usage)
334 {
335    struct fd_resource *rsc = fd_resource(prsc);
336 
337    if (pending(rsc, !!(usage & PIPE_MAP_WRITE)))
338       return true;
339 
340    if (resource_busy(rsc, translate_usage(usage)))
341       return true;
342 
343    return false;
344 }
345 
346 static void flush_resource(struct fd_context *ctx, struct fd_resource *rsc,
347                            unsigned usage);
348 
349 /**
350  * Helper to check if the format is something that we can blit/render
351  * to.. if the format is not renderable, there is no point in trying
352  * to do a staging blit (as it will still end up being a cpu copy)
353  */
354 static bool
is_renderable(struct pipe_resource * prsc)355 is_renderable(struct pipe_resource *prsc)
356 {
357    struct pipe_screen *pscreen = prsc->screen;
358    return pscreen->is_format_supported(
359          pscreen, prsc->format, prsc->target, prsc->nr_samples,
360          prsc->nr_storage_samples, PIPE_BIND_RENDER_TARGET);
361 }
362 
363 /**
364  * @rsc: the resource to shadow
365  * @level: the level to discard (if box != NULL, otherwise ignored)
366  * @box: the box to discard (or NULL if none)
367  * @modifier: the modifier for the new buffer state
368  */
369 static bool
fd_try_shadow_resource(struct fd_context * ctx,struct fd_resource * rsc,unsigned level,const struct pipe_box * box,uint64_t modifier)370 fd_try_shadow_resource(struct fd_context *ctx, struct fd_resource *rsc,
371                        unsigned level, const struct pipe_box *box,
372                        uint64_t modifier) assert_dt
373 {
374    struct pipe_context *pctx = &ctx->base;
375    struct pipe_resource *prsc = &rsc->b.b;
376    struct fd_screen *screen = fd_screen(pctx->screen);
377    struct fd_batch *batch;
378    bool fallback = false;
379 
380    if (prsc->next)
381       return false;
382 
383    /* Flush any pending batches writing the resource before we go mucking around
384     * in its insides.  The blit would immediately cause the batch to be flushed,
385     * anyway.
386     */
387    fd_bc_flush_writer(ctx, rsc);
388 
389    /* Because IB1 ("gmem") cmdstream is built only when we flush the
390     * batch, we need to flush any batches that reference this rsc as
391     * a render target.  Otherwise the framebuffer state emitted in
392     * IB1 will reference the resources new state, and not the state
393     * at the point in time that the earlier draws referenced it.
394     *
395     * Note that being in the gmem key doesn't necessarily mean the
396     * batch was considered a writer!
397     */
398    foreach_batch (batch, &screen->batch_cache, rsc->track->bc_batch_mask) {
399       fd_batch_flush(batch);
400    }
401 
402    /* TODO: somehow munge dimensions and format to copy unsupported
403     * render target format to something that is supported?
404     */
405    if (!is_renderable(prsc))
406       fallback = true;
407 
408    /* do shadowing back-blits on the cpu for buffers -- requires about a page of
409     * DMA to make GPU copies worth it according to robclark.  Note, if you
410     * decide to do it on the GPU then you'll need to update valid_buffer_range
411     * in the swap()s below.
412     */
413    if (prsc->target == PIPE_BUFFER)
414       fallback = true;
415 
416    bool discard_whole_level = box && util_texrange_covers_whole_level(
417                                         prsc, level, box->x, box->y, box->z,
418                                         box->width, box->height, box->depth);
419 
420    /* TODO need to be more clever about current level */
421    if ((prsc->target >= PIPE_TEXTURE_2D) && box && !discard_whole_level)
422       return false;
423 
424    struct pipe_resource *pshadow = pctx->screen->resource_create_with_modifiers(
425       pctx->screen, prsc, &modifier, 1);
426 
427    if (!pshadow)
428       return false;
429 
430    assert(!ctx->in_shadow);
431    ctx->in_shadow = true;
432 
433    /* get rid of any references that batch-cache might have to us (which
434     * should empty/destroy rsc->batches hashset)
435     */
436    fd_bc_invalidate_resource(rsc, false);
437    rebind_resource(rsc);
438 
439    fd_screen_lock(ctx->screen);
440 
441    /* Swap the backing bo's, so shadow becomes the old buffer,
442     * blit from shadow to new buffer.  From here on out, we
443     * cannot fail.
444     *
445     * Note that we need to do it in this order, otherwise if
446     * we go down cpu blit path, the recursive transfer_map()
447     * sees the wrong status..
448     */
449    struct fd_resource *shadow = fd_resource(pshadow);
450 
451    DBG("shadow: %p (%d, %p) -> %p (%d, %p)", rsc, rsc->b.b.reference.count,
452        rsc->track, shadow, shadow->b.b.reference.count, shadow->track);
453 
454    SWAP(rsc->bo, shadow->bo);
455    SWAP(rsc->valid, shadow->valid);
456 
457    /* swap() doesn't work because you can't typeof() the bitfield. */
458    bool temp = shadow->needs_ubwc_clear;
459    shadow->needs_ubwc_clear = rsc->needs_ubwc_clear;
460    rsc->needs_ubwc_clear = temp;
461 
462    SWAP(rsc->layout, shadow->layout);
463    rsc->seqno = seqno_next_u16(&ctx->screen->rsc_seqno);
464 
465    /* at this point, the newly created shadow buffer is not referenced
466     * by any batches, but the existing rsc (probably) is.  We need to
467     * transfer those references over:
468     */
469    assert(shadow->track->batch_mask == 0);
470    foreach_batch (batch, &ctx->screen->batch_cache, rsc->track->batch_mask) {
471       struct set_entry *entry = _mesa_set_search_pre_hashed(batch->resources, rsc->hash, rsc);
472       _mesa_set_remove(batch->resources, entry);
473       _mesa_set_add_pre_hashed(batch->resources, shadow->hash, shadow);
474    }
475    SWAP(rsc->track, shadow->track);
476 
477    fd_screen_unlock(ctx->screen);
478 
479    struct pipe_blit_info blit = {};
480    blit.dst.resource = prsc;
481    blit.dst.format = prsc->format;
482    blit.src.resource = pshadow;
483    blit.src.format = pshadow->format;
484    blit.mask = util_format_get_mask(prsc->format);
485    blit.filter = PIPE_TEX_FILTER_NEAREST;
486 
487 #define set_box(field, val)                                                    \
488    do {                                                                        \
489       blit.dst.field = (val);                                                  \
490       blit.src.field = (val);                                                  \
491    } while (0)
492 
493    /* Disable occlusion queries during shadow blits. */
494    bool saved_active_queries = ctx->active_queries;
495    pctx->set_active_query_state(pctx, false);
496 
497    /* blit the other levels in their entirety: */
498    for (unsigned l = 0; l <= prsc->last_level; l++) {
499       if (box && l == level)
500          continue;
501 
502       /* just blit whole level: */
503       set_box(level, l);
504       set_box(box.width, u_minify(prsc->width0, l));
505       set_box(box.height, u_minify(prsc->height0, l));
506       set_box(box.depth, u_minify(prsc->depth0, l));
507 
508       for (int i = 0; i < prsc->array_size; i++) {
509          set_box(box.z, i);
510          do_blit(ctx, &blit, fallback);
511       }
512    }
513 
514    /* deal w/ current level specially, since we might need to split
515     * it up into a couple blits:
516     */
517    if (box && !discard_whole_level) {
518       set_box(level, level);
519 
520       switch (prsc->target) {
521       case PIPE_BUFFER:
522       case PIPE_TEXTURE_1D:
523          set_box(box.y, 0);
524          set_box(box.z, 0);
525          set_box(box.height, 1);
526          set_box(box.depth, 1);
527 
528          if (box->x > 0) {
529             set_box(box.x, 0);
530             set_box(box.width, box->x);
531 
532             do_blit(ctx, &blit, fallback);
533          }
534          if ((box->x + box->width) < u_minify(prsc->width0, level)) {
535             set_box(box.x, box->x + box->width);
536             set_box(box.width,
537                     u_minify(prsc->width0, level) - (box->x + box->width));
538 
539             do_blit(ctx, &blit, fallback);
540          }
541          break;
542       case PIPE_TEXTURE_2D:
543          /* TODO */
544       default:
545          unreachable("TODO");
546       }
547    }
548 
549    pctx->set_active_query_state(pctx, saved_active_queries);
550 
551    ctx->in_shadow = false;
552 
553    pipe_resource_reference(&pshadow, NULL);
554 
555    return true;
556 }
557 
558 /**
559  * Uncompress an UBWC compressed buffer "in place".  This works basically
560  * like resource shadowing, creating a new resource, and doing an uncompress
561  * blit, and swapping the state between shadow and original resource so it
562  * appears to the gallium frontends as if nothing changed.
563  */
564 void
fd_resource_uncompress(struct fd_context * ctx,struct fd_resource * rsc,bool linear)565 fd_resource_uncompress(struct fd_context *ctx, struct fd_resource *rsc, bool linear)
566 {
567    tc_assert_driver_thread(ctx->tc);
568 
569    uint64_t modifier = linear ? DRM_FORMAT_MOD_LINEAR : DRM_FORMAT_MOD_QCOM_TILED3;
570 
571    ASSERTED bool success = fd_try_shadow_resource(ctx, rsc, 0, NULL, modifier);
572 
573    /* shadow should not fail in any cases where we need to uncompress: */
574    assert(success);
575 }
576 
577 /**
578  * Debug helper to hexdump a resource.
579  */
580 void
fd_resource_dump(struct fd_resource * rsc,const char * name)581 fd_resource_dump(struct fd_resource *rsc, const char *name)
582 {
583    fd_bo_cpu_prep(rsc->bo, NULL, FD_BO_PREP_READ);
584    printf("%s: \n", name);
585    dump_hex(fd_bo_map(rsc->bo), fd_bo_size(rsc->bo));
586 }
587 
588 static struct fd_resource *
fd_alloc_staging(struct fd_context * ctx,struct fd_resource * rsc,unsigned level,const struct pipe_box * box,unsigned usage)589 fd_alloc_staging(struct fd_context *ctx, struct fd_resource *rsc,
590                  unsigned level, const struct pipe_box *box, unsigned usage)
591    assert_dt
592 {
593    struct pipe_context *pctx = &ctx->base;
594    struct pipe_resource tmpl = rsc->b.b;
595 
596    /* We cannot currently do stencil export on earlier gens, and
597     * u_blitter cannot do blits involving stencil otherwise:
598     */
599    if ((ctx->screen->gen < 6) && !ctx->blit &&
600        (util_format_get_mask(tmpl.format) & PIPE_MASK_S))
601       return NULL;
602 
603    tmpl.width0 = box->width;
604    tmpl.height0 = box->height;
605    /* for array textures, box->depth is the array_size, otherwise
606     * for 3d textures, it is the depth:
607     */
608    if (tmpl.array_size > 1) {
609       if (tmpl.target == PIPE_TEXTURE_CUBE)
610          tmpl.target = PIPE_TEXTURE_2D_ARRAY;
611       tmpl.array_size = box->depth;
612       tmpl.depth0 = 1;
613    } else {
614       tmpl.array_size = 1;
615       tmpl.depth0 = box->depth;
616    }
617    tmpl.last_level = 0;
618    tmpl.bind |= PIPE_BIND_LINEAR;
619    tmpl.usage = PIPE_USAGE_STAGING;
620    tmpl.flags = (usage & PIPE_MAP_READ) ? PIPE_RESOURCE_FLAG_MAP_COHERENT : 0;
621 
622    struct pipe_resource *pstaging =
623       pctx->screen->resource_create(pctx->screen, &tmpl);
624    if (!pstaging)
625       return NULL;
626 
627    return fd_resource(pstaging);
628 }
629 
630 static void
fd_blit_from_staging(struct fd_context * ctx,struct fd_transfer * trans)631 fd_blit_from_staging(struct fd_context *ctx,
632                      struct fd_transfer *trans) assert_dt
633 {
634    DBG("");
635    struct pipe_resource *dst = trans->b.b.resource;
636    struct pipe_blit_info blit = {};
637 
638    blit.dst.resource = dst;
639    blit.dst.format = dst->format;
640    blit.dst.level = trans->b.b.level;
641    blit.dst.box = trans->b.b.box;
642    blit.src.resource = trans->staging_prsc;
643    blit.src.format = trans->staging_prsc->format;
644    blit.src.level = 0;
645    blit.src.box = trans->staging_box;
646    blit.mask = util_format_get_mask(trans->staging_prsc->format);
647    blit.filter = PIPE_TEX_FILTER_NEAREST;
648 
649    do_blit(ctx, &blit, false);
650 }
651 
652 static void
fd_blit_to_staging(struct fd_context * ctx,struct fd_transfer * trans)653 fd_blit_to_staging(struct fd_context *ctx, struct fd_transfer *trans) assert_dt
654 {
655    DBG("");
656    struct pipe_resource *src = trans->b.b.resource;
657    struct pipe_blit_info blit = {};
658 
659    blit.src.resource = src;
660    blit.src.format = src->format;
661    blit.src.level = trans->b.b.level;
662    blit.src.box = trans->b.b.box;
663    blit.dst.resource = trans->staging_prsc;
664    blit.dst.format = trans->staging_prsc->format;
665    blit.dst.level = 0;
666    blit.dst.box = trans->staging_box;
667    blit.mask = util_format_get_mask(trans->staging_prsc->format);
668    blit.filter = PIPE_TEX_FILTER_NEAREST;
669 
670    do_blit(ctx, &blit, false);
671 }
672 
673 static void
fd_resource_transfer_flush_region(struct pipe_context * pctx,struct pipe_transfer * ptrans,const struct pipe_box * box)674 fd_resource_transfer_flush_region(struct pipe_context *pctx,
675                                   struct pipe_transfer *ptrans,
676                                   const struct pipe_box *box)
677 {
678    struct fd_resource *rsc = fd_resource(ptrans->resource);
679 
680    if (ptrans->resource->target == PIPE_BUFFER)
681       util_range_add(&rsc->b.b, &rsc->valid_buffer_range,
682                      ptrans->box.x + box->x,
683                      ptrans->box.x + box->x + box->width);
684 }
685 
686 static void
flush_resource(struct fd_context * ctx,struct fd_resource * rsc,unsigned usage)687 flush_resource(struct fd_context *ctx, struct fd_resource *rsc,
688                unsigned usage) assert_dt
689 {
690    if (usage & PIPE_MAP_WRITE) {
691       fd_bc_flush_readers(ctx, rsc);
692    } else {
693       fd_bc_flush_writer(ctx, rsc);
694    }
695 }
696 
697 static void
fd_flush_resource(struct pipe_context * pctx,struct pipe_resource * prsc)698 fd_flush_resource(struct pipe_context *pctx, struct pipe_resource *prsc)
699    in_dt
700 {
701    struct fd_context *ctx = fd_context(pctx);
702    struct fd_resource *rsc = fd_resource(prsc);
703 
704    /* Flushing the resource is only required if we are relying on
705     * implicit-sync, in which case the rendering must be flushed
706     * to the kernel for the fence to be added to the backing GEM
707     * object.
708     */
709    if (ctx->no_implicit_sync)
710       return;
711 
712    flush_resource(ctx, rsc, PIPE_MAP_READ);
713 
714    /* If we had to flush a batch, make sure it makes it's way all the
715     * way to the kernel:
716     */
717    fd_resource_wait(ctx, rsc, FD_BO_PREP_FLUSH);
718 }
719 
720 static void
fd_resource_transfer_unmap(struct pipe_context * pctx,struct pipe_transfer * ptrans)721 fd_resource_transfer_unmap(struct pipe_context *pctx,
722                            struct pipe_transfer *ptrans)
723    in_dt /* TODO for threaded-ctx we'll need to split out unsynchronized path */
724 {
725    struct fd_context *ctx = fd_context(pctx);
726    struct fd_resource *rsc = fd_resource(ptrans->resource);
727    struct fd_transfer *trans = fd_transfer(ptrans);
728 
729    if (trans->staging_prsc) {
730       if (ptrans->usage & PIPE_MAP_WRITE)
731          fd_blit_from_staging(ctx, trans);
732       pipe_resource_reference(&trans->staging_prsc, NULL);
733    }
734 
735    if (trans->upload_ptr) {
736       fd_bo_upload(rsc->bo, trans->upload_ptr, ptrans->box.x, ptrans->box.width);
737       free(trans->upload_ptr);
738    }
739 
740    util_range_add(&rsc->b.b, &rsc->valid_buffer_range, ptrans->box.x,
741                   ptrans->box.x + ptrans->box.width);
742 
743    pipe_resource_reference(&ptrans->resource, NULL);
744 
745    assert(trans->b.staging == NULL); /* for threaded context only */
746 
747    /* Don't use pool_transfers_unsync. We are always in the driver
748     * thread. Freeing an object into a different pool is allowed.
749     */
750    slab_free(&ctx->transfer_pool, ptrans);
751 }
752 
753 static void
invalidate_resource(struct fd_resource * rsc,unsigned usage)754 invalidate_resource(struct fd_resource *rsc, unsigned usage) assert_dt
755 {
756    bool needs_flush = pending(rsc, !!(usage & PIPE_MAP_WRITE));
757    unsigned op = translate_usage(usage);
758 
759    if (needs_flush || resource_busy(rsc, op)) {
760       rebind_resource(rsc);
761       realloc_bo(rsc, fd_bo_size(rsc->bo));
762    } else {
763       util_range_set_empty(&rsc->valid_buffer_range);
764    }
765 }
766 
767 static bool
valid_range(struct fd_resource * rsc,const struct pipe_box * box)768 valid_range(struct fd_resource *rsc, const struct pipe_box *box)
769 {
770    return util_ranges_intersect(&rsc->valid_buffer_range, box->x, box->x + box->width);
771 }
772 
773 static void *
resource_transfer_map_staging(struct pipe_context * pctx,struct pipe_resource * prsc,unsigned level,unsigned usage,const struct pipe_box * box,struct fd_transfer * trans)774 resource_transfer_map_staging(struct pipe_context *pctx,
775                               struct pipe_resource *prsc,
776                               unsigned level, unsigned usage,
777                               const struct pipe_box *box,
778                               struct fd_transfer *trans)
779    in_dt
780 {
781    struct fd_context *ctx = fd_context(pctx);
782    struct fd_resource *rsc = fd_resource(prsc);
783    struct fd_resource *staging_rsc;
784 
785    assert(prsc->target != PIPE_BUFFER);
786 
787    staging_rsc = fd_alloc_staging(ctx, rsc, level, box, usage);
788    if (!staging_rsc)
789       return NULL;
790 
791    trans->staging_prsc = &staging_rsc->b.b;
792    trans->b.b.stride = fd_resource_pitch(staging_rsc, 0);
793    trans->b.b.layer_stride = fd_resource_layer_stride(staging_rsc, 0);
794    trans->staging_box = *box;
795    trans->staging_box.x = 0;
796    trans->staging_box.y = 0;
797    trans->staging_box.z = 0;
798 
799    if (usage & PIPE_MAP_READ) {
800       fd_blit_to_staging(ctx, trans);
801 
802       fd_resource_wait(ctx, staging_rsc, FD_BO_PREP_READ);
803    }
804 
805    ctx->stats.staging_uploads++;
806 
807    return fd_bo_map(staging_rsc->bo);
808 }
809 
810 static void *
resource_transfer_map_unsync(struct pipe_context * pctx,struct pipe_resource * prsc,unsigned level,unsigned usage,const struct pipe_box * box,struct fd_transfer * trans)811 resource_transfer_map_unsync(struct pipe_context *pctx,
812                              struct pipe_resource *prsc, unsigned level,
813                              unsigned usage, const struct pipe_box *box,
814                              struct fd_transfer *trans)
815 {
816    struct fd_resource *rsc = fd_resource(prsc);
817    enum pipe_format format = prsc->format;
818    uint32_t offset;
819    char *buf;
820 
821    if ((prsc->target == PIPE_BUFFER) &&
822        !(usage & (PIPE_MAP_READ | PIPE_MAP_DIRECTLY | PIPE_MAP_PERSISTENT)) &&
823        ((usage & PIPE_MAP_DISCARD_RANGE) || !valid_range(rsc, box)) &&
824        fd_bo_prefer_upload(rsc->bo, box->width)) {
825       trans->upload_ptr = malloc(box->width);
826       return trans->upload_ptr;
827    }
828 
829    buf = fd_bo_map(rsc->bo);
830 
831    /* With imported bo's allocated by something outside of mesa, when
832     * running in a VM (using virtio_gpu kernel driver) we could end up in
833     * a situation where we have a linear bo, but are unable to mmap it
834     * because it was allocated without the VIRTGPU_BLOB_FLAG_USE_MAPPABLE
835     * flag.  So we need end up needing to do a staging blit instead:
836     */
837    if (!buf)
838       return resource_transfer_map_staging(pctx, prsc, level, usage, box, trans);
839 
840    offset = box->y / util_format_get_blockheight(format) * trans->b.b.stride +
841             box->x / util_format_get_blockwidth(format) * rsc->layout.cpp +
842             fd_resource_offset(rsc, level, box->z);
843 
844    if (usage & PIPE_MAP_WRITE)
845       rsc->valid = true;
846 
847    return buf + offset;
848 }
849 
850 /**
851  * Note, with threaded_context, resource_transfer_map() is only called
852  * in driver thread, but resource_transfer_map_unsync() can be called in
853  * either driver or frontend thread.
854  */
855 static void *
resource_transfer_map(struct pipe_context * pctx,struct pipe_resource * prsc,unsigned level,unsigned usage,const struct pipe_box * box,struct fd_transfer * trans)856 resource_transfer_map(struct pipe_context *pctx, struct pipe_resource *prsc,
857                       unsigned level, unsigned usage,
858                       const struct pipe_box *box,
859                       struct fd_transfer *trans) in_dt
860 {
861    struct fd_context *ctx = fd_context(pctx);
862    struct fd_resource *rsc = fd_resource(prsc);
863    char *buf;
864    int ret = 0;
865 
866    tc_assert_driver_thread(ctx->tc);
867 
868    /* Strip the read flag if the buffer has been invalidated (or is freshly
869     * created). Avoids extra staging blits of undefined data on glTexSubImage of
870     * a fresh DEPTH_COMPONENT or STENCIL_INDEX texture being stored as z24s8.
871     */
872    if (!rsc->valid)
873       usage &= ~PIPE_MAP_READ;
874 
875    /* we always need a staging texture for tiled buffers:
876     *
877     * TODO we might sometimes want to *also* shadow the resource to avoid
878     * splitting a batch.. for ex, mid-frame texture uploads to a tiled
879     * texture.
880     */
881    if (rsc->layout.tile_mode) {
882       return resource_transfer_map_staging(pctx, prsc, level, usage, box, trans);
883    } else if ((usage & PIPE_MAP_READ) && !fd_bo_is_cached(rsc->bo)) {
884       perf_debug_ctx(ctx, "wc readback: prsc=%p, level=%u, usage=%x, box=%dx%d+%d,%d",
885                      prsc, level, usage, box->width, box->height, box->x, box->y);
886    }
887 
888    if (usage & PIPE_MAP_DISCARD_WHOLE_RESOURCE) {
889       invalidate_resource(rsc, usage);
890    } else {
891       unsigned op = translate_usage(usage);
892       bool needs_flush = pending(rsc, !!(usage & PIPE_MAP_WRITE));
893 
894       /* If the GPU is writing to the resource, or if it is reading from the
895        * resource and we're trying to write to it, flush the renders.
896        */
897       bool busy = needs_flush || resource_busy(rsc, op);
898 
899       /* if we need to flush/stall, see if we can make a shadow buffer
900        * to avoid this:
901        *
902        * TODO we could go down this path !reorder && !busy_for_read
903        * ie. we only *don't* want to go down this path if the blit
904        * will trigger a flush!
905        */
906       if (ctx->screen->reorder && busy && !(usage & PIPE_MAP_READ) &&
907           (usage & PIPE_MAP_DISCARD_RANGE)) {
908 
909          /* try shadowing only if it avoids a flush, otherwise staging would
910           * be better:
911           */
912          if (needs_flush && !(usage & TC_TRANSFER_MAP_NO_INVALIDATE) &&
913                fd_try_shadow_resource(ctx, rsc, level, box, DRM_FORMAT_MOD_LINEAR)) {
914             needs_flush = busy = false;
915             ctx->stats.shadow_uploads++;
916          } else {
917             struct fd_resource *staging_rsc = NULL;
918 
919             if (needs_flush) {
920                perf_debug_ctx(ctx, "flushing: %" PRSC_FMT, PRSC_ARGS(prsc));
921                flush_resource(ctx, rsc, usage);
922                needs_flush = false;
923             }
924 
925             /* in this case, we don't need to shadow the whole resource,
926              * since any draw that references the previous contents has
927              * already had rendering flushed for all tiles.  So we can
928              * use a staging buffer to do the upload.
929              */
930             if (is_renderable(prsc))
931                staging_rsc = fd_alloc_staging(ctx, rsc, level, box, usage);
932             if (staging_rsc) {
933                trans->staging_prsc = &staging_rsc->b.b;
934                trans->b.b.stride = fd_resource_pitch(staging_rsc, 0);
935                trans->b.b.layer_stride =
936                   fd_resource_layer_stride(staging_rsc, 0);
937                trans->staging_box = *box;
938                trans->staging_box.x = 0;
939                trans->staging_box.y = 0;
940                trans->staging_box.z = 0;
941                buf = fd_bo_map(staging_rsc->bo);
942 
943                ctx->stats.staging_uploads++;
944 
945                return buf;
946             }
947          }
948       }
949 
950       if (needs_flush) {
951          flush_resource(ctx, rsc, usage);
952          needs_flush = false;
953       }
954 
955       /* The GPU keeps track of how the various bo's are being used, and
956        * will wait if necessary for the proper operation to have
957        * completed.
958        */
959       if (busy) {
960          ret = fd_resource_wait(ctx, rsc, op);
961          if (ret)
962             return NULL;
963       }
964    }
965 
966    return resource_transfer_map_unsync(pctx, prsc, level, usage, box, trans);
967 }
968 
969 static unsigned
improve_transfer_map_usage(struct fd_context * ctx,struct fd_resource * rsc,unsigned usage,const struct pipe_box * box)970 improve_transfer_map_usage(struct fd_context *ctx, struct fd_resource *rsc,
971                            unsigned usage, const struct pipe_box *box)
972    /* Not *strictly* true, but the access to things that must only be in driver-
973     * thread are protected by !(usage & TC_TRANSFER_MAP_THREADED_UNSYNC):
974     */
975    in_dt
976 {
977    if (usage & TC_TRANSFER_MAP_NO_INVALIDATE) {
978       usage &= ~PIPE_MAP_DISCARD_WHOLE_RESOURCE;
979    }
980 
981    if (usage & TC_TRANSFER_MAP_THREADED_UNSYNC)
982       usage |= PIPE_MAP_UNSYNCHRONIZED;
983 
984    if (!(usage &
985          (TC_TRANSFER_MAP_NO_INFER_UNSYNCHRONIZED | PIPE_MAP_UNSYNCHRONIZED))) {
986       if (ctx->in_shadow && !(usage & PIPE_MAP_READ)) {
987          usage |= PIPE_MAP_UNSYNCHRONIZED;
988       } else if ((usage & PIPE_MAP_WRITE) && (rsc->b.b.target == PIPE_BUFFER) &&
989                  !valid_range(rsc, box)) {
990          /* We are trying to write to a previously uninitialized range. No need
991           * to synchronize.
992           */
993          usage |= PIPE_MAP_UNSYNCHRONIZED;
994       }
995    }
996 
997    return usage;
998 }
999 
1000 static void *
fd_resource_transfer_map(struct pipe_context * pctx,struct pipe_resource * prsc,unsigned level,unsigned usage,const struct pipe_box * box,struct pipe_transfer ** pptrans)1001 fd_resource_transfer_map(struct pipe_context *pctx, struct pipe_resource *prsc,
1002                          unsigned level, unsigned usage,
1003                          const struct pipe_box *box,
1004                          struct pipe_transfer **pptrans)
1005 {
1006    struct fd_context *ctx = fd_context(pctx);
1007    struct fd_resource *rsc = fd_resource(prsc);
1008    struct fd_transfer *trans;
1009    struct pipe_transfer *ptrans;
1010 
1011    DBG("prsc=%p, level=%u, usage=%x, box=%dx%d+%d,%d", prsc, level, usage,
1012        box->width, box->height, box->x, box->y);
1013 
1014    if ((usage & PIPE_MAP_DIRECTLY) && rsc->layout.tile_mode) {
1015       DBG("CANNOT MAP DIRECTLY!\n");
1016       return NULL;
1017    }
1018 
1019    if (usage & TC_TRANSFER_MAP_THREADED_UNSYNC) {
1020       ptrans = slab_zalloc(&ctx->transfer_pool_unsync);
1021    } else {
1022       ptrans = slab_zalloc(&ctx->transfer_pool);
1023    }
1024 
1025    if (!ptrans)
1026       return NULL;
1027 
1028    trans = fd_transfer(ptrans);
1029 
1030    usage = improve_transfer_map_usage(ctx, rsc, usage, box);
1031 
1032    pipe_resource_reference(&ptrans->resource, prsc);
1033    ptrans->level = level;
1034    ptrans->usage = usage;
1035    ptrans->box = *box;
1036    ptrans->stride = fd_resource_pitch(rsc, level);
1037    ptrans->layer_stride = fd_resource_layer_stride(rsc, level);
1038 
1039    void *ret;
1040    if (usage & PIPE_MAP_UNSYNCHRONIZED) {
1041       ret = resource_transfer_map_unsync(pctx, prsc, level, usage, box, trans);
1042    } else {
1043       ret = resource_transfer_map(pctx, prsc, level, usage, box, trans);
1044    }
1045 
1046    if (ret) {
1047       *pptrans = ptrans;
1048    } else {
1049       fd_resource_transfer_unmap(pctx, ptrans);
1050    }
1051 
1052    return ret;
1053 }
1054 
1055 static void
fd_resource_destroy(struct pipe_screen * pscreen,struct pipe_resource * prsc)1056 fd_resource_destroy(struct pipe_screen *pscreen, struct pipe_resource *prsc)
1057 {
1058    struct fd_screen *screen = fd_screen(prsc->screen);
1059    struct fd_resource *rsc = fd_resource(prsc);
1060 
1061    if (!rsc->is_replacement)
1062       fd_bc_invalidate_resource(rsc, true);
1063    if (rsc->bo)
1064       fd_bo_del(rsc->bo);
1065    if (rsc->lrz)
1066       fd_bo_del(rsc->lrz);
1067    if (rsc->scanout)
1068       renderonly_scanout_destroy(rsc->scanout, fd_screen(pscreen)->ro);
1069 
1070    if (prsc->target == PIPE_BUFFER)
1071       util_idalloc_mt_free(&screen->buffer_ids, rsc->b.buffer_id_unique);
1072 
1073    threaded_resource_deinit(prsc);
1074 
1075    util_range_destroy(&rsc->valid_buffer_range);
1076    simple_mtx_destroy(&rsc->lock);
1077    fd_resource_tracking_reference(&rsc->track, NULL);
1078 
1079    FREE(rsc);
1080 }
1081 
1082 static uint64_t
fd_resource_modifier(struct fd_resource * rsc)1083 fd_resource_modifier(struct fd_resource *rsc)
1084 {
1085    if (rsc->layout.ubwc_layer_size)
1086       return DRM_FORMAT_MOD_QCOM_COMPRESSED;
1087 
1088    switch (rsc->layout.tile_mode) {
1089    case 3: return DRM_FORMAT_MOD_QCOM_TILED3;
1090    case 2: return DRM_FORMAT_MOD_QCOM_TILED2;
1091    case 0: return DRM_FORMAT_MOD_LINEAR;
1092    default: return DRM_FORMAT_MOD_INVALID;
1093    }
1094 }
1095 
1096 static bool
fd_resource_get_handle(struct pipe_screen * pscreen,struct pipe_context * pctx,struct pipe_resource * prsc,struct winsys_handle * handle,unsigned usage)1097 fd_resource_get_handle(struct pipe_screen *pscreen, struct pipe_context *pctx,
1098                        struct pipe_resource *prsc, struct winsys_handle *handle,
1099                        unsigned usage)
1100    assert_dt
1101 {
1102    struct fd_resource *rsc = fd_resource(prsc);
1103 
1104    rsc->b.is_shared = true;
1105 
1106    if (prsc->target == PIPE_BUFFER)
1107       tc_buffer_disable_cpu_storage(&rsc->b.b);
1108 
1109    handle->modifier = fd_resource_modifier(rsc);
1110 
1111    if (prsc->target != PIPE_BUFFER) {
1112       struct fdl_metadata metadata = {
1113          .modifier = handle->modifier,
1114       };
1115       fd_bo_set_metadata(rsc->bo, &metadata, sizeof(metadata));
1116    }
1117 
1118    DBG("%" PRSC_FMT ", modifier=%" PRIx64, PRSC_ARGS(prsc), handle->modifier);
1119 
1120    bool ret = fd_screen_bo_get_handle(pscreen, rsc->bo, rsc->scanout,
1121                                       fd_resource_pitch(rsc, 0), handle);
1122 
1123    if (!ret && !(prsc->bind & PIPE_BIND_SHARED)) {
1124 
1125       pctx = threaded_context_unwrap_sync(pctx);
1126 
1127       struct fd_context *ctx = pctx ?
1128             fd_context(pctx) : fd_screen_aux_context_get(pscreen);
1129 
1130       /* Since gl is horrible, we can end up getting asked to export a handle
1131        * for a rsc which was not originally allocated in a way that can be
1132        * exported (for ex, sub-allocation or in the case of virtgpu we need
1133        * to tell the kernel at allocation time that the buffer can be shared)
1134        *
1135        * If we get into this scenario we can try to reallocate.
1136        */
1137 
1138       prsc->bind |= PIPE_BIND_SHARED;
1139 
1140       ret = fd_try_shadow_resource(ctx, rsc, 0, NULL, handle->modifier);
1141 
1142       if (!pctx)
1143          fd_screen_aux_context_put(pscreen);
1144 
1145       if (!ret)
1146          return false;
1147 
1148       return fd_resource_get_handle(pscreen, pctx, prsc, handle, usage);
1149    }
1150 
1151    return ret;
1152 }
1153 
1154 /* special case to resize query buf after allocated.. */
1155 void
fd_resource_resize(struct pipe_resource * prsc,uint32_t sz)1156 fd_resource_resize(struct pipe_resource *prsc, uint32_t sz)
1157 {
1158    struct fd_resource *rsc = fd_resource(prsc);
1159 
1160    assert(prsc->width0 == 0);
1161    assert(prsc->target == PIPE_BUFFER);
1162    assert(prsc->bind == PIPE_BIND_QUERY_BUFFER);
1163 
1164    prsc->width0 = sz;
1165    realloc_bo(rsc, fd_screen(prsc->screen)->setup_slices(rsc));
1166 }
1167 
1168 static void
fd_resource_layout_init(struct pipe_resource * prsc)1169 fd_resource_layout_init(struct pipe_resource *prsc)
1170 {
1171    struct fd_resource *rsc = fd_resource(prsc);
1172    struct fdl_layout *layout = &rsc->layout;
1173 
1174    layout->format = prsc->format;
1175 
1176    layout->width0 = prsc->width0;
1177    layout->height0 = prsc->height0;
1178    layout->depth0 = prsc->depth0;
1179 
1180    layout->cpp = util_format_get_blocksize(prsc->format);
1181    layout->cpp *= fd_resource_nr_samples(prsc);
1182    layout->cpp_shift = ffs(layout->cpp) - 1;
1183 }
1184 
1185 static struct fd_resource *
alloc_resource_struct(struct pipe_screen * pscreen,const struct pipe_resource * tmpl)1186 alloc_resource_struct(struct pipe_screen *pscreen,
1187                       const struct pipe_resource *tmpl)
1188 {
1189    struct fd_screen *screen = fd_screen(pscreen);
1190    struct fd_resource *rsc = CALLOC_STRUCT(fd_resource);
1191 
1192    if (!rsc)
1193       return NULL;
1194 
1195    struct pipe_resource *prsc = &rsc->b.b;
1196    *prsc = *tmpl;
1197 
1198    pipe_reference_init(&prsc->reference, 1);
1199    prsc->screen = pscreen;
1200    rsc->hash = _mesa_hash_pointer(rsc);
1201 
1202    util_range_init(&rsc->valid_buffer_range);
1203    simple_mtx_init(&rsc->lock, mtx_plain);
1204 
1205    rsc->track = CALLOC_STRUCT(fd_resource_tracking);
1206    if (!rsc->track) {
1207       free(rsc);
1208       return NULL;
1209    }
1210 
1211    pipe_reference_init(&rsc->track->reference, 1);
1212 
1213    bool allow_cpu_storage = (tmpl->target == PIPE_BUFFER) &&
1214                             (tmpl->width0 < 0x1000);
1215    threaded_resource_init(prsc, allow_cpu_storage);
1216 
1217    if (tmpl->target == PIPE_BUFFER)
1218       rsc->b.buffer_id_unique = util_idalloc_mt_alloc(&screen->buffer_ids);
1219 
1220    return rsc;
1221 }
1222 
1223 enum fd_layout_type {
1224    ERROR,
1225    LINEAR,
1226    TILED,
1227    UBWC,
1228 };
1229 
1230 static bool
has_implicit_modifier(const uint64_t * modifiers,int count)1231 has_implicit_modifier(const uint64_t *modifiers, int count)
1232 {
1233     return count == 0 ||
1234            drm_find_modifier(DRM_FORMAT_MOD_INVALID, modifiers, count);
1235 }
1236 
1237 static bool
has_explicit_modifier(const uint64_t * modifiers,int count)1238 has_explicit_modifier(const uint64_t *modifiers, int count)
1239 {
1240     for (int i = 0; i < count; i++) {
1241         if (modifiers[i] != DRM_FORMAT_MOD_INVALID)
1242             return true;
1243     }
1244     return false;
1245 }
1246 
1247 static enum fd_layout_type
get_best_layout(struct fd_screen * screen,const struct pipe_resource * tmpl,const uint64_t * modifiers,int count)1248 get_best_layout(struct fd_screen *screen,
1249                 const struct pipe_resource *tmpl, const uint64_t *modifiers,
1250                 int count)
1251 {
1252    const bool can_implicit = has_implicit_modifier(modifiers, count);
1253    const bool can_explicit = has_explicit_modifier(modifiers, count);
1254 
1255    /* First, find all the conditions which would force us to linear */
1256    if (!screen->tile_mode)
1257       return LINEAR;
1258 
1259    if (!screen->tile_mode(tmpl))
1260       return LINEAR;
1261 
1262    if (tmpl->target == PIPE_BUFFER)
1263       return LINEAR;
1264 
1265    if (tmpl->bind & PIPE_BIND_LINEAR) {
1266       if (tmpl->usage != PIPE_USAGE_STAGING)
1267          perf_debug("%" PRSC_FMT ": forcing linear: bind flags",
1268                     PRSC_ARGS(tmpl));
1269       return LINEAR;
1270    }
1271 
1272    if (FD_DBG(NOTILE))
1273        return LINEAR;
1274 
1275    /* Shared resources without explicit modifiers must always be linear */
1276    if (!can_explicit && (tmpl->bind & PIPE_BIND_SHARED)) {
1277       perf_debug("%" PRSC_FMT
1278                  ": forcing linear: shared resource + implicit modifiers",
1279                  PRSC_ARGS(tmpl));
1280       return LINEAR;
1281    }
1282 
1283    bool ubwc_ok = is_a6xx(screen);
1284    if (FD_DBG(NOUBWC))
1285       ubwc_ok = false;
1286 
1287    /* Disallow UBWC for front-buffer rendering.  The GPU does not atomically
1288     * write pixel and header data, nor does the display atomically read it.
1289     * The result can be visual corruption (ie. moreso than normal tearing).
1290     */
1291    if (tmpl->bind & PIPE_BIND_USE_FRONT_RENDERING)
1292       ubwc_ok = false;
1293 
1294    /* Disallow UBWC when asked not to use data dependent bandwidth compression:
1295     */
1296    if (tmpl->bind & PIPE_BIND_CONST_BW)
1297       ubwc_ok = false;
1298 
1299    if (ubwc_ok && !can_implicit &&
1300        !drm_find_modifier(DRM_FORMAT_MOD_QCOM_COMPRESSED, modifiers, count)) {
1301       perf_debug("%" PRSC_FMT
1302                  ": not using UBWC: not in acceptable modifier set",
1303                  PRSC_ARGS(tmpl));
1304       ubwc_ok = false;
1305    }
1306 
1307    if (ubwc_ok)
1308       return UBWC;
1309 
1310    if (can_implicit ||
1311        drm_find_modifier(DRM_FORMAT_MOD_QCOM_TILED3, modifiers, count))
1312       return TILED;
1313 
1314    if (!drm_find_modifier(DRM_FORMAT_MOD_LINEAR, modifiers, count)) {
1315       perf_debug("%" PRSC_FMT ": need linear but not in modifier set",
1316                  PRSC_ARGS(tmpl));
1317       return ERROR;
1318    }
1319 
1320    perf_debug("%" PRSC_FMT ": not using tiling: explicit modifiers and no UBWC",
1321               PRSC_ARGS(tmpl));
1322    return LINEAR;
1323 }
1324 
1325 /**
1326  * Helper that allocates a resource and resolves its layout (but doesn't
1327  * allocate its bo).
1328  *
1329  * It returns a pipe_resource (as fd_resource_create_with_modifiers()
1330  * would do), and also bo's minimum required size as an output argument.
1331  */
1332 static struct pipe_resource *
fd_resource_allocate_and_resolve(struct pipe_screen * pscreen,const struct pipe_resource * tmpl,const uint64_t * modifiers,int count,uint32_t * psize)1333 fd_resource_allocate_and_resolve(struct pipe_screen *pscreen,
1334                                  const struct pipe_resource *tmpl,
1335                                  const uint64_t *modifiers, int count,
1336                                  uint32_t *psize)
1337 {
1338    struct fd_screen *screen = fd_screen(pscreen);
1339    struct fd_resource *rsc;
1340    struct pipe_resource *prsc;
1341    enum pipe_format format = tmpl->format;
1342    uint32_t size;
1343 
1344    rsc = alloc_resource_struct(pscreen, tmpl);
1345    if (!rsc)
1346       return NULL;
1347 
1348    prsc = &rsc->b.b;
1349 
1350    /* Clover creates buffers with PIPE_FORMAT_NONE: */
1351    if ((prsc->target == PIPE_BUFFER) && (format == PIPE_FORMAT_NONE))
1352       format = prsc->format = PIPE_FORMAT_R8_UNORM;
1353 
1354    DBG("%" PRSC_FMT, PRSC_ARGS(prsc));
1355 
1356    if (tmpl->bind & PIPE_BIND_SHARED)
1357       rsc->b.is_shared = true;
1358 
1359    fd_resource_layout_init(prsc);
1360 
1361    enum fd_layout_type layout =
1362       get_best_layout(screen, tmpl, modifiers, count);
1363    if (layout == ERROR) {
1364       free(prsc);
1365       return NULL;
1366    }
1367 
1368    if (layout >= TILED)
1369       rsc->layout.tile_mode = screen->tile_mode(prsc);
1370    if (layout == UBWC)
1371       rsc->layout.ubwc = true;
1372 
1373    rsc->internal_format = format;
1374 
1375    if (prsc->target == PIPE_BUFFER) {
1376       assert(prsc->format == PIPE_FORMAT_R8_UNORM);
1377       size = prsc->width0;
1378       fdl_layout_buffer(&rsc->layout, size);
1379    } else {
1380       size = screen->setup_slices(rsc);
1381    }
1382 
1383    /* special case for hw-query buffer, which we need to allocate before we
1384     * know the size:
1385     */
1386    if (size == 0) {
1387       /* note, semi-intention == instead of & */
1388       assert(prsc->bind == PIPE_BIND_QUERY_BUFFER);
1389       *psize = 0;
1390       return prsc;
1391    }
1392 
1393    /* Set the layer size if the (non-a6xx) backend hasn't done so. */
1394    if (rsc->layout.layer_first && !rsc->layout.layer_size) {
1395       rsc->layout.layer_size = align(size, 4096);
1396       size = rsc->layout.layer_size * prsc->array_size;
1397    }
1398 
1399    if (FD_DBG(LAYOUT))
1400       fdl_dump_layout(&rsc->layout);
1401 
1402    /* Hand out the resolved size. */
1403    if (psize)
1404       *psize = size;
1405 
1406    return prsc;
1407 }
1408 
1409 /**
1410  * Create a new texture object, using the given template info.
1411  */
1412 static struct pipe_resource *
fd_resource_create_with_modifiers(struct pipe_screen * pscreen,const struct pipe_resource * tmpl,const uint64_t * modifiers,int count)1413 fd_resource_create_with_modifiers(struct pipe_screen *pscreen,
1414                                   const struct pipe_resource *tmpl,
1415                                   const uint64_t *modifiers, int count)
1416 {
1417    struct fd_screen *screen = fd_screen(pscreen);
1418    struct fd_resource *rsc;
1419    struct pipe_resource *prsc;
1420    uint32_t size;
1421 
1422    /* when using kmsro, scanout buffers are allocated on the display device
1423     * create_with_modifiers() doesn't give us usage flags, so we have to
1424     * assume that all calls with modifiers are scanout-possible
1425     */
1426    if (screen->ro &&
1427        ((tmpl->bind & PIPE_BIND_SCANOUT) ||
1428         has_explicit_modifier(modifiers, count))) {
1429       struct pipe_resource scanout_templat = *tmpl;
1430       struct renderonly_scanout *scanout;
1431       struct winsys_handle handle;
1432 
1433       /* note: alignment is wrong for a6xx */
1434       scanout_templat.width0 = align(tmpl->width0, screen->info->gmem_align_w);
1435 
1436       scanout =
1437          renderonly_scanout_for_resource(&scanout_templat, screen->ro, &handle);
1438       if (!scanout)
1439          return NULL;
1440 
1441       renderonly_scanout_destroy(scanout, screen->ro);
1442 
1443       assert(handle.type == WINSYS_HANDLE_TYPE_FD);
1444       rsc = fd_resource(pscreen->resource_from_handle(
1445          pscreen, tmpl, &handle, PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE));
1446       close(handle.handle);
1447       if (!rsc)
1448          return NULL;
1449 
1450       return &rsc->b.b;
1451    }
1452 
1453    prsc =
1454       fd_resource_allocate_and_resolve(pscreen, tmpl, modifiers, count, &size);
1455    if (!prsc)
1456       return NULL;
1457    rsc = fd_resource(prsc);
1458 
1459    realloc_bo(rsc, size);
1460    if (!rsc->bo)
1461       goto fail;
1462 
1463    return prsc;
1464 fail:
1465    fd_resource_destroy(pscreen, prsc);
1466    return NULL;
1467 }
1468 
1469 static struct pipe_resource *
fd_resource_create(struct pipe_screen * pscreen,const struct pipe_resource * tmpl)1470 fd_resource_create(struct pipe_screen *pscreen,
1471                    const struct pipe_resource *tmpl)
1472 {
1473    const uint64_t mod = DRM_FORMAT_MOD_INVALID;
1474    return fd_resource_create_with_modifiers(pscreen, tmpl, &mod, 1);
1475 }
1476 
1477 /**
1478  * Create a texture from a winsys_handle. The handle is often created in
1479  * another process by first creating a pipe texture and then calling
1480  * resource_get_handle.
1481  */
1482 static struct pipe_resource *
fd_resource_from_handle(struct pipe_screen * pscreen,const struct pipe_resource * tmpl,struct winsys_handle * handle,unsigned usage)1483 fd_resource_from_handle(struct pipe_screen *pscreen,
1484                         const struct pipe_resource *tmpl,
1485                         struct winsys_handle *handle, unsigned usage)
1486 {
1487    struct fd_screen *screen = fd_screen(pscreen);
1488    struct fd_resource *rsc = alloc_resource_struct(pscreen, tmpl);
1489 
1490    if (!rsc)
1491       return NULL;
1492 
1493    if (tmpl->target == PIPE_BUFFER)
1494       tc_buffer_disable_cpu_storage(&rsc->b.b);
1495 
1496    struct fdl_slice *slice = fd_resource_slice(rsc, 0);
1497    struct pipe_resource *prsc = &rsc->b.b;
1498 
1499    DBG("%" PRSC_FMT ", modifier=%" PRIx64, PRSC_ARGS(prsc), handle->modifier);
1500 
1501    rsc->b.is_shared = true;
1502 
1503    fd_resource_layout_init(prsc);
1504 
1505    struct fd_bo *bo = fd_screen_bo_from_handle(pscreen, handle);
1506    if (!bo)
1507       goto fail;
1508 
1509    fd_resource_set_bo(rsc, bo);
1510 
1511    rsc->internal_format = tmpl->format;
1512    rsc->layout.layer_first = true;
1513    rsc->layout.pitch0 = handle->stride;
1514    slice->offset = handle->offset;
1515    slice->size0 = handle->stride * prsc->height0;
1516 
1517    /* use a pitchalign of gmem_align_w pixels, because GMEM resolve for
1518     * lower alignments is not implemented (but possible for a6xx at least)
1519     *
1520     * for UBWC-enabled resources, layout_resource_for_modifier will further
1521     * validate the pitch and set the right pitchalign
1522     */
1523    rsc->layout.pitchalign =
1524       fdl_cpp_shift(&rsc->layout) + util_logbase2(screen->info->gmem_align_w);
1525 
1526    /* apply the minimum pitchalign (note: actually 4 for a3xx but doesn't
1527     * matter) */
1528    if (is_a6xx(screen) || is_a5xx(screen))
1529       rsc->layout.pitchalign = MAX2(rsc->layout.pitchalign, 6);
1530    else
1531       rsc->layout.pitchalign = MAX2(rsc->layout.pitchalign, 5);
1532 
1533    if (rsc->layout.pitch0 < (prsc->width0 * rsc->layout.cpp) ||
1534        fd_resource_pitch(rsc, 0) != rsc->layout.pitch0)
1535       goto fail;
1536 
1537    assert(rsc->layout.cpp);
1538 
1539    if (screen->layout_resource_for_modifier(rsc, handle->modifier) < 0)
1540       goto fail;
1541 
1542    if (screen->ro) {
1543       rsc->scanout =
1544          renderonly_create_gpu_import_for_resource(prsc, screen->ro, NULL);
1545       /* failure is expected in some cases.. */
1546    }
1547 
1548    rsc->valid = true;
1549 
1550    return prsc;
1551 
1552 fail:
1553    fd_resource_destroy(pscreen, prsc);
1554    return NULL;
1555 }
1556 
1557 bool
fd_render_condition_check(struct pipe_context * pctx)1558 fd_render_condition_check(struct pipe_context *pctx)
1559 {
1560    struct fd_context *ctx = fd_context(pctx);
1561 
1562    if (!ctx->cond_query)
1563       return true;
1564 
1565    perf_debug("Implementing conditional rendering using a CPU read instaed of HW conditional rendering.");
1566 
1567    union pipe_query_result res = {0};
1568    bool wait = ctx->cond_mode != PIPE_RENDER_COND_NO_WAIT &&
1569                ctx->cond_mode != PIPE_RENDER_COND_BY_REGION_NO_WAIT;
1570 
1571    if (pctx->get_query_result(pctx, ctx->cond_query, wait, &res))
1572       return (bool)res.u64 != ctx->cond_cond;
1573 
1574    return true;
1575 }
1576 
1577 static void
fd_invalidate_resource(struct pipe_context * pctx,struct pipe_resource * prsc)1578 fd_invalidate_resource(struct pipe_context *pctx,
1579                        struct pipe_resource *prsc) in_dt
1580 {
1581    struct fd_context *ctx = fd_context(pctx);
1582    struct fd_resource *rsc = fd_resource(prsc);
1583 
1584    if (prsc->target == PIPE_BUFFER) {
1585       /* Handle the glInvalidateBufferData() case:
1586        */
1587       invalidate_resource(rsc, PIPE_MAP_READ | PIPE_MAP_WRITE);
1588    } else if (rsc->track->write_batch) {
1589       /* Handle the glInvalidateFramebuffer() case, telling us that
1590        * we can skip resolve.
1591        */
1592 
1593       struct fd_batch *batch = rsc->track->write_batch;
1594       struct pipe_framebuffer_state *pfb = &batch->framebuffer;
1595 
1596       if (pfb->zsbuf && pfb->zsbuf->texture == prsc) {
1597          batch->resolve &= ~(FD_BUFFER_DEPTH | FD_BUFFER_STENCIL);
1598          fd_dirty_resource(ctx, prsc, FD_DIRTY_ZSA, true);
1599       }
1600 
1601       for (unsigned i = 0; i < pfb->nr_cbufs; i++) {
1602          if (pfb->cbufs[i] && pfb->cbufs[i]->texture == prsc) {
1603             batch->resolve &= ~(PIPE_CLEAR_COLOR0 << i);
1604             fd_dirty_resource(ctx, prsc, FD_DIRTY_FRAMEBUFFER, true);
1605          }
1606       }
1607    }
1608 
1609    rsc->valid = false;
1610 }
1611 
1612 static enum pipe_format
fd_resource_get_internal_format(struct pipe_resource * prsc)1613 fd_resource_get_internal_format(struct pipe_resource *prsc)
1614 {
1615    return fd_resource(prsc)->internal_format;
1616 }
1617 
1618 static void
fd_resource_set_stencil(struct pipe_resource * prsc,struct pipe_resource * stencil)1619 fd_resource_set_stencil(struct pipe_resource *prsc,
1620                         struct pipe_resource *stencil)
1621 {
1622    fd_resource(prsc)->stencil = fd_resource(stencil);
1623 }
1624 
1625 static struct pipe_resource *
fd_resource_get_stencil(struct pipe_resource * prsc)1626 fd_resource_get_stencil(struct pipe_resource *prsc)
1627 {
1628    struct fd_resource *rsc = fd_resource(prsc);
1629    if (rsc->stencil)
1630       return &rsc->stencil->b.b;
1631    return NULL;
1632 }
1633 
1634 static const struct u_transfer_vtbl transfer_vtbl = {
1635    .resource_create = fd_resource_create,
1636    .resource_destroy = fd_resource_destroy,
1637    .transfer_map = fd_resource_transfer_map,
1638    .transfer_flush_region = fd_resource_transfer_flush_region,
1639    .transfer_unmap = fd_resource_transfer_unmap,
1640    .get_internal_format = fd_resource_get_internal_format,
1641    .set_stencil = fd_resource_set_stencil,
1642    .get_stencil = fd_resource_get_stencil,
1643 };
1644 
1645 static int
fd_layout_resource_for_modifier(struct fd_resource * rsc,uint64_t modifier)1646 fd_layout_resource_for_modifier(struct fd_resource *rsc, uint64_t modifier)
1647 {
1648    switch (modifier) {
1649    case DRM_FORMAT_MOD_LINEAR:
1650       /* The dri gallium frontend will pass DRM_FORMAT_MOD_INVALID to us
1651        * when it's called through any of the non-modifier BO create entry
1652        * points.  Other drivers will determine tiling from the kernel or
1653        * other legacy backchannels, but for freedreno it just means
1654        * LINEAR. */
1655    case DRM_FORMAT_MOD_INVALID:
1656       return 0;
1657    default:
1658       return -1;
1659    }
1660 }
1661 
1662 static struct pipe_resource *
fd_resource_from_memobj(struct pipe_screen * pscreen,const struct pipe_resource * tmpl,struct pipe_memory_object * pmemobj,uint64_t offset)1663 fd_resource_from_memobj(struct pipe_screen *pscreen,
1664                         const struct pipe_resource *tmpl,
1665                         struct pipe_memory_object *pmemobj, uint64_t offset)
1666 {
1667    struct fd_screen *screen = fd_screen(pscreen);
1668    struct fd_memory_object *memobj = fd_memory_object(pmemobj);
1669    struct pipe_resource *prsc;
1670    struct fd_resource *rsc;
1671    struct fdl_metadata metadata;
1672    uint32_t size;
1673 
1674    assert(memobj->bo);
1675    assert(offset == 0);
1676 
1677    /* We shouldn't get a scanout buffer here. */
1678    assert(!(tmpl->bind & PIPE_BIND_SCANOUT));
1679 
1680    uint64_t modifiers = DRM_FORMAT_MOD_INVALID;
1681    if (pmemobj->dedicated &&
1682        !fd_bo_get_metadata(memobj->bo, &metadata, sizeof(metadata))) {
1683       modifiers = metadata.modifier;
1684    } else if (tmpl->bind & PIPE_BIND_LINEAR) {
1685       modifiers = DRM_FORMAT_MOD_LINEAR;
1686    } else if (is_a6xx(screen) && tmpl->width0 >= FDL_MIN_UBWC_WIDTH) {
1687       modifiers = DRM_FORMAT_MOD_QCOM_COMPRESSED;
1688    }
1689 
1690    /* Allocate new pipe resource. */
1691    prsc = fd_resource_allocate_and_resolve(pscreen, tmpl, &modifiers, 1, &size);
1692    if (!prsc)
1693       return NULL;
1694    rsc = fd_resource(prsc);
1695    rsc->b.is_shared = true;
1696 
1697    /* bo's size has to be large enough, otherwise cleanup resource and fail
1698     * gracefully.
1699     */
1700    if (fd_bo_size(memobj->bo) < size) {
1701       fd_resource_destroy(pscreen, prsc);
1702       return NULL;
1703    }
1704 
1705    /* Share the bo with the memory object. */
1706    fd_resource_set_bo(rsc, fd_bo_ref(memobj->bo));
1707 
1708    return prsc;
1709 }
1710 
1711 static struct pipe_memory_object *
fd_memobj_create_from_handle(struct pipe_screen * pscreen,struct winsys_handle * whandle,bool dedicated)1712 fd_memobj_create_from_handle(struct pipe_screen *pscreen,
1713                              struct winsys_handle *whandle, bool dedicated)
1714 {
1715    struct fd_memory_object *memobj = CALLOC_STRUCT(fd_memory_object);
1716    if (!memobj)
1717       return NULL;
1718 
1719    struct fd_bo *bo = fd_screen_bo_from_handle(pscreen, whandle);
1720    if (!bo) {
1721       free(memobj);
1722       return NULL;
1723    }
1724 
1725    memobj->b.dedicated = dedicated;
1726    memobj->bo = bo;
1727 
1728    return &memobj->b;
1729 }
1730 
1731 static void
fd_memobj_destroy(struct pipe_screen * pscreen,struct pipe_memory_object * pmemobj)1732 fd_memobj_destroy(struct pipe_screen *pscreen,
1733                   struct pipe_memory_object *pmemobj)
1734 {
1735    struct fd_memory_object *memobj = fd_memory_object(pmemobj);
1736 
1737    assert(memobj->bo);
1738    fd_bo_del(memobj->bo);
1739 
1740    free(pmemobj);
1741 }
1742 
1743 void
fd_resource_screen_init(struct pipe_screen * pscreen)1744 fd_resource_screen_init(struct pipe_screen *pscreen)
1745 {
1746    struct fd_screen *screen = fd_screen(pscreen);
1747 
1748    pscreen->resource_create = u_transfer_helper_resource_create;
1749    /* NOTE: u_transfer_helper does not yet support the _with_modifiers()
1750     * variant:
1751     */
1752    pscreen->resource_create_with_modifiers = fd_resource_create_with_modifiers;
1753    pscreen->resource_from_handle = fd_resource_from_handle;
1754    pscreen->resource_get_handle = fd_resource_get_handle;
1755    pscreen->resource_destroy = u_transfer_helper_resource_destroy;
1756 
1757    pscreen->transfer_helper =
1758       u_transfer_helper_create(&transfer_vtbl,
1759                                U_TRANSFER_HELPER_SEPARATE_Z32S8 |
1760                                U_TRANSFER_HELPER_MSAA_MAP);
1761 
1762    if (!screen->layout_resource_for_modifier)
1763       screen->layout_resource_for_modifier = fd_layout_resource_for_modifier;
1764 
1765    /* GL_EXT_memory_object */
1766    pscreen->memobj_create_from_handle = fd_memobj_create_from_handle;
1767    pscreen->memobj_destroy = fd_memobj_destroy;
1768    pscreen->resource_from_memobj = fd_resource_from_memobj;
1769 }
1770 
1771 static void
fd_blit_pipe(struct pipe_context * pctx,const struct pipe_blit_info * blit_info)1772 fd_blit_pipe(struct pipe_context *pctx,
1773              const struct pipe_blit_info *blit_info) in_dt
1774 {
1775    /* wrap fd_blit to return void */
1776    fd_blit(pctx, blit_info);
1777 }
1778 
1779 void
fd_resource_context_init(struct pipe_context * pctx)1780 fd_resource_context_init(struct pipe_context *pctx)
1781 {
1782    pctx->buffer_map = u_transfer_helper_transfer_map;
1783    pctx->texture_map = u_transfer_helper_transfer_map;
1784    pctx->transfer_flush_region = u_transfer_helper_transfer_flush_region;
1785    pctx->buffer_unmap = u_transfer_helper_transfer_unmap;
1786    pctx->texture_unmap = u_transfer_helper_transfer_unmap;
1787    pctx->buffer_subdata = u_default_buffer_subdata;
1788    pctx->texture_subdata = u_default_texture_subdata;
1789    pctx->create_surface = fd_create_surface;
1790    pctx->surface_destroy = fd_surface_destroy;
1791    pctx->resource_copy_region = fd_resource_copy_region;
1792    pctx->blit = fd_blit_pipe;
1793    pctx->flush_resource = fd_flush_resource;
1794    pctx->invalidate_resource = fd_invalidate_resource;
1795    pctx->get_sample_position = u_default_get_sample_position;
1796 }
1797