1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "draw/draw_context.h"
25
26 #include "util/u_math.h"
27 #include "util/u_memory.h"
28 #include "util/u_pack_color.h"
29
30 #include "r300_context.h"
31 #include "r300_fs.h"
32 #include "r300_screen.h"
33 #include "r300_shader_semantics.h"
34 #include "r300_state_inlines.h"
35 #include "r300_texture.h"
36 #include "r300_vs.h"
37
38 /* r300_state_derived: Various bits of state which are dependent upon
39 * currently bound CSO data. */
40
41 enum r300_rs_swizzle {
42 SWIZ_XYZW = 0,
43 SWIZ_X001,
44 SWIZ_XY01,
45 SWIZ_0001,
46 };
47
48 enum r300_rs_col_write_type {
49 WRITE_COLOR = 0,
50 WRITE_FACE
51 };
52
r300_draw_emit_attrib(struct r300_context * r300,enum attrib_emit emit,int index)53 static void r300_draw_emit_attrib(struct r300_context* r300,
54 enum attrib_emit emit,
55 int index)
56 {
57 struct r300_vertex_shader_code* vs = r300_vs(r300)->shader;
58 struct tgsi_shader_info* info = &vs->info;
59 int output;
60
61 output = draw_find_shader_output(r300->draw,
62 info->output_semantic_name[index],
63 info->output_semantic_index[index]);
64 draw_emit_vertex_attr(&r300->vertex_info, emit, output);
65 }
66
r300_draw_emit_all_attribs(struct r300_context * r300)67 static void r300_draw_emit_all_attribs(struct r300_context* r300)
68 {
69 struct r300_vertex_shader_code* vs = r300_vs(r300)->shader;
70 struct r300_shader_semantics* vs_outputs = &vs->outputs;
71 int i, gen_count;
72
73 /* Position. */
74 if (vs_outputs->pos != ATTR_UNUSED) {
75 r300_draw_emit_attrib(r300, EMIT_4F, vs_outputs->pos);
76 } else {
77 assert(0);
78 }
79
80 /* Point size. */
81 if (vs_outputs->psize != ATTR_UNUSED) {
82 r300_draw_emit_attrib(r300, EMIT_1F_PSIZE, vs_outputs->psize);
83 }
84
85 /* Colors. */
86 for (i = 0; i < ATTR_COLOR_COUNT; i++) {
87 if (vs_outputs->color[i] != ATTR_UNUSED) {
88 r300_draw_emit_attrib(r300, EMIT_4F, vs_outputs->color[i]);
89 }
90 }
91
92 /* Back-face colors. */
93 for (i = 0; i < ATTR_COLOR_COUNT; i++) {
94 if (vs_outputs->bcolor[i] != ATTR_UNUSED) {
95 r300_draw_emit_attrib(r300, EMIT_4F, vs_outputs->bcolor[i]);
96 }
97 }
98
99 /* Texture coordinates. */
100 /* Only 8 generic vertex attributes can be used. If there are more,
101 * they won't be rasterized. */
102 gen_count = 0;
103 for (i = 0; i < ATTR_GENERIC_COUNT && gen_count < 8; i++) {
104 if (vs_outputs->generic[i] != ATTR_UNUSED &&
105 (!(r300->sprite_coord_enable & (1U << i)) || !r300->is_point)) {
106 r300_draw_emit_attrib(r300, EMIT_4F, vs_outputs->generic[i]);
107 gen_count++;
108 }
109 }
110
111 /* Texcoords */
112 for (i = 0; i < ATTR_TEXCOORD_COUNT && gen_count < 8; i++) {
113 if (vs_outputs->texcoord[i] != ATTR_UNUSED &&
114 (!(r300->sprite_coord_enable & (1U << i)) || !r300->is_point)) {
115 r300_draw_emit_attrib(r300, EMIT_4F, vs_outputs->texcoord[i]);
116 gen_count++;
117 }
118 }
119
120 /* Fog coordinates. */
121 if (gen_count < 8 && vs_outputs->fog != ATTR_UNUSED) {
122 r300_draw_emit_attrib(r300, EMIT_4F, vs_outputs->fog);
123 gen_count++;
124 }
125
126 /* WPOS. */
127 if (r300_fs(r300)->shader->inputs.wpos != ATTR_UNUSED && gen_count < 8) {
128 DBG(r300, DBG_SWTCL, "draw_emit_attrib: WPOS, index: %i\n",
129 vs_outputs->wpos);
130 r300_draw_emit_attrib(r300, EMIT_4F, vs_outputs->wpos);
131 }
132 }
133
134 /* Update the PSC tables for SW TCL, using Draw. */
r300_swtcl_vertex_psc(struct r300_context * r300)135 static void r300_swtcl_vertex_psc(struct r300_context *r300)
136 {
137 struct r300_vertex_stream_state *vstream = r300->vertex_stream_state.state;
138 struct vertex_info *vinfo = &r300->vertex_info;
139 uint16_t type, swizzle;
140 enum pipe_format format;
141 unsigned i, attrib_count;
142 int* vs_output_tab = r300->stream_loc_notcl;
143
144 memset(vstream, 0, sizeof(struct r300_vertex_stream_state));
145
146 /* For each Draw attribute, route it to the fragment shader according
147 * to the vs_output_tab. */
148 attrib_count = vinfo->num_attribs;
149 DBG(r300, DBG_SWTCL, "r300: attrib count: %d\n", attrib_count);
150 for (i = 0; i < attrib_count; i++) {
151 if (vs_output_tab[i] == -1) {
152 assert(0);
153 abort();
154 }
155
156 format = draw_translate_vinfo_format(vinfo->attrib[i].emit);
157
158 DBG(r300, DBG_SWTCL,
159 "r300: swtcl_vertex_psc [%i] <- %s\n",
160 vs_output_tab[i], util_format_short_name(format));
161
162 /* Obtain the type of data in this attribute. */
163 type = r300_translate_vertex_data_type(format);
164 if (type == R300_INVALID_FORMAT) {
165 fprintf(stderr, "r300: Bad vertex format %s.\n",
166 util_format_short_name(format));
167 assert(0);
168 abort();
169 }
170
171 type |= vs_output_tab[i] << R300_DST_VEC_LOC_SHIFT;
172
173 /* Obtain the swizzle for this attribute. Note that the default
174 * swizzle in the hardware is not XYZW! */
175 swizzle = r300_translate_vertex_data_swizzle(format);
176
177 /* Add the attribute to the PSC table. */
178 if (i & 1) {
179 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16;
180 vstream->vap_prog_stream_cntl_ext[i >> 1] |= (uint32_t)swizzle << 16;
181 } else {
182 vstream->vap_prog_stream_cntl[i >> 1] |= type;
183 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
184 }
185 }
186
187 /* Set the last vector in the PSC. */
188 if (i) {
189 i -= 1;
190 }
191 vstream->vap_prog_stream_cntl[i >> 1] |=
192 (R300_LAST_VEC << (i & 1 ? 16 : 0));
193
194 vstream->count = (i >> 1) + 1;
195 r300_mark_atom_dirty(r300, &r300->vertex_stream_state);
196 r300->vertex_stream_state.size = (1 + vstream->count) * 2;
197 }
198
r300_rs_col(struct r300_rs_block * rs,int id,int ptr,enum r300_rs_swizzle swiz)199 static void r300_rs_col(struct r300_rs_block* rs, int id, int ptr,
200 enum r300_rs_swizzle swiz)
201 {
202 rs->ip[id] |= R300_RS_COL_PTR(ptr);
203 if (swiz == SWIZ_0001) {
204 rs->ip[id] |= R300_RS_COL_FMT(R300_RS_COL_FMT_0001);
205 } else {
206 rs->ip[id] |= R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA);
207 }
208 rs->inst[id] |= R300_RS_INST_COL_ID(id);
209 }
210
r300_rs_col_write(struct r300_rs_block * rs,int id,int fp_offset,enum r300_rs_col_write_type type)211 static void r300_rs_col_write(struct r300_rs_block* rs, int id, int fp_offset,
212 enum r300_rs_col_write_type type)
213 {
214 assert(type == WRITE_COLOR);
215 rs->inst[id] |= R300_RS_INST_COL_CN_WRITE |
216 R300_RS_INST_COL_ADDR(fp_offset);
217 }
218
r300_rs_tex(struct r300_rs_block * rs,int id,int ptr,enum r300_rs_swizzle swiz)219 static void r300_rs_tex(struct r300_rs_block* rs, int id, int ptr,
220 enum r300_rs_swizzle swiz)
221 {
222 if (swiz == SWIZ_X001) {
223 rs->ip[id] |= R300_RS_TEX_PTR(ptr) |
224 R300_RS_SEL_S(R300_RS_SEL_C0) |
225 R300_RS_SEL_T(R300_RS_SEL_K0) |
226 R300_RS_SEL_R(R300_RS_SEL_K0) |
227 R300_RS_SEL_Q(R300_RS_SEL_K1);
228 } else if (swiz == SWIZ_XY01) {
229 rs->ip[id] |= R300_RS_TEX_PTR(ptr) |
230 R300_RS_SEL_S(R300_RS_SEL_C0) |
231 R300_RS_SEL_T(R300_RS_SEL_C1) |
232 R300_RS_SEL_R(R300_RS_SEL_K0) |
233 R300_RS_SEL_Q(R300_RS_SEL_K1);
234 } else {
235 rs->ip[id] |= R300_RS_TEX_PTR(ptr) |
236 R300_RS_SEL_S(R300_RS_SEL_C0) |
237 R300_RS_SEL_T(R300_RS_SEL_C1) |
238 R300_RS_SEL_R(R300_RS_SEL_C2) |
239 R300_RS_SEL_Q(R300_RS_SEL_C3);
240 }
241 rs->inst[id] |= R300_RS_INST_TEX_ID(id);
242 }
243
r300_rs_tex_write(struct r300_rs_block * rs,int id,int fp_offset)244 static void r300_rs_tex_write(struct r300_rs_block* rs, int id, int fp_offset)
245 {
246 rs->inst[id] |= R300_RS_INST_TEX_CN_WRITE |
247 R300_RS_INST_TEX_ADDR(fp_offset);
248 }
249
r500_rs_col(struct r300_rs_block * rs,int id,int ptr,enum r300_rs_swizzle swiz)250 static void r500_rs_col(struct r300_rs_block* rs, int id, int ptr,
251 enum r300_rs_swizzle swiz)
252 {
253 rs->ip[id] |= R500_RS_COL_PTR(ptr);
254 if (swiz == SWIZ_0001) {
255 rs->ip[id] |= R500_RS_COL_FMT(R300_RS_COL_FMT_0001);
256 } else {
257 rs->ip[id] |= R500_RS_COL_FMT(R300_RS_COL_FMT_RGBA);
258 }
259 rs->inst[id] |= R500_RS_INST_COL_ID(id);
260 }
261
r500_rs_col_write(struct r300_rs_block * rs,int id,int fp_offset,enum r300_rs_col_write_type type)262 static void r500_rs_col_write(struct r300_rs_block* rs, int id, int fp_offset,
263 enum r300_rs_col_write_type type)
264 {
265 if (type == WRITE_FACE)
266 rs->inst[id] |= R500_RS_INST_COL_CN_WRITE_BACKFACE |
267 R500_RS_INST_COL_ADDR(fp_offset);
268 else
269 rs->inst[id] |= R500_RS_INST_COL_CN_WRITE |
270 R500_RS_INST_COL_ADDR(fp_offset);
271
272 }
273
r500_rs_tex(struct r300_rs_block * rs,int id,int ptr,enum r300_rs_swizzle swiz)274 static void r500_rs_tex(struct r300_rs_block* rs, int id, int ptr,
275 enum r300_rs_swizzle swiz)
276 {
277 if (swiz == SWIZ_X001) {
278 rs->ip[id] |= R500_RS_SEL_S(ptr) |
279 R500_RS_SEL_T(R500_RS_IP_PTR_K0) |
280 R500_RS_SEL_R(R500_RS_IP_PTR_K0) |
281 R500_RS_SEL_Q(R500_RS_IP_PTR_K1);
282 } else if (swiz == SWIZ_XY01) {
283 rs->ip[id] |= R500_RS_SEL_S(ptr) |
284 R500_RS_SEL_T(ptr + 1) |
285 R500_RS_SEL_R(R500_RS_IP_PTR_K0) |
286 R500_RS_SEL_Q(R500_RS_IP_PTR_K1);
287 } else {
288 rs->ip[id] |= R500_RS_SEL_S(ptr) |
289 R500_RS_SEL_T(ptr + 1) |
290 R500_RS_SEL_R(ptr + 2) |
291 R500_RS_SEL_Q(ptr + 3);
292 }
293 rs->inst[id] |= R500_RS_INST_TEX_ID(id);
294 }
295
r500_rs_tex_write(struct r300_rs_block * rs,int id,int fp_offset)296 static void r500_rs_tex_write(struct r300_rs_block* rs, int id, int fp_offset)
297 {
298 rs->inst[id] |= R500_RS_INST_TEX_CN_WRITE |
299 R500_RS_INST_TEX_ADDR(fp_offset);
300 }
301
302 /* Set up the RS block.
303 *
304 * This is the part of the chipset that is responsible for linking vertex
305 * and fragment shaders and stuffed texture coordinates.
306 *
307 * The rasterizer reads data from VAP, which produces vertex shader outputs,
308 * and GA, which produces stuffed texture coordinates. VAP outputs have
309 * precedence over GA. All outputs must be rasterized otherwise it locks up.
310 * If there are more outputs rasterized than is set in VAP/GA, it locks up
311 * too. The funky part is that this info has been pretty much obtained by trial
312 * and error. */
r300_update_rs_block(struct r300_context * r300)313 static void r300_update_rs_block(struct r300_context *r300)
314 {
315 struct r300_vertex_shader_code *vs = r300_vs(r300)->shader;
316 struct r300_shader_semantics *vs_outputs = &vs->outputs;
317 struct r300_shader_semantics *fs_inputs = &r300_fs(r300)->shader->inputs;
318 struct r300_rs_block rs = {0};
319 int i, col_count = 0, tex_count = 0, fp_offset = 0, count, loc = 0, tex_ptr = 0;
320 int gen_offset = 0;
321 void (*rX00_rs_col)(struct r300_rs_block*, int, int, enum r300_rs_swizzle);
322 void (*rX00_rs_col_write)(struct r300_rs_block*, int, int, enum r300_rs_col_write_type);
323 void (*rX00_rs_tex)(struct r300_rs_block*, int, int, enum r300_rs_swizzle);
324 void (*rX00_rs_tex_write)(struct r300_rs_block*, int, int);
325 bool any_bcolor_used = vs_outputs->bcolor[0] != ATTR_UNUSED ||
326 vs_outputs->bcolor[1] != ATTR_UNUSED;
327 int *stream_loc_notcl = r300->stream_loc_notcl;
328 uint32_t stuffing_enable = 0;
329
330 if (r300->screen->caps.is_r500) {
331 rX00_rs_col = r500_rs_col;
332 rX00_rs_col_write = r500_rs_col_write;
333 rX00_rs_tex = r500_rs_tex;
334 rX00_rs_tex_write = r500_rs_tex_write;
335 } else {
336 rX00_rs_col = r300_rs_col;
337 rX00_rs_col_write = r300_rs_col_write;
338 rX00_rs_tex = r300_rs_tex;
339 rX00_rs_tex_write = r300_rs_tex_write;
340 }
341
342 /* 0x5555 copied from classic, which means:
343 * Select user color 0 for COLOR0 up to COLOR7.
344 * What the hell does that mean? */
345 rs.vap_vtx_state_cntl = 0x5555;
346
347 /* The position is always present in VAP. */
348 rs.vap_vsm_vtx_assm |= R300_INPUT_CNTL_POS;
349 rs.vap_out_vtx_fmt[0] |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT;
350 stream_loc_notcl[loc++] = 0;
351
352 /* Set up the point size in VAP. */
353 if (vs_outputs->psize != ATTR_UNUSED) {
354 rs.vap_out_vtx_fmt[0] |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT;
355 stream_loc_notcl[loc++] = 1;
356 }
357
358 /* Set up and rasterize colors. */
359 for (i = 0; i < ATTR_COLOR_COUNT; i++) {
360 if (vs_outputs->color[i] != ATTR_UNUSED || any_bcolor_used ||
361 vs_outputs->color[1] != ATTR_UNUSED) {
362 /* Set up the color in VAP. */
363 rs.vap_vsm_vtx_assm |= R300_INPUT_CNTL_COLOR;
364 rs.vap_out_vtx_fmt[0] |=
365 R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << i;
366 stream_loc_notcl[loc++] = 2 + i;
367
368 /* Rasterize it. */
369 rX00_rs_col(&rs, col_count, col_count, SWIZ_XYZW);
370
371 /* Write it to the FS input register if it's needed by the FS. */
372 if (fs_inputs->color[i] != ATTR_UNUSED) {
373 rX00_rs_col_write(&rs, col_count, fp_offset, WRITE_COLOR);
374 fp_offset++;
375
376 DBG(r300, DBG_RS,
377 "r300: Rasterized color %i written to FS.\n", i);
378 } else {
379 DBG(r300, DBG_RS, "r300: Rasterized color %i unused.\n", i);
380 }
381 col_count++;
382 } else {
383 /* Skip the FS input register, leave it uninitialized. */
384 /* If we try to set it to (0,0,0,1), it will lock up. */
385 if (fs_inputs->color[i] != ATTR_UNUSED) {
386 fp_offset++;
387
388 DBG(r300, DBG_RS, "r300: FS input color %i unassigned.\n",
389 i);
390 }
391 }
392 }
393
394 /* Set up back-face colors. The rasterizer will do the color selection
395 * automatically. */
396 if (any_bcolor_used) {
397 if (r300->two_sided_color) {
398 /* Rasterize as back-face colors. */
399 for (i = 0; i < ATTR_COLOR_COUNT; i++) {
400 rs.vap_vsm_vtx_assm |= R300_INPUT_CNTL_COLOR;
401 rs.vap_out_vtx_fmt[0] |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << (2+i);
402 stream_loc_notcl[loc++] = 4 + i;
403 }
404 } else {
405 /* Rasterize two fake texcoords to prevent from the two-sided color
406 * selection. */
407 /* XXX Consider recompiling the vertex shader to save 2 RS units. */
408 for (i = 0; i < 2; i++) {
409 rs.vap_vsm_vtx_assm |= (R300_INPUT_CNTL_TC0 << tex_count);
410 rs.vap_out_vtx_fmt[1] |= (4 << (3 * tex_count));
411 stream_loc_notcl[loc++] = 6 + tex_count;
412
413 /* Rasterize it. */
414 rX00_rs_tex(&rs, tex_count, tex_ptr, SWIZ_XYZW);
415 tex_count++;
416 tex_ptr += 4;
417 }
418 }
419 }
420
421 /* gl_FrontFacing.
422 * Note that we can use either the two-sided color selection based on
423 * the front and back vertex shader colors, or gl_FrontFacing,
424 * but not both! It locks up otherwise.
425 *
426 * In Direct3D 9, the two-sided color selection can be used
427 * with shaders 2.0 only, while gl_FrontFacing can be used
428 * with shaders 3.0 only. The hardware apparently hasn't been designed
429 * to support both at the same time. */
430 if (r300->screen->caps.is_r500 && fs_inputs->face != ATTR_UNUSED &&
431 !(any_bcolor_used && r300->two_sided_color)) {
432 rX00_rs_col(&rs, col_count, col_count, SWIZ_XYZW);
433 rX00_rs_col_write(&rs, col_count, fp_offset, WRITE_FACE);
434 fp_offset++;
435 col_count++;
436 DBG(r300, DBG_RS, "r300: Rasterized FACE written to FS.\n");
437 } else if (fs_inputs->face != ATTR_UNUSED) {
438 fprintf(stderr, "r300: ERROR: FS input FACE unassigned.\n");
439 }
440
441 /* Re-use color varyings for generics if possible.
442 *
443 * The colors are interpolated as 20-bit floats (reduced precision),
444 * Use this hack only if there are too many generic varyings.
445 * (number of generics + texcoords + fog + wpos + pcoord > 8) */
446 if (r300->screen->caps.is_r500 && !any_bcolor_used && !r300->flatshade &&
447 fs_inputs->face == ATTR_UNUSED &&
448 vs_outputs->num_texcoord + vs_outputs->num_generic +
449 (vs_outputs->fog != ATTR_UNUSED) + (fs_inputs->wpos != ATTR_UNUSED) +
450 (vs_outputs->pcoord != ATTR_UNUSED) > 8 &&
451 fs_inputs->num_generic > fs_inputs->num_texcoord) {
452 for (i = 0; i < ATTR_GENERIC_COUNT && col_count < 2; i++) {
453 /* Cannot use color varyings for sprite coords. */
454 if (fs_inputs->generic[i] != ATTR_UNUSED &&
455 (r300->sprite_coord_enable & (1U << i)) && r300->is_point) {
456 break;
457 }
458
459 if (vs_outputs->generic[i] != ATTR_UNUSED) {
460 /* Set up the color in VAP. */
461 rs.vap_vsm_vtx_assm |= R300_INPUT_CNTL_COLOR;
462 rs.vap_out_vtx_fmt[0] |=
463 R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << col_count;
464 stream_loc_notcl[loc++] = 2 + col_count;
465
466 /* Rasterize it. */
467 rX00_rs_col(&rs, col_count, col_count, SWIZ_XYZW);
468
469 /* Write it to the FS input register if it's needed by the FS. */
470 if (fs_inputs->generic[i] != ATTR_UNUSED) {
471 rX00_rs_col_write(&rs, col_count, fp_offset, WRITE_COLOR);
472 fp_offset++;
473
474 DBG(r300, DBG_RS,
475 "r300: Rasterized generic %i redirected to color %i and written to FS.\n",
476 i, col_count);
477 } else {
478 DBG(r300, DBG_RS, "r300: Rasterized generic %i redirected to color %i unused.\n",
479 i, col_count);
480 }
481 col_count++;
482 } else {
483 /* Skip the FS input register, leave it uninitialized. */
484 /* If we try to set it to (0,0,0,1), it will lock up. */
485 if (fs_inputs->generic[i] != ATTR_UNUSED) {
486 fp_offset++;
487
488 DBG(r300, DBG_RS, "r300: FS input generic %i unassigned.\n", i);
489 }
490 }
491 }
492 gen_offset = i;
493 }
494
495 /* Rasterize generics. */
496 for (i = gen_offset; i < ATTR_GENERIC_COUNT && tex_count < 8; i++) {
497 bool sprite_coord = false;
498
499 if (fs_inputs->generic[i] != ATTR_UNUSED) {
500 sprite_coord = !!(r300->sprite_coord_enable & (1 << i)) && r300->is_point;
501 }
502
503 if (vs_outputs->generic[i] != ATTR_UNUSED || sprite_coord) {
504 if (!sprite_coord) {
505 /* Set up the texture coordinates in VAP. */
506 rs.vap_vsm_vtx_assm |= (R300_INPUT_CNTL_TC0 << tex_count);
507 rs.vap_out_vtx_fmt[1] |= (4 << (3 * tex_count));
508 stream_loc_notcl[loc++] = 6 + tex_count;
509 } else
510 stuffing_enable |=
511 R300_GB_TEX_ST << (R300_GB_TEX0_SOURCE_SHIFT + (tex_count*2));
512
513 /* Rasterize it. */
514 rX00_rs_tex(&rs, tex_count, tex_ptr,
515 sprite_coord ? SWIZ_XY01 : SWIZ_XYZW);
516
517 /* Write it to the FS input register if it's needed by the FS. */
518 if (fs_inputs->generic[i] != ATTR_UNUSED) {
519 rX00_rs_tex_write(&rs, tex_count, fp_offset);
520 fp_offset++;
521
522 DBG(r300, DBG_RS,
523 "r300: Rasterized generic %i written to FS%s in texcoord %d.\n",
524 i, sprite_coord ? " (sprite coord)" : "", tex_count);
525 } else {
526 DBG(r300, DBG_RS,
527 "r300: Rasterized generic %i unused%s.\n",
528 i, sprite_coord ? " (sprite coord)" : "");
529 }
530 tex_count++;
531 tex_ptr += sprite_coord ? 2 : 4;
532 } else {
533 /* Skip the FS input register, leave it uninitialized. */
534 /* If we try to set it to (0,0,0,1), it will lock up. */
535 if (fs_inputs->generic[i] != ATTR_UNUSED) {
536 fp_offset++;
537
538 DBG(r300, DBG_RS, "r300: FS input generic %i unassigned%s.\n",
539 i, sprite_coord ? " (sprite coord)" : "");
540 }
541 }
542 }
543
544 for (; i < ATTR_GENERIC_COUNT; i++) {
545 if (fs_inputs->generic[i] != ATTR_UNUSED) {
546 fprintf(stderr, "r300: ERROR: FS input generic %i unassigned, "
547 "not enough hardware slots (it's not a bug, do not "
548 "report it).\n", i);
549 }
550 }
551
552 gen_offset = 0;
553 /* Re-use color varyings for texcoords if possible.
554 *
555 * The colors are interpolated as 20-bit floats (reduced precision),
556 * Use this hack only if there are too many generic varyings.
557 * (number of generics + texcoords + fog + wpos + pcoord > 8) */
558 if (r300->screen->caps.is_r500 && !any_bcolor_used && !r300->flatshade &&
559 fs_inputs->face == ATTR_UNUSED &&
560 vs_outputs->num_texcoord + vs_outputs->num_generic +
561 (vs_outputs->fog != ATTR_UNUSED) + (fs_inputs->wpos != ATTR_UNUSED) +
562 (vs_outputs->pcoord != ATTR_UNUSED) > 8 &&
563 fs_inputs->num_generic <= fs_inputs->num_texcoord) {
564 for (i = 0; i < ATTR_TEXCOORD_COUNT && col_count < 2; i++) {
565 /* Cannot use color varyings for sprite coords. */
566 if (fs_inputs->texcoord[i] != ATTR_UNUSED &&
567 (r300->sprite_coord_enable & (1U << i)) && r300->is_point) {
568 break;
569 }
570
571 if (vs_outputs->texcoord[i] != ATTR_UNUSED) {
572 /* Set up the color in VAP. */
573 rs.vap_vsm_vtx_assm |= R300_INPUT_CNTL_COLOR;
574 rs.vap_out_vtx_fmt[0] |=
575 R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << col_count;
576 stream_loc_notcl[loc++] = 2 + col_count;
577
578 /* Rasterize it. */
579 rX00_rs_col(&rs, col_count, col_count, SWIZ_XYZW);
580
581 /* Write it to the FS input register if it's needed by the FS. */
582 if (fs_inputs->texcoord[i] != ATTR_UNUSED) {
583 rX00_rs_col_write(&rs, col_count, fp_offset, WRITE_COLOR);
584 fp_offset++;
585
586 DBG(r300, DBG_RS,
587 "r300: Rasterized texcoord %i redirected to color %i and written to FS.\n",
588 i, col_count);
589 } else {
590 DBG(r300, DBG_RS, "r300: Rasterized texcoord %i redirected to color %i unused.\n",
591 i, col_count);
592 }
593 col_count++;
594 } else {
595 /* Skip the FS input register, leave it uninitialized. */
596 /* If we try to set it to (0,0,0,1), it will lock up. */
597 if (fs_inputs->texcoord[i] != ATTR_UNUSED) {
598 fp_offset++;
599
600 DBG(r300, DBG_RS, "r300: FS input texcoord %i unassigned.\n", i);
601 }
602 }
603 }
604 gen_offset = i;
605 }
606
607 /* Rasterize texcords. */
608 for (i = gen_offset; i < ATTR_TEXCOORD_COUNT && tex_count < 8; i++) {
609 bool sprite_coord = false;
610
611 if (fs_inputs->texcoord[i] != ATTR_UNUSED) {
612 sprite_coord = !!(r300->sprite_coord_enable & (1 << i)) && r300->is_point;
613 }
614
615 if (vs_outputs->texcoord[i] != ATTR_UNUSED || sprite_coord) {
616 if (!sprite_coord) {
617 /* Set up the texture coordinates in VAP. */
618 rs.vap_vsm_vtx_assm |= (R300_INPUT_CNTL_TC0 << tex_count);
619 rs.vap_out_vtx_fmt[1] |= (4 << (3 * tex_count));
620 stream_loc_notcl[loc++] = 6 + tex_count;
621 } else
622 stuffing_enable |=
623 R300_GB_TEX_ST << (R300_GB_TEX0_SOURCE_SHIFT + (tex_count*2));
624
625 /* Rasterize it. */
626 rX00_rs_tex(&rs, tex_count, tex_ptr,
627 sprite_coord ? SWIZ_XY01 : SWIZ_XYZW);
628
629 /* Write it to the FS input register if it's needed by the FS. */
630 if (fs_inputs->texcoord[i] != ATTR_UNUSED) {
631 rX00_rs_tex_write(&rs, tex_count, fp_offset);
632 fp_offset++;
633
634 DBG(r300, DBG_RS,
635 "r300: Rasterized texcoord %i written to FS%s in texcoord %d.\n",
636 i, sprite_coord ? " (sprite coord)" : "", tex_count);
637 } else {
638 DBG(r300, DBG_RS,
639 "r300: Rasterized texcoord %i unused%s.\n",
640 i, sprite_coord ? " (sprite coord)" : "");
641 }
642 tex_count++;
643 tex_ptr += sprite_coord ? 2 : 4;
644 } else {
645 /* Skip the FS input register, leave it uninitialized. */
646 /* If we try to set it to (0,0,0,1), it will lock up. */
647 if (fs_inputs->texcoord[i] != ATTR_UNUSED) {
648 fp_offset++;
649
650 DBG(r300, DBG_RS, "r300: FS input texcoord %i unassigned%s.\n",
651 i, sprite_coord ? " (sprite coord)" : "");
652 }
653 }
654 }
655
656 for (; i < ATTR_TEXCOORD_COUNT; i++) {
657 if (fs_inputs->texcoord[i] != ATTR_UNUSED) {
658 fprintf(stderr, "r300: ERROR: FS input texcoord %i unassigned, "
659 "not enough hardware slots (it's not a bug, do not "
660 "report it).\n", i);
661 }
662 }
663
664 /* Rasterize pointcoord. */
665 if (fs_inputs->pcoord != ATTR_UNUSED && tex_count < 8) {
666
667 stuffing_enable |=
668 R300_GB_TEX_ST << (R300_GB_TEX0_SOURCE_SHIFT + (tex_count*2));
669
670 /* Rasterize it. */
671 rX00_rs_tex(&rs, tex_count, tex_ptr, SWIZ_XY01);
672
673 /* Write it to the FS input register if it's needed by the FS. */
674 rX00_rs_tex_write(&rs, tex_count, fp_offset);
675 fp_offset++;
676
677 DBG(r300, DBG_RS,
678 "r300: Rasterized pointcoord %i written to FS%s in texcoord %d.\n",
679 i, " (sprite coord)", tex_count);
680
681 tex_count++;
682 tex_ptr += 2;
683 }
684
685 /* Rasterize fog coordinates. */
686 if (vs_outputs->fog != ATTR_UNUSED && tex_count < 8) {
687 /* Set up the fog coordinates in VAP. */
688 rs.vap_vsm_vtx_assm |= (R300_INPUT_CNTL_TC0 << tex_count);
689 rs.vap_out_vtx_fmt[1] |= (4 << (3 * tex_count));
690 stream_loc_notcl[loc++] = 6 + tex_count;
691
692 /* Rasterize it. */
693 rX00_rs_tex(&rs, tex_count, tex_ptr, SWIZ_X001);
694
695 /* Write it to the FS input register if it's needed by the FS. */
696 if (fs_inputs->fog != ATTR_UNUSED) {
697 rX00_rs_tex_write(&rs, tex_count, fp_offset);
698 fp_offset++;
699
700 DBG(r300, DBG_RS, "r300: Rasterized fog written to FS.\n");
701 } else {
702 DBG(r300, DBG_RS, "r300: Rasterized fog unused.\n");
703 }
704 tex_count++;
705 tex_ptr += 4;
706 } else {
707 /* Skip the FS input register, leave it uninitialized. */
708 /* If we try to set it to (0,0,0,1), it will lock up. */
709 if (fs_inputs->fog != ATTR_UNUSED) {
710 fp_offset++;
711
712 if (tex_count < 8) {
713 DBG(r300, DBG_RS, "r300: FS input fog unassigned.\n");
714 } else {
715 fprintf(stderr, "r300: ERROR: FS input fog unassigned, "
716 "not enough hardware slots. (it's not a bug, "
717 "do not report it)\n");
718 }
719 }
720 }
721
722 /* Rasterize WPOS. */
723 /* Don't set it in VAP if the FS doesn't need it. */
724 if (fs_inputs->wpos != ATTR_UNUSED && tex_count < 8) {
725 /* Set up the WPOS coordinates in VAP. */
726 rs.vap_vsm_vtx_assm |= (R300_INPUT_CNTL_TC0 << tex_count);
727 rs.vap_out_vtx_fmt[1] |= (4 << (3 * tex_count));
728 stream_loc_notcl[loc++] = 6 + tex_count;
729
730 /* Rasterize it. */
731 rX00_rs_tex(&rs, tex_count, tex_ptr, SWIZ_XYZW);
732
733 /* Write it to the FS input register. */
734 rX00_rs_tex_write(&rs, tex_count, fp_offset);
735
736 DBG(r300, DBG_RS, "r300: Rasterized WPOS written to FS.\n");
737
738 fp_offset++;
739 tex_count++;
740 tex_ptr += 4;
741 } else {
742 if (fs_inputs->wpos != ATTR_UNUSED && tex_count >= 8) {
743 fprintf(stderr, "r300: ERROR: FS input WPOS unassigned, "
744 "not enough hardware slots. (it's not a bug, do not "
745 "report it)\n");
746 }
747 }
748
749 /* Invalidate the rest of the no-TCL (GA) stream locations. */
750 for (; loc < 16;) {
751 stream_loc_notcl[loc++] = -1;
752 }
753
754 /* Rasterize at least one color, or bad things happen. */
755 if (col_count == 0 && tex_count == 0) {
756 rX00_rs_col(&rs, 0, 0, SWIZ_0001);
757 col_count++;
758
759 DBG(r300, DBG_RS, "r300: Rasterized color 0 to prevent lockups.\n");
760 }
761
762 DBG(r300, DBG_RS, "r300: --- Rasterizer status ---: colors: %i, "
763 "generics: %i.\n", col_count, tex_count);
764
765 rs.count = MIN2(tex_ptr, 32) | (col_count << R300_IC_COUNT_SHIFT) |
766 R300_HIRES_EN;
767
768 count = MAX3(col_count, tex_count, 1);
769 rs.inst_count = count - 1;
770
771 /* set the GB enable flags */
772 if ((r300->sprite_coord_enable || fs_inputs->pcoord != ATTR_UNUSED) &&
773 r300->is_point) {
774 stuffing_enable |= R300_GB_POINT_STUFF_ENABLE;
775 }
776
777 rs.gb_enable = stuffing_enable;
778
779 /* Now, after all that, see if we actually need to update the state. */
780 if (memcmp(r300->rs_block_state.state, &rs, sizeof(struct r300_rs_block))) {
781 memcpy(r300->rs_block_state.state, &rs, sizeof(struct r300_rs_block));
782 r300->rs_block_state.size = 13 + count*2;
783 }
784 }
785
rgba_to_bgra(float color[4])786 static void rgba_to_bgra(float color[4])
787 {
788 float x = color[0];
789 color[0] = color[2];
790 color[2] = x;
791 }
792
r300_get_border_color(enum pipe_format format,const float border[4],bool is_r500)793 static uint32_t r300_get_border_color(enum pipe_format format,
794 const float border[4],
795 bool is_r500)
796 {
797 const struct util_format_description *desc = util_format_description(format);
798 float border_swizzled[4] = {0};
799 union util_color uc = {0};
800
801 assume(desc);
802
803 /* Do depth formats first. */
804 if (util_format_is_depth_or_stencil(format)) {
805 switch (format) {
806 case PIPE_FORMAT_Z16_UNORM:
807 return util_pack_z(PIPE_FORMAT_Z16_UNORM, border[0]);
808 case PIPE_FORMAT_X8Z24_UNORM:
809 case PIPE_FORMAT_S8_UINT_Z24_UNORM:
810 if (is_r500) {
811 return util_pack_z(PIPE_FORMAT_X8Z24_UNORM, border[0]);
812 } else {
813 return util_pack_z(PIPE_FORMAT_Z16_UNORM, border[0]) << 16;
814 }
815 default:
816 assert(0);
817 return 0;
818 }
819 }
820
821 /* Apply inverse swizzle of the format. */
822 util_format_unswizzle_4f(border_swizzled, border, desc->swizzle);
823
824 /* Compressed formats. */
825 if (util_format_is_compressed(format)) {
826 switch (format) {
827 case PIPE_FORMAT_RGTC1_SNORM:
828 case PIPE_FORMAT_LATC1_SNORM:
829 border_swizzled[0] = border_swizzled[0] < 0 ?
830 border_swizzled[0]*0.5+1 :
831 border_swizzled[0]*0.5;
832 FALLTHROUGH;
833
834 case PIPE_FORMAT_RGTC1_UNORM:
835 case PIPE_FORMAT_LATC1_UNORM:
836 /* Add 1/32 to round the border color instead of truncating. */
837 /* The Y component is used for the border color. */
838 border_swizzled[1] = border_swizzled[0] + 1.0f/32;
839 util_pack_color(border_swizzled, PIPE_FORMAT_B4G4R4A4_UNORM, &uc);
840 return uc.ui[0];
841 case PIPE_FORMAT_RGTC2_SNORM:
842 case PIPE_FORMAT_LATC2_SNORM:
843 util_pack_color(border_swizzled, PIPE_FORMAT_R8G8B8A8_SNORM, &uc);
844 return uc.ui[0];
845 case PIPE_FORMAT_RGTC2_UNORM:
846 case PIPE_FORMAT_LATC2_UNORM:
847 util_pack_color(border_swizzled, PIPE_FORMAT_R8G8B8A8_UNORM, &uc);
848 return uc.ui[0];
849 case PIPE_FORMAT_DXT1_SRGB:
850 case PIPE_FORMAT_DXT1_SRGBA:
851 case PIPE_FORMAT_DXT3_SRGBA:
852 case PIPE_FORMAT_DXT5_SRGBA:
853 util_pack_color(border_swizzled, PIPE_FORMAT_B8G8R8A8_SRGB, &uc);
854 return uc.ui[0];
855 default:
856 util_pack_color(border_swizzled, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
857 return uc.ui[0];
858 }
859 }
860
861 switch (desc->channel[0].size) {
862 case 2:
863 rgba_to_bgra(border_swizzled);
864 util_pack_color(border_swizzled, PIPE_FORMAT_B2G3R3_UNORM, &uc);
865 break;
866
867 case 4:
868 rgba_to_bgra(border_swizzled);
869 util_pack_color(border_swizzled, PIPE_FORMAT_B4G4R4A4_UNORM, &uc);
870 break;
871
872 case 5:
873 rgba_to_bgra(border_swizzled);
874 if (desc->channel[1].size == 5) {
875 util_pack_color(border_swizzled, PIPE_FORMAT_B5G5R5A1_UNORM, &uc);
876 } else if (desc->channel[1].size == 6) {
877 util_pack_color(border_swizzled, PIPE_FORMAT_B5G6R5_UNORM, &uc);
878 } else {
879 assert(0);
880 }
881 break;
882
883 default:
884 case 8:
885 if (desc->channel[0].type == UTIL_FORMAT_TYPE_SIGNED) {
886 util_pack_color(border_swizzled, PIPE_FORMAT_R8G8B8A8_SNORM, &uc);
887 } else if (desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB) {
888 if (desc->nr_channels == 2) {
889 border_swizzled[3] = border_swizzled[1];
890 util_pack_color(border_swizzled, PIPE_FORMAT_L8A8_SRGB, &uc);
891 } else {
892 util_pack_color(border_swizzled, PIPE_FORMAT_R8G8B8A8_SRGB, &uc);
893 }
894 } else {
895 util_pack_color(border_swizzled, PIPE_FORMAT_R8G8B8A8_UNORM, &uc);
896 }
897 break;
898
899 case 10:
900 util_pack_color(border_swizzled, PIPE_FORMAT_R10G10B10A2_UNORM, &uc);
901 break;
902
903 case 16:
904 if (desc->nr_channels <= 2) {
905 if (desc->channel[0].type == UTIL_FORMAT_TYPE_FLOAT) {
906 util_pack_color(border_swizzled, PIPE_FORMAT_R16G16_FLOAT, &uc);
907 } else if (desc->channel[0].type == UTIL_FORMAT_TYPE_SIGNED) {
908 util_pack_color(border_swizzled, PIPE_FORMAT_R16G16_SNORM, &uc);
909 } else {
910 util_pack_color(border_swizzled, PIPE_FORMAT_R16G16_UNORM, &uc);
911 }
912 } else {
913 if (desc->channel[0].type == UTIL_FORMAT_TYPE_SIGNED) {
914 util_pack_color(border_swizzled, PIPE_FORMAT_R8G8B8A8_SNORM, &uc);
915 } else {
916 util_pack_color(border_swizzled, PIPE_FORMAT_R8G8B8A8_UNORM, &uc);
917 }
918 }
919 break;
920
921 case 32:
922 if (desc->nr_channels == 1) {
923 util_pack_color(border_swizzled, PIPE_FORMAT_R32_FLOAT, &uc);
924 } else {
925 util_pack_color(border_swizzled, PIPE_FORMAT_R8G8B8A8_UNORM, &uc);
926 }
927 break;
928 }
929
930 return uc.ui[0];
931 }
932
r300_merge_textures_and_samplers(struct r300_context * r300)933 static void r300_merge_textures_and_samplers(struct r300_context* r300)
934 {
935 struct r300_textures_state *state =
936 (struct r300_textures_state*)r300->textures_state.state;
937 struct r300_texture_sampler_state *texstate;
938 struct r300_sampler_state *sampler;
939 struct r300_sampler_view *view;
940 struct r300_resource *tex;
941 unsigned base_level, min_level, level_count, i, j, size;
942 unsigned count = MIN2(state->sampler_view_count,
943 state->sampler_state_count);
944 bool has_us_format = r300->screen->caps.has_us_format;
945
946 /* The KIL opcode fix, see below. */
947 if (!count && !r300->screen->caps.is_r500)
948 count = 1;
949
950 state->tx_enable = 0;
951 state->count = 0;
952 size = 2;
953
954 for (i = 0; i < count; i++) {
955 if (state->sampler_views[i] && state->sampler_states[i]) {
956 state->tx_enable |= 1U << i;
957
958 view = state->sampler_views[i];
959 tex = r300_resource(view->base.texture);
960 sampler = state->sampler_states[i];
961
962 texstate = &state->regs[i];
963 texstate->format = view->format;
964 texstate->filter0 = sampler->filter0;
965 texstate->filter1 = sampler->filter1;
966
967 /* Set the border color. */
968 texstate->border_color =
969 r300_get_border_color(view->base.format,
970 sampler->state.border_color.f,
971 r300->screen->caps.is_r500);
972
973 /* determine min/max levels */
974 base_level = view->base.u.tex.first_level;
975 min_level = sampler->min_lod;
976 level_count = MIN3(sampler->max_lod,
977 tex->b.last_level - base_level,
978 view->base.u.tex.last_level - base_level);
979
980 if (base_level + min_level) {
981 unsigned offset;
982
983 if (tex->tex.is_npot) {
984 /* Even though we do not implement mipmapping for NPOT
985 * textures, we should at least honor the minimum level
986 * which is allowed to be displayed. We do this by setting up
987 * an i-th mipmap level as the zero level. */
988 base_level += min_level;
989 }
990 offset = tex->tex.offset_in_bytes[base_level];
991
992 r300_texture_setup_format_state(r300->screen, tex,
993 view->base.format,
994 base_level,
995 view->width0_override,
996 view->height0_override,
997 &texstate->format);
998 texstate->format.tile_config |= offset & 0xffffffe0;
999 assert((offset & 0x1f) == 0);
1000 }
1001
1002 /* Assign a texture cache region. */
1003 texstate->format.format1 |= view->texcache_region;
1004
1005 /* Depth textures are kinda special. */
1006 if (util_format_is_depth_or_stencil(view->base.format)) {
1007 unsigned char depth_swizzle[4];
1008
1009 if (!r300->screen->caps.is_r500 &&
1010 util_format_get_blocksizebits(view->base.format) == 32) {
1011 /* X24x8 is sampled as Y16X16 on r3xx-r4xx.
1012 * The depth here is at the Y component. */
1013 for (j = 0; j < 4; j++)
1014 depth_swizzle[j] = PIPE_SWIZZLE_Y;
1015 } else {
1016 for (j = 0; j < 4; j++)
1017 depth_swizzle[j] = PIPE_SWIZZLE_X;
1018 }
1019
1020 /* If compare mode is disabled, sampler view swizzles
1021 * are stored in the format.
1022 * Otherwise, the swizzles must be applied after the compare
1023 * mode in the fragment shader. */
1024 if (sampler->state.compare_mode == PIPE_TEX_COMPARE_NONE) {
1025 texstate->format.format1 |=
1026 r300_get_swizzle_combined(depth_swizzle,
1027 view->swizzle, false);
1028 } else {
1029 texstate->format.format1 |=
1030 r300_get_swizzle_combined(depth_swizzle, NULL, false);
1031 }
1032 }
1033
1034 if (r300->screen->caps.dxtc_swizzle &&
1035 util_format_is_compressed(view->base.format)) {
1036 texstate->filter1 |= R400_DXTC_SWIZZLE_ENABLE;
1037 }
1038
1039 /* to emulate 1D textures through 2D ones correctly */
1040 if (tex->b.target == PIPE_TEXTURE_1D) {
1041 texstate->filter0 &= ~R300_TX_WRAP_T_MASK;
1042 texstate->filter0 |= R300_TX_WRAP_T(R300_TX_CLAMP_TO_EDGE);
1043 }
1044
1045 /* The hardware doesn't like CLAMP and CLAMP_TO_BORDER
1046 * for the 3rd coordinate if the texture isn't 3D. */
1047 if (tex->b.target != PIPE_TEXTURE_3D) {
1048 texstate->filter0 &= ~R300_TX_WRAP_R_MASK;
1049 }
1050
1051 if (tex->tex.is_npot) {
1052 /* NPOT textures don't support mip filter, unfortunately.
1053 * This prevents incorrect rendering. */
1054 texstate->filter0 &= ~R300_TX_MIN_FILTER_MIP_MASK;
1055
1056 /* Mask out the mirrored flag. */
1057 if (texstate->filter0 & R300_TX_WRAP_S(R300_TX_MIRRORED)) {
1058 texstate->filter0 &= ~R300_TX_WRAP_S(R300_TX_MIRRORED);
1059 }
1060 if (texstate->filter0 & R300_TX_WRAP_T(R300_TX_MIRRORED)) {
1061 texstate->filter0 &= ~R300_TX_WRAP_T(R300_TX_MIRRORED);
1062 }
1063
1064 /* Change repeat to clamp-to-edge.
1065 * (the repeat bit has a value of 0, no masking needed). */
1066 if ((texstate->filter0 & R300_TX_WRAP_S_MASK) ==
1067 R300_TX_WRAP_S(R300_TX_REPEAT)) {
1068 texstate->filter0 |= R300_TX_WRAP_S(R300_TX_CLAMP_TO_EDGE);
1069 }
1070 if ((texstate->filter0 & R300_TX_WRAP_T_MASK) ==
1071 R300_TX_WRAP_T(R300_TX_REPEAT)) {
1072 texstate->filter0 |= R300_TX_WRAP_T(R300_TX_CLAMP_TO_EDGE);
1073 }
1074 } else {
1075 /* the MAX_MIP level is the largest (finest) one */
1076 texstate->format.format0 |= R300_TX_NUM_LEVELS(level_count);
1077 texstate->filter0 |= R300_TX_MAX_MIP_LEVEL(min_level);
1078 }
1079
1080 /* Float textures only support nearest and mip-nearest filtering. */
1081 if (util_format_is_float(view->base.format)) {
1082 /* No MAG linear filtering. */
1083 if ((texstate->filter0 & R300_TX_MAG_FILTER_MASK) ==
1084 R300_TX_MAG_FILTER_LINEAR) {
1085 texstate->filter0 &= ~R300_TX_MAG_FILTER_MASK;
1086 texstate->filter0 |= R300_TX_MAG_FILTER_NEAREST;
1087 }
1088 /* No MIN linear filtering. */
1089 if ((texstate->filter0 & R300_TX_MIN_FILTER_MASK) ==
1090 R300_TX_MIN_FILTER_LINEAR) {
1091 texstate->filter0 &= ~R300_TX_MIN_FILTER_MASK;
1092 texstate->filter0 |= R300_TX_MIN_FILTER_NEAREST;
1093 }
1094 /* No mipmap linear filtering. */
1095 if ((texstate->filter0 & R300_TX_MIN_FILTER_MIP_MASK) ==
1096 R300_TX_MIN_FILTER_MIP_LINEAR) {
1097 texstate->filter0 &= ~R300_TX_MIN_FILTER_MIP_MASK;
1098 texstate->filter0 |= R300_TX_MIN_FILTER_MIP_NEAREST;
1099 }
1100 /* No anisotropic filtering. */
1101 texstate->filter0 &= ~R300_TX_MAX_ANISO_MASK;
1102 texstate->filter1 &= ~R500_TX_MAX_ANISO_MASK;
1103 texstate->filter1 &= ~R500_TX_ANISO_HIGH_QUALITY;
1104 }
1105
1106 texstate->filter0 |= i << 28;
1107
1108 size += 16 + (has_us_format ? 2 : 0);
1109 state->count = i+1;
1110 } else {
1111 /* For the KIL opcode to work on r3xx-r4xx, the texture unit
1112 * assigned to this opcode (it's always the first one) must be
1113 * enabled. Otherwise the opcode doesn't work.
1114 *
1115 * In order to not depend on the fragment shader, we just make
1116 * the first unit enabled all the time. */
1117 if (i == 0 && !r300->screen->caps.is_r500) {
1118 pipe_sampler_view_reference(
1119 (struct pipe_sampler_view**)&state->sampler_views[i],
1120 &r300->texkill_sampler->base);
1121
1122 state->tx_enable |= 1U << i;
1123
1124 texstate = &state->regs[i];
1125
1126 /* Just set some valid state. */
1127 texstate->format = r300->texkill_sampler->format;
1128 texstate->filter0 =
1129 r300_translate_tex_filters(PIPE_TEX_FILTER_NEAREST,
1130 PIPE_TEX_FILTER_NEAREST,
1131 PIPE_TEX_FILTER_NEAREST,
1132 false);
1133 texstate->filter1 = 0;
1134 texstate->border_color = 0;
1135
1136 texstate->filter0 |= i << 28;
1137 size += 16 + (has_us_format ? 2 : 0);
1138 state->count = i+1;
1139 }
1140 }
1141 }
1142
1143 r300->textures_state.size = size;
1144
1145 /* Pick a fragment shader based on either the texture compare state
1146 * or the uses_pitch flag or some other external state. */
1147 if (count &&
1148 r300->fs_status == FRAGMENT_SHADER_VALID) {
1149 r300->fs_status = FRAGMENT_SHADER_MAYBE_DIRTY;
1150 }
1151 }
1152
r300_decompress_depth_textures(struct r300_context * r300)1153 static void r300_decompress_depth_textures(struct r300_context *r300)
1154 {
1155 struct r300_textures_state *state =
1156 (struct r300_textures_state*)r300->textures_state.state;
1157 struct pipe_resource *tex;
1158 unsigned count = MIN2(state->sampler_view_count,
1159 state->sampler_state_count);
1160 unsigned i;
1161
1162 if (!r300->locked_zbuffer) {
1163 return;
1164 }
1165
1166 for (i = 0; i < count; i++) {
1167 if (state->sampler_views[i] && state->sampler_states[i]) {
1168 tex = state->sampler_views[i]->base.texture;
1169
1170 if (tex == r300->locked_zbuffer->texture) {
1171 r300_decompress_zmask_locked(r300);
1172 return;
1173 }
1174 }
1175 }
1176 }
1177
r300_validate_fragment_shader(struct r300_context * r300)1178 static void r300_validate_fragment_shader(struct r300_context *r300)
1179 {
1180 struct pipe_framebuffer_state *fb = r300->fb_state.state;
1181
1182 if (r300->fs.state && r300->fs_status != FRAGMENT_SHADER_VALID) {
1183 struct r300_fragment_program_external_state state;
1184 memset(&state, 0, sizeof(state));
1185 r300_fragment_program_get_external_state(r300, &state);
1186
1187 /* Pick the fragment shader based on external states.
1188 * Then mark the state dirty if the fragment shader is either dirty
1189 * or the function r300_pick_fragment_shader changed the shader. */
1190 if (r300_pick_fragment_shader(r300, r300_fs(r300), &state) ||
1191 r300->fs_status == FRAGMENT_SHADER_DIRTY) {
1192 /* Mark the state atom as dirty. */
1193 r300_mark_fs_code_dirty(r300);
1194
1195 /* Does Multiwrite need to be changed? */
1196 if (fb->nr_cbufs > 1) {
1197 bool new_multiwrite =
1198 r300_fragment_shader_writes_all(r300_fs(r300));
1199
1200 if (r300->fb_multiwrite != new_multiwrite) {
1201 r300->fb_multiwrite = new_multiwrite;
1202 r300_mark_fb_state_dirty(r300, R300_CHANGED_MULTIWRITE);
1203 }
1204 }
1205 }
1206 r300->fs_status = FRAGMENT_SHADER_VALID;
1207 }
1208 }
1209
r300_pick_vertex_shader(struct r300_context * r300)1210 static void r300_pick_vertex_shader(struct r300_context *r300)
1211 {
1212 struct r300_vertex_shader_code *ptr;
1213 struct r300_vertex_shader *vs = r300_vs(r300);
1214
1215 if (r300->vs_state.state) {
1216 bool wpos = r300_fs(r300)->shader->inputs.wpos != ATTR_UNUSED;
1217
1218 if (!vs->first) {
1219 /* Build the vertex shader for the first time. */
1220 vs->first = vs->shader = CALLOC_STRUCT(r300_vertex_shader_code);
1221 vs->first->wpos = wpos;
1222 r300_translate_vertex_shader(r300, vs);
1223 if (!vs->first->dummy)
1224 r300_mark_atom_dirty(r300, &r300->rs_block_state);
1225 return;
1226 }
1227 /* Pick the vertex shader based on whether we need wpos */
1228 if (vs->first->wpos != wpos) {
1229 if (vs->first->next && vs->first->next->wpos == wpos) {
1230 ptr = vs->first->next;
1231 vs->first->next = NULL;
1232 ptr->next = vs->first;
1233 vs->first = vs->shader = ptr;
1234 } else {
1235 ptr = CALLOC_STRUCT(r300_vertex_shader_code);
1236 ptr->next = vs->first;
1237 vs->first = vs->shader = ptr;
1238 vs->shader->wpos = wpos;
1239 r300_translate_vertex_shader(r300, vs);
1240 }
1241 if (!vs->first->dummy)
1242 r300_mark_atom_dirty(r300, &r300->rs_block_state);
1243 }
1244 }
1245 }
1246
r300_update_derived_state(struct r300_context * r300)1247 void r300_update_derived_state(struct r300_context* r300)
1248 {
1249 if (r300->textures_state.dirty) {
1250 r300_decompress_depth_textures(r300);
1251 r300_merge_textures_and_samplers(r300);
1252 }
1253
1254 r300_validate_fragment_shader(r300);
1255 if (r300->screen->caps.has_tcl)
1256 r300_pick_vertex_shader(r300);
1257
1258 if (r300->rs_block_state.dirty) {
1259 r300_update_rs_block(r300);
1260
1261 if (r300->draw) {
1262 memset(&r300->vertex_info, 0, sizeof(struct vertex_info));
1263 r300_draw_emit_all_attribs(r300);
1264 draw_compute_vertex_size(&r300->vertex_info);
1265 r300_swtcl_vertex_psc(r300);
1266 }
1267 }
1268
1269 r300_update_hyperz_state(r300);
1270 }
1271