1 /*
2 * Copyright 2012 Vadim Girlin <vadimgirlin@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Vadim Girlin
25 */
26
27 #ifndef R600_ISA_H_
28 #define R600_ISA_H_
29
30 #include "amd_family.h"
31 #include "util/u_debug.h"
32
33 #ifdef __cplusplus
34 extern "C" {
35 #endif
36
37 /* ALU flags */
38 enum alu_op_flags
39 {
40 AF_NONE = 0,
41 AF_V = (1<<0), /* allowed in vector slots */
42
43 /* allowed in scalar(trans) slot (slots xyz on cayman, may be replicated
44 * to w) */
45 AF_S = (1<<1),
46
47 AF_4SLOT = (1<<2), /* uses four vector slots (e.g. DOT4) */
48 AF_4V = (AF_V | AF_4SLOT),
49 AF_VS = (AF_V | AF_S), /* allowed in any slot */
50
51 AF_2SLOT = (1 << 3),
52 AF_2V = AF_V | AF_2SLOT, /* XY or ZW */
53
54 AF_KILL = (1<<4),
55 AF_PRED = (1<<5),
56 AF_SET = (1<<6),
57
58 /* e.g. MUL_PREV instructions, allowed in x/y, depends on z/w */
59 AF_PREV_INTERLEAVE = (1<<7),
60
61 AF_MOVA = (1<<8), /* all MOVA instructions */
62
63 AF_IEEE = (1<<10),
64
65 AF_DST_TYPE_MASK = (3<<11),
66 AF_FLOAT_DST = 0,
67 AF_INT_DST = (1<<11),
68 AF_UINT_DST = (3<<11),
69
70 /* DP instructions, 2-slot pairs */
71 AF_64 = (1<<13),
72 /* 24 bit instructions */
73 AF_24 = (1<<14),
74 /* DX10 variants */
75 AF_DX10 = (1<<15),
76
77 /* result is replicated to all channels (only if AF_4V is also set -
78 * for special handling of MULLO_INT on CM) */
79 AF_REPL = (1<<16),
80
81 /* interpolation instructions */
82 AF_INTERP = (1<<17),
83
84 /* LDS instructions */
85 AF_LDS = (1<<20),
86
87 /* e.g. DOT - depends on the next slot in the same group (x<=y/y<=z/z<=w) */
88 AF_PREV_NEXT = (1<<21),
89
90 /* int<->flt conversions */
91 AF_CVT = (1<<22),
92
93 /* commutative operation on src0 and src1 ( a op b = b op a),
94 * includes MULADDs (considering the MUL part on src0 and src1 only) */
95 AF_M_COMM = (1 << 23),
96
97 /* associative operation ((a op b) op c) == (a op (b op c)),
98 * includes MULADDs (considering the MUL part on src0 and src1 only) */
99 AF_M_ASSOC = (1 << 24),
100
101 AF_PRED_PUSH = (1 << 25),
102
103 AF_ANY_PRED = (AF_PRED | AF_PRED_PUSH),
104
105 AF_CMOV = (1 << 26),
106
107 // for SETcc, PREDSETcc, ... - type of comparison
108 AF_CMP_TYPE_MASK = (3 << 27),
109 AF_FLOAT_CMP = 0,
110 AF_INT_CMP = (1 << 27),
111 AF_UINT_CMP = (3 << 27),
112
113 /* condition codes - 3 bits */
114 AF_CC_SHIFT = 29,
115
116 AF_CC_MASK = (7U << AF_CC_SHIFT),
117 AF_CC_E = (0U << AF_CC_SHIFT),
118 AF_CC_GT = (1U << AF_CC_SHIFT),
119 AF_CC_GE = (2U << AF_CC_SHIFT),
120 AF_CC_NE = (3U << AF_CC_SHIFT),
121 AF_CC_LT = (4U << AF_CC_SHIFT),
122 AF_CC_LE = (5U << AF_CC_SHIFT),
123 };
124
125 /* flags for FETCH instructions (TEX/VTX/GDS) */
126 enum fetch_op_flags
127 {
128 FF_GDS = (1<<0),
129 FF_TEX = (1<<1),
130
131 FF_SETGRAD = (1<<2),
132 FF_GETGRAD = (1<<3),
133 FF_USEGRAD = (1<<4),
134
135 FF_VTX = (1<<5),
136 FF_MEM = (1<<6),
137
138 FF_SET_TEXTURE_OFFSETS = (1<<7),
139 FF_USE_TEXTURE_OFFSETS = (1<<8),
140 };
141
142 /* flags for CF instructions */
143 enum cf_op_flags
144 {
145 CF_CLAUSE = (1<<0), /* execute clause (alu/fetch ...) */
146 CF_ACK = (1<<1), /* acked versions of some instructions */
147 CF_ALU = (1<<2), /* alu clause execution */
148 CF_ALU_EXT = (1<<3), /* ALU_EXTENDED */
149 CF_EXP = (1<<4), /* export (CF_ALLOC_EXPORT_WORD1_SWIZ) */
150 CF_BRANCH = (1<<5), /* branch instructions */
151 CF_LOOP = (1<<6), /* loop instructions */
152 CF_CALL = (1<<7), /* call instructions */
153 CF_MEM = (1<<8), /* export_mem (CF_ALLOC_EXPORT_WORD1_BUF) */
154 CF_FETCH = (1<<9), /* fetch clause */
155
156 CF_UNCOND = (1<<10), /* COND = ACTIVE required */
157 CF_EMIT = (1<<11),
158 CF_STRM = (1<<12), /* MEM_STREAM* */
159
160 CF_RAT = (1<<13), /* MEM_RAT* */
161
162 CF_LOOP_START = (1<<14)
163 };
164
165 /* ALU instruction info */
166 struct alu_op_info
167 {
168 /* instruction name */
169 const char *name;
170 /* number of source operands */
171 int src_count;
172 /* opcodes, [0] - for r6xx/r7xx, [1] - for evergreen/cayman
173 * (-1) if instruction doesn't exist (more precise info in "slots") */
174 int opcode[2];
175 /* slots for r6xx, r7xx, evergreen, cayman
176 * (0 if instruction doesn't exist for gfx level) */
177 int slots[4];
178 /* flags (mostly autogenerated from instruction name) */
179 unsigned int flags;
180 };
181
182 /* FETCH instruction info */
183 struct fetch_op_info
184 {
185 const char * name;
186 /* for every gfx level */
187 int opcode[4];
188 int flags;
189 };
190
191 /* CF instruction info */
192 struct cf_op_info
193 {
194 const char * name;
195 /* for every gfx level */
196 int opcode[4];
197 int flags;
198 };
199
200
201 #define ALU_OP2_ADD 0
202 #define ALU_OP2_MUL 1
203 #define ALU_OP2_MUL_IEEE 2
204 #define ALU_OP2_MAX 3
205 #define ALU_OP2_MIN 4
206 #define ALU_OP2_MAX_DX10 5
207 #define ALU_OP2_MIN_DX10 6
208 #define ALU_OP2_SETE 7
209 #define ALU_OP2_SETGT 8
210 #define ALU_OP2_SETGE 9
211 #define ALU_OP2_SETNE 10
212 #define ALU_OP2_SETE_DX10 11
213 #define ALU_OP2_SETGT_DX10 12
214 #define ALU_OP2_SETGE_DX10 13
215 #define ALU_OP2_SETNE_DX10 14
216 #define ALU_OP1_FRACT 15
217 #define ALU_OP1_TRUNC 16
218 #define ALU_OP1_CEIL 17
219 #define ALU_OP1_RNDNE 18
220 #define ALU_OP1_FLOOR 19
221 #define ALU_OP2_ASHR_INT 20
222 #define ALU_OP2_LSHR_INT 21
223 #define ALU_OP2_LSHL_INT 22
224 #define ALU_OP1_MOV 23
225 #define ALU_OP0_NOP 24
226 #define ALU_OP2_PRED_SETGT_UINT 25
227 #define ALU_OP2_PRED_SETGE_UINT 26
228 #define ALU_OP2_PRED_SETE 27
229 #define ALU_OP2_PRED_SETGT 28
230 #define ALU_OP2_PRED_SETGE 29
231 #define ALU_OP2_PRED_SETNE 30
232 #define ALU_OP1_PRED_SET_INV 31
233 #define ALU_OP2_PRED_SET_POP 32
234 #define ALU_OP0_PRED_SET_CLR 33
235 #define ALU_OP1_PRED_SET_RESTORE 34
236 #define ALU_OP2_PRED_SETE_PUSH 35
237 #define ALU_OP2_PRED_SETGT_PUSH 36
238 #define ALU_OP2_PRED_SETGE_PUSH 37
239 #define ALU_OP2_PRED_SETNE_PUSH 38
240 #define ALU_OP2_KILLE 39
241 #define ALU_OP2_KILLGT 40
242 #define ALU_OP2_KILLGE 41
243 #define ALU_OP2_KILLNE 42
244 #define ALU_OP2_AND_INT 43
245 #define ALU_OP2_OR_INT 44
246 #define ALU_OP2_XOR_INT 45
247 #define ALU_OP1_NOT_INT 46
248 #define ALU_OP2_ADD_INT 47
249 #define ALU_OP2_SUB_INT 48
250 #define ALU_OP2_MAX_INT 49
251 #define ALU_OP2_MIN_INT 50
252 #define ALU_OP2_MAX_UINT 51
253 #define ALU_OP2_MIN_UINT 52
254 #define ALU_OP2_SETE_INT 53
255 #define ALU_OP2_SETGT_INT 54
256 #define ALU_OP2_SETGE_INT 55
257 #define ALU_OP2_SETNE_INT 56
258 #define ALU_OP2_SETGT_UINT 57
259 #define ALU_OP2_SETGE_UINT 58
260 #define ALU_OP2_KILLGT_UINT 59
261 #define ALU_OP2_KILLGE_UINT 60
262 #define ALU_OP2_PRED_SETE_INT 61
263 #define ALU_OP2_PRED_SETGT_INT 62
264 #define ALU_OP2_PRED_SETGE_INT 63
265 #define ALU_OP2_PRED_SETNE_INT 64
266 #define ALU_OP2_KILLE_INT 65
267 #define ALU_OP2_KILLGT_INT 66
268 #define ALU_OP2_KILLGE_INT 67
269 #define ALU_OP2_KILLNE_INT 68
270 #define ALU_OP2_PRED_SETE_PUSH_INT 69
271 #define ALU_OP2_PRED_SETGT_PUSH_INT 70
272 #define ALU_OP2_PRED_SETGE_PUSH_INT 71
273 #define ALU_OP2_PRED_SETNE_PUSH_INT 72
274 #define ALU_OP2_PRED_SETLT_PUSH_INT 73
275 #define ALU_OP2_PRED_SETLE_PUSH_INT 74
276 #define ALU_OP1_FLT_TO_INT 75
277 #define ALU_OP1_BFREV_INT 76
278 #define ALU_OP2_ADDC_UINT 77
279 #define ALU_OP2_SUBB_UINT 78
280 #define ALU_OP0_GROUP_BARRIER 79
281 #define ALU_OP0_GROUP_SEQ_BEGIN 80
282 #define ALU_OP0_GROUP_SEQ_END 81
283 #define ALU_OP2_SET_MODE 82
284 #define ALU_OP0_SET_CF_IDX0 83
285 #define ALU_OP0_SET_CF_IDX1 84
286 #define ALU_OP2_SET_LDS_SIZE 85
287 #define ALU_OP2_MUL_INT24 86
288 #define ALU_OP2_MULHI_INT24 87
289 #define ALU_OP1_FLT_TO_INT_TRUNC 88
290 #define ALU_OP1_EXP_IEEE 89
291 #define ALU_OP1_LOG_CLAMPED 90
292 #define ALU_OP1_LOG_IEEE 91
293 #define ALU_OP1_RECIP_CLAMPED 92
294 #define ALU_OP1_RECIP_FF 93
295 #define ALU_OP1_RECIP_IEEE 94
296 #define ALU_OP1_RECIPSQRT_CLAMPED 95
297 #define ALU_OP1_RECIPSQRT_FF 96
298 #define ALU_OP1_RECIPSQRT_IEEE 97
299 #define ALU_OP1_SQRT_IEEE 98
300 #define ALU_OP1_SIN 99
301 #define ALU_OP1_COS 100
302 #define ALU_OP2_MULLO_INT 101
303 #define ALU_OP2_MULHI_INT 102
304 #define ALU_OP2_MULLO_UINT 103
305 #define ALU_OP2_MULHI_UINT 104
306 #define ALU_OP1_RECIP_INT 105
307 #define ALU_OP1_RECIP_UINT 106
308 #define ALU_OP2_RECIP_64 107
309 #define ALU_OP2_RECIP_CLAMPED_64 108
310 #define ALU_OP2_RECIPSQRT_64 109
311 #define ALU_OP2_RECIPSQRT_CLAMPED_64 110
312 #define ALU_OP2_SQRT_64 111
313 #define ALU_OP1_FLT_TO_UINT 112
314 #define ALU_OP1_INT_TO_FLT 113
315 #define ALU_OP1_UINT_TO_FLT 114
316 #define ALU_OP2_BFM_INT 115
317 #define ALU_OP1_FLT32_TO_FLT16 116
318 #define ALU_OP1_FLT16_TO_FLT32 117
319 #define ALU_OP1_UBYTE0_FLT 118
320 #define ALU_OP1_UBYTE1_FLT 119
321 #define ALU_OP1_UBYTE2_FLT 120
322 #define ALU_OP1_UBYTE3_FLT 121
323 #define ALU_OP1_BCNT_INT 122
324 #define ALU_OP1_FFBH_UINT 123
325 #define ALU_OP1_FFBL_INT 124
326 #define ALU_OP1_FFBH_INT 125
327 #define ALU_OP1_FLT_TO_UINT4 126
328 #define ALU_OP2_DOT_IEEE 127
329 #define ALU_OP1_FLT_TO_INT_RPI 128
330 #define ALU_OP1_FLT_TO_INT_FLOOR 129
331 #define ALU_OP2_MULHI_UINT24 130
332 #define ALU_OP1_MBCNT_32HI_INT 131
333 #define ALU_OP1_OFFSET_TO_FLT 132
334 #define ALU_OP2_MUL_UINT24 133
335 #define ALU_OP1_BCNT_ACCUM_PREV_INT 134
336 #define ALU_OP1_MBCNT_32LO_ACCUM_PREV_INT 135
337 #define ALU_OP2_SETE_64 136
338 #define ALU_OP2_SETNE_64 137
339 #define ALU_OP2_SETGT_64 138
340 #define ALU_OP2_SETGE_64 139
341 #define ALU_OP2_MIN_64 140
342 #define ALU_OP2_MAX_64 141
343 #define ALU_OP2_DOT4 142
344 #define ALU_OP2_DOT4_IEEE 143
345 #define ALU_OP2_CUBE 144
346 #define ALU_OP1_MAX4 145
347 #define ALU_OP1_FREXP_64 146
348 #define ALU_OP2_LDEXP_64 147
349 #define ALU_OP1_FRACT_64 148
350 #define ALU_OP2_PRED_SETGT_64 149
351 #define ALU_OP2_PRED_SETE_64 150
352 #define ALU_OP2_PRED_SETGE_64 151
353 #define ALU_OP2_MUL_64 152
354 #define ALU_OP2_ADD_64 153
355 #define ALU_OP1_MOVA_INT 154
356 #define ALU_OP1_FLT64_TO_FLT32 155
357 #define ALU_OP1_FLT32_TO_FLT64 156
358 #define ALU_OP2_SAD_ACCUM_PREV_UINT 157
359 #define ALU_OP2_DOT 158
360 #define ALU_OP1_MUL_PREV 159
361 #define ALU_OP1_MUL_IEEE_PREV 160
362 #define ALU_OP1_ADD_PREV 161
363 #define ALU_OP2_MULADD_PREV 162
364 #define ALU_OP2_MULADD_IEEE_PREV 163
365 #define ALU_OP2_INTERP_XY 164
366 #define ALU_OP2_INTERP_ZW 165
367 #define ALU_OP2_INTERP_X 166
368 #define ALU_OP2_INTERP_Z 167
369 #define ALU_OP1_STORE_FLAGS 168
370 #define ALU_OP1_LOAD_STORE_FLAGS 169
371 #define ALU_OP2_LDS_1A 170
372 #define ALU_OP2_LDS_1A1D 171
373 #define ALU_OP2_LDS_2A 172
374 #define ALU_OP1_INTERP_LOAD_P0 173
375 #define ALU_OP1_INTERP_LOAD_P10 174
376 #define ALU_OP1_INTERP_LOAD_P20 175
377 #define ALU_OP3_BFE_UINT 176
378 #define ALU_OP3_BFE_INT 177
379 #define ALU_OP3_BFI_INT 178
380 #define ALU_OP3_FMA 179
381 #define ALU_OP3_MULADD_INT24 180
382 #define ALU_OP3_CNDNE_64 181
383 #define ALU_OP3_FMA_64 182
384 #define ALU_OP3_LERP_UINT 183
385 #define ALU_OP3_BIT_ALIGN_INT 184
386 #define ALU_OP3_BYTE_ALIGN_INT 185
387 #define ALU_OP3_SAD_ACCUM_UINT 186
388 #define ALU_OP3_SAD_ACCUM_HI_UINT 187
389 #define ALU_OP3_MULADD_UINT24 188
390 #define ALU_OP3_LDS_IDX_OP 189
391 #define ALU_OP3_MULADD 190
392 #define ALU_OP3_MULADD_M2 191
393 #define ALU_OP3_MULADD_M4 192
394 #define ALU_OP3_MULADD_D2 193
395 #define ALU_OP3_MULADD_IEEE 194
396 #define ALU_OP3_CNDE 195
397 #define ALU_OP3_CNDGT 196
398 #define ALU_OP3_CNDGE 197
399 #define ALU_OP3_CNDE_INT 198
400 #define ALU_OP3_CNDGT_INT 199
401 #define ALU_OP3_CNDGE_INT 200
402 #define ALU_OP3_MUL_LIT 201
403 #define ALU_OP1_MOVA 202
404 #define ALU_OP1_MOVA_FLOOR 203
405 #define ALU_OP1_MOVA_GPR_INT 204
406 #define ALU_OP3_MULADD_64 205
407 #define ALU_OP3_MULADD_64_M2 206
408 #define ALU_OP3_MULADD_64_M4 207
409 #define ALU_OP3_MULADD_64_D2 208
410 #define ALU_OP3_MUL_LIT_M2 209
411 #define ALU_OP3_MUL_LIT_M4 210
412 #define ALU_OP3_MUL_LIT_D2 211
413 #define ALU_OP3_MULADD_IEEE_M2 212
414 #define ALU_OP3_MULADD_IEEE_M4 213
415 #define ALU_OP3_MULADD_IEEE_D2 214
416
417 #define LDS_OP2_LDS_ADD 215
418 #define LDS_OP2_LDS_SUB 216
419 #define LDS_OP2_LDS_RSUB 217
420 #define LDS_OP2_LDS_INC 218
421 #define LDS_OP2_LDS_DEC 219
422 #define LDS_OP2_LDS_MIN_INT 220
423 #define LDS_OP2_LDS_MAX_INT 221
424 #define LDS_OP2_LDS_MIN_UINT 222
425 #define LDS_OP2_LDS_MAX_UINT 223
426 #define LDS_OP2_LDS_AND 224
427 #define LDS_OP2_LDS_OR 225
428 #define LDS_OP2_LDS_XOR 226
429 #define LDS_OP3_LDS_MSKOR 227
430 #define LDS_OP2_LDS_WRITE 228
431 #define LDS_OP3_LDS_WRITE_REL 229
432 #define LDS_OP3_LDS_WRITE2 230
433 #define LDS_OP3_LDS_CMP_STORE 231
434 #define LDS_OP3_LDS_CMP_STORE_SPF 232
435 #define LDS_OP2_LDS_BYTE_WRITE 233
436 #define LDS_OP2_LDS_SHORT_WRITE 234
437 #define LDS_OP2_LDS_ADD_RET 235
438 #define LDS_OP2_LDS_SUB_RET 236
439 #define LDS_OP2_LDS_RSUB_RET 237
440 #define LDS_OP2_LDS_INC_RET 238
441 #define LDS_OP2_LDS_DEC_RET 239
442 #define LDS_OP2_LDS_MIN_INT_RET 240
443 #define LDS_OP2_LDS_MAX_INT_RET 241
444 #define LDS_OP2_LDS_MIN_UINT_RET 242
445 #define LDS_OP2_LDS_MAX_UINT_RET 243
446 #define LDS_OP2_LDS_AND_RET 244
447 #define LDS_OP2_LDS_OR_RET 245
448 #define LDS_OP2_LDS_XOR_RET 246
449 #define LDS_OP3_LDS_MSKOR_RET 247
450 #define LDS_OP2_LDS_XCHG_RET 248
451 #define LDS_OP3_LDS_XCHG_REL_RET 249
452 #define LDS_OP3_LDS_XCHG2_RET 250
453 #define LDS_OP3_LDS_CMP_XCHG_RET 251
454 #define LDS_OP3_LDS_CMP_XCHG_SPF_RET 252
455 #define LDS_OP1_LDS_READ_RET 253
456 #define LDS_OP1_LDS_READ_REL_RET 254
457 #define LDS_OP2_LDS_READ2_RET 255
458 #define LDS_OP3_LDS_READWRITE_RET 256
459 #define LDS_OP1_LDS_BYTE_READ_RET 257
460 #define LDS_OP1_LDS_UBYTE_READ_RET 258
461 #define LDS_OP1_LDS_SHORT_READ_RET 259
462 #define LDS_OP1_LDS_USHORT_READ_RET 260
463
464 #define FETCH_OP_VFETCH 0
465 #define FETCH_OP_SEMFETCH 1
466 #define FETCH_OP_READ_SCRATCH 2
467 #define FETCH_OP_READ_REDUCT 3
468 #define FETCH_OP_READ_MEM 4
469 #define FETCH_OP_DS_LOCAL_WRITE 5
470 #define FETCH_OP_DS_LOCAL_READ 6
471 #define FETCH_OP_GDS_ADD 7
472 #define FETCH_OP_GDS_SUB 8
473 #define FETCH_OP_GDS_RSUB 9
474 #define FETCH_OP_GDS_INC 10
475 #define FETCH_OP_GDS_DEC 11
476 #define FETCH_OP_GDS_MIN_INT 12
477 #define FETCH_OP_GDS_MAX_INT 13
478 #define FETCH_OP_GDS_MIN_UINT 14
479 #define FETCH_OP_GDS_MAX_UINT 15
480 #define FETCH_OP_GDS_AND 16
481 #define FETCH_OP_GDS_OR 17
482 #define FETCH_OP_GDS_XOR 18
483 #define FETCH_OP_GDS_MSKOR 19
484 #define FETCH_OP_GDS_WRITE 20
485 #define FETCH_OP_GDS_WRITE_REL 21
486 #define FETCH_OP_GDS_WRITE2 22
487 #define FETCH_OP_GDS_CMP_STORE 23
488 #define FETCH_OP_GDS_CMP_STORE_SPF 24
489 #define FETCH_OP_GDS_BYTE_WRITE 25
490 #define FETCH_OP_GDS_SHORT_WRITE 26
491 #define FETCH_OP_GDS_ADD_RET 27
492 #define FETCH_OP_GDS_SUB_RET 28
493 #define FETCH_OP_GDS_RSUB_RET 29
494 #define FETCH_OP_GDS_INC_RET 30
495 #define FETCH_OP_GDS_DEC_RET 31
496 #define FETCH_OP_GDS_MIN_INT_RET 32
497 #define FETCH_OP_GDS_MAX_INT_RET 33
498 #define FETCH_OP_GDS_MIN_UINT_RET 34
499 #define FETCH_OP_GDS_MAX_UINT_RET 35
500 #define FETCH_OP_GDS_AND_RET 36
501 #define FETCH_OP_GDS_OR_RET 37
502 #define FETCH_OP_GDS_XOR_RET 38
503 #define FETCH_OP_GDS_MSKOR_RET 39
504 #define FETCH_OP_GDS_XCHG_RET 40
505 #define FETCH_OP_GDS_XCHG_REL_RET 41
506 #define FETCH_OP_GDS_XCHG2_RET 42
507 #define FETCH_OP_GDS_CMP_XCHG_RET 43
508 #define FETCH_OP_GDS_CMP_XCHG_SPF_RET 44
509 #define FETCH_OP_GDS_READ_RET 45
510 #define FETCH_OP_GDS_READ_REL_RET 46
511 #define FETCH_OP_GDS_READ2_RET 47
512 #define FETCH_OP_GDS_READWRITE_RET 48
513 #define FETCH_OP_GDS_BYTE_READ_RET 49
514 #define FETCH_OP_GDS_UBYTE_READ_RET 50
515 #define FETCH_OP_GDS_SHORT_READ_RET 51
516 #define FETCH_OP_GDS_USHORT_READ_RET 52
517 #define FETCH_OP_GDS_ATOMIC_ORDERED_ALLOC 53
518 #define FETCH_OP_TF_WRITE 54
519 #define FETCH_OP_DS_GLOBAL_WRITE 55
520 #define FETCH_OP_DS_GLOBAL_READ 56
521 #define FETCH_OP_LD 57
522 #define FETCH_OP_LDFPTR 58
523 #define FETCH_OP_GET_TEXTURE_RESINFO 59
524 #define FETCH_OP_GET_NUMBER_OF_SAMPLES 60
525 #define FETCH_OP_GET_LOD 61
526 #define FETCH_OP_GET_GRADIENTS_H 62
527 #define FETCH_OP_GET_GRADIENTS_V 63
528 #define FETCH_OP_GET_GRADIENTS_H_FINE 64
529 #define FETCH_OP_GET_GRADIENTS_V_FINE 65
530 #define FETCH_OP_GET_LERP 66
531 #define FETCH_OP_SET_TEXTURE_OFFSETS 67
532 #define FETCH_OP_KEEP_GRADIENTS 68
533 #define FETCH_OP_SET_GRADIENTS_H 69
534 #define FETCH_OP_SET_GRADIENTS_V 70
535 #define FETCH_OP_SET_GRADIENTS_H_COARSE 71
536 #define FETCH_OP_SET_GRADIENTS_V_COARSE 72
537 #define FETCH_OP_SET_GRADIENTS_H_PACKED_FINE 73
538 #define FETCH_OP_SET_GRADIENTS_V_PACKED_FINE 74
539 #define FETCH_OP_SET_GRADIENTS_H_PACKED_COARSE 75
540 #define FETCH_OP_SET_GRADIENTS_V_PACKED_COARSE 76
541 #define FETCH_OP_PASS 77
542 #define FETCH_OP_PASS1 78
543 #define FETCH_OP_PASS2 79
544 #define FETCH_OP_PASS3 80
545 #define FETCH_OP_SET_CUBEMAP_INDEX 81
546 #define FETCH_OP_GET_BUFFER_RESINFO 82
547 #define FETCH_OP_FETCH4 83
548 #define FETCH_OP_SAMPLE 84
549 #define FETCH_OP_SAMPLE_L 85
550 #define FETCH_OP_SAMPLE_LB 86
551 #define FETCH_OP_SAMPLE_LZ 87
552 #define FETCH_OP_SAMPLE_G 88
553 #define FETCH_OP_SAMPLE_G_L 89
554 #define FETCH_OP_GATHER4 90
555 #define FETCH_OP_SAMPLE_G_LB 91
556 #define FETCH_OP_SAMPLE_G_LZ 92
557 #define FETCH_OP_GATHER4_O 93
558 #define FETCH_OP_SAMPLE_C 94
559 #define FETCH_OP_SAMPLE_C_L 95
560 #define FETCH_OP_SAMPLE_C_LB 96
561 #define FETCH_OP_SAMPLE_C_LZ 97
562 #define FETCH_OP_SAMPLE_C_G 98
563 #define FETCH_OP_SAMPLE_C_G_L 99
564 #define FETCH_OP_GATHER4_C 100
565 #define FETCH_OP_SAMPLE_C_G_LB 101
566 #define FETCH_OP_SAMPLE_C_G_LZ 102
567 #define FETCH_OP_GATHER4_C_O 103
568
569 #define CF_OP_NOP 0
570 #define CF_OP_TEX 1
571 #define CF_OP_VTX 2
572 #define CF_OP_VTX_TC 3
573 #define CF_OP_GDS 4
574 #define CF_OP_LOOP_START 5
575 #define CF_OP_LOOP_END 6
576 #define CF_OP_LOOP_START_DX10 7
577 #define CF_OP_LOOP_START_NO_AL 8
578 #define CF_OP_LOOP_CONTINUE 9
579 #define CF_OP_LOOP_BREAK 10
580 #define CF_OP_JUMP 11
581 #define CF_OP_PUSH 12
582 #define CF_OP_PUSH_ELSE 13
583 #define CF_OP_ELSE 14
584 #define CF_OP_POP 15
585 #define CF_OP_POP_JUMP 16
586 #define CF_OP_POP_PUSH 17
587 #define CF_OP_POP_PUSH_ELSE 18
588 #define CF_OP_CALL 19
589 #define CF_OP_CALL_FS 20
590 #define CF_OP_RET 21
591 #define CF_OP_EMIT_VERTEX 22
592 #define CF_OP_EMIT_CUT_VERTEX 23
593 #define CF_OP_CUT_VERTEX 24
594 #define CF_OP_KILL 25
595 #define CF_OP_END_PROGRAM 26
596 #define CF_OP_WAIT_ACK 27
597 #define CF_OP_TEX_ACK 28
598 #define CF_OP_VTX_ACK 29
599 #define CF_OP_VTX_TC_ACK 30
600 #define CF_OP_JUMPTABLE 31
601 #define CF_OP_WAVE_SYNC 32
602 #define CF_OP_HALT 33
603 #define CF_OP_CF_END 34
604 #define CF_OP_LDS_DEALLOC 35
605 #define CF_OP_PUSH_WQM 36
606 #define CF_OP_POP_WQM 37
607 #define CF_OP_ELSE_WQM 38
608 #define CF_OP_JUMP_ANY 39
609 #define CF_OP_REACTIVATE 40
610 #define CF_OP_REACTIVATE_WQM 41
611 #define CF_OP_INTERRUPT 42
612 #define CF_OP_INTERRUPT_AND_SLEEP 43
613 #define CF_OP_SET_PRIORITY 44
614 #define CF_OP_MEM_STREAM0_BUF0 45
615 #define CF_OP_MEM_STREAM0_BUF1 46
616 #define CF_OP_MEM_STREAM0_BUF2 47
617 #define CF_OP_MEM_STREAM0_BUF3 48
618 #define CF_OP_MEM_STREAM1_BUF0 49
619 #define CF_OP_MEM_STREAM1_BUF1 50
620 #define CF_OP_MEM_STREAM1_BUF2 51
621 #define CF_OP_MEM_STREAM1_BUF3 52
622 #define CF_OP_MEM_STREAM2_BUF0 53
623 #define CF_OP_MEM_STREAM2_BUF1 54
624 #define CF_OP_MEM_STREAM2_BUF2 55
625 #define CF_OP_MEM_STREAM2_BUF3 56
626 #define CF_OP_MEM_STREAM3_BUF0 57
627 #define CF_OP_MEM_STREAM3_BUF1 58
628 #define CF_OP_MEM_STREAM3_BUF2 59
629 #define CF_OP_MEM_STREAM3_BUF3 60
630 #define CF_OP_MEM_STREAM0 61
631 #define CF_OP_MEM_STREAM1 62
632 #define CF_OP_MEM_STREAM2 63
633 #define CF_OP_MEM_STREAM3 64
634 #define CF_OP_MEM_SCRATCH 65
635 #define CF_OP_MEM_REDUCT 66
636 #define CF_OP_MEM_RING 67
637 #define CF_OP_EXPORT 68
638 #define CF_OP_EXPORT_DONE 69
639 #define CF_OP_MEM_EXPORT 70
640 #define CF_OP_MEM_RAT 71
641 #define CF_OP_MEM_RAT_NOCACHE 72
642 #define CF_OP_MEM_RING1 73
643 #define CF_OP_MEM_RING2 74
644 #define CF_OP_MEM_RING3 75
645 #define CF_OP_MEM_MEM_COMBINED 76
646 #define CF_OP_MEM_RAT_COMBINED_NOCACHE 77
647 #define CF_OP_MEM_RAT_COMBINED 78
648 #define CF_OP_EXPORT_DONE_END 79
649 #define CF_OP_ALU 80
650 #define CF_OP_ALU_PUSH_BEFORE 81
651 #define CF_OP_ALU_POP_AFTER 82
652 #define CF_OP_ALU_POP2_AFTER 83
653 #define CF_OP_ALU_EXT 84
654 #define CF_OP_ALU_CONTINUE 85
655 #define CF_OP_ALU_BREAK 86
656 #define CF_OP_ALU_VALID_PIXEL_MODE 87
657 #define CF_OP_ALU_ELSE_AFTER 88
658
659 /* CF_NATIVE means that r600_bytecode_cf contains pre-encoded native data */
660 #define CF_NATIVE 89
661
662 enum r600_chip_class {
663 ISA_CC_R600,
664 ISA_CC_R700,
665 ISA_CC_EVERGREEN,
666 ISA_CC_CAYMAN
667 };
668
669 struct r600_isa {
670 enum r600_chip_class hw_class;
671
672 /* these arrays provide reverse mapping - opcode => table_index,
673 * typically we don't need such lookup, unless we are decoding the native
674 * bytecode (e.g. when reading the bytestream from llvm backend) */
675 unsigned *alu_op2_map;
676 unsigned *alu_op3_map;
677 unsigned *fetch_map;
678 unsigned *cf_map;
679 };
680
681 struct r600_context;
682
683 int r600_isa_init(enum amd_gfx_level gfx_level, struct r600_isa *isa);
684 int r600_isa_destroy(struct r600_isa *isa);
685
686 extern const struct alu_op_info r600_alu_op_table[];
687
688 unsigned
689 r600_alu_op_table_size(void);
690
691 const struct alu_op_info *
692 r600_isa_alu(unsigned op);
693
694 const struct fetch_op_info *
695 r600_isa_fetch(unsigned op);
696
697 const struct cf_op_info *
698 r600_isa_cf(unsigned op);
699
700 static inline unsigned
r600_isa_alu_opcode(enum r600_chip_class gfx_level,unsigned op)701 r600_isa_alu_opcode(enum r600_chip_class gfx_level, unsigned op) {
702 int opc = r600_isa_alu(op)->opcode[gfx_level >> 1];
703 assert(opc != -1);
704 return opc;
705 }
706
707 static inline unsigned
r600_isa_alu_slots(enum r600_chip_class gfx_level,unsigned op)708 r600_isa_alu_slots(enum r600_chip_class gfx_level, unsigned op) {
709 unsigned slots = r600_isa_alu(op)->slots[gfx_level];
710 assert(slots != 0);
711 return slots;
712 }
713
714 static inline unsigned
r600_isa_fetch_opcode(enum r600_chip_class gfx_level,unsigned op)715 r600_isa_fetch_opcode(enum r600_chip_class gfx_level, unsigned op) {
716 int opc = r600_isa_fetch(op)->opcode[gfx_level];
717 assert(opc != -1);
718 return opc;
719 }
720
721 static inline unsigned
r600_isa_cf_opcode(enum r600_chip_class gfx_level,unsigned op)722 r600_isa_cf_opcode(enum r600_chip_class gfx_level, unsigned op) {
723 int opc = r600_isa_cf(op)->opcode[gfx_level];
724 assert(opc != -1);
725 return opc;
726 }
727
728 static inline unsigned
r600_isa_alu_by_opcode(struct r600_isa * isa,unsigned opcode,unsigned is_op3)729 r600_isa_alu_by_opcode(struct r600_isa* isa, unsigned opcode, unsigned is_op3) {
730 unsigned op;
731 if (is_op3) {
732 assert(isa->alu_op3_map);
733 op = isa->alu_op3_map[opcode];
734 } else {
735 assert(isa->alu_op2_map);
736 op = isa->alu_op2_map[opcode];
737 }
738 assert(op);
739 return op - 1;
740 }
741
742 static inline unsigned
r600_isa_fetch_by_opcode(struct r600_isa * isa,unsigned opcode)743 r600_isa_fetch_by_opcode(struct r600_isa* isa, unsigned opcode) {
744 unsigned op;
745 assert(isa->fetch_map);
746 op = isa->fetch_map[opcode];
747 assert(op);
748 return op - 1;
749 }
750
751 static inline unsigned
r600_isa_cf_by_opcode(struct r600_isa * isa,unsigned opcode,unsigned is_alu)752 r600_isa_cf_by_opcode(struct r600_isa* isa, unsigned opcode, unsigned is_alu) {
753 unsigned op;
754 assert(isa->cf_map);
755 /* using offset for CF_ALU_xxx opcodes because they overlap with other
756 * CF opcodes (they use different encoding in hw) */
757 op = isa->cf_map[is_alu ? opcode + 0x80 : opcode];
758 assert(op);
759 return op - 1;
760 }
761
762 #ifdef __cplusplus
763 } /* extern "C" */
764 #endif
765
766 #endif /* R600_ISA_H_ */
767