1 /* -*- mesa-c++ -*- 2 * 3 * Copyright (c) 2022 Collabora LTD 4 * 5 * Author: Gert Wollny <gert.wollny@collabora.com> 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a 8 * copy of this software and associated documentation files (the "Software"), 9 * to deal in the Software without restriction, including without limitation 10 * on the rights to use, copy, modify, merge, publish, distribute, sub 11 * license, and/or sell copies of the Software, and to permit persons to whom 12 * the Software is furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the next 15 * paragraph) shall be included in all copies or substantial portions of the 16 * Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 21 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 24 * USE OR OTHER DEALINGS IN THE SOFTWARE. 25 */ 26 27 #ifndef GDSINSTR_H 28 #define GDSINSTR_H 29 30 #include "sfn_instr.h" 31 #include "sfn_valuefactory.h" 32 33 namespace r600 { 34 35 class Shader; 36 37 class GDSInstr : public Instr, public Resource { 38 public: 39 GDSInstr( 40 ESDOp op, Register *dest, const RegisterVec4& src, int uav_base, PRegister uav_id); 41 42 bool is_equal_to(const GDSInstr& lhs) const; 43 44 void accept(ConstInstrVisitor& visitor) const override; 45 void accept(InstrVisitor& visitor) override; 46 47 bool do_ready() const override; 48 opcode()49 auto opcode() const { return m_op; } src()50 auto& src() { return m_src; } src()51 auto& src() const { return m_src; } 52 dest()53 const auto& dest() const { return m_dest; } dest()54 auto& dest() { return m_dest; } 55 56 static auto from_string(std::istream& is, ValueFactory& value_factory) -> Pointer; 57 58 static bool emit_atomic_counter(nir_intrinsic_instr *intr, Shader& shader); slots()59 uint32_t slots() const override { return 1; }; 60 uint8_t allowed_src_chan_mask() const override; 61 62 void update_indirect_addr(PRegister old_reg, PRegister addr) override; 63 64 private: 65 static bool emit_atomic_read(nir_intrinsic_instr *intr, Shader& shader); 66 static bool emit_atomic_op2(nir_intrinsic_instr *intr, Shader& shader); 67 static bool emit_atomic_inc(nir_intrinsic_instr *intr, Shader& shader); 68 static bool emit_atomic_pre_dec(nir_intrinsic_instr *intr, Shader& shader); 69 70 void do_print(std::ostream& os) const override; 71 72 ESDOp m_op{DS_OP_INVALID}; 73 Register *m_dest; 74 75 RegisterVec4 m_src; 76 77 std::bitset<8> m_tex_flags; 78 }; 79 80 class RatInstr : public Instr, public Resource { 81 82 public: 83 enum ERatOp { 84 NOP, 85 STORE_TYPED, 86 STORE_RAW, 87 STORE_RAW_FDENORM, 88 CMPXCHG_INT, 89 CMPXCHG_FLT, 90 CMPXCHG_FDENORM, 91 ADD, 92 SUB, 93 RSUB, 94 MIN_INT, 95 MIN_UINT, 96 MAX_INT, 97 MAX_UINT, 98 AND, 99 OR, 100 XOR, 101 MSKOR, 102 INC_UINT, 103 DEC_UINT, 104 NOP_RTN = 32, 105 XCHG_RTN = 34, 106 XCHG_FDENORM_RTN, 107 CMPXCHG_INT_RTN, 108 CMPXCHG_FLT_RTN, 109 CMPXCHG_FDENORM_RTN, 110 ADD_RTN, 111 SUB_RTN, 112 RSUB_RTN, 113 MIN_INT_RTN, 114 MIN_UINT_RTN, 115 MAX_INT_RTN, 116 MAX_UINT_RTN, 117 AND_RTN, 118 OR_RTN, 119 XOR_RTN, 120 MSKOR_RTN, 121 UINT_RTN, 122 UNSUPPORTED 123 }; 124 125 RatInstr(ECFOpCode cf_opcode, 126 ERatOp rat_op, 127 const RegisterVec4& data, 128 const RegisterVec4& index, 129 int rat_id, 130 PRegister rat_id_offset, 131 int burst_count, 132 int comp_mask, 133 int element_size); 134 rat_op()135 ERatOp rat_op() const { return m_rat_op; } 136 value()137 const auto& value() const { return m_data; } value()138 auto& value() { return m_data; } 139 addr()140 const auto& addr() const { return m_index; } addr()141 auto& addr() { return m_index; } 142 data_gpr()143 int data_gpr() const { return m_data.sel(); } index_gpr()144 int index_gpr() const { return m_index.sel(); } elm_size()145 int elm_size() const { return m_element_size; } 146 comp_mask()147 int comp_mask() const { return m_comp_mask; } 148 need_ack()149 bool need_ack() const { return m_need_ack; } burst_count()150 int burst_count() const { return m_burst_count; } 151 data_swz(int chan)152 int data_swz(int chan) const { return m_data[chan]->chan(); } 153 cf_opcode()154 ECFOpCode cf_opcode() const { return m_cf_opcode; } 155 set_ack()156 void set_ack() 157 { 158 m_need_ack = true; 159 set_mark(); 160 } set_mark()161 void set_mark() { m_need_mark = true; } mark()162 bool mark() { return m_need_mark; } 163 164 void accept(ConstInstrVisitor& visitor) const override; 165 void accept(InstrVisitor& visitor) override; 166 167 bool is_equal_to(const RatInstr& lhs) const; 168 169 static bool emit(nir_intrinsic_instr *intr, Shader& shader); 170 171 void update_indirect_addr(PRegister old_reg, PRegister addr) override; 172 173 private: 174 static bool emit_global_store(nir_intrinsic_instr *intr, Shader& shader); 175 176 static bool emit_ssbo_load(nir_intrinsic_instr *intr, Shader& shader); 177 static bool emit_ssbo_store(nir_intrinsic_instr *intr, Shader& shader); 178 static bool emit_ssbo_atomic_op(nir_intrinsic_instr *intr, Shader& shader); 179 static bool emit_ssbo_size(nir_intrinsic_instr *intr, Shader& shader); 180 181 static bool emit_image_store(nir_intrinsic_instr *intr, Shader& shader); 182 static bool emit_image_load_or_atomic(nir_intrinsic_instr *intr, Shader& shader); 183 static bool emit_image_size(nir_intrinsic_instr *intr, Shader& shader); 184 static bool emit_image_samples(nir_intrinsic_instr *intrin, Shader& shader); 185 186 bool do_ready() const override; 187 void do_print(std::ostream& os) const override; 188 189 ECFOpCode m_cf_opcode; 190 ERatOp m_rat_op; 191 192 RegisterVec4 m_data; 193 RegisterVec4 m_index; 194 195 int m_burst_count{0}; 196 int m_comp_mask{15}; 197 int m_element_size{3}; 198 bool m_need_ack{false}; 199 bool m_need_mark{false}; 200 }; 201 202 } // namespace r600 203 204 #endif // GDSINSTR_H 205