1 /**********************************************************
2 * Copyright 2008-2013 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 /**
27 * @file svga_cmd_vgpu10.c
28 *
29 * Command construction utility for the vgpu10 SVGA3D protocol.
30 *
31 * \author Mingcheng Chen
32 * \author Brian Paul
33 */
34
35
36 #include "svga_winsys.h"
37 #include "svga_resource_buffer.h"
38 #include "svga_resource_texture.h"
39 #include "svga_surface.h"
40 #include "svga_cmd.h"
41
42
43 /**
44 * Emit a surface relocation for RenderTargetViewId
45 */
46 static void
view_relocation(struct svga_winsys_context * swc,struct pipe_surface * surface,SVGA3dRenderTargetViewId * id,unsigned flags)47 view_relocation(struct svga_winsys_context *swc, // IN
48 struct pipe_surface *surface, // IN
49 SVGA3dRenderTargetViewId *id, // OUT
50 unsigned flags)
51 {
52 if (surface) {
53 struct svga_surface *s = svga_surface(surface);
54 assert(s->handle);
55 swc->surface_relocation(swc, id, NULL, s->handle, flags);
56 }
57 else {
58 swc->surface_relocation(swc, id, NULL, NULL, flags);
59 }
60 }
61
62
63 /**
64 * Emit a surface relocation for a ResourceId.
65 */
66 static void
surface_to_resourceid(struct svga_winsys_context * swc,struct svga_winsys_surface * surface,SVGA3dSurfaceId * sid,unsigned flags)67 surface_to_resourceid(struct svga_winsys_context *swc, // IN
68 struct svga_winsys_surface *surface, // IN
69 SVGA3dSurfaceId *sid, // OUT
70 unsigned flags) // IN
71 {
72 if (surface) {
73 swc->surface_relocation(swc, sid, NULL, surface, flags);
74 }
75 else {
76 swc->surface_relocation(swc, sid, NULL, NULL, flags);
77 }
78 }
79
80
81 #define SVGA3D_CREATE_COMMAND(CommandName, CommandCode) \
82 SVGA3dCmdDX##CommandName *cmd; \
83 { \
84 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_##CommandCode, \
85 sizeof(SVGA3dCmdDX##CommandName), 0); \
86 if (!cmd) \
87 return PIPE_ERROR_OUT_OF_MEMORY; \
88 }
89
90 #define SVGA3D_CREATE_CMD_COUNT(CommandName, CommandCode, ElementClassName) \
91 SVGA3dCmdDX##CommandName *cmd; \
92 { \
93 assert(count > 0); \
94 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_##CommandCode, \
95 sizeof(SVGA3dCmdDX##CommandName) + \
96 count * sizeof(ElementClassName), 0); \
97 if (!cmd) \
98 return PIPE_ERROR_OUT_OF_MEMORY; \
99 }
100
101 #define SVGA3D_COPY_BASIC(VariableName) \
102 { \
103 cmd->VariableName = VariableName; \
104 }
105
106 #define SVGA3D_COPY_BASIC_2(VariableName1, VariableName2) \
107 { \
108 SVGA3D_COPY_BASIC(VariableName1); \
109 SVGA3D_COPY_BASIC(VariableName2); \
110 }
111
112 #define SVGA3D_COPY_BASIC_3(VariableName1, VariableName2, VariableName3) \
113 { \
114 SVGA3D_COPY_BASIC_2(VariableName1, VariableName2); \
115 SVGA3D_COPY_BASIC(VariableName3); \
116 }
117
118 #define SVGA3D_COPY_BASIC_4(VariableName1, VariableName2, VariableName3, \
119 VariableName4) \
120 { \
121 SVGA3D_COPY_BASIC_2(VariableName1, VariableName2); \
122 SVGA3D_COPY_BASIC_2(VariableName3, VariableName4); \
123 }
124
125 #define SVGA3D_COPY_BASIC_5(VariableName1, VariableName2, VariableName3, \
126 VariableName4, VariableName5) \
127 {\
128 SVGA3D_COPY_BASIC_3(VariableName1, VariableName2, VariableName3); \
129 SVGA3D_COPY_BASIC_2(VariableName4, VariableName5); \
130 }
131
132 #define SVGA3D_COPY_BASIC_6(VariableName1, VariableName2, VariableName3, \
133 VariableName4, VariableName5, VariableName6) \
134 {\
135 SVGA3D_COPY_BASIC_3(VariableName1, VariableName2, VariableName3); \
136 SVGA3D_COPY_BASIC_3(VariableName4, VariableName5, VariableName6); \
137 }
138
139 #define SVGA3D_COPY_BASIC_7(VariableName1, VariableName2, VariableName3, \
140 VariableName4, VariableName5, VariableName6, \
141 VariableName7) \
142 {\
143 SVGA3D_COPY_BASIC_4(VariableName1, VariableName2, VariableName3, \
144 VariableName4); \
145 SVGA3D_COPY_BASIC_3(VariableName5, VariableName6, VariableName7); \
146 }
147
148 #define SVGA3D_COPY_BASIC_8(VariableName1, VariableName2, VariableName3, \
149 VariableName4, VariableName5, VariableName6, \
150 VariableName7, VariableName8) \
151 {\
152 SVGA3D_COPY_BASIC_4(VariableName1, VariableName2, VariableName3, \
153 VariableName4); \
154 SVGA3D_COPY_BASIC_4(VariableName5, VariableName6, VariableName7, \
155 VariableName8); \
156 }
157
158 #define SVGA3D_COPY_BASIC_9(VariableName1, VariableName2, VariableName3, \
159 VariableName4, VariableName5, VariableName6, \
160 VariableName7, VariableName8, VariableName9) \
161 {\
162 SVGA3D_COPY_BASIC_5(VariableName1, VariableName2, VariableName3, \
163 VariableName4, VariableName5); \
164 SVGA3D_COPY_BASIC_4(VariableName6, VariableName7, VariableName8, \
165 VariableName9); \
166 }
167
168
169 enum pipe_error
SVGA3D_vgpu10_PredCopyRegion(struct svga_winsys_context * swc,struct svga_winsys_surface * dstSurf,uint32 dstSubResource,struct svga_winsys_surface * srcSurf,uint32 srcSubResource,const SVGA3dCopyBox * box)170 SVGA3D_vgpu10_PredCopyRegion(struct svga_winsys_context *swc,
171 struct svga_winsys_surface *dstSurf,
172 uint32 dstSubResource,
173 struct svga_winsys_surface *srcSurf,
174 uint32 srcSubResource,
175 const SVGA3dCopyBox *box)
176 {
177 SVGA3dCmdDXPredCopyRegion *cmd =
178 SVGA3D_FIFOReserve(swc,
179 SVGA_3D_CMD_DX_PRED_COPY_REGION,
180 sizeof(SVGA3dCmdDXPredCopyRegion),
181 2); /* two relocations */
182 if (!cmd)
183 return PIPE_ERROR_OUT_OF_MEMORY;
184
185 swc->surface_relocation(swc, &cmd->dstSid, NULL, dstSurf, SVGA_RELOC_WRITE);
186 swc->surface_relocation(swc, &cmd->srcSid, NULL, srcSurf, SVGA_RELOC_READ);
187 cmd->dstSubResource = dstSubResource;
188 cmd->srcSubResource = srcSubResource;
189 cmd->box = *box;
190
191 swc->commit(swc);
192
193 return PIPE_OK;
194 }
195
196
197 enum pipe_error
SVGA3D_vgpu10_PredCopy(struct svga_winsys_context * swc,struct svga_winsys_surface * dstSurf,struct svga_winsys_surface * srcSurf)198 SVGA3D_vgpu10_PredCopy(struct svga_winsys_context *swc,
199 struct svga_winsys_surface *dstSurf,
200 struct svga_winsys_surface *srcSurf)
201 {
202 SVGA3dCmdDXPredCopy *cmd =
203 SVGA3D_FIFOReserve(swc,
204 SVGA_3D_CMD_DX_PRED_COPY,
205 sizeof(SVGA3dCmdDXPredCopy),
206 2); /* two relocations */
207 if (!cmd)
208 return PIPE_ERROR_OUT_OF_MEMORY;
209
210 swc->surface_relocation(swc, &cmd->dstSid, NULL, dstSurf, SVGA_RELOC_WRITE);
211 swc->surface_relocation(swc, &cmd->srcSid, NULL, srcSurf, SVGA_RELOC_READ);
212
213 swc->commit(swc);
214
215 return PIPE_OK;
216 }
217
218 enum pipe_error
SVGA3D_vgpu10_SetViewports(struct svga_winsys_context * swc,unsigned count,const SVGA3dViewport * viewports)219 SVGA3D_vgpu10_SetViewports(struct svga_winsys_context *swc,
220 unsigned count,
221 const SVGA3dViewport *viewports)
222 {
223 SVGA3D_CREATE_CMD_COUNT(SetViewports, SET_VIEWPORTS, SVGA3dViewport);
224
225 cmd->pad0 = 0;
226 memcpy(cmd + 1, viewports, count * sizeof(SVGA3dViewport));
227
228 swc->commit(swc);
229 return PIPE_OK;
230 }
231
232
233 enum pipe_error
SVGA3D_vgpu10_SetShader(struct svga_winsys_context * swc,SVGA3dShaderType type,struct svga_winsys_gb_shader * gbshader,SVGA3dShaderId shaderId)234 SVGA3D_vgpu10_SetShader(struct svga_winsys_context *swc,
235 SVGA3dShaderType type,
236 struct svga_winsys_gb_shader *gbshader,
237 SVGA3dShaderId shaderId)
238 {
239 SVGA3dCmdDXSetShader *cmd = SVGA3D_FIFOReserve(swc,
240 SVGA_3D_CMD_DX_SET_SHADER,
241 sizeof *cmd,
242 1); /* one relocation */
243 if (!cmd)
244 return PIPE_ERROR_OUT_OF_MEMORY;
245
246 swc->shader_relocation(swc, &cmd->shaderId, NULL, NULL, gbshader, 0);
247
248 cmd->type = type;
249 cmd->shaderId = shaderId;
250 swc->commit(swc);
251
252 return PIPE_OK;
253 }
254
255
256 enum pipe_error
SVGA3D_vgpu10_SetShaderResources(struct svga_winsys_context * swc,SVGA3dShaderType type,uint32 startView,unsigned count,const SVGA3dShaderResourceViewId ids[],struct svga_winsys_surface ** views)257 SVGA3D_vgpu10_SetShaderResources(struct svga_winsys_context *swc,
258 SVGA3dShaderType type,
259 uint32 startView,
260 unsigned count,
261 const SVGA3dShaderResourceViewId ids[],
262 struct svga_winsys_surface **views)
263 {
264 SVGA3dCmdDXSetShaderResources *cmd;
265 SVGA3dShaderResourceViewId *cmd_ids;
266 unsigned i;
267
268 cmd = SVGA3D_FIFOReserve(swc,
269 SVGA_3D_CMD_DX_SET_SHADER_RESOURCES,
270 sizeof(SVGA3dCmdDXSetShaderResources) +
271 count * sizeof(SVGA3dShaderResourceViewId),
272 count); /* 'count' relocations */
273 if (!cmd)
274 return PIPE_ERROR_OUT_OF_MEMORY;
275
276
277 cmd->type = type;
278 cmd->startView = startView;
279
280 cmd_ids = (SVGA3dShaderResourceViewId *) (cmd + 1);
281 for (i = 0; i < count; i++) {
282 swc->surface_relocation(swc, cmd_ids + i, NULL, views[i],
283 SVGA_RELOC_READ);
284 cmd_ids[i] = ids[i];
285 }
286
287 swc->commit(swc);
288 return PIPE_OK;
289 }
290
291
292 enum pipe_error
SVGA3D_vgpu10_SetSamplers(struct svga_winsys_context * swc,unsigned count,uint32 startSampler,SVGA3dShaderType type,const SVGA3dSamplerId * samplerIds)293 SVGA3D_vgpu10_SetSamplers(struct svga_winsys_context *swc,
294 unsigned count,
295 uint32 startSampler,
296 SVGA3dShaderType type,
297 const SVGA3dSamplerId *samplerIds)
298 {
299 SVGA3D_CREATE_CMD_COUNT(SetSamplers, SET_SAMPLERS, SVGA3dSamplerId);
300
301 SVGA3D_COPY_BASIC_2(startSampler, type);
302 memcpy(cmd + 1, samplerIds, count * sizeof(SVGA3dSamplerId));
303
304 swc->commit(swc);
305 return PIPE_OK;
306 }
307
308
309 enum pipe_error
SVGA3D_vgpu10_ClearRenderTargetView(struct svga_winsys_context * swc,struct pipe_surface * color_surf,const float * rgba)310 SVGA3D_vgpu10_ClearRenderTargetView(struct svga_winsys_context *swc,
311 struct pipe_surface *color_surf,
312 const float *rgba)
313 {
314 SVGA3dCmdDXClearRenderTargetView *cmd;
315 struct svga_surface *ss = svga_surface(color_surf);
316
317 cmd = SVGA3D_FIFOReserve(swc,
318 SVGA_3D_CMD_DX_CLEAR_RENDERTARGET_VIEW,
319 sizeof(SVGA3dCmdDXClearRenderTargetView),
320 1); /* one relocation */
321 if (!cmd)
322 return PIPE_ERROR_OUT_OF_MEMORY;
323
324
325 /* NOTE: The following is pretty tricky. We need to emit a view/surface
326 * relocation and we have to provide a pointer to an ID which lies in
327 * the bounds of the command space which we just allocated. However,
328 * we then need to overwrite it with the original RenderTargetViewId.
329 */
330 view_relocation(swc, color_surf, &cmd->renderTargetViewId,
331 SVGA_RELOC_WRITE);
332 cmd->renderTargetViewId = ss->view_id;
333
334 COPY_4V(cmd->rgba.value, rgba);
335
336 swc->commit(swc);
337 return PIPE_OK;
338 }
339
340
341 enum pipe_error
SVGA3D_vgpu10_SetRenderTargets(struct svga_winsys_context * swc,unsigned color_count,struct pipe_surface ** color_surfs,struct pipe_surface * depth_stencil_surf)342 SVGA3D_vgpu10_SetRenderTargets(struct svga_winsys_context *swc,
343 unsigned color_count,
344 struct pipe_surface **color_surfs,
345 struct pipe_surface *depth_stencil_surf)
346 {
347 const unsigned surf_count = color_count + 1;
348 SVGA3dCmdDXSetRenderTargets *cmd;
349 SVGA3dRenderTargetViewId *ctarget;
350 struct svga_surface *ss;
351 unsigned i;
352
353 assert(surf_count > 0);
354
355 cmd = SVGA3D_FIFOReserve(swc,
356 SVGA_3D_CMD_DX_SET_RENDERTARGETS,
357 sizeof(SVGA3dCmdDXSetRenderTargets) +
358 color_count * sizeof(SVGA3dRenderTargetViewId),
359 surf_count); /* 'surf_count' relocations */
360 if (!cmd)
361 return PIPE_ERROR_OUT_OF_MEMORY;
362
363 /* NOTE: See earlier comment about the tricky handling of the ViewIds.
364 */
365
366 /* Depth / Stencil buffer */
367 if (depth_stencil_surf) {
368 ss = svga_surface(depth_stencil_surf);
369 view_relocation(swc, depth_stencil_surf, &cmd->depthStencilViewId,
370 SVGA_RELOC_WRITE);
371 cmd->depthStencilViewId = ss->view_id;
372 }
373 else {
374 /* no depth/stencil buffer - still need a relocation */
375 view_relocation(swc, NULL, &cmd->depthStencilViewId,
376 SVGA_RELOC_WRITE);
377 cmd->depthStencilViewId = SVGA3D_INVALID_ID;
378 }
379
380 /* Color buffers */
381 ctarget = (SVGA3dRenderTargetViewId *) &cmd[1];
382 for (i = 0; i < color_count; i++) {
383 if (color_surfs[i]) {
384 ss = svga_surface(color_surfs[i]);
385 view_relocation(swc, color_surfs[i], ctarget + i, SVGA_RELOC_WRITE);
386 ctarget[i] = ss->view_id;
387 }
388 else {
389 view_relocation(swc, NULL, ctarget + i, SVGA_RELOC_WRITE);
390 ctarget[i] = SVGA3D_INVALID_ID;
391 }
392 }
393
394 swc->commit(swc);
395 return PIPE_OK;
396 }
397
398
399 enum pipe_error
SVGA3D_vgpu10_SetBlendState(struct svga_winsys_context * swc,SVGA3dBlendStateId blendId,const float * blendFactor,uint32 sampleMask)400 SVGA3D_vgpu10_SetBlendState(struct svga_winsys_context *swc,
401 SVGA3dBlendStateId blendId,
402 const float *blendFactor,
403 uint32 sampleMask)
404 {
405 SVGA3D_CREATE_COMMAND(SetBlendState, SET_BLEND_STATE);
406
407 SVGA3D_COPY_BASIC_2(blendId, sampleMask);
408 memcpy(cmd->blendFactor, blendFactor, sizeof(float) * 4);
409
410 swc->commit(swc);
411 return PIPE_OK;
412 }
413
414 enum pipe_error
SVGA3D_vgpu10_SetDepthStencilState(struct svga_winsys_context * swc,SVGA3dDepthStencilStateId depthStencilId,uint32 stencilRef)415 SVGA3D_vgpu10_SetDepthStencilState(struct svga_winsys_context *swc,
416 SVGA3dDepthStencilStateId depthStencilId,
417 uint32 stencilRef)
418 {
419 SVGA3D_CREATE_COMMAND(SetDepthStencilState, SET_DEPTHSTENCIL_STATE);
420
421 SVGA3D_COPY_BASIC_2(depthStencilId, stencilRef);
422
423 swc->commit(swc);
424 return PIPE_OK;
425 }
426
427 enum pipe_error
SVGA3D_vgpu10_SetRasterizerState(struct svga_winsys_context * swc,SVGA3dRasterizerStateId rasterizerId)428 SVGA3D_vgpu10_SetRasterizerState(struct svga_winsys_context *swc,
429 SVGA3dRasterizerStateId rasterizerId)
430 {
431 SVGA3D_CREATE_COMMAND(SetRasterizerState, SET_RASTERIZER_STATE);
432
433 cmd->rasterizerId = rasterizerId;
434
435 swc->commit(swc);
436 return PIPE_OK;
437 }
438
439 enum pipe_error
SVGA3D_vgpu10_SetPredication(struct svga_winsys_context * swc,SVGA3dQueryId queryId,uint32 predicateValue)440 SVGA3D_vgpu10_SetPredication(struct svga_winsys_context *swc,
441 SVGA3dQueryId queryId,
442 uint32 predicateValue)
443 {
444 SVGA3dCmdDXSetPredication *cmd;
445
446 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_PREDICATION,
447 sizeof *cmd, 0);
448
449 if (!cmd)
450 return PIPE_ERROR_OUT_OF_MEMORY;
451
452 cmd->queryId = queryId;
453 cmd->predicateValue = predicateValue;
454 swc->commit(swc);
455 return PIPE_OK;
456 }
457
458 enum pipe_error
SVGA3D_vgpu10_SetSOTargets(struct svga_winsys_context * swc,unsigned count,const SVGA3dSoTarget * targets,struct svga_winsys_surface ** surfaces)459 SVGA3D_vgpu10_SetSOTargets(struct svga_winsys_context *swc,
460 unsigned count,
461 const SVGA3dSoTarget *targets,
462 struct svga_winsys_surface **surfaces)
463 {
464 SVGA3dCmdDXSetSOTargets *cmd;
465 SVGA3dSoTarget *sot;
466 unsigned i;
467
468 cmd = SVGA3D_FIFOReserve(swc,
469 SVGA_3D_CMD_DX_SET_SOTARGETS,
470 sizeof(SVGA3dCmdDXSetSOTargets) +
471 count * sizeof(SVGA3dSoTarget),
472 count);
473
474 if (!cmd)
475 return PIPE_ERROR_OUT_OF_MEMORY;
476
477 cmd->pad0 = 0;
478 sot = (SVGA3dSoTarget *)(cmd + 1);
479 for (i = 0; i < count; i++, sot++) {
480 if (surfaces[i]) {
481 sot->offset = targets[i].offset;
482 sot->sizeInBytes = targets[i].sizeInBytes;
483 swc->surface_relocation(swc, &sot->sid, NULL, surfaces[i],
484 SVGA_RELOC_WRITE);
485 }
486 else {
487 sot->offset = 0;
488 sot->sizeInBytes = ~0u;
489 swc->surface_relocation(swc, &sot->sid, NULL, NULL,
490 SVGA_RELOC_WRITE);
491 }
492 }
493 swc->commit(swc);
494 return PIPE_OK;
495 }
496
497 enum pipe_error
SVGA3D_vgpu10_SetScissorRects(struct svga_winsys_context * swc,unsigned count,const SVGASignedRect * rects)498 SVGA3D_vgpu10_SetScissorRects(struct svga_winsys_context *swc,
499 unsigned count,
500 const SVGASignedRect *rects)
501 {
502 SVGA3dCmdDXSetScissorRects *cmd;
503
504 assert(count > 0);
505 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_SCISSORRECTS,
506 sizeof(SVGA3dCmdDXSetScissorRects) +
507 count * sizeof(SVGASignedRect),
508 0);
509 if (!cmd)
510 return PIPE_ERROR_OUT_OF_MEMORY;
511
512 cmd->pad0 = 0;
513 memcpy(cmd + 1, rects, count * sizeof(SVGASignedRect));
514
515 swc->commit(swc);
516 return PIPE_OK;
517 }
518
519 enum pipe_error
SVGA3D_vgpu10_SetStreamOutput(struct svga_winsys_context * swc,SVGA3dStreamOutputId soid)520 SVGA3D_vgpu10_SetStreamOutput(struct svga_winsys_context *swc,
521 SVGA3dStreamOutputId soid)
522 {
523 SVGA3D_CREATE_COMMAND(SetStreamOutput, SET_STREAMOUTPUT);
524
525 cmd->soid = soid;
526
527 swc->commit(swc);
528 return PIPE_OK;
529 }
530
531 enum pipe_error
SVGA3D_vgpu10_Draw(struct svga_winsys_context * swc,uint32 vertexCount,uint32 startVertexLocation)532 SVGA3D_vgpu10_Draw(struct svga_winsys_context *swc,
533 uint32 vertexCount,
534 uint32 startVertexLocation)
535 {
536 SVGA3D_CREATE_COMMAND(Draw, DRAW);
537
538 SVGA3D_COPY_BASIC_2(vertexCount, startVertexLocation);
539
540 swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
541 swc->commit(swc);
542 swc->num_draw_commands++;
543 return PIPE_OK;
544 }
545
546 enum pipe_error
SVGA3D_vgpu10_DrawIndexed(struct svga_winsys_context * swc,uint32 indexCount,uint32 startIndexLocation,int32 baseVertexLocation)547 SVGA3D_vgpu10_DrawIndexed(struct svga_winsys_context *swc,
548 uint32 indexCount,
549 uint32 startIndexLocation,
550 int32 baseVertexLocation)
551 {
552 SVGA3D_CREATE_COMMAND(DrawIndexed, DRAW_INDEXED);
553
554 SVGA3D_COPY_BASIC_3(indexCount, startIndexLocation,
555 baseVertexLocation);
556
557 swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
558 swc->commit(swc);
559 swc->num_draw_commands++;
560 return PIPE_OK;
561 }
562
563 enum pipe_error
SVGA3D_vgpu10_DrawInstanced(struct svga_winsys_context * swc,uint32 vertexCountPerInstance,uint32 instanceCount,uint32 startVertexLocation,uint32 startInstanceLocation)564 SVGA3D_vgpu10_DrawInstanced(struct svga_winsys_context *swc,
565 uint32 vertexCountPerInstance,
566 uint32 instanceCount,
567 uint32 startVertexLocation,
568 uint32 startInstanceLocation)
569 {
570 SVGA3D_CREATE_COMMAND(DrawInstanced, DRAW_INSTANCED);
571
572 SVGA3D_COPY_BASIC_4(vertexCountPerInstance, instanceCount,
573 startVertexLocation, startInstanceLocation);
574
575 swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
576 swc->commit(swc);
577 swc->num_draw_commands++;
578 return PIPE_OK;
579 }
580
581 enum pipe_error
SVGA3D_vgpu10_DrawIndexedInstanced(struct svga_winsys_context * swc,uint32 indexCountPerInstance,uint32 instanceCount,uint32 startIndexLocation,int32 baseVertexLocation,uint32 startInstanceLocation)582 SVGA3D_vgpu10_DrawIndexedInstanced(struct svga_winsys_context *swc,
583 uint32 indexCountPerInstance,
584 uint32 instanceCount,
585 uint32 startIndexLocation,
586 int32 baseVertexLocation,
587 uint32 startInstanceLocation)
588 {
589 SVGA3D_CREATE_COMMAND(DrawIndexedInstanced, DRAW_INDEXED_INSTANCED);
590
591 SVGA3D_COPY_BASIC_5(indexCountPerInstance, instanceCount,
592 startIndexLocation, baseVertexLocation,
593 startInstanceLocation);
594
595
596 swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
597 swc->commit(swc);
598 swc->num_draw_commands++;
599 return PIPE_OK;
600 }
601
602 enum pipe_error
SVGA3D_vgpu10_DrawAuto(struct svga_winsys_context * swc)603 SVGA3D_vgpu10_DrawAuto(struct svga_winsys_context *swc)
604 {
605 SVGA3D_CREATE_COMMAND(DrawAuto, DRAW_AUTO);
606
607 cmd->pad0 = 0;
608 swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
609 swc->commit(swc);
610 swc->num_draw_commands++;
611 return PIPE_OK;
612 }
613
614 enum pipe_error
SVGA3D_vgpu10_DefineQuery(struct svga_winsys_context * swc,SVGA3dQueryId queryId,SVGA3dQueryType type,SVGA3dDXQueryFlags flags)615 SVGA3D_vgpu10_DefineQuery(struct svga_winsys_context *swc,
616 SVGA3dQueryId queryId,
617 SVGA3dQueryType type,
618 SVGA3dDXQueryFlags flags)
619 {
620 SVGA3D_CREATE_COMMAND(DefineQuery, DEFINE_QUERY);
621
622 SVGA3D_COPY_BASIC_3(queryId, type, flags);
623
624 swc->commit(swc);
625 return PIPE_OK;
626 }
627
628 enum pipe_error
SVGA3D_vgpu10_DestroyQuery(struct svga_winsys_context * swc,SVGA3dQueryId queryId)629 SVGA3D_vgpu10_DestroyQuery(struct svga_winsys_context *swc,
630 SVGA3dQueryId queryId)
631 {
632 SVGA3D_CREATE_COMMAND(DestroyQuery, DESTROY_QUERY);
633
634 cmd->queryId = queryId;
635
636 swc->commit(swc);
637 return PIPE_OK;
638 }
639
640 enum pipe_error
SVGA3D_vgpu10_BindQuery(struct svga_winsys_context * swc,struct svga_winsys_gb_query * gbQuery,SVGA3dQueryId queryId)641 SVGA3D_vgpu10_BindQuery(struct svga_winsys_context *swc,
642 struct svga_winsys_gb_query *gbQuery,
643 SVGA3dQueryId queryId)
644 {
645 SVGA3dCmdDXBindQuery *cmd = SVGA3D_FIFOReserve(swc,
646 SVGA_3D_CMD_DX_BIND_QUERY,
647 sizeof *cmd,
648 1);
649 if (!cmd)
650 return PIPE_ERROR_OUT_OF_MEMORY;
651
652 cmd->queryId = queryId;
653 swc->query_relocation(swc, &cmd->mobid, gbQuery);
654
655 swc->commit(swc);
656 return PIPE_OK;
657 }
658
659 enum pipe_error
SVGA3D_vgpu10_SetQueryOffset(struct svga_winsys_context * swc,SVGA3dQueryId queryId,uint32 mobOffset)660 SVGA3D_vgpu10_SetQueryOffset(struct svga_winsys_context *swc,
661 SVGA3dQueryId queryId,
662 uint32 mobOffset)
663 {
664 SVGA3D_CREATE_COMMAND(SetQueryOffset, SET_QUERY_OFFSET);
665 SVGA3D_COPY_BASIC_2(queryId, mobOffset);
666 swc->commit(swc);
667 return PIPE_OK;
668 }
669
670 enum pipe_error
SVGA3D_vgpu10_BeginQuery(struct svga_winsys_context * swc,SVGA3dQueryId queryId)671 SVGA3D_vgpu10_BeginQuery(struct svga_winsys_context *swc,
672 SVGA3dQueryId queryId)
673 {
674 SVGA3D_CREATE_COMMAND(BeginQuery, BEGIN_QUERY);
675 cmd->queryId = queryId;
676 swc->commit(swc);
677 return PIPE_OK;
678 }
679
680 enum pipe_error
SVGA3D_vgpu10_EndQuery(struct svga_winsys_context * swc,SVGA3dQueryId queryId)681 SVGA3D_vgpu10_EndQuery(struct svga_winsys_context *swc,
682 SVGA3dQueryId queryId)
683 {
684 SVGA3D_CREATE_COMMAND(EndQuery, END_QUERY);
685 cmd->queryId = queryId;
686 swc->commit(swc);
687 return PIPE_OK;
688 }
689
690
691 enum pipe_error
SVGA3D_vgpu10_ClearDepthStencilView(struct svga_winsys_context * swc,struct pipe_surface * ds_surf,uint16 flags,uint16 stencil,float depth)692 SVGA3D_vgpu10_ClearDepthStencilView(struct svga_winsys_context *swc,
693 struct pipe_surface *ds_surf,
694 uint16 flags,
695 uint16 stencil,
696 float depth)
697 {
698 SVGA3dCmdDXClearDepthStencilView *cmd;
699 struct svga_surface *ss = svga_surface(ds_surf);
700
701 cmd = SVGA3D_FIFOReserve(swc,
702 SVGA_3D_CMD_DX_CLEAR_DEPTHSTENCIL_VIEW,
703 sizeof(SVGA3dCmdDXClearDepthStencilView),
704 1); /* one relocation */
705 if (!cmd)
706 return PIPE_ERROR_OUT_OF_MEMORY;
707
708 /* NOTE: The following is pretty tricky. We need to emit a view/surface
709 * relocation and we have to provide a pointer to an ID which lies in
710 * the bounds of the command space which we just allocated. However,
711 * we then need to overwrite it with the original DepthStencilViewId.
712 */
713 view_relocation(swc, ds_surf, &cmd->depthStencilViewId,
714 SVGA_RELOC_WRITE);
715 cmd->depthStencilViewId = ss->view_id;
716 cmd->flags = flags;
717 cmd->stencil = stencil;
718 cmd->depth = depth;
719
720 swc->commit(swc);
721 return PIPE_OK;
722 }
723
724 enum pipe_error
SVGA3D_vgpu10_DefineShaderResourceView(struct svga_winsys_context * swc,SVGA3dShaderResourceViewId shaderResourceViewId,struct svga_winsys_surface * surface,SVGA3dSurfaceFormat format,SVGA3dResourceType resourceDimension,const SVGA3dShaderResourceViewDesc * desc)725 SVGA3D_vgpu10_DefineShaderResourceView(struct svga_winsys_context *swc,
726 SVGA3dShaderResourceViewId shaderResourceViewId,
727 struct svga_winsys_surface *surface,
728 SVGA3dSurfaceFormat format,
729 SVGA3dResourceType resourceDimension,
730 const SVGA3dShaderResourceViewDesc *desc)
731 {
732 SVGA3dCmdDXDefineShaderResourceView *cmd;
733
734 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_DEFINE_SHADERRESOURCE_VIEW,
735 sizeof(SVGA3dCmdDXDefineShaderResourceView),
736 1); /* one relocation */
737 if (!cmd)
738 return PIPE_ERROR_OUT_OF_MEMORY;
739
740 SVGA3D_COPY_BASIC_3(shaderResourceViewId, format, resourceDimension);
741
742 swc->surface_relocation(swc, &cmd->sid, NULL, surface,
743 SVGA_RELOC_READ);
744
745 cmd->desc = *desc;
746
747 swc->commit(swc);
748 return PIPE_OK;
749 }
750
751 enum pipe_error
SVGA3D_vgpu10_DestroyShaderResourceView(struct svga_winsys_context * swc,SVGA3dShaderResourceViewId shaderResourceViewId)752 SVGA3D_vgpu10_DestroyShaderResourceView(struct svga_winsys_context *swc,
753 SVGA3dShaderResourceViewId shaderResourceViewId)
754 {
755 SVGA3D_CREATE_COMMAND(DestroyShaderResourceView,
756 DESTROY_SHADERRESOURCE_VIEW);
757
758 cmd->shaderResourceViewId = shaderResourceViewId;
759
760 swc->commit(swc);
761 return PIPE_OK;
762 }
763
764
765 enum pipe_error
SVGA3D_vgpu10_DefineRenderTargetView(struct svga_winsys_context * swc,SVGA3dRenderTargetViewId renderTargetViewId,struct svga_winsys_surface * surface,SVGA3dSurfaceFormat format,SVGA3dResourceType resourceDimension,const SVGA3dRenderTargetViewDesc * desc)766 SVGA3D_vgpu10_DefineRenderTargetView(struct svga_winsys_context *swc,
767 SVGA3dRenderTargetViewId renderTargetViewId,
768 struct svga_winsys_surface *surface,
769 SVGA3dSurfaceFormat format,
770 SVGA3dResourceType resourceDimension,
771 const SVGA3dRenderTargetViewDesc *desc)
772 {
773 SVGA3dCmdDXDefineRenderTargetView *cmd;
774
775 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_DEFINE_RENDERTARGET_VIEW,
776 sizeof(SVGA3dCmdDXDefineRenderTargetView),
777 1); /* one relocation */
778 if (!cmd)
779 return PIPE_ERROR_OUT_OF_MEMORY;
780
781 SVGA3D_COPY_BASIC_3(renderTargetViewId, format, resourceDimension);
782 cmd->desc = *desc;
783
784 surface_to_resourceid(swc, surface,
785 &cmd->sid,
786 SVGA_RELOC_READ | SVGA_RELOC_WRITE);
787
788 swc->commit(swc);
789 return PIPE_OK;
790 }
791
792 enum pipe_error
SVGA3D_vgpu10_DestroyRenderTargetView(struct svga_winsys_context * swc,SVGA3dRenderTargetViewId renderTargetViewId)793 SVGA3D_vgpu10_DestroyRenderTargetView(struct svga_winsys_context *swc,
794 SVGA3dRenderTargetViewId renderTargetViewId)
795 {
796 SVGA3D_CREATE_COMMAND(DestroyRenderTargetView, DESTROY_RENDERTARGET_VIEW);
797
798 cmd->renderTargetViewId = renderTargetViewId;
799
800 swc->commit(swc);
801 return PIPE_OK;
802 }
803
804
805 enum pipe_error
SVGA3D_vgpu10_DefineDepthStencilView(struct svga_winsys_context * swc,SVGA3dDepthStencilViewId depthStencilViewId,struct svga_winsys_surface * surface,SVGA3dSurfaceFormat format,SVGA3dResourceType resourceDimension,const SVGA3dRenderTargetViewDesc * desc)806 SVGA3D_vgpu10_DefineDepthStencilView(struct svga_winsys_context *swc,
807 SVGA3dDepthStencilViewId depthStencilViewId,
808 struct svga_winsys_surface *surface,
809 SVGA3dSurfaceFormat format,
810 SVGA3dResourceType resourceDimension,
811 const SVGA3dRenderTargetViewDesc *desc)
812 {
813 SVGA3dCmdDXDefineDepthStencilView *cmd;
814
815 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW,
816 sizeof(SVGA3dCmdDXDefineDepthStencilView),
817 1); /* one relocation */
818 if (!cmd)
819 return PIPE_ERROR_OUT_OF_MEMORY;
820
821 SVGA3D_COPY_BASIC_3(depthStencilViewId, format, resourceDimension);
822 cmd->mipSlice = desc->tex.mipSlice;
823 cmd->firstArraySlice = desc->tex.firstArraySlice;
824 cmd->arraySize = desc->tex.arraySize;
825 cmd->flags = 0;
826 cmd->pad0 = 0;
827 cmd->pad1 = 0;
828
829 surface_to_resourceid(swc, surface,
830 &cmd->sid,
831 SVGA_RELOC_READ | SVGA_RELOC_WRITE);
832
833 swc->commit(swc);
834 return PIPE_OK;
835 }
836
837 enum pipe_error
SVGA3D_vgpu10_DestroyDepthStencilView(struct svga_winsys_context * swc,SVGA3dDepthStencilViewId depthStencilViewId)838 SVGA3D_vgpu10_DestroyDepthStencilView(struct svga_winsys_context *swc,
839 SVGA3dDepthStencilViewId depthStencilViewId)
840 {
841 SVGA3D_CREATE_COMMAND(DestroyDepthStencilView, DESTROY_DEPTHSTENCIL_VIEW);
842
843 cmd->depthStencilViewId = depthStencilViewId;
844
845 swc->commit(swc);
846 return PIPE_OK;
847 }
848
849 enum pipe_error
SVGA3D_vgpu10_DefineElementLayout(struct svga_winsys_context * swc,unsigned count,SVGA3dElementLayoutId elementLayoutId,const SVGA3dInputElementDesc * elements)850 SVGA3D_vgpu10_DefineElementLayout(struct svga_winsys_context *swc,
851 unsigned count,
852 SVGA3dElementLayoutId elementLayoutId,
853 const SVGA3dInputElementDesc *elements)
854 {
855 SVGA3dCmdDXDefineElementLayout *cmd;
856
857 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_DEFINE_ELEMENTLAYOUT,
858 sizeof(SVGA3dCmdDXDefineElementLayout) +
859 count * sizeof(SVGA3dInputElementDesc), 0);
860 if (!cmd)
861 return PIPE_ERROR_OUT_OF_MEMORY;
862
863 cmd->elementLayoutId = elementLayoutId;
864 memcpy(cmd + 1, elements, count * sizeof(SVGA3dInputElementDesc));
865
866 swc->commit(swc);
867 return PIPE_OK;
868 }
869
870 enum pipe_error
SVGA3D_vgpu10_DestroyElementLayout(struct svga_winsys_context * swc,SVGA3dElementLayoutId elementLayoutId)871 SVGA3D_vgpu10_DestroyElementLayout(struct svga_winsys_context *swc,
872 SVGA3dElementLayoutId elementLayoutId)
873 {
874 SVGA3D_CREATE_COMMAND(DestroyElementLayout, DESTROY_ELEMENTLAYOUT);
875
876 cmd->elementLayoutId = elementLayoutId;
877
878 swc->commit(swc);
879 return PIPE_OK;
880 }
881
882 enum pipe_error
SVGA3D_vgpu10_DefineBlendState(struct svga_winsys_context * swc,SVGA3dBlendStateId blendId,uint8 alphaToCoverageEnable,uint8 independentBlendEnable,const SVGA3dDXBlendStatePerRT * perRT)883 SVGA3D_vgpu10_DefineBlendState(struct svga_winsys_context *swc,
884 SVGA3dBlendStateId blendId,
885 uint8 alphaToCoverageEnable,
886 uint8 independentBlendEnable,
887 const SVGA3dDXBlendStatePerRT *perRT)
888 {
889 int i;
890
891 SVGA3D_CREATE_COMMAND(DefineBlendState, DEFINE_BLEND_STATE);
892
893 for (i = 0; i < SVGA3D_MAX_RENDER_TARGETS; i++) {
894 /* At most, one of blend or logicop can be enabled */
895 assert(perRT[i].blendEnable == 0 || perRT[i].logicOpEnable == 0);
896 }
897
898 cmd->blendId = blendId;
899 cmd->alphaToCoverageEnable = alphaToCoverageEnable;
900 cmd->independentBlendEnable = independentBlendEnable;
901 memcpy(cmd->perRT, perRT, sizeof(cmd->perRT));
902 cmd->pad0 = 0;
903
904 swc->commit(swc);
905 return PIPE_OK;
906 }
907
908 enum pipe_error
SVGA3D_vgpu10_DestroyBlendState(struct svga_winsys_context * swc,SVGA3dBlendStateId blendId)909 SVGA3D_vgpu10_DestroyBlendState(struct svga_winsys_context *swc,
910 SVGA3dBlendStateId blendId)
911 {
912 SVGA3D_CREATE_COMMAND(DestroyBlendState, DESTROY_BLEND_STATE);
913
914 cmd->blendId = blendId;
915
916 swc->commit(swc);
917 return PIPE_OK;
918 }
919
920 enum pipe_error
SVGA3D_vgpu10_DefineDepthStencilState(struct svga_winsys_context * swc,SVGA3dDepthStencilStateId depthStencilId,uint8 depthEnable,SVGA3dDepthWriteMask depthWriteMask,SVGA3dComparisonFunc depthFunc,uint8 stencilEnable,uint8 frontEnable,uint8 backEnable,uint8 stencilReadMask,uint8 stencilWriteMask,uint8 frontStencilFailOp,uint8 frontStencilDepthFailOp,uint8 frontStencilPassOp,SVGA3dComparisonFunc frontStencilFunc,uint8 backStencilFailOp,uint8 backStencilDepthFailOp,uint8 backStencilPassOp,SVGA3dComparisonFunc backStencilFunc)921 SVGA3D_vgpu10_DefineDepthStencilState(struct svga_winsys_context *swc,
922 SVGA3dDepthStencilStateId depthStencilId,
923 uint8 depthEnable,
924 SVGA3dDepthWriteMask depthWriteMask,
925 SVGA3dComparisonFunc depthFunc,
926 uint8 stencilEnable,
927 uint8 frontEnable,
928 uint8 backEnable,
929 uint8 stencilReadMask,
930 uint8 stencilWriteMask,
931 uint8 frontStencilFailOp,
932 uint8 frontStencilDepthFailOp,
933 uint8 frontStencilPassOp,
934 SVGA3dComparisonFunc frontStencilFunc,
935 uint8 backStencilFailOp,
936 uint8 backStencilDepthFailOp,
937 uint8 backStencilPassOp,
938 SVGA3dComparisonFunc backStencilFunc)
939 {
940 SVGA3D_CREATE_COMMAND(DefineDepthStencilState, DEFINE_DEPTHSTENCIL_STATE);
941
942 SVGA3D_COPY_BASIC_9(depthStencilId, depthEnable,
943 depthWriteMask, depthFunc,
944 stencilEnable, frontEnable,
945 backEnable, stencilReadMask,
946 stencilWriteMask);
947 SVGA3D_COPY_BASIC_8(frontStencilFailOp, frontStencilDepthFailOp,
948 frontStencilPassOp, frontStencilFunc,
949 backStencilFailOp, backStencilDepthFailOp,
950 backStencilPassOp, backStencilFunc);
951
952 swc->commit(swc);
953 return PIPE_OK;
954 }
955
956 enum pipe_error
SVGA3D_vgpu10_DestroyDepthStencilState(struct svga_winsys_context * swc,SVGA3dDepthStencilStateId depthStencilId)957 SVGA3D_vgpu10_DestroyDepthStencilState(struct svga_winsys_context *swc,
958 SVGA3dDepthStencilStateId depthStencilId)
959 {
960 SVGA3D_CREATE_COMMAND(DestroyDepthStencilState,
961 DESTROY_DEPTHSTENCIL_STATE);
962
963 cmd->depthStencilId = depthStencilId;
964
965 swc->commit(swc);
966 return PIPE_OK;
967 }
968
969 enum pipe_error
SVGA3D_vgpu10_DefineRasterizerState(struct svga_winsys_context * swc,SVGA3dRasterizerStateId rasterizerId,uint8 fillMode,SVGA3dCullMode cullMode,uint8 frontCounterClockwise,int32 depthBias,float depthBiasClamp,float slopeScaledDepthBias,uint8 depthClipEnable,uint8 scissorEnable,uint8 multisampleEnable,uint8 antialiasedLineEnable,float lineWidth,uint8 lineStippleEnable,uint8 lineStippleFactor,uint16 lineStipplePattern,uint8 provokingVertexLast)970 SVGA3D_vgpu10_DefineRasterizerState(struct svga_winsys_context *swc,
971 SVGA3dRasterizerStateId rasterizerId,
972 uint8 fillMode,
973 SVGA3dCullMode cullMode,
974 uint8 frontCounterClockwise,
975 int32 depthBias,
976 float depthBiasClamp,
977 float slopeScaledDepthBias,
978 uint8 depthClipEnable,
979 uint8 scissorEnable,
980 uint8 multisampleEnable,
981 uint8 antialiasedLineEnable,
982 float lineWidth,
983 uint8 lineStippleEnable,
984 uint8 lineStippleFactor,
985 uint16 lineStipplePattern,
986 uint8 provokingVertexLast)
987 {
988 SVGA3D_CREATE_COMMAND(DefineRasterizerState, DEFINE_RASTERIZER_STATE);
989
990 SVGA3D_COPY_BASIC_5(rasterizerId, fillMode,
991 cullMode, frontCounterClockwise,
992 depthBias);
993 SVGA3D_COPY_BASIC_6(depthBiasClamp, slopeScaledDepthBias,
994 depthClipEnable, scissorEnable,
995 multisampleEnable, antialiasedLineEnable);
996 cmd->lineWidth = lineWidth;
997 cmd->lineStippleEnable = lineStippleEnable;
998 cmd->lineStippleFactor = lineStippleFactor;
999 cmd->lineStipplePattern = lineStipplePattern;
1000 cmd->provokingVertexLast = provokingVertexLast;
1001
1002 swc->commit(swc);
1003 return PIPE_OK;
1004 }
1005
1006 enum pipe_error
SVGA3D_vgpu10_DestroyRasterizerState(struct svga_winsys_context * swc,SVGA3dRasterizerStateId rasterizerId)1007 SVGA3D_vgpu10_DestroyRasterizerState(struct svga_winsys_context *swc,
1008 SVGA3dRasterizerStateId rasterizerId)
1009 {
1010 SVGA3D_CREATE_COMMAND(DestroyRasterizerState, DESTROY_RASTERIZER_STATE);
1011
1012 cmd->rasterizerId = rasterizerId;
1013
1014 swc->commit(swc);
1015 return PIPE_OK;
1016 }
1017
1018 enum pipe_error
SVGA3D_vgpu10_DefineSamplerState(struct svga_winsys_context * swc,SVGA3dSamplerId samplerId,SVGA3dFilter filter,uint8 addressU,uint8 addressV,uint8 addressW,float mipLODBias,uint8 maxAnisotropy,uint8 comparisonFunc,SVGA3dRGBAFloat borderColor,float minLOD,float maxLOD)1019 SVGA3D_vgpu10_DefineSamplerState(struct svga_winsys_context *swc,
1020 SVGA3dSamplerId samplerId,
1021 SVGA3dFilter filter,
1022 uint8 addressU,
1023 uint8 addressV,
1024 uint8 addressW,
1025 float mipLODBias,
1026 uint8 maxAnisotropy,
1027 uint8 comparisonFunc,
1028 SVGA3dRGBAFloat borderColor,
1029 float minLOD,
1030 float maxLOD)
1031 {
1032 SVGA3D_CREATE_COMMAND(DefineSamplerState, DEFINE_SAMPLER_STATE);
1033
1034 SVGA3D_COPY_BASIC_6(samplerId, filter,
1035 addressU, addressV,
1036 addressW, mipLODBias);
1037 SVGA3D_COPY_BASIC_5(maxAnisotropy, comparisonFunc,
1038 borderColor, minLOD,
1039 maxLOD);
1040 cmd->pad0 = 0;
1041 cmd->pad1 = 0;
1042
1043 swc->commit(swc);
1044 return PIPE_OK;
1045 }
1046
1047 enum pipe_error
SVGA3D_vgpu10_DestroySamplerState(struct svga_winsys_context * swc,SVGA3dSamplerId samplerId)1048 SVGA3D_vgpu10_DestroySamplerState(struct svga_winsys_context *swc,
1049 SVGA3dSamplerId samplerId)
1050 {
1051 SVGA3D_CREATE_COMMAND(DestroySamplerState, DESTROY_SAMPLER_STATE);
1052
1053 cmd->samplerId = samplerId;
1054
1055 swc->commit(swc);
1056 return PIPE_OK;
1057 }
1058
1059
1060 enum pipe_error
SVGA3D_vgpu10_DefineAndBindShader(struct svga_winsys_context * swc,struct svga_winsys_gb_shader * gbshader,SVGA3dShaderId shaderId,SVGA3dShaderType type,uint32 sizeInBytes)1061 SVGA3D_vgpu10_DefineAndBindShader(struct svga_winsys_context *swc,
1062 struct svga_winsys_gb_shader *gbshader,
1063 SVGA3dShaderId shaderId,
1064 SVGA3dShaderType type,
1065 uint32 sizeInBytes)
1066 {
1067 SVGA3dCmdHeader *header;
1068 SVGA3dCmdDXDefineShader *dcmd;
1069 SVGA3dCmdDXBindShader *bcmd;
1070 unsigned totalSize = 2 * sizeof(*header) +
1071 sizeof(*dcmd) + sizeof(*bcmd);
1072
1073 /* Make sure there is room for both commands */
1074 header = swc->reserve(swc, totalSize, 2);
1075 if (!header)
1076 return PIPE_ERROR_OUT_OF_MEMORY;
1077
1078 /* DXDefineShader command */
1079 header->id = SVGA_3D_CMD_DX_DEFINE_SHADER;
1080 header->size = sizeof(*dcmd);
1081 dcmd = (SVGA3dCmdDXDefineShader *)(header + 1);
1082 dcmd->shaderId = shaderId;
1083 dcmd->type = type;
1084 dcmd->sizeInBytes = sizeInBytes;
1085
1086 /* DXBindShader command */
1087 header = (SVGA3dCmdHeader *)(dcmd + 1);
1088
1089 header->id = SVGA_3D_CMD_DX_BIND_SHADER;
1090 header->size = sizeof(*bcmd);
1091 bcmd = (SVGA3dCmdDXBindShader *)(header + 1);
1092
1093 bcmd->cid = swc->cid;
1094 swc->shader_relocation(swc, NULL, &bcmd->mobid,
1095 &bcmd->offsetInBytes, gbshader, 0);
1096
1097 bcmd->shid = shaderId;
1098
1099 swc->commit(swc);
1100 return PIPE_OK;
1101 }
1102
1103 enum pipe_error
SVGA3D_vgpu10_DestroyShader(struct svga_winsys_context * swc,SVGA3dShaderId shaderId)1104 SVGA3D_vgpu10_DestroyShader(struct svga_winsys_context *swc,
1105 SVGA3dShaderId shaderId)
1106 {
1107 SVGA3D_CREATE_COMMAND(DestroyShader, DESTROY_SHADER);
1108
1109 cmd->shaderId = shaderId;
1110
1111 swc->commit(swc);
1112 return PIPE_OK;
1113 }
1114
1115 enum pipe_error
SVGA3D_vgpu10_DefineStreamOutput(struct svga_winsys_context * swc,SVGA3dStreamOutputId soid,uint32 numOutputStreamEntries,uint32 streamOutputStrideInBytes[SVGA3D_DX_MAX_SOTARGETS],const SVGA3dStreamOutputDeclarationEntry decl[SVGA3D_MAX_STREAMOUT_DECLS])1116 SVGA3D_vgpu10_DefineStreamOutput(struct svga_winsys_context *swc,
1117 SVGA3dStreamOutputId soid,
1118 uint32 numOutputStreamEntries,
1119 uint32 streamOutputStrideInBytes[SVGA3D_DX_MAX_SOTARGETS],
1120 const SVGA3dStreamOutputDeclarationEntry decl[SVGA3D_MAX_STREAMOUT_DECLS])
1121 {
1122 unsigned i;
1123 SVGA3D_CREATE_COMMAND(DefineStreamOutput, DEFINE_STREAMOUTPUT);
1124
1125 cmd->soid = soid;
1126 cmd->numOutputStreamEntries = numOutputStreamEntries;
1127
1128 for (i = 0; i < ARRAY_SIZE(cmd->streamOutputStrideInBytes); i++)
1129 cmd->streamOutputStrideInBytes[i] = streamOutputStrideInBytes[i];
1130
1131 memcpy(cmd->decl, decl,
1132 sizeof(SVGA3dStreamOutputDeclarationEntry)
1133 * SVGA3D_MAX_DX10_STREAMOUT_DECLS);
1134
1135 cmd->rasterizedStream = 0;
1136 swc->commit(swc);
1137 return PIPE_OK;
1138 }
1139
1140 enum pipe_error
SVGA3D_vgpu10_DestroyStreamOutput(struct svga_winsys_context * swc,SVGA3dStreamOutputId soid)1141 SVGA3D_vgpu10_DestroyStreamOutput(struct svga_winsys_context *swc,
1142 SVGA3dStreamOutputId soid)
1143 {
1144 SVGA3D_CREATE_COMMAND(DestroyStreamOutput, DESTROY_STREAMOUTPUT);
1145
1146 cmd->soid = soid;
1147
1148 swc->commit(swc);
1149 return PIPE_OK;
1150 }
1151
1152 enum pipe_error
SVGA3D_vgpu10_SetInputLayout(struct svga_winsys_context * swc,SVGA3dElementLayoutId elementLayoutId)1153 SVGA3D_vgpu10_SetInputLayout(struct svga_winsys_context *swc,
1154 SVGA3dElementLayoutId elementLayoutId)
1155 {
1156 SVGA3D_CREATE_COMMAND(SetInputLayout, SET_INPUT_LAYOUT);
1157
1158 cmd->elementLayoutId = elementLayoutId;
1159
1160 swc->commit(swc);
1161 return PIPE_OK;
1162 }
1163
1164 enum pipe_error
SVGA3D_vgpu10_SetVertexBuffers(struct svga_winsys_context * swc,unsigned count,uint32 startBuffer,const SVGA3dVertexBuffer_v2 * bufferInfo,struct svga_winsys_surface ** surfaces)1165 SVGA3D_vgpu10_SetVertexBuffers(struct svga_winsys_context *swc,
1166 unsigned count,
1167 uint32 startBuffer,
1168 const SVGA3dVertexBuffer_v2 *bufferInfo,
1169 struct svga_winsys_surface **surfaces)
1170 {
1171 SVGA3dCmdDXSetVertexBuffers *cmd;
1172 SVGA3dVertexBuffer *bufs;
1173 unsigned i;
1174
1175 assert(count > 0);
1176
1177 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS,
1178 sizeof(SVGA3dCmdDXSetVertexBuffers) +
1179 count * sizeof(SVGA3dVertexBuffer),
1180 count); /* 'count' relocations */
1181 if (!cmd)
1182 return PIPE_ERROR_OUT_OF_MEMORY;
1183
1184 cmd->startBuffer = startBuffer;
1185
1186 bufs = (SVGA3dVertexBuffer *) &cmd[1];
1187 for (i = 0; i < count; i++) {
1188 bufs[i].stride = bufferInfo[i].stride;
1189 bufs[i].offset = bufferInfo[i].offset;
1190 swc->surface_relocation(swc, &bufs[i].sid, NULL, surfaces[i],
1191 SVGA_RELOC_READ);
1192 }
1193
1194 swc->commit(swc);
1195 return PIPE_OK;
1196 }
1197
1198 enum pipe_error
SVGA3D_vgpu10_SetVertexBuffersOffsetAndSize(struct svga_winsys_context * swc,unsigned count,uint32 startBuffer,const SVGA3dVertexBuffer_v2 * bufferInfo)1199 SVGA3D_vgpu10_SetVertexBuffersOffsetAndSize(struct svga_winsys_context *swc,
1200 unsigned count,
1201 uint32 startBuffer,
1202 const SVGA3dVertexBuffer_v2 *bufferInfo)
1203 {
1204 SVGA3dCmdDXSetVertexBuffersOffsetAndSize *cmd;
1205 SVGA3dVertexBufferOffsetAndSize *bufs;
1206 unsigned i;
1207
1208 assert(count > 0);
1209
1210 cmd = SVGA3D_FIFOReserve(swc,
1211 SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS_OFFSET_AND_SIZE,
1212 sizeof(SVGA3dCmdDXSetVertexBuffersOffsetAndSize) +
1213 count * sizeof(SVGA3dVertexBufferOffsetAndSize),
1214 0); /* no relocation */
1215 if (!cmd)
1216 return PIPE_ERROR_OUT_OF_MEMORY;
1217
1218 cmd->startBuffer = startBuffer;
1219
1220 bufs = (SVGA3dVertexBufferOffsetAndSize *) &cmd[1];
1221 for (i = 0; i < count; i++) {
1222 bufs[i].stride = bufferInfo[i].stride;
1223 bufs[i].offset = bufferInfo[i].offset;
1224 bufs[i].sizeInBytes = bufferInfo[i].sizeInBytes;
1225 }
1226
1227 swc->commit(swc);
1228 return PIPE_OK;
1229 }
1230
1231 enum pipe_error
SVGA3D_vgpu10_SetTopology(struct svga_winsys_context * swc,SVGA3dPrimitiveType topology)1232 SVGA3D_vgpu10_SetTopology(struct svga_winsys_context *swc,
1233 SVGA3dPrimitiveType topology)
1234 {
1235 SVGA3D_CREATE_COMMAND(SetTopology, SET_TOPOLOGY);
1236
1237 cmd->topology = topology;
1238
1239 swc->commit(swc);
1240 return PIPE_OK;
1241 }
1242
1243 enum pipe_error
SVGA3D_vgpu10_SetIndexBuffer(struct svga_winsys_context * swc,struct svga_winsys_surface * indexes,SVGA3dSurfaceFormat format,uint32 offset)1244 SVGA3D_vgpu10_SetIndexBuffer(struct svga_winsys_context *swc,
1245 struct svga_winsys_surface *indexes,
1246 SVGA3dSurfaceFormat format,
1247 uint32 offset)
1248 {
1249 SVGA3dCmdDXSetIndexBuffer *cmd;
1250
1251 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_INDEX_BUFFER,
1252 sizeof(SVGA3dCmdDXSetIndexBuffer),
1253 1); /* one relocations */
1254 if (!cmd)
1255 return PIPE_ERROR_OUT_OF_MEMORY;
1256
1257 swc->surface_relocation(swc, &cmd->sid, NULL, indexes, SVGA_RELOC_READ);
1258 SVGA3D_COPY_BASIC_2(format, offset);
1259
1260 swc->commit(swc);
1261 return PIPE_OK;
1262 }
1263
1264 enum pipe_error
SVGA3D_vgpu10_SetIndexBuffer_v2(struct svga_winsys_context * swc,struct svga_winsys_surface * indexes,SVGA3dSurfaceFormat format,uint32 offset,uint32 sizeInBytes)1265 SVGA3D_vgpu10_SetIndexBuffer_v2(struct svga_winsys_context *swc,
1266 struct svga_winsys_surface *indexes,
1267 SVGA3dSurfaceFormat format,
1268 uint32 offset,
1269 uint32 sizeInBytes)
1270 {
1271 SVGA3dCmdDXSetIndexBuffer_v2 *cmd;
1272
1273 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_INDEX_BUFFER_V2,
1274 sizeof(SVGA3dCmdDXSetIndexBuffer),
1275 1); /* one relocations */
1276 if (!cmd)
1277 return PIPE_ERROR_OUT_OF_MEMORY;
1278
1279 swc->surface_relocation(swc, &cmd->sid, NULL, indexes, SVGA_RELOC_READ);
1280 SVGA3D_COPY_BASIC_3(format, offset, sizeInBytes);
1281
1282 swc->commit(swc);
1283 return PIPE_OK;
1284 }
1285
1286 enum pipe_error
SVGA3D_vgpu10_SetIndexBufferOffsetAndSize(struct svga_winsys_context * swc,SVGA3dSurfaceFormat format,uint32 offset,uint32 sizeInBytes)1287 SVGA3D_vgpu10_SetIndexBufferOffsetAndSize(struct svga_winsys_context *swc,
1288 SVGA3dSurfaceFormat format,
1289 uint32 offset,
1290 uint32 sizeInBytes)
1291 {
1292 SVGA3dCmdDXSetIndexBufferOffsetAndSize *cmd;
1293
1294 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_INDEX_BUFFER_OFFSET_AND_SIZE,
1295 sizeof(SVGA3dCmdDXSetIndexBufferOffsetAndSize),
1296 0); /* one relocations */
1297 if (!cmd)
1298 return PIPE_ERROR_OUT_OF_MEMORY;
1299
1300 SVGA3D_COPY_BASIC_3(format, offset, sizeInBytes);
1301
1302 swc->commit(swc);
1303 return PIPE_OK;
1304 }
1305
1306 enum pipe_error
SVGA3D_vgpu10_SetSingleConstantBuffer(struct svga_winsys_context * swc,unsigned slot,SVGA3dShaderType type,struct svga_winsys_surface * surface,uint32 offsetInBytes,uint32 sizeInBytes)1307 SVGA3D_vgpu10_SetSingleConstantBuffer(struct svga_winsys_context *swc,
1308 unsigned slot,
1309 SVGA3dShaderType type,
1310 struct svga_winsys_surface *surface,
1311 uint32 offsetInBytes,
1312 uint32 sizeInBytes)
1313 {
1314 SVGA3dCmdDXSetSingleConstantBuffer *cmd;
1315
1316 assert(offsetInBytes % 256 == 0);
1317 if (!surface)
1318 assert(sizeInBytes == 0);
1319 else
1320 assert(sizeInBytes > 0);
1321
1322 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER,
1323 sizeof(SVGA3dCmdDXSetSingleConstantBuffer),
1324 1); /* one relocation */
1325 if (!cmd)
1326 return PIPE_ERROR_OUT_OF_MEMORY;
1327
1328 cmd->slot = slot;
1329 cmd->type = type;
1330 swc->surface_relocation(swc, &cmd->sid, NULL, surface, SVGA_RELOC_READ);
1331 cmd->offsetInBytes = offsetInBytes;
1332 cmd->sizeInBytes = sizeInBytes;
1333
1334 swc->commit(swc);
1335
1336 return PIPE_OK;
1337 }
1338
1339
1340 enum pipe_error
SVGA3D_vgpu10_SetConstantBufferOffset(struct svga_winsys_context * swc,unsigned command,unsigned slot,uint32 offsetInBytes)1341 SVGA3D_vgpu10_SetConstantBufferOffset(struct svga_winsys_context *swc,
1342 unsigned command,
1343 unsigned slot,
1344 uint32 offsetInBytes)
1345 {
1346 SVGA3dCmdDXSetConstantBufferOffset *cmd;
1347
1348 assert(offsetInBytes % 256 == 0);
1349
1350 cmd = SVGA3D_FIFOReserve(swc, command,
1351 sizeof(SVGA3dCmdDXSetConstantBufferOffset),
1352 0); /* one relocation */
1353 if (!cmd)
1354 return PIPE_ERROR_OUT_OF_MEMORY;
1355
1356 cmd->slot = slot;
1357 cmd->offsetInBytes = offsetInBytes;
1358
1359 swc->commit(swc);
1360
1361 return PIPE_OK;
1362 }
1363
1364
1365 enum pipe_error
SVGA3D_vgpu10_ReadbackSubResource(struct svga_winsys_context * swc,struct svga_winsys_surface * surface,unsigned subResource)1366 SVGA3D_vgpu10_ReadbackSubResource(struct svga_winsys_context *swc,
1367 struct svga_winsys_surface *surface,
1368 unsigned subResource)
1369 {
1370 SVGA3dCmdDXReadbackSubResource *cmd;
1371
1372 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_READBACK_SUBRESOURCE,
1373 sizeof(SVGA3dCmdDXReadbackSubResource),
1374 1);
1375 if (!cmd)
1376 return PIPE_ERROR_OUT_OF_MEMORY;
1377
1378 swc->surface_relocation(swc, &cmd->sid, NULL, surface,
1379 SVGA_RELOC_READ | SVGA_RELOC_INTERNAL);
1380 cmd->subResource = subResource;
1381
1382 swc->commit(swc);
1383 return PIPE_OK;
1384 }
1385
1386 enum pipe_error
SVGA3D_vgpu10_UpdateSubResource(struct svga_winsys_context * swc,struct svga_winsys_surface * surface,const SVGA3dBox * box,unsigned subResource)1387 SVGA3D_vgpu10_UpdateSubResource(struct svga_winsys_context *swc,
1388 struct svga_winsys_surface *surface,
1389 const SVGA3dBox *box,
1390 unsigned subResource)
1391 {
1392 SVGA3dCmdDXUpdateSubResource *cmd;
1393
1394 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_UPDATE_SUBRESOURCE,
1395 sizeof(SVGA3dCmdDXUpdateSubResource),
1396 1);
1397 if (!cmd)
1398 return PIPE_ERROR_OUT_OF_MEMORY;
1399
1400 swc->surface_relocation(swc, &cmd->sid, NULL, surface,
1401 SVGA_RELOC_WRITE | SVGA_RELOC_INTERNAL);
1402 cmd->subResource = subResource;
1403 cmd->box = *box;
1404
1405 swc->commit(swc);
1406 return PIPE_OK;
1407 }
1408
1409 enum pipe_error
SVGA3D_vgpu10_GenMips(struct svga_winsys_context * swc,SVGA3dShaderResourceViewId shaderResourceViewId,struct svga_winsys_surface * view)1410 SVGA3D_vgpu10_GenMips(struct svga_winsys_context *swc,
1411 SVGA3dShaderResourceViewId shaderResourceViewId,
1412 struct svga_winsys_surface *view)
1413 {
1414 SVGA3dCmdDXGenMips *cmd;
1415
1416 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_GENMIPS,
1417 sizeof(SVGA3dCmdDXGenMips), 1);
1418
1419 if (!cmd)
1420 return PIPE_ERROR_OUT_OF_MEMORY;
1421
1422 swc->surface_relocation(swc, &cmd->shaderResourceViewId, NULL, view,
1423 SVGA_RELOC_WRITE);
1424 cmd->shaderResourceViewId = shaderResourceViewId;
1425
1426 swc->commit(swc);
1427 return PIPE_OK;
1428 }
1429
1430
1431 enum pipe_error
SVGA3D_vgpu10_BufferCopy(struct svga_winsys_context * swc,struct svga_winsys_surface * src,struct svga_winsys_surface * dst,unsigned srcx,unsigned dstx,unsigned width)1432 SVGA3D_vgpu10_BufferCopy(struct svga_winsys_context *swc,
1433 struct svga_winsys_surface *src,
1434 struct svga_winsys_surface *dst,
1435 unsigned srcx, unsigned dstx, unsigned width)
1436 {
1437 SVGA3dCmdDXBufferCopy *cmd;
1438
1439 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_BUFFER_COPY, sizeof *cmd, 2);
1440
1441 if (!cmd)
1442 return PIPE_ERROR_OUT_OF_MEMORY;
1443
1444 swc->surface_relocation(swc, &cmd->dest, NULL, dst, SVGA_RELOC_WRITE);
1445 swc->surface_relocation(swc, &cmd->src, NULL, src, SVGA_RELOC_READ);
1446 cmd->destX = dstx;
1447 cmd->srcX = srcx;
1448 cmd->width = width;
1449
1450 swc->commit(swc);
1451 return PIPE_OK;
1452 }
1453
1454 enum pipe_error
SVGA3D_vgpu10_TransferFromBuffer(struct svga_winsys_context * swc,struct svga_winsys_surface * src,unsigned srcOffset,unsigned srcPitch,unsigned srcSlicePitch,struct svga_winsys_surface * dst,unsigned dstSubResource,SVGA3dBox * dstBox)1455 SVGA3D_vgpu10_TransferFromBuffer(struct svga_winsys_context *swc,
1456 struct svga_winsys_surface *src,
1457 unsigned srcOffset, unsigned srcPitch,
1458 unsigned srcSlicePitch,
1459 struct svga_winsys_surface *dst,
1460 unsigned dstSubResource,
1461 SVGA3dBox *dstBox)
1462 {
1463 SVGA3dCmdDXTransferFromBuffer *cmd;
1464
1465 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER,
1466 sizeof(SVGA3dCmdDXTransferFromBuffer), 2);
1467
1468 if (!cmd)
1469 return PIPE_ERROR_OUT_OF_MEMORY;
1470
1471 swc->surface_relocation(swc, &cmd->srcSid, NULL, src, SVGA_RELOC_READ);
1472 swc->surface_relocation(swc, &cmd->destSid, NULL, dst, SVGA_RELOC_WRITE);
1473 cmd->srcOffset = srcOffset;
1474 cmd->srcPitch = srcPitch;
1475 cmd->srcSlicePitch = srcSlicePitch;
1476 cmd->destSubResource = dstSubResource;
1477 cmd->destBox = *dstBox;
1478
1479 swc->commit(swc);
1480 return PIPE_OK;
1481 }
1482
1483 enum pipe_error
SVGA3D_vgpu10_IntraSurfaceCopy(struct svga_winsys_context * swc,struct svga_winsys_surface * surface,unsigned level,unsigned face,const SVGA3dCopyBox * box)1484 SVGA3D_vgpu10_IntraSurfaceCopy(struct svga_winsys_context *swc,
1485 struct svga_winsys_surface *surface,
1486 unsigned level, unsigned face,
1487 const SVGA3dCopyBox *box)
1488 {
1489 SVGA3dCmdIntraSurfaceCopy *cmd =
1490 SVGA3D_FIFOReserve(swc,
1491 SVGA_3D_CMD_INTRA_SURFACE_COPY,
1492 sizeof(SVGA3dCmdIntraSurfaceCopy),
1493 1); /* one relocation */
1494 if (!cmd)
1495 return PIPE_ERROR_OUT_OF_MEMORY;
1496
1497 swc->surface_relocation(swc, &cmd->surface.sid, NULL, surface, SVGA_RELOC_READ | SVGA_RELOC_WRITE);
1498 cmd->surface.face = face;
1499 cmd->surface.mipmap = level;
1500 cmd->box = *box;
1501
1502 swc->commit(swc);
1503
1504 return PIPE_OK;
1505 }
1506
1507 enum pipe_error
SVGA3D_vgpu10_ResolveCopy(struct svga_winsys_context * swc,unsigned dstSubResource,struct svga_winsys_surface * dst,unsigned srcSubResource,struct svga_winsys_surface * src,const SVGA3dSurfaceFormat copyFormat)1508 SVGA3D_vgpu10_ResolveCopy(struct svga_winsys_context *swc,
1509 unsigned dstSubResource,
1510 struct svga_winsys_surface *dst,
1511 unsigned srcSubResource,
1512 struct svga_winsys_surface *src,
1513 const SVGA3dSurfaceFormat copyFormat)
1514 {
1515 SVGA3dCmdDXResolveCopy *cmd =
1516 SVGA3D_FIFOReserve(swc,
1517 SVGA_3D_CMD_DX_RESOLVE_COPY,
1518 sizeof(SVGA3dCmdDXResolveCopy),
1519 2); /* two relocations */
1520 if (!cmd)
1521 return PIPE_ERROR_OUT_OF_MEMORY;
1522
1523 cmd->dstSubResource = dstSubResource;
1524 swc->surface_relocation(swc, &cmd->dstSid, NULL, dst, SVGA_RELOC_WRITE);
1525 cmd->srcSubResource = srcSubResource;
1526 swc->surface_relocation(swc, &cmd->srcSid, NULL, src, SVGA_RELOC_READ);
1527 cmd->copyFormat = copyFormat;
1528
1529 swc->commit(swc);
1530
1531 return PIPE_OK;
1532 }
1533
1534
1535 enum pipe_error
SVGA3D_sm5_DrawIndexedInstancedIndirect(struct svga_winsys_context * swc,struct svga_winsys_surface * argBuffer,unsigned argOffset)1536 SVGA3D_sm5_DrawIndexedInstancedIndirect(struct svga_winsys_context *swc,
1537 struct svga_winsys_surface *argBuffer,
1538 unsigned argOffset)
1539 {
1540 SVGA3dCmdDXDrawIndexedInstancedIndirect *cmd =
1541 SVGA3D_FIFOReserve(swc,
1542 SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED_INDIRECT,
1543 sizeof(SVGA3dCmdDXDrawIndexedInstancedIndirect),
1544 1); /* one relocation */
1545 if (!cmd)
1546 return PIPE_ERROR_OUT_OF_MEMORY;
1547
1548 swc->surface_relocation(swc, &cmd->argsBufferSid, NULL, argBuffer,
1549 SVGA_RELOC_READ);
1550 cmd->byteOffsetForArgs = argOffset;
1551
1552 swc->commit(swc);
1553
1554 return PIPE_OK;
1555 }
1556
1557
1558 enum pipe_error
SVGA3D_sm5_DrawInstancedIndirect(struct svga_winsys_context * swc,struct svga_winsys_surface * argBuffer,unsigned argOffset)1559 SVGA3D_sm5_DrawInstancedIndirect(struct svga_winsys_context *swc,
1560 struct svga_winsys_surface *argBuffer,
1561 unsigned argOffset)
1562 {
1563 SVGA3dCmdDXDrawInstancedIndirect *cmd =
1564 SVGA3D_FIFOReserve(swc,
1565 SVGA_3D_CMD_DX_DRAW_INSTANCED_INDIRECT,
1566 sizeof(SVGA3dCmdDXDrawInstancedIndirect),
1567 1); /* one relocation */
1568 if (!cmd)
1569 return PIPE_ERROR_OUT_OF_MEMORY;
1570
1571 swc->surface_relocation(swc, &cmd->argsBufferSid, NULL, argBuffer,
1572 SVGA_RELOC_READ);
1573 cmd->byteOffsetForArgs = argOffset;
1574
1575 swc->commit(swc);
1576
1577 return PIPE_OK;
1578 }
1579
1580
1581 enum pipe_error
SVGA3D_sm5_DefineUAView(struct svga_winsys_context * swc,SVGA3dUAViewId uaViewId,struct svga_winsys_surface * surface,SVGA3dSurfaceFormat format,SVGA3dResourceType resourceDimension,const SVGA3dUAViewDesc * desc)1582 SVGA3D_sm5_DefineUAView(struct svga_winsys_context *swc,
1583 SVGA3dUAViewId uaViewId,
1584 struct svga_winsys_surface *surface,
1585 SVGA3dSurfaceFormat format,
1586 SVGA3dResourceType resourceDimension,
1587 const SVGA3dUAViewDesc *desc)
1588 {
1589 SVGA3dCmdDXDefineUAView *cmd;
1590
1591 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_DEFINE_UA_VIEW,
1592 sizeof(SVGA3dCmdDXDefineUAView),
1593 1); /* one relocation */
1594 if (!cmd)
1595 return PIPE_ERROR_OUT_OF_MEMORY;
1596
1597 SVGA3D_COPY_BASIC_3(uaViewId, format, resourceDimension);
1598
1599 swc->surface_relocation(swc, &cmd->sid, NULL, surface,
1600 SVGA_RELOC_READ | SVGA_RELOC_WRITE);
1601
1602 cmd->desc = *desc;
1603
1604 swc->commit(swc);
1605 return PIPE_OK;
1606 }
1607
1608
1609 enum pipe_error
SVGA3D_sm5_DestroyUAView(struct svga_winsys_context * swc,SVGA3dUAViewId uaViewId)1610 SVGA3D_sm5_DestroyUAView(struct svga_winsys_context *swc,
1611 SVGA3dUAViewId uaViewId)
1612 {
1613 SVGA3D_CREATE_COMMAND(DestroyUAView, DESTROY_UA_VIEW);
1614 cmd->uaViewId = uaViewId;
1615 swc->commit(swc);
1616 return PIPE_OK;
1617 }
1618
1619
1620 enum pipe_error
SVGA3D_sm5_SetUAViews(struct svga_winsys_context * swc,uint32 uavSpliceIndex,unsigned count,const SVGA3dUAViewId ids[],struct svga_winsys_surface ** uaViews)1621 SVGA3D_sm5_SetUAViews(struct svga_winsys_context *swc,
1622 uint32 uavSpliceIndex,
1623 unsigned count,
1624 const SVGA3dUAViewId ids[],
1625 struct svga_winsys_surface **uaViews)
1626 {
1627 SVGA3dCmdDXSetUAViews *cmd;
1628 SVGA3dUAViewId *cmd_uavIds;
1629 unsigned i;
1630
1631 cmd = SVGA3D_FIFOReserve(swc,
1632 SVGA_3D_CMD_DX_SET_UA_VIEWS,
1633 sizeof(SVGA3dCmdDXSetUAViews) +
1634 count * sizeof(SVGA3dUAViewId),
1635 count); /* 'count' relocations */
1636 if (!cmd)
1637 return PIPE_ERROR_OUT_OF_MEMORY;
1638
1639 cmd->uavSpliceIndex = uavSpliceIndex;
1640 cmd_uavIds = (SVGA3dUAViewId *) (cmd + 1);
1641
1642 for (i = 0; i < count; i++, cmd_uavIds++) {
1643 swc->surface_relocation(swc, cmd_uavIds, NULL,
1644 uaViews[i],
1645 SVGA_RELOC_READ | SVGA_RELOC_WRITE);
1646 *cmd_uavIds = ids[i];
1647 }
1648
1649 swc->commit(swc);
1650 return PIPE_OK;
1651 }
1652
1653
1654 enum pipe_error
SVGA3D_sm5_Dispatch(struct svga_winsys_context * swc,const uint32 threadGroupCount[3])1655 SVGA3D_sm5_Dispatch(struct svga_winsys_context *swc,
1656 const uint32 threadGroupCount[3])
1657 {
1658 SVGA3dCmdDXDispatch *cmd;
1659
1660 cmd = SVGA3D_FIFOReserve(swc,
1661 SVGA_3D_CMD_DX_DISPATCH,
1662 sizeof(SVGA3dCmdDXDispatch),
1663 0);
1664 if (!cmd)
1665 return PIPE_ERROR_OUT_OF_MEMORY;
1666
1667 cmd->threadGroupCountX = threadGroupCount[0];
1668 cmd->threadGroupCountY = threadGroupCount[1];
1669 cmd->threadGroupCountZ = threadGroupCount[2];
1670
1671 swc->commit(swc);
1672 return PIPE_OK;
1673 }
1674
1675
1676 enum pipe_error
SVGA3D_sm5_DispatchIndirect(struct svga_winsys_context * swc,struct svga_winsys_surface * argBuffer,uint32 argOffset)1677 SVGA3D_sm5_DispatchIndirect(struct svga_winsys_context *swc,
1678 struct svga_winsys_surface *argBuffer,
1679 uint32 argOffset)
1680 {
1681 SVGA3dCmdDXDispatchIndirect *cmd;
1682
1683 cmd = SVGA3D_FIFOReserve(swc,
1684 SVGA_3D_CMD_DX_DISPATCH_INDIRECT,
1685 sizeof(SVGA3dCmdDXDispatchIndirect),
1686 1);
1687 if (!cmd)
1688 return PIPE_ERROR_OUT_OF_MEMORY;
1689
1690 swc->surface_relocation(swc, &cmd->argsBufferSid, NULL, argBuffer,
1691 SVGA_RELOC_READ);
1692 cmd->byteOffsetForArgs = argOffset;
1693
1694 swc->commit(swc);
1695 return PIPE_OK;
1696 }
1697
1698
1699 enum pipe_error
SVGA3D_sm5_SetCSUAViews(struct svga_winsys_context * swc,unsigned count,const SVGA3dUAViewId ids[],struct svga_winsys_surface ** uaViews)1700 SVGA3D_sm5_SetCSUAViews(struct svga_winsys_context *swc,
1701 unsigned count,
1702 const SVGA3dUAViewId ids[],
1703 struct svga_winsys_surface **uaViews)
1704 {
1705 SVGA3dCmdDXSetCSUAViews *cmd;
1706 SVGA3dUAViewId *cmd_uavIds;
1707 unsigned i;
1708
1709 cmd = SVGA3D_FIFOReserve(swc,
1710 SVGA_3D_CMD_DX_SET_CS_UA_VIEWS,
1711 sizeof(SVGA3dCmdDXSetCSUAViews) +
1712 count * sizeof(SVGA3dUAViewId),
1713 count); /* 'count' relocations */
1714 if (!cmd)
1715 return PIPE_ERROR_OUT_OF_MEMORY;
1716
1717 cmd->startIndex = 0;
1718 cmd_uavIds = (SVGA3dUAViewId *) (cmd + 1);
1719
1720 for (i = 0; i < count; i++, cmd_uavIds++) {
1721 swc->surface_relocation(swc, cmd_uavIds, NULL,
1722 uaViews[i],
1723 SVGA_RELOC_READ | SVGA_RELOC_WRITE);
1724 *cmd_uavIds = ids[i];
1725 }
1726
1727 swc->commit(swc);
1728 return PIPE_OK;
1729 }
1730
1731 /**
1732 * We don't want any flush between DefineStreamOutputWithMob and
1733 * BindStreamOutput because it will cause partial state in command
1734 * buffer. This function make that sure there is enough room for
1735 * both commands before issuing them
1736 */
1737
1738 enum pipe_error
SVGA3D_sm5_DefineAndBindStreamOutput(struct svga_winsys_context * swc,SVGA3dStreamOutputId soid,uint32 numOutputStreamEntries,uint32 numOutputStreamStrides,uint32 streamOutputStrideInBytes[SVGA3D_DX_MAX_SOTARGETS],struct svga_winsys_buffer * declBuf,uint32 rasterizedStream,uint32 sizeInBytes)1739 SVGA3D_sm5_DefineAndBindStreamOutput(struct svga_winsys_context *swc,
1740 SVGA3dStreamOutputId soid,
1741 uint32 numOutputStreamEntries,
1742 uint32 numOutputStreamStrides,
1743 uint32 streamOutputStrideInBytes[SVGA3D_DX_MAX_SOTARGETS],
1744 struct svga_winsys_buffer *declBuf,
1745 uint32 rasterizedStream,
1746 uint32 sizeInBytes)
1747 {
1748 unsigned i;
1749 SVGA3dCmdHeader *header;
1750 SVGA3dCmdDXDefineStreamOutputWithMob *dcmd;
1751 SVGA3dCmdDXBindStreamOutput *bcmd;
1752
1753 unsigned totalSize = 2 * sizeof(*header) +
1754 sizeof(*dcmd) + sizeof(*bcmd);
1755
1756 /* Make sure there is room for both commands */
1757 header = swc->reserve(swc, totalSize, 2);
1758 if (!header)
1759 return PIPE_ERROR_OUT_OF_MEMORY;
1760
1761 /* DXDefineStreamOutputWithMob command */
1762 header->id = SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT_WITH_MOB;
1763 header->size = sizeof(*dcmd);
1764 dcmd = (SVGA3dCmdDXDefineStreamOutputWithMob *)(header + 1);
1765 dcmd->soid= soid;
1766 dcmd->numOutputStreamEntries = numOutputStreamEntries;
1767 dcmd->numOutputStreamStrides = numOutputStreamStrides;
1768 dcmd->rasterizedStream = rasterizedStream;
1769
1770 for (i = 0; i < ARRAY_SIZE(dcmd->streamOutputStrideInBytes); i++)
1771 dcmd->streamOutputStrideInBytes[i] = streamOutputStrideInBytes[i];
1772
1773
1774 /* DXBindStreamOutput command */
1775 header = (SVGA3dCmdHeader *)(dcmd + 1);
1776
1777 header->id = SVGA_3D_CMD_DX_BIND_STREAMOUTPUT;
1778 header->size = sizeof(*bcmd);
1779 bcmd = (SVGA3dCmdDXBindStreamOutput *)(header + 1);
1780
1781 bcmd->soid = soid;
1782 bcmd->offsetInBytes = 0;
1783 swc->mob_relocation(swc, &bcmd->mobid,
1784 &bcmd->offsetInBytes, declBuf, 0,
1785 SVGA_RELOC_WRITE);
1786
1787 bcmd->sizeInBytes = sizeInBytes;
1788 bcmd->offsetInBytes = 0;
1789
1790
1791 swc->commit(swc);
1792 return PIPE_OK;
1793 }
1794
1795
1796 enum pipe_error
SVGA3D_sm5_DefineRasterizerState_v2(struct svga_winsys_context * swc,SVGA3dRasterizerStateId rasterizerId,uint8 fillMode,SVGA3dCullMode cullMode,uint8 frontCounterClockwise,int32 depthBias,float depthBiasClamp,float slopeScaledDepthBias,uint8 depthClipEnable,uint8 scissorEnable,uint8 multisampleEnable,uint8 antialiasedLineEnable,float lineWidth,uint8 lineStippleEnable,uint8 lineStippleFactor,uint16 lineStipplePattern,uint8 provokingVertexLast,uint32 forcedSampleCount)1797 SVGA3D_sm5_DefineRasterizerState_v2(struct svga_winsys_context *swc,
1798 SVGA3dRasterizerStateId rasterizerId,
1799 uint8 fillMode,
1800 SVGA3dCullMode cullMode,
1801 uint8 frontCounterClockwise,
1802 int32 depthBias,
1803 float depthBiasClamp,
1804 float slopeScaledDepthBias,
1805 uint8 depthClipEnable,
1806 uint8 scissorEnable,
1807 uint8 multisampleEnable,
1808 uint8 antialiasedLineEnable,
1809 float lineWidth,
1810 uint8 lineStippleEnable,
1811 uint8 lineStippleFactor,
1812 uint16 lineStipplePattern,
1813 uint8 provokingVertexLast,
1814 uint32 forcedSampleCount)
1815 {
1816 SVGA3D_CREATE_COMMAND(DefineRasterizerState_v2, DEFINE_RASTERIZER_STATE_V2);
1817
1818 SVGA3D_COPY_BASIC_5(rasterizerId, fillMode,
1819 cullMode, frontCounterClockwise,
1820 depthBias);
1821 SVGA3D_COPY_BASIC_6(depthBiasClamp, slopeScaledDepthBias,
1822 depthClipEnable, scissorEnable,
1823 multisampleEnable, antialiasedLineEnable);
1824 cmd->lineWidth = lineWidth;
1825 cmd->lineStippleEnable = lineStippleEnable;
1826 cmd->lineStippleFactor = lineStippleFactor;
1827 cmd->lineStipplePattern = lineStipplePattern;
1828 cmd->provokingVertexLast = provokingVertexLast;
1829 cmd->forcedSampleCount = forcedSampleCount;
1830
1831 swc->commit(swc);
1832 return PIPE_OK;
1833 }
1834