1 /**********************************************************
2 * Copyright 2008-2023 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #ifndef SVGA_CONTEXT_H
27 #define SVGA_CONTEXT_H
28
29
30 #include "pipe/p_context.h"
31 #include "pipe/p_defines.h"
32 #include "pipe/p_state.h"
33
34 #include "util/os_time.h"
35
36 #include "util/u_blitter.h"
37 #include "util/list.h"
38
39 #include "svga_screen.h"
40 #include "svga_state.h"
41 #include "svga_winsys.h"
42 #include "svga_hw_reg.h"
43 #include "svga3d_shaderdefs.h"
44 #include "svga_image_view.h"
45 #include "svga_shader_buffer.h"
46 #include "svga_debug.h"
47
48 /** Non-GPU queries for gallium HUD */
49 enum svga_hud {
50 /* per-frame counters */
51 SVGA_QUERY_NUM_DRAW_CALLS = PIPE_QUERY_DRIVER_SPECIFIC,
52 SVGA_QUERY_NUM_FALLBACKS,
53 SVGA_QUERY_NUM_FLUSHES,
54 SVGA_QUERY_NUM_VALIDATIONS,
55 SVGA_QUERY_MAP_BUFFER_TIME,
56 SVGA_QUERY_NUM_BUFFERS_MAPPED,
57 SVGA_QUERY_NUM_TEXTURES_MAPPED,
58 SVGA_QUERY_NUM_BYTES_UPLOADED,
59 SVGA_QUERY_NUM_COMMAND_BUFFERS,
60 SVGA_QUERY_COMMAND_BUFFER_SIZE,
61 SVGA_QUERY_FLUSH_TIME,
62 SVGA_QUERY_SURFACE_WRITE_FLUSHES,
63 SVGA_QUERY_NUM_READBACKS,
64 SVGA_QUERY_NUM_RESOURCE_UPDATES,
65 SVGA_QUERY_NUM_BUFFER_UPLOADS,
66 SVGA_QUERY_NUM_CONST_BUF_UPDATES,
67 SVGA_QUERY_NUM_CONST_UPDATES,
68 SVGA_QUERY_NUM_SHADER_RELOCATIONS,
69 SVGA_QUERY_NUM_SURFACE_RELOCATIONS,
70
71 /* running total counters */
72 SVGA_QUERY_MEMORY_USED,
73 SVGA_QUERY_NUM_SHADERS,
74 SVGA_QUERY_NUM_RESOURCES,
75 SVGA_QUERY_NUM_STATE_OBJECTS,
76 SVGA_QUERY_NUM_SURFACE_VIEWS,
77 SVGA_QUERY_NUM_GENERATE_MIPMAP,
78 SVGA_QUERY_NUM_FAILED_ALLOCATIONS,
79 SVGA_QUERY_NUM_COMMANDS_PER_DRAW,
80 SVGA_QUERY_SHADER_MEM_USED,
81
82 /*SVGA_QUERY_MAX has to be last because it is size of an array*/
83 SVGA_QUERY_MAX
84 };
85
86
87 /**
88 * Maximum supported number of constant buffers per shader
89 * including the zero slot for the default constant buffer.
90 */
91 #define SVGA_MAX_CONST_BUFS 15
92 #define SVGA_MAX_RAW_BUFS 64
93
94 /**
95 * Maximum constant buffer size that can be set in the
96 * DXSetSingleConstantBuffer command is
97 * DX10 constant buffer element count * 4 4-bytes components
98 */
99 #define SVGA_MAX_CONST_BUF_SIZE (4096 * 4 * sizeof(int))
100
101 #define CONST0_UPLOAD_ALIGNMENT 256
102 #define SVGA_MAX_UAVIEWS SVGA3D_DX11_1_MAX_UAVIEWS
103 #define SVGA_MAX_IMAGES SVGA3D_MAX_UAVIEWS
104 #define SVGA_MAX_SHADER_BUFFERS SVGA3D_MAX_UAVIEWS
105 #define SVGA_MAX_ATOMIC_BUFFERS SVGA3D_MAX_UAVIEWS
106
107 enum svga_surface_state
108 {
109 SVGA_SURFACE_STATE_CREATED,
110 SVGA_SURFACE_STATE_INVALIDATED,
111 SVGA_SURFACE_STATE_UPDATED,
112 SVGA_SURFACE_STATE_RENDERED,
113 };
114
115 struct draw_vertex_shader;
116 struct draw_fragment_shader;
117 struct svga_shader_variant;
118 struct SVGACmdMemory;
119 struct util_bitmask;
120
121
122 struct svga_cache_context;
123 struct svga_tracked_state;
124
125 struct svga_blend_state {
126 unsigned need_white_fragments:1;
127 unsigned independent_blend_enable:1;
128 unsigned alpha_to_coverage:1;
129 unsigned alpha_to_one:1;
130 unsigned blend_color_alpha:1; /**< set blend color to alpha value */
131 unsigned logicop_enabled:1;
132 unsigned logicop_mode:5;
133
134 /** Per-render target state */
135 struct {
136 uint8_t writemask;
137
138 bool blend_enable;
139 uint8_t srcblend;
140 uint8_t dstblend;
141 uint8_t blendeq;
142
143 bool separate_alpha_blend_enable;
144 uint8_t srcblend_alpha;
145 uint8_t dstblend_alpha;
146 uint8_t blendeq_alpha;
147 } rt[PIPE_MAX_COLOR_BUFS];
148
149 SVGA3dBlendStateId id; /**< vgpu10 */
150 };
151
152 struct svga_depth_stencil_state {
153 unsigned zfunc:8;
154 unsigned zenable:1;
155 unsigned zwriteenable:1;
156
157 unsigned alphatestenable:1;
158 unsigned alphafunc:8;
159
160 struct {
161 unsigned enabled:1;
162 unsigned func:8;
163 unsigned fail:8;
164 unsigned zfail:8;
165 unsigned pass:8;
166 } stencil[2];
167
168 /* SVGA3D has one ref/mask/writemask triple shared between front &
169 * back face stencil. We really need two:
170 */
171 unsigned stencil_mask:8;
172 unsigned stencil_writemask:8;
173
174 float alpharef;
175
176 SVGA3dDepthStencilStateId id; /**< vgpu10 */
177 };
178
179 #define SVGA_UNFILLED_DISABLE 0
180 #define SVGA_UNFILLED_LINE 1
181 #define SVGA_UNFILLED_POINT 2
182
183 #define SVGA_PIPELINE_FLAG_POINTS (1<<MESA_PRIM_POINTS)
184 #define SVGA_PIPELINE_FLAG_LINES (1<<MESA_PRIM_LINES)
185 #define SVGA_PIPELINE_FLAG_TRIS (1<<MESA_PRIM_TRIANGLES)
186
187 #define SVGA_MAX_FRAMEBUFFER_DEFAULT_SAMPLES 4
188
189 struct svga_rasterizer_state {
190 struct pipe_rasterizer_state templ; /* needed for draw module */
191
192 unsigned shademode:8;
193 unsigned cullmode:8;
194 unsigned scissortestenable:1;
195 unsigned multisampleantialias:1;
196 unsigned antialiasedlineenable:1;
197 unsigned lastpixel:1;
198 unsigned pointsprite:1;
199
200 unsigned linepattern;
201
202 float slopescaledepthbias;
203 float depthbias;
204 float pointsize;
205 float linewidth;
206
207 unsigned hw_fillmode:2; /* PIPE_POLYGON_MODE_x */
208
209 /** Which prims do we need help for? Bitmask of (1 << MESA_PRIM_x) flags */
210 unsigned need_pipeline:16;
211
212 SVGA3dRasterizerStateId id; /**< vgpu10 */
213
214 /* Alternate SVGA rasterizer state object with forcedSampleCount */
215 int altRastIds[SVGA_MAX_FRAMEBUFFER_DEFAULT_SAMPLES+1];
216
217 struct svga_rasterizer_state *no_cull_rasterizer;
218
219 /** For debugging: */
220 const char* need_pipeline_tris_str;
221 const char* need_pipeline_lines_str;
222 const char* need_pipeline_points_str;
223 };
224
225 struct svga_sampler_state {
226 unsigned mipfilter;
227 unsigned magfilter;
228 unsigned minfilter;
229 unsigned aniso_level;
230 float lod_bias;
231 unsigned addressu;
232 unsigned addressv;
233 unsigned addressw;
234 unsigned bordercolor;
235 unsigned normalized_coords:1;
236 unsigned compare_mode:1;
237 unsigned compare_func:3;
238
239 unsigned min_lod;
240 unsigned view_min_lod;
241 unsigned view_max_lod;
242
243 SVGA3dSamplerId id[2];
244 };
245
246
247 struct svga_pipe_sampler_view
248 {
249 struct pipe_sampler_view base;
250
251 SVGA3dShaderResourceViewId id;
252 };
253
254
255 static inline struct svga_pipe_sampler_view *
svga_pipe_sampler_view(struct pipe_sampler_view * v)256 svga_pipe_sampler_view(struct pipe_sampler_view *v)
257 {
258 return (struct svga_pipe_sampler_view *) v;
259 }
260
261
262 struct svga_velems_state {
263 unsigned count;
264 struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS];
265 SVGA3dDeclType decl_type[PIPE_MAX_ATTRIBS]; /**< vertex attrib formats */
266 uint16_t strides[PIPE_MAX_ATTRIBS];
267
268 /** Bitmasks indicating which attributes need format conversion */
269 unsigned adjust_attrib_range; /**< range adjustment */
270 unsigned attrib_is_pure_int; /**< pure int */
271 unsigned adjust_attrib_w_1; /**< set w = 1 */
272 unsigned adjust_attrib_itof; /**< int->float */
273 unsigned adjust_attrib_utof; /**< uint->float */
274 unsigned attrib_is_bgra; /**< R / B swizzling */
275 unsigned attrib_puint_to_snorm; /**< 10_10_10_2 packed uint -> snorm */
276 unsigned attrib_puint_to_uscaled; /**< 10_10_10_2 packed uint -> uscaled */
277 unsigned attrib_puint_to_sscaled; /**< 10_10_10_2 packed uint -> sscaled */
278
279 bool need_swvfetch;
280
281 SVGA3dElementLayoutId id; /**< VGPU10 */
282 };
283
284 struct svga_constant_buffer {
285 struct svga_winsys_surface *handle;
286 unsigned size;
287 };
288
289 struct svga_raw_buffer {
290 struct svga_winsys_surface *handle;
291 unsigned buffer_offset;
292 unsigned buffer_size;
293 struct pipe_resource *buffer;
294 int32 srvid;
295 };
296
297 /* Use to calculate differences between state emitted to hardware and
298 * current driver-calculated state.
299 */
300 struct svga_state
301 {
302 const struct svga_blend_state *blend;
303 const struct svga_depth_stencil_state *depth;
304 const struct svga_sampler_state *sampler[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
305 const struct svga_velems_state *velems;
306
307 struct svga_rasterizer_state *rast;
308 struct pipe_sampler_view *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; /* or texture ID's? */
309 struct svga_fragment_shader *fs;
310 struct svga_vertex_shader *vs;
311 struct svga_geometry_shader *user_gs; /* user-specified GS */
312 struct svga_geometry_shader *gs; /* derived GS */
313 /* derived tessellation control shader */
314 struct svga_tcs_shader *tcs;
315 /* derived tessellation evaluation shader */
316 struct svga_tes_shader *tes;
317 struct svga_compute_shader *cs;
318
319 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
320 /** Constant buffers for each shader.
321 * The size should probably always match with that of
322 * svga_shader_emitter_v10.num_shader_consts.
323 */
324 struct pipe_constant_buffer constbufs[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];
325 struct svga_raw_buffer rawbufs[PIPE_SHADER_TYPES][SVGA_MAX_RAW_BUFS];
326
327 struct pipe_framebuffer_state framebuffer;
328 float depthscale;
329
330 /* Hack to limit the number of different render targets between
331 * flushes. Helps avoid blowing out our surface cache in EXA.
332 */
333 int nr_fbs;
334
335 struct pipe_poly_stipple poly_stipple;
336 struct pipe_scissor_state scissor[SVGA3D_DX_MAX_VIEWPORTS];
337 struct pipe_blend_color blend_color;
338 struct pipe_stencil_ref stencil_ref;
339 struct pipe_clip_state clip;
340 struct pipe_viewport_state viewport[SVGA3D_DX_MAX_VIEWPORTS];
341
342 bool use_samplers[PIPE_SHADER_TYPES];
343 unsigned num_samplers[PIPE_SHADER_TYPES];
344 unsigned num_sampler_views[PIPE_SHADER_TYPES];
345 unsigned num_vertex_buffers;
346 enum mesa_prim reduced_prim;
347
348 unsigned vertex_id_bias;
349
350 struct {
351 unsigned flag_1d;
352 unsigned flag_srgb;
353 } tex_flags;
354
355 unsigned sample_mask;
356 unsigned vertices_per_patch;
357 float default_tesslevels[6]; /* tessellation (outer[4] + inner[2]) levels */
358
359 /* Image views */
360 unsigned num_image_views[PIPE_SHADER_TYPES];
361 struct svga_image_view image_views[PIPE_SHADER_TYPES][SVGA_MAX_IMAGES];
362
363 /* Shader buffers */
364 unsigned num_shader_buffers[PIPE_SHADER_TYPES];
365 struct svga_shader_buffer shader_buffers[PIPE_SHADER_TYPES][SVGA_MAX_SHADER_BUFFERS];
366
367 /* HW atomic buffers */
368 unsigned num_atomic_buffers;
369 struct svga_shader_buffer atomic_buffers[SVGA_MAX_SHADER_BUFFERS];
370
371 struct {
372 /* Determine the layout of the grid (in block units) to be used. */
373 unsigned size[3];
374 /* If DispatchIndirect is used, this will has grid size info*/
375 struct pipe_resource *indirect;
376 } grid_info;
377
378 };
379
380 struct svga_prescale {
381 float translate[4];
382 float scale[4];
383 bool enabled;
384 };
385
386 struct svga_depthrange {
387 float zmin;
388 float zmax;
389 };
390
391 /* Updated by calling svga_update_state( SVGA_STATE_HW_CLEAR )
392 */
393 struct svga_hw_clear_state
394 {
395 struct pipe_framebuffer_state framebuffer;
396
397 /* VGPU9 only */
398 SVGA3dRect viewport;
399 struct svga_depthrange depthrange;
400
401 /* VGPU10 state */
402 SVGA3dViewport viewports[SVGA3D_DX_MAX_VIEWPORTS];
403 struct svga_prescale prescale[SVGA3D_DX_MAX_VIEWPORTS];
404 struct pipe_scissor_state scissors[SVGA3D_DX_MAX_VIEWPORTS];
405 unsigned num_prescale;
406
407 unsigned num_rendertargets;
408 struct pipe_surface *rtv[SVGA3D_MAX_RENDER_TARGETS];
409 struct pipe_surface *dsv;
410 };
411
412 struct svga_hw_view_state
413 {
414 struct pipe_resource *texture;
415 struct svga_sampler_view *v;
416 unsigned min_lod;
417 unsigned max_lod;
418 bool dirty;
419 };
420
421 /* Updated by calling svga_update_state( SVGA_STATE_HW_DRAW )
422 */
423 struct svga_hw_draw_state
424 {
425 /** VGPU9 rasterization state */
426 unsigned rs[SVGA3D_RS_MAX];
427 /** VGPU9 texture sampler and bindings state */
428 unsigned ts[SVGA3D_PIXEL_SAMPLERREG_MAX][SVGA3D_TS_MAX];
429
430 /** VGPU9 texture views */
431 unsigned num_views;
432 unsigned num_backed_views; /* views with backing copy of texture */
433 struct svga_hw_view_state views[PIPE_MAX_SAMPLERS];
434
435 /** VGPU9 constant buffer values */
436 float cb[PIPE_SHADER_TYPES][SVGA3D_CONSTREG_MAX][4];
437
438 /** Currently bound shaders */
439 struct svga_shader_variant *fs;
440 struct svga_shader_variant *vs;
441 struct svga_shader_variant *gs;
442 struct svga_shader_variant *tcs;
443 struct svga_shader_variant *tes;
444 struct svga_shader_variant *cs;
445
446 /** Currently bound constant buffer, per shader stage */
447 struct pipe_resource *constbuf[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];
448 struct svga_constant_buffer constbufoffsets[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];
449 struct svga_raw_buffer rawbufs[PIPE_SHADER_TYPES][SVGA_MAX_RAW_BUFS];
450 uint64_t enabled_rawbufs[PIPE_SHADER_TYPES];
451
452 /** Bitmask of enabled constant buffers */
453 unsigned enabled_constbufs[PIPE_SHADER_TYPES];
454
455 /**
456 * These are used to reduce the number of times we call u_upload_unmap()
457 * while updating the zero-th/default VGPU10 constant buffer.
458 */
459 struct pipe_resource *const0_buffer;
460 struct svga_winsys_surface *const0_handle;
461
462 /** VGPU10 HW state (used to prevent emitting redundant state) */
463 SVGA3dDepthStencilStateId depth_stencil_id;
464 unsigned stencil_ref;
465 SVGA3dBlendStateId blend_id;
466 float blend_factor[4];
467 unsigned blend_sample_mask;
468 SVGA3dRasterizerStateId rasterizer_id;
469 SVGA3dElementLayoutId layout_id;
470 SVGA3dPrimitiveType topology;
471
472 /** Vertex buffer state */
473 SVGA3dVertexBuffer_v2 vbuffer_attrs[PIPE_MAX_ATTRIBS];
474 struct pipe_resource *vbuffers[PIPE_MAX_ATTRIBS];
475 unsigned num_vbuffers;
476
477 struct pipe_resource *ib; /**< index buffer for drawing */
478 SVGA3dSurfaceFormat ib_format;
479 unsigned ib_offset;
480
481 unsigned num_samplers[PIPE_SHADER_TYPES];
482 SVGA3dSamplerId samplers[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
483
484 unsigned num_sampler_views[PIPE_SHADER_TYPES];
485 struct pipe_sampler_view
486 *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
487
488 /* used for rebinding */
489 unsigned default_constbuf_size[PIPE_SHADER_TYPES];
490
491 bool rasterizer_discard; /* set if rasterization is disabled */
492 bool has_backed_views; /* set if any of the rtv/dsv is a backed surface view */
493
494 /* Image Views */
495 int uavSpliceIndex;
496 unsigned num_image_views[PIPE_SHADER_TYPES];
497 struct svga_image_view image_views[PIPE_SHADER_TYPES][SVGA_MAX_IMAGES];
498
499 /* Shader Buffers */
500 unsigned num_shader_buffers[PIPE_SHADER_TYPES];
501 struct svga_shader_buffer shader_buffers[PIPE_SHADER_TYPES][SVGA_MAX_SHADER_BUFFERS];
502 uint64_t enabled_raw_shaderbufs[PIPE_SHADER_TYPES];
503
504 /* HW Atomic Buffers */
505 unsigned num_atomic_buffers;
506 struct svga_shader_buffer atomic_buffers[SVGA_MAX_SHADER_BUFFERS];
507
508 /* UAV state */
509 unsigned num_uavs;
510 SVGA3dUAViewId uaViewIds[SVGA_MAX_UAVIEWS];
511 struct svga_winsys_surface *uaViews[SVGA_MAX_UAVIEWS];
512
513 /* Compute UAV state */
514 unsigned num_cs_uavs;
515 SVGA3dUAViewId csUAViewIds[SVGA_MAX_UAVIEWS];
516 struct svga_winsys_surface *csUAViews[SVGA_MAX_UAVIEWS];
517
518 /* starting uav index for each shader */
519 unsigned uav_start_index[PIPE_SHADER_TYPES];
520
521 /* starting uav index for HW atomic buffers */
522 unsigned uav_atomic_buf_index;
523 };
524
525
526 /* Updated by calling svga_update_state( SVGA_STATE_NEED_SWTNL )
527 */
528 struct svga_sw_state
529 {
530 /* which parts we need */
531 bool need_swvfetch;
532 bool need_pipeline;
533 bool need_swtnl;
534
535 /* Flag to make sure that need sw is on while
536 * updating state within a swtnl call.
537 */
538 bool in_swtnl_draw;
539 };
540
541
542 /* Queue some state updates (like rss) and submit them to hardware in
543 * a single packet.
544 */
545 struct svga_hw_queue;
546
547 struct svga_query;
548 struct svga_qmem_alloc_entry;
549
550 enum svga_uav_type
551 {
552 SVGA_IMAGE_VIEW = 0,
553 SVGA_SHADER_BUFFER
554 };
555
556 struct svga_uav
557 {
558 enum svga_uav_type type;
559 union {
560 struct svga_image_view image_view;
561 struct svga_shader_buffer shader_buffer;
562 } desc;
563 struct pipe_resource *resource;
564 unsigned next_uaView;
565 SVGA3dUAViewId uaViewId;
566 unsigned timestamp[2];
567 };
568
569 struct svga_cache_uav
570 {
571 unsigned num_uaViews;
572 unsigned next_uaView;
573 struct svga_uav uaViews[SVGA3D_DX11_1_MAX_UAVIEWS];
574 };
575
576 struct svga_context
577 {
578 struct pipe_context pipe;
579 struct svga_winsys_context *swc;
580 struct blitter_context *blitter;
581 struct u_upload_mgr *const0_upload;
582 struct u_upload_mgr *tex_upload;
583
584 struct {
585 bool no_swtnl;
586 bool force_swtnl;
587 bool use_min_mipmap;
588
589 /* incremented for each shader */
590 unsigned shader_id;
591
592 bool no_line_width;
593 bool force_hw_line_stipple;
594
595 /** To report perf/conformance/etc issues to the gallium frontend */
596 struct util_debug_callback callback;
597 } debug;
598
599 struct {
600 struct draw_context *draw;
601 struct vbuf_render *backend;
602 unsigned hw_prim;
603 bool new_vbuf;
604 bool new_vdecl;
605 } swtnl;
606
607 /* Bitmask of blend state objects IDs */
608 struct util_bitmask *blend_object_id_bm;
609
610 /* Bitmask of depth/stencil state objects IDs */
611 struct util_bitmask *ds_object_id_bm;
612
613 /* Bitmask of input element object IDs */
614 struct util_bitmask *input_element_object_id_bm;
615
616 /* Bitmask of rasterizer object IDs */
617 struct util_bitmask *rast_object_id_bm;
618
619 /* Bitmask of sampler state objects IDs */
620 struct util_bitmask *sampler_object_id_bm;
621
622 /* Bitmask of sampler view IDs */
623 struct util_bitmask *sampler_view_id_bm;
624
625 /* Bitmask of to-free sampler view IDs created for raw buffer srv */
626 struct util_bitmask *sampler_view_to_free_id_bm;
627
628 /* Bitmask of used shader IDs */
629 struct util_bitmask *shader_id_bm;
630
631 /* Bitmask of used surface view IDs */
632 struct util_bitmask *surface_view_id_bm;
633
634 /* Bitmask of used stream output IDs */
635 struct util_bitmask *stream_output_id_bm;
636
637 /* Bitmask of used query IDs */
638 struct util_bitmask *query_id_bm;
639
640 /* Bitmask of used uav IDs */
641 struct util_bitmask *uav_id_bm;
642
643 /* Bitmask of to-free uav IDs */
644 struct util_bitmask *uav_to_free_id_bm;
645
646 struct {
647 uint64_t dirty[SVGA_STATE_MAX];
648
649 /** bitmasks of which const buffers are changed */
650 unsigned dirty_constbufs[PIPE_SHADER_TYPES];
651
652 /** bitmasks of which const buffers to be bound as srv raw buffers */
653 unsigned raw_constbufs[PIPE_SHADER_TYPES];
654
655 /** bitmasks of which shader buffers to be bound as srv raw buffers */
656 uint64_t raw_shaderbufs[PIPE_SHADER_TYPES];
657
658 unsigned texture_timestamp;
659 unsigned uav_timestamp[2];
660
661 struct svga_sw_state sw;
662 struct svga_hw_draw_state hw_draw;
663 struct svga_hw_clear_state hw_clear;
664 } state;
665
666 struct svga_state curr; /* state from the gallium frontend */
667 uint64_t dirty; /* statechanges since last update_state() */
668
669 union {
670 struct {
671 unsigned rendertargets:1;
672 unsigned texture_samplers:1;
673 unsigned constbufs:1;
674 unsigned vs:1;
675 unsigned fs:1;
676 unsigned gs:1;
677 unsigned tcs:1;
678 unsigned tes:1;
679 unsigned cs:1;
680 unsigned query:1;
681 unsigned images:1;
682 unsigned shaderbufs:1;
683 unsigned atomicbufs:1;
684 unsigned uav:1;
685 unsigned indexbuf:1;
686 unsigned vertexbufs:1;
687 } flags;
688 unsigned val;
689 } rebind;
690
691 struct svga_hwtnl *hwtnl;
692
693 /** Queries states */
694 struct svga_winsys_gb_query *gb_query; /**< gb query object, one per context */
695 unsigned gb_query_len; /**< gb query object size */
696 struct util_bitmask *gb_query_alloc_mask; /**< gb query object allocation mask */
697 struct svga_qmem_alloc_entry *gb_query_map[SVGA_QUERY_MAX];
698 /**< query mem block mapping */
699 struct svga_query *sq[SVGA_QUERY_MAX+12]; /**< queries currently in progress */
700 /* The last 12 entries are for streamout
701 * queries for stream 0..3
702 */
703
704 /** List of buffers with queued transfers */
705 struct list_head dirty_buffers;
706
707 /** performance / info queries for HUD */
708 struct {
709 uint64_t num_draw_calls; /**< SVGA_QUERY_DRAW_CALLS */
710 uint64_t num_fallbacks; /**< SVGA_QUERY_NUM_FALLBACKS */
711 uint64_t num_flushes; /**< SVGA_QUERY_NUM_FLUSHES */
712 uint64_t num_validations; /**< SVGA_QUERY_NUM_VALIDATIONS */
713 uint64_t map_buffer_time; /**< SVGA_QUERY_MAP_BUFFER_TIME */
714 uint64_t num_buffers_mapped; /**< SVGA_QUERY_NUM_BUFFERS_MAPPED */
715 uint64_t num_textures_mapped; /**< SVGA_QUERY_NUM_TEXTURES_MAPPED */
716 uint64_t num_command_buffers; /**< SVGA_QUERY_NUM_COMMAND_BUFFERS */
717 uint64_t command_buffer_size; /**< SVGA_QUERY_COMMAND_BUFFER_SIZE */
718 uint64_t flush_time; /**< SVGA_QUERY_FLUSH_TIME */
719 uint64_t surface_write_flushes; /**< SVGA_QUERY_SURFACE_WRITE_FLUSHES */
720 uint64_t num_readbacks; /**< SVGA_QUERY_NUM_READBACKS */
721 uint64_t num_resource_updates; /**< SVGA_QUERY_NUM_RESOURCE_UPDATES */
722 uint64_t num_buffer_uploads; /**< SVGA_QUERY_NUM_BUFFER_UPLOADS */
723 uint64_t num_const_buf_updates; /**< SVGA_QUERY_NUM_CONST_BUF_UPDATES */
724 uint64_t num_const_updates; /**< SVGA_QUERY_NUM_CONST_UPDATES */
725 uint64_t num_shaders; /**< SVGA_QUERY_NUM_SHADERS */
726
727 /** The following are summed for SVGA_QUERY_NUM_STATE_OBJECTS */
728 uint64_t num_blend_objects;
729 uint64_t num_depthstencil_objects;
730 uint64_t num_rasterizer_objects;
731 uint64_t num_sampler_objects;
732 uint64_t num_samplerview_objects;
733 uint64_t num_vertexelement_objects;
734
735 uint64_t num_surface_views; /**< SVGA_QUERY_NUM_SURFACE_VIEWS */
736 uint64_t num_bytes_uploaded; /**< SVGA_QUERY_NUM_BYTES_UPLOADED */
737 uint64_t num_generate_mipmap; /**< SVGA_QUERY_NUM_GENERATE_MIPMAP */
738 uint64_t shader_mem_used; /**< SVGA_QUERY_SHADER_MEM_USED */
739
740 bool uses_time; /**< os_time_get() calls needed? */
741 } hud;
742
743 /** The currently bound stream output targets */
744 bool in_streamout; /* Set if streamout is active */
745 unsigned num_so_targets;
746 struct svga_winsys_surface *so_surfaces[SVGA3D_DX_MAX_SOTARGETS];
747 struct pipe_stream_output_target *so_targets[SVGA3D_DX_MAX_SOTARGETS];
748 struct svga_stream_output *current_so;
749
750 /**
751 * The following states are used in the workaround for auto draw with
752 * stream instancing.
753 */
754
755 /* Last bound SO targets that can be used to get vertex count */
756 struct pipe_stream_output_target *vcount_so_targets[SVGA3D_DX_MAX_SOTARGETS];
757 unsigned vcount_buffer_stream; /* SO buffer to stream index mask */
758 struct pipe_query *so_queries[4]; /* SO stat queries for each stream */
759
760 /** A blend state with blending disabled, for falling back to when blending
761 * is illegal (e.g. an integer texture is bound)
762 */
763 struct svga_blend_state *noop_blend;
764
765 struct {
766 struct pipe_resource *texture;
767 struct svga_pipe_sampler_view *sampler_view;
768 void *sampler;
769 } polygon_stipple;
770
771 /** Depth stencil state created to disable depth stencil test */
772 struct svga_depth_stencil_state *depthstencil_disable;
773
774 /** Current conditional rendering predicate */
775 struct {
776 SVGA3dQueryId query_id;
777 bool cond;
778 } pred;
779
780 bool render_condition;
781 bool disable_rasterizer; /* Set if to disable rasterization */
782 uint8_t patch_vertices;
783
784 struct {
785 struct svga_tcs_shader *passthrough_tcs;
786 struct svga_vertex_shader *vs;
787 struct svga_tes_shader *tes;
788 unsigned vertices_per_patch;
789 bool passthrough;
790 } tcs;
791
792 struct svga_cache_uav cache_uav;
793 struct pipe_resource *dummy_resource;
794 };
795
796 /* A flag for each frontend state object:
797 */
798 #define SVGA_NEW_BLEND ((uint64_t) 0x1)
799 #define SVGA_NEW_DEPTH_STENCIL_ALPHA ((uint64_t) 0x2)
800 #define SVGA_NEW_RAST ((uint64_t) 0x4)
801 #define SVGA_NEW_SAMPLER ((uint64_t) 0x8)
802 #define SVGA_NEW_TEXTURE ((uint64_t) 0x10)
803 #define SVGA_NEW_VBUFFER ((uint64_t) 0x20)
804 #define SVGA_NEW_VELEMENT ((uint64_t) 0x40)
805 #define SVGA_NEW_FS ((uint64_t) 0x80)
806 #define SVGA_NEW_VS ((uint64_t) 0x100)
807 #define SVGA_NEW_FS_CONST_BUFFER ((uint64_t) 0x200)
808 #define SVGA_NEW_VS_CONST_BUFFER ((uint64_t) 0x400)
809 #define SVGA_NEW_FRAME_BUFFER ((uint64_t) 0x800)
810 #define SVGA_NEW_STIPPLE ((uint64_t) 0x1000)
811 #define SVGA_NEW_SCISSOR ((uint64_t) 0x2000)
812 #define SVGA_NEW_BLEND_COLOR ((uint64_t) 0x4000)
813 #define SVGA_NEW_CLIP ((uint64_t) 0x8000)
814 #define SVGA_NEW_VIEWPORT ((uint64_t) 0x10000)
815 #define SVGA_NEW_PRESCALE ((uint64_t) 0x20000)
816 #define SVGA_NEW_REDUCED_PRIMITIVE ((uint64_t) 0x40000)
817 #define SVGA_NEW_TEXTURE_BINDING ((uint64_t) 0x80000)
818 #define SVGA_NEW_NEED_PIPELINE ((uint64_t) 0x100000)
819 #define SVGA_NEW_NEED_SWVFETCH ((uint64_t) 0x200000)
820 #define SVGA_NEW_NEED_SWTNL ((uint64_t) 0x400000)
821 #define SVGA_NEW_FS_VARIANT ((uint64_t) 0x800000)
822 #define SVGA_NEW_VS_VARIANT ((uint64_t) 0x1000000)
823 #define SVGA_NEW_TEXTURE_FLAGS ((uint64_t) 0x4000000)
824 #define SVGA_NEW_STENCIL_REF ((uint64_t) 0x8000000)
825 #define SVGA_NEW_GS ((uint64_t) 0x10000000)
826 #define SVGA_NEW_GS_CONST_BUFFER ((uint64_t) 0x20000000)
827 #define SVGA_NEW_GS_VARIANT ((uint64_t) 0x40000000)
828 #define SVGA_NEW_TEXTURE_CONSTS ((uint64_t) 0x80000000)
829 #define SVGA_NEW_TCS ((uint64_t) 0x100000000)
830 #define SVGA_NEW_TES ((uint64_t) 0x200000000)
831 #define SVGA_NEW_TCS_VARIANT ((uint64_t) 0x400000000)
832 #define SVGA_NEW_TES_VARIANT ((uint64_t) 0x800000000)
833 #define SVGA_NEW_TCS_CONST_BUFFER ((uint64_t) 0x1000000000)
834 #define SVGA_NEW_TES_CONST_BUFFER ((uint64_t) 0x2000000000)
835 #define SVGA_NEW_TCS_PARAM ((uint64_t) 0x4000000000)
836 #define SVGA_NEW_IMAGE_VIEW ((uint64_t) 0x8000000000)
837 #define SVGA_NEW_SHADER_BUFFER ((uint64_t) 0x10000000000)
838 #define SVGA_NEW_CS ((uint64_t) 0x20000000000)
839 #define SVGA_NEW_CS_VARIANT ((uint64_t) 0x40000000000)
840 #define SVGA_NEW_CS_CONST_BUFFER ((uint64_t) 0x80000000000)
841 #define SVGA_NEW_FS_CONSTS ((uint64_t) 0x100000000000)
842 #define SVGA_NEW_VS_CONSTS ((uint64_t) 0x200000000000)
843 #define SVGA_NEW_GS_CONSTS ((uint64_t) 0x400000000000)
844 #define SVGA_NEW_TCS_CONSTS ((uint64_t) 0x800000000000)
845 #define SVGA_NEW_TES_CONSTS ((uint64_t) 0x1000000000000)
846 #define SVGA_NEW_CS_CONSTS ((uint64_t) 0x2000000000000)
847 #define SVGA_NEW_FS_RAW_BUFFER ((uint64_t) 0x4000000000000)
848 #define SVGA_NEW_VS_RAW_BUFFER ((uint64_t) 0x8000000000000)
849 #define SVGA_NEW_GS_RAW_BUFFER ((uint64_t) 0x10000000000000)
850 #define SVGA_NEW_TCS_RAW_BUFFER ((uint64_t) 0x20000000000000)
851 #define SVGA_NEW_TES_RAW_BUFFER ((uint64_t) 0x40000000000000)
852 #define SVGA_NEW_CS_RAW_BUFFER ((uint64_t) 0x80000000000000)
853 #define SVGA_NEW_ALL ((uint64_t) 0xFFFFFFFFFFFFFFFF)
854
855 #define SVGA_NEW_CONST_BUFFER \
856 (SVGA_NEW_FS_CONST_BUFFER | SVGA_NEW_VS_CONST_BUFFER | \
857 SVGA_NEW_GS_CONST_BUFFER | SVGA_NEW_CS_CONST_BUFFER | \
858 SVGA_NEW_TCS_CONST_BUFFER | SVGA_NEW_TES_CONST_BUFFER)
859
860
861 /** Program pipelines */
862 enum svga_pipe_type
863 {
864 SVGA_PIPE_GRAPHICS = 0,
865 SVGA_PIPE_COMPUTE = 1
866 };
867
868 void svga_init_state_functions( struct svga_context *svga );
869 void svga_init_flush_functions( struct svga_context *svga );
870 void svga_init_string_functions( struct svga_context *svga );
871 void svga_init_blit_functions(struct svga_context *svga);
872
873 void svga_init_blend_functions( struct svga_context *svga );
874 void svga_init_depth_stencil_functions( struct svga_context *svga );
875 void svga_init_misc_functions( struct svga_context *svga );
876 void svga_init_rasterizer_functions( struct svga_context *svga );
877 void svga_init_sampler_functions( struct svga_context *svga );
878 void svga_init_cs_functions( struct svga_context *svga );
879 void svga_init_fs_functions( struct svga_context *svga );
880 void svga_init_vs_functions( struct svga_context *svga );
881 void svga_init_gs_functions( struct svga_context *svga );
882 void svga_init_ts_functions( struct svga_context *svga );
883 void svga_init_vertex_functions( struct svga_context *svga );
884 void svga_init_constbuffer_functions( struct svga_context *svga );
885 void svga_init_draw_functions( struct svga_context *svga );
886 void svga_init_query_functions( struct svga_context *svga );
887 void svga_init_surface_functions(struct svga_context *svga);
888 void svga_init_stream_output_functions( struct svga_context *svga );
889 void svga_init_clear_functions( struct svga_context *svga );
890 void svga_init_shader_image_functions( struct svga_context *svga );
891
892 void svga_cleanup_vertex_state( struct svga_context *svga );
893 void svga_cleanup_sampler_state( struct svga_context *svga );
894 void svga_cleanup_tss_binding( struct svga_context *svga );
895 void svga_cleanup_framebuffer( struct svga_context *svga );
896 void svga_cleanup_tcs_state( struct svga_context *svga );
897
898 void svga_context_flush( struct svga_context *svga,
899 struct pipe_fence_handle **pfence );
900
901 void svga_context_finish(struct svga_context *svga);
902
903 void svga_hwtnl_flush_retry( struct svga_context *svga );
904 void svga_hwtnl_flush_buffer( struct svga_context *svga,
905 struct pipe_resource *buffer );
906 bool svga_hwtnl_has_pending_prim(struct svga_hwtnl *);
907
908 void svga_surfaces_flush(struct svga_context *svga);
909
910 struct pipe_context *
911 svga_context_create(struct pipe_screen *screen,
912 void *priv, unsigned flags);
913
914 void svga_toggle_render_condition(struct svga_context *svga,
915 bool render_condition_enabled,
916 bool on);
917
918 int svga_define_rasterizer_object(struct svga_context *svga,
919 struct svga_rasterizer_state *,
920 unsigned samples);
921
922 enum pipe_error
923 svga_validate_sampler_resources(struct svga_context *svga,
924 enum svga_pipe_type);
925
926 enum pipe_error
927 svga_validate_constant_buffers(struct svga_context *svga,
928 enum svga_pipe_type);
929
930 enum pipe_error
931 svga_validate_image_views(struct svga_context *svga,
932 enum svga_pipe_type);
933
934 enum pipe_error
935 svga_validate_shader_buffers(struct svga_context *svga,
936 enum svga_pipe_type);
937
938 void
939 svga_destroy_rawbuf_srv(struct svga_context *svga);
940
941 void
942 svga_uav_cache_init(struct svga_context *svga);
943
944 void
945 svga_destroy_rawbuf_srv(struct svga_context *svga);
946
947
948 /***********************************************************************
949 * Inline conversion functions. These are better-typed than the
950 * macros used previously:
951 */
952 static inline struct svga_context *
svga_context(struct pipe_context * pipe)953 svga_context( struct pipe_context *pipe )
954 {
955 return (struct svga_context *)pipe;
956 }
957
958 static inline struct svga_winsys_screen *
svga_sws(struct svga_context * svga)959 svga_sws(struct svga_context *svga)
960 {
961 return svga_screen(svga->pipe.screen)->sws;
962 }
963
964 static inline bool
svga_have_gb_objects(const struct svga_context * svga)965 svga_have_gb_objects(const struct svga_context *svga)
966 {
967 return svga_screen(svga->pipe.screen)->sws->have_gb_objects;
968 }
969
970 static inline bool
svga_have_gb_dma(const struct svga_context * svga)971 svga_have_gb_dma(const struct svga_context *svga)
972 {
973 return svga_screen(svga->pipe.screen)->sws->have_gb_dma;
974 }
975
976 static inline bool
svga_have_vgpu10(const struct svga_context * svga)977 svga_have_vgpu10(const struct svga_context *svga)
978 {
979 return svga_screen(svga->pipe.screen)->sws->have_vgpu10;
980 }
981
982 static inline bool
svga_have_sm4_1(const struct svga_context * svga)983 svga_have_sm4_1(const struct svga_context *svga)
984 {
985 return svga_screen(svga->pipe.screen)->sws->have_sm4_1;
986 }
987
988 static inline bool
svga_have_sm5(const struct svga_context * svga)989 svga_have_sm5(const struct svga_context *svga)
990 {
991 return svga_screen(svga->pipe.screen)->sws->have_sm5;
992 }
993
994 static inline bool
svga_have_gl43(const struct svga_context * svga)995 svga_have_gl43(const struct svga_context *svga)
996 {
997 return svga_screen(svga->pipe.screen)->sws->have_gl43;
998 }
999
1000 static inline bool
svga_need_to_rebind_resources(const struct svga_context * svga)1001 svga_need_to_rebind_resources(const struct svga_context *svga)
1002 {
1003 return svga_screen(svga->pipe.screen)->sws->need_to_rebind_resources;
1004 }
1005
1006 static inline bool
svga_rects_equal(const SVGA3dRect * r1,const SVGA3dRect * r2)1007 svga_rects_equal(const SVGA3dRect *r1, const SVGA3dRect *r2)
1008 {
1009 return memcmp(r1, r2, sizeof(*r1)) == 0;
1010 }
1011
1012
1013 /* A helper function to return TRUE if sampler state mapping is
1014 * to be used. Sampler state mapping is used in GL43 context
1015 * if the number of sampler states exceeds the SVGA device limit or
1016 * the sampler state mapping environment variable is set.
1017 */
1018 static inline bool
svga_use_sampler_state_mapping(const struct svga_context * svga,unsigned num_sampler_states)1019 svga_use_sampler_state_mapping(const struct svga_context *svga,
1020 unsigned num_sampler_states)
1021 {
1022 return svga_have_gl43(svga) &&
1023 (svga_screen(svga->pipe.screen)->debug.sampler_state_mapping ||
1024 num_sampler_states > SVGA3D_DX_MAX_SAMPLERS);
1025 }
1026
1027
1028 static inline void
svga_set_curr_shader_use_samplers_flag(struct svga_context * svga,enum pipe_shader_type shader_type,bool use_samplers)1029 svga_set_curr_shader_use_samplers_flag(struct svga_context *svga,
1030 enum pipe_shader_type shader_type,
1031 bool use_samplers)
1032 {
1033 svga->curr.use_samplers[shader_type] = use_samplers;
1034 }
1035
1036
1037 static inline bool
svga_curr_shader_use_samplers(const struct svga_context * svga,enum pipe_shader_type shader_type)1038 svga_curr_shader_use_samplers(const struct svga_context *svga,
1039 enum pipe_shader_type shader_type)
1040 {
1041 return svga->curr.use_samplers[shader_type];
1042 }
1043
1044
1045 /**
1046 * If the Gallium HUD is enabled, this will return the current time.
1047 * Otherwise, just return zero.
1048 */
1049 static inline int64_t
svga_get_time(struct svga_context * svga)1050 svga_get_time(struct svga_context *svga)
1051 {
1052 return svga->hud.uses_time ? os_time_get() : 0;
1053 }
1054
1055 /*
1056 * The SVGA_TRY_XX family of macros can be used to optionally replace a
1057 * function call with an error value, the purpose is to trigger and test
1058 * retry path handling.
1059 */
1060 #ifdef DEBUG
1061
1062 /*
1063 * Optionally replace a function call with a PIPE_ERROR_OUT_OF_MEMORY
1064 * return value
1065 */
1066 #define SVGA_TRY(_func) \
1067 ((SVGA_DEBUG & DEBUG_RETRY) ? PIPE_ERROR_OUT_OF_MEMORY : (_func))
1068
1069 /* Optionally replace a function call with a NULL return value */
1070 #define SVGA_TRY_PTR(_func) \
1071 ((SVGA_DEBUG & DEBUG_RETRY) ? NULL : (_func))
1072
1073 /*
1074 * Optionally replace a function call with a NULL return value, and set
1075 * the _retry parameter to TRUE.
1076 */
1077 #define SVGA_TRY_MAP(_func, _retry) \
1078 ((SVGA_DEBUG & DEBUG_RETRY) ? (_retry) = true, NULL : (_func))
1079 #else
1080
1081 #define SVGA_TRY(_func) (_func)
1082
1083 #define SVGA_TRY_PTR(_func) (_func)
1084
1085 #define SVGA_TRY_MAP(_func, _retry) (_func)
1086 #endif
1087
1088 /**
1089 * Enter retry processing after hitting out-of-command space
1090 */
1091 static inline void
svga_retry_enter(struct svga_context * svga)1092 svga_retry_enter(struct svga_context *svga)
1093 {
1094 /* We shouldn't nest retries, but currently we do. */
1095 if ((SVGA_DEBUG & DEBUG_RETRY) && svga->swc->in_retry) {
1096 debug_printf("WARNING: Recursive retry. Level: %u.\n",
1097 svga->swc->in_retry);
1098 }
1099 svga->swc->in_retry++;
1100 }
1101
1102 /**
1103 * Exit retry processing after hitting out-of-command space
1104 */
1105 static inline void
svga_retry_exit(struct svga_context * svga)1106 svga_retry_exit(struct svga_context *svga)
1107 {
1108 assert(svga->swc->in_retry > 0);
1109 svga->swc->in_retry--;
1110 }
1111
1112 /**
1113 * Perform a function call, and on failure flush the context and retry,
1114 * asserting that the retry succeeded. On return, the boolean argument
1115 * _retried indicates whether the function call was retried or not.
1116 */
1117 #define SVGA_RETRY_CHECK(_svga, _func, _retried) \
1118 do { \
1119 enum pipe_error ret; \
1120 \
1121 ret = SVGA_TRY(_func); \
1122 (_retried) = (ret != PIPE_OK); \
1123 if (_retried) { \
1124 svga_retry_enter(_svga); \
1125 svga_context_flush(_svga, NULL); \
1126 ret = (_func); \
1127 assert(ret == PIPE_OK); \
1128 svga_retry_exit(_svga); \
1129 } \
1130 } while(0)
1131
1132 /**
1133 * Perform a function call, and on failure flush the context and retry,
1134 * asserting that the retry succeeded.
1135 */
1136 #define SVGA_RETRY(_svga, _func) \
1137 do { \
1138 UNUSED bool retried; \
1139 \
1140 SVGA_RETRY_CHECK(_svga, _func, retried); \
1141 } while(0)
1142
1143 /**
1144 * Perform a function call, and on out-of-memory, flush the context and
1145 * retry. The retry return value is stored in _ret for reuse.
1146 */
1147 #define SVGA_RETRY_OOM(_svga, _ret, _func) \
1148 do { \
1149 (_ret) = SVGA_TRY(_func); \
1150 if ((_ret) == PIPE_ERROR_OUT_OF_MEMORY) { \
1151 svga_retry_enter(_svga); \
1152 svga_context_flush(_svga, NULL); \
1153 (_ret) = (_func); \
1154 svga_retry_exit(_svga); \
1155 } \
1156 } while (0);
1157
1158 #endif
1159