1 /*
2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include <sys/sysinfo.h>
26
27 #include "common/v3d_device_info.h"
28 #include "common/v3d_limits.h"
29 #include "util/os_misc.h"
30 #include "pipe/p_defines.h"
31 #include "pipe/p_screen.h"
32 #include "pipe/p_state.h"
33
34 #include "util/u_debug.h"
35 #include "util/u_memory.h"
36 #include "util/format/u_format.h"
37 #include "util/u_hash_table.h"
38 #include "util/u_screen.h"
39 #include "util/u_transfer_helper.h"
40 #include "util/ralloc.h"
41 #include "util/xmlconfig.h"
42
43 #include <xf86drm.h>
44 #include "v3d_screen.h"
45 #include "v3d_context.h"
46 #include "v3d_resource.h"
47 #include "compiler/v3d_compiler.h"
48 #include "drm-uapi/drm_fourcc.h"
49
50 static const char *
v3d_screen_get_name(struct pipe_screen * pscreen)51 v3d_screen_get_name(struct pipe_screen *pscreen)
52 {
53 struct v3d_screen *screen = v3d_screen(pscreen);
54
55 if (!screen->name) {
56 screen->name = ralloc_asprintf(screen,
57 "V3D %d.%d.%d",
58 screen->devinfo.ver / 10,
59 screen->devinfo.ver % 10,
60 screen->devinfo.rev);
61 }
62
63 return screen->name;
64 }
65
66 static const char *
v3d_screen_get_vendor(struct pipe_screen * pscreen)67 v3d_screen_get_vendor(struct pipe_screen *pscreen)
68 {
69 return "Broadcom";
70 }
71
72 static void
v3d_screen_destroy(struct pipe_screen * pscreen)73 v3d_screen_destroy(struct pipe_screen *pscreen)
74 {
75 struct v3d_screen *screen = v3d_screen(pscreen);
76
77 _mesa_hash_table_destroy(screen->bo_handles, NULL);
78 v3d_bufmgr_destroy(pscreen);
79 slab_destroy_parent(&screen->transfer_pool);
80 if (screen->ro)
81 screen->ro->destroy(screen->ro);
82
83 if (using_v3d_simulator)
84 v3d_simulator_destroy(screen->sim_file);
85
86 v3d_compiler_free(screen->compiler);
87
88 #ifdef ENABLE_SHADER_CACHE
89 if (screen->disk_cache)
90 disk_cache_destroy(screen->disk_cache);
91 #endif
92
93 u_transfer_helper_destroy(pscreen->transfer_helper);
94
95 close(screen->fd);
96 ralloc_free(pscreen);
97 }
98
99 static bool
v3d_has_feature(struct v3d_screen * screen,enum drm_v3d_param feature)100 v3d_has_feature(struct v3d_screen *screen, enum drm_v3d_param feature)
101 {
102 struct drm_v3d_get_param p = {
103 .param = feature,
104 };
105 int ret = v3d_ioctl(screen->fd, DRM_IOCTL_V3D_GET_PARAM, &p);
106
107 if (ret != 0)
108 return false;
109
110 return p.value;
111 }
112
113 static int
v3d_screen_get_param(struct pipe_screen * pscreen,enum pipe_cap param)114 v3d_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
115 {
116 struct v3d_screen *screen = v3d_screen(pscreen);
117
118 switch (param) {
119 /* Supported features (boolean caps). */
120 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
121 case PIPE_CAP_NPOT_TEXTURES:
122 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
123 case PIPE_CAP_TEXTURE_MULTISAMPLE:
124 case PIPE_CAP_TEXTURE_SWIZZLE:
125 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
126 case PIPE_CAP_START_INSTANCE:
127 case PIPE_CAP_VS_INSTANCEID:
128 case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
129 case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
130 case PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX:
131 case PIPE_CAP_EMULATE_NONFIXED_PRIMITIVE_RESTART:
132 case PIPE_CAP_PRIMITIVE_RESTART:
133 case PIPE_CAP_OCCLUSION_QUERY:
134 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
135 case PIPE_CAP_DRAW_INDIRECT:
136 case PIPE_CAP_MULTI_DRAW_INDIRECT:
137 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
138 case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
139 case PIPE_CAP_SHADER_CAN_READ_OUTPUTS:
140 case PIPE_CAP_SHADER_PACK_HALF_FLOAT:
141 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
142 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
143 case PIPE_CAP_FS_FACE_IS_INTEGER_SYSVAL:
144 case PIPE_CAP_TGSI_TEXCOORD:
145 case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
146 case PIPE_CAP_SAMPLER_VIEW_TARGET:
147 case PIPE_CAP_ANISOTROPIC_FILTER:
148 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
149 case PIPE_CAP_INDEP_BLEND_FUNC:
150 case PIPE_CAP_CONDITIONAL_RENDER:
151 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
152 case PIPE_CAP_CUBE_MAP_ARRAY:
153 case PIPE_CAP_NIR_COMPACT_ARRAYS:
154 case PIPE_CAP_TEXTURE_BARRIER:
155 return 1;
156
157 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
158 return screen->devinfo.ver >= 42;
159
160
161 case PIPE_CAP_TEXTURE_QUERY_LOD:
162 return screen->devinfo.ver >= 42;
163 break;
164
165 case PIPE_CAP_PACKED_UNIFORMS:
166 /* We can't enable this flag, because it results in load_ubo
167 * intrinsics across a 16b boundary, but v3d's TMU general
168 * memory accesses wrap on 16b boundaries.
169 */
170 return 0;
171
172 case PIPE_CAP_NIR_IMAGES_AS_DEREF:
173 return 0;
174
175 case PIPE_CAP_TEXTURE_TRANSFER_MODES:
176 /* XXX perf: we don't want to emit these extra blits for
177 * glReadPixels(), since we still have to do an uncached read
178 * from the GPU of the result after waiting for the TFU blit
179 * to happen. However, disabling this introduces instability
180 * in
181 * dEQP-GLES31.functional.image_load_store.early_fragment_tests.*
182 * and corruption in chromium's rendering.
183 */
184 return PIPE_TEXTURE_TRANSFER_BLIT;
185
186 case PIPE_CAP_COMPUTE:
187 return screen->has_csd && screen->devinfo.ver >= 42;
188
189 case PIPE_CAP_GENERATE_MIPMAP:
190 return v3d_has_feature(screen, DRM_V3D_PARAM_SUPPORTS_TFU);
191
192 case PIPE_CAP_INDEP_BLEND_ENABLE:
193 return 1;
194
195 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
196 return V3D_NON_COHERENT_ATOM_SIZE;
197
198 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
199 return 4;
200
201 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
202 if (screen->has_cache_flush)
203 return 4;
204 else
205 return 0; /* Disables shader storage */
206
207 case PIPE_CAP_GLSL_FEATURE_LEVEL:
208 return 330;
209
210 case PIPE_CAP_ESSL_FEATURE_LEVEL:
211 return 310;
212
213 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
214 return 140;
215
216 case PIPE_CAP_FS_COORD_ORIGIN_UPPER_LEFT:
217 return 1;
218 case PIPE_CAP_FS_COORD_ORIGIN_LOWER_LEFT:
219 return 0;
220 case PIPE_CAP_FS_COORD_PIXEL_CENTER_INTEGER:
221 return 0;
222 case PIPE_CAP_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
223 return 1;
224
225 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
226 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
227 return 1;
228
229 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
230 return 4;
231
232 case PIPE_CAP_MAX_VARYINGS:
233 return V3D_MAX_FS_INPUTS / 4;
234
235 /* Texturing. */
236 case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
237 if (screen->nonmsaa_texture_size_limit)
238 return 7680;
239 else
240 return V3D_MAX_IMAGE_DIMENSION;
241 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
242 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
243 return V3D_MAX_MIP_LEVELS;
244 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
245 return V3D_MAX_ARRAY_LAYERS;
246
247 case PIPE_CAP_MAX_RENDER_TARGETS:
248 return V3D_MAX_RENDER_TARGETS(screen->devinfo.ver);
249
250 case PIPE_CAP_VENDOR_ID:
251 return 0x14E4;
252 case PIPE_CAP_ACCELERATED:
253 return 1;
254 case PIPE_CAP_VIDEO_MEMORY: {
255 uint64_t system_memory;
256
257 if (!os_get_total_physical_memory(&system_memory))
258 return 0;
259
260 return (int)(system_memory >> 20);
261 }
262 case PIPE_CAP_UMA:
263 return 1;
264
265 case PIPE_CAP_ALPHA_TEST:
266 case PIPE_CAP_FLATSHADE:
267 case PIPE_CAP_TWO_SIDED_COLOR:
268 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
269 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
270 case PIPE_CAP_GL_CLAMP:
271 return 0;
272
273 /* Geometry shaders */
274 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
275 /* Minimum required by GLES 3.2 */
276 return 1024;
277 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
278 /* MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS / 4 */
279 return 256;
280 case PIPE_CAP_MAX_GS_INVOCATIONS:
281 return 32;
282
283 case PIPE_CAP_SUPPORTED_PRIM_MODES:
284 case PIPE_CAP_SUPPORTED_PRIM_MODES_WITH_RESTART:
285 return screen->prim_types;
286
287 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
288 return true;
289
290 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
291 return V3D_TMU_TEXEL_ALIGN;
292
293 case PIPE_CAP_IMAGE_STORE_FORMATTED:
294 return false;
295
296 case PIPE_CAP_NATIVE_FENCE_FD:
297 return true;
298
299 default:
300 return u_pipe_screen_get_param_defaults(pscreen, param);
301 }
302 }
303
304 static float
v3d_screen_get_paramf(struct pipe_screen * pscreen,enum pipe_capf param)305 v3d_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
306 {
307 switch (param) {
308 case PIPE_CAPF_MIN_LINE_WIDTH:
309 case PIPE_CAPF_MIN_LINE_WIDTH_AA:
310 case PIPE_CAPF_MIN_POINT_SIZE:
311 case PIPE_CAPF_MIN_POINT_SIZE_AA:
312 return 1;
313
314 case PIPE_CAPF_POINT_SIZE_GRANULARITY:
315 case PIPE_CAPF_LINE_WIDTH_GRANULARITY:
316 return 0.1;
317
318 case PIPE_CAPF_MAX_LINE_WIDTH:
319 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
320 return V3D_MAX_LINE_WIDTH;
321
322 case PIPE_CAPF_MAX_POINT_SIZE:
323 case PIPE_CAPF_MAX_POINT_SIZE_AA:
324 return V3D_MAX_POINT_SIZE;
325
326 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
327 return 16.0f;
328 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
329 return 16.0f;
330
331 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
332 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
333 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
334 return 0.0f;
335 default:
336 fprintf(stderr, "unknown paramf %d\n", param);
337 return 0;
338 }
339 }
340
341 static int
v3d_screen_get_shader_param(struct pipe_screen * pscreen,enum pipe_shader_type shader,enum pipe_shader_cap param)342 v3d_screen_get_shader_param(struct pipe_screen *pscreen, enum pipe_shader_type shader,
343 enum pipe_shader_cap param)
344 {
345 struct v3d_screen *screen = v3d_screen(pscreen);
346
347 switch (shader) {
348 case PIPE_SHADER_VERTEX:
349 case PIPE_SHADER_FRAGMENT:
350 break;
351 case PIPE_SHADER_COMPUTE:
352 if (!screen->has_csd)
353 return 0;
354 break;
355 case PIPE_SHADER_GEOMETRY:
356 if (screen->devinfo.ver < 42)
357 return 0;
358 break;
359 default:
360 return 0;
361 }
362
363 /* this is probably not totally correct.. but it's a start: */
364 switch (param) {
365 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
366 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
367 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
368 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
369 return 16384;
370
371 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
372 return UINT_MAX;
373
374 case PIPE_SHADER_CAP_MAX_INPUTS:
375 switch (shader) {
376 case PIPE_SHADER_VERTEX:
377 return V3D_MAX_VS_INPUTS / 4;
378 case PIPE_SHADER_GEOMETRY:
379 return V3D_MAX_GS_INPUTS / 4;
380 case PIPE_SHADER_FRAGMENT:
381 return V3D_MAX_FS_INPUTS / 4;
382 default:
383 return 0;
384 };
385 case PIPE_SHADER_CAP_MAX_OUTPUTS:
386 if (shader == PIPE_SHADER_FRAGMENT)
387 return 4;
388 else
389 return V3D_MAX_FS_INPUTS / 4;
390 case PIPE_SHADER_CAP_MAX_TEMPS:
391 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
392 case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
393 /* Note: Limited by the offset size in
394 * v3d_unit_data_create().
395 */
396 return 16 * 1024 * sizeof(float);
397 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
398 return 16;
399 case PIPE_SHADER_CAP_CONT_SUPPORTED:
400 return 0;
401 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
402 /* We don't currently support this in the backend, but that is
403 * okay because our NIR compiler sets the option
404 * lower_all_io_to_temps, which will eliminate indirect
405 * indexing on all input/output variables by translating it to
406 * indirect indexing on temporary variables instead, which we
407 * will then lower to scratch. We prefer this over setting this
408 * to 0, which would cause if-ladder injection to eliminate
409 * indirect indexing on inputs.
410 */
411 return 1;
412 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
413 return 1;
414 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
415 return 1;
416 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
417 return 1;
418 case PIPE_SHADER_CAP_SUBROUTINES:
419 return 0;
420 case PIPE_SHADER_CAP_INTEGERS:
421 return 1;
422 case PIPE_SHADER_CAP_FP16:
423 case PIPE_SHADER_CAP_FP16_DERIVATIVES:
424 case PIPE_SHADER_CAP_FP16_CONST_BUFFERS:
425 case PIPE_SHADER_CAP_INT16:
426 case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS:
427 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
428 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
429 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
430 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
431 return 0;
432 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
433 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
434 return V3D_MAX_TEXTURE_SAMPLERS;
435
436 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
437 if (screen->has_cache_flush) {
438 if (shader == PIPE_SHADER_VERTEX ||
439 shader == PIPE_SHADER_GEOMETRY) {
440 return 0;
441 }
442 return PIPE_MAX_SHADER_BUFFERS;
443 } else {
444 return 0;
445 }
446
447 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
448 if (screen->has_cache_flush) {
449 if (screen->devinfo.ver < 42)
450 return 0;
451 else
452 return PIPE_MAX_SHADER_IMAGES;
453 } else {
454 return 0;
455 }
456
457 case PIPE_SHADER_CAP_SUPPORTED_IRS:
458 return 1 << PIPE_SHADER_IR_NIR;
459 default:
460 fprintf(stderr, "unknown shader param %d\n", param);
461 return 0;
462 }
463 return 0;
464 }
465
466 static int
v3d_get_compute_param(struct pipe_screen * pscreen,enum pipe_shader_ir ir_type,enum pipe_compute_cap param,void * ret)467 v3d_get_compute_param(struct pipe_screen *pscreen, enum pipe_shader_ir ir_type,
468 enum pipe_compute_cap param, void *ret)
469 {
470 struct v3d_screen *screen = v3d_screen(pscreen);
471
472 if (!screen->has_csd)
473 return 0;
474
475 #define RET(x) do { \
476 if (ret) \
477 memcpy(ret, x, sizeof(x)); \
478 return sizeof(x); \
479 } while (0)
480
481 switch (param) {
482 case PIPE_COMPUTE_CAP_ADDRESS_BITS:
483 RET((uint32_t []) { 32 });
484 break;
485
486 case PIPE_COMPUTE_CAP_IR_TARGET:
487 sprintf(ret, "v3d");
488 return strlen(ret);
489
490 case PIPE_COMPUTE_CAP_GRID_DIMENSION:
491 RET((uint64_t []) { 3 });
492
493 case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
494 /* GL_MAX_COMPUTE_SHADER_WORK_GROUP_COUNT: The CSD has a
495 * 16-bit field for the number of workgroups in each
496 * dimension.
497 */
498 RET(((uint64_t []) { 65535, 65535, 65535 }));
499
500 case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
501 /* GL_MAX_COMPUTE_WORK_GROUP_SIZE */
502 RET(((uint64_t []) { 256, 256, 256 }));
503
504 case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
505 case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK:
506 /* GL_MAX_COMPUTE_WORK_GROUP_INVOCATIONS: This is
507 * limited by WG_SIZE in the CSD.
508 */
509 RET((uint64_t []) { 256 });
510
511 case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE:
512 RET((uint64_t []) { 1024 * 1024 * 1024 });
513
514 case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
515 /* GL_MAX_COMPUTE_SHARED_MEMORY_SIZE */
516 RET((uint64_t []) { 32768 });
517
518 case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE:
519 case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE:
520 RET((uint64_t []) { 4096 });
521
522 case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE: {
523 struct sysinfo si;
524 sysinfo(&si);
525 RET((uint64_t []) { si.totalram });
526 }
527
528 case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
529 /* OpenCL only */
530 RET((uint32_t []) { 0 });
531
532 case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS:
533 RET((uint32_t []) { 1 });
534
535 case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED:
536 RET((uint32_t []) { 1 });
537
538 case PIPE_COMPUTE_CAP_SUBGROUP_SIZES:
539 RET((uint32_t []) { 16 });
540
541 case PIPE_COMPUTE_CAP_MAX_SUBGROUPS:
542 RET((uint32_t []) { 0 });
543
544 }
545
546 return 0;
547 }
548
549 static bool
v3d_screen_is_format_supported(struct pipe_screen * pscreen,enum pipe_format format,enum pipe_texture_target target,unsigned sample_count,unsigned storage_sample_count,unsigned usage)550 v3d_screen_is_format_supported(struct pipe_screen *pscreen,
551 enum pipe_format format,
552 enum pipe_texture_target target,
553 unsigned sample_count,
554 unsigned storage_sample_count,
555 unsigned usage)
556 {
557 struct v3d_screen *screen = v3d_screen(pscreen);
558
559 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
560 return false;
561
562 if (sample_count > 1 && sample_count != V3D_MAX_SAMPLES)
563 return false;
564
565 if (target >= PIPE_MAX_TEXTURE_TYPES) {
566 return false;
567 }
568
569 if (usage & PIPE_BIND_VERTEX_BUFFER) {
570 switch (format) {
571 case PIPE_FORMAT_R32G32B32A32_FLOAT:
572 case PIPE_FORMAT_R32G32B32_FLOAT:
573 case PIPE_FORMAT_R32G32_FLOAT:
574 case PIPE_FORMAT_R32_FLOAT:
575 case PIPE_FORMAT_R32G32B32A32_SNORM:
576 case PIPE_FORMAT_R32G32B32_SNORM:
577 case PIPE_FORMAT_R32G32_SNORM:
578 case PIPE_FORMAT_R32_SNORM:
579 case PIPE_FORMAT_R32G32B32A32_SSCALED:
580 case PIPE_FORMAT_R32G32B32_SSCALED:
581 case PIPE_FORMAT_R32G32_SSCALED:
582 case PIPE_FORMAT_R32_SSCALED:
583 case PIPE_FORMAT_R16G16B16A16_UNORM:
584 case PIPE_FORMAT_R16G16B16A16_FLOAT:
585 case PIPE_FORMAT_R16G16B16_UNORM:
586 case PIPE_FORMAT_R16G16_UNORM:
587 case PIPE_FORMAT_R16_UNORM:
588 case PIPE_FORMAT_R16_FLOAT:
589 case PIPE_FORMAT_R16G16B16A16_SNORM:
590 case PIPE_FORMAT_R16G16B16_SNORM:
591 case PIPE_FORMAT_R16G16_SNORM:
592 case PIPE_FORMAT_R16G16_FLOAT:
593 case PIPE_FORMAT_R16_SNORM:
594 case PIPE_FORMAT_R16G16B16A16_USCALED:
595 case PIPE_FORMAT_R16G16B16_USCALED:
596 case PIPE_FORMAT_R16G16_USCALED:
597 case PIPE_FORMAT_R16_USCALED:
598 case PIPE_FORMAT_R16G16B16A16_SSCALED:
599 case PIPE_FORMAT_R16G16B16_SSCALED:
600 case PIPE_FORMAT_R16G16_SSCALED:
601 case PIPE_FORMAT_R16_SSCALED:
602 case PIPE_FORMAT_B8G8R8A8_UNORM:
603 case PIPE_FORMAT_R8G8B8A8_UNORM:
604 case PIPE_FORMAT_R8G8B8_UNORM:
605 case PIPE_FORMAT_R8G8_UNORM:
606 case PIPE_FORMAT_R8_UNORM:
607 case PIPE_FORMAT_R8G8B8A8_SNORM:
608 case PIPE_FORMAT_R8G8B8_SNORM:
609 case PIPE_FORMAT_R8G8_SNORM:
610 case PIPE_FORMAT_R8_SNORM:
611 case PIPE_FORMAT_R8G8B8A8_USCALED:
612 case PIPE_FORMAT_R8G8B8_USCALED:
613 case PIPE_FORMAT_R8G8_USCALED:
614 case PIPE_FORMAT_R8_USCALED:
615 case PIPE_FORMAT_R8G8B8A8_SSCALED:
616 case PIPE_FORMAT_R8G8B8_SSCALED:
617 case PIPE_FORMAT_R8G8_SSCALED:
618 case PIPE_FORMAT_R8_SSCALED:
619 case PIPE_FORMAT_R10G10B10A2_UNORM:
620 case PIPE_FORMAT_B10G10R10A2_UNORM:
621 case PIPE_FORMAT_R10G10B10A2_SNORM:
622 case PIPE_FORMAT_B10G10R10A2_SNORM:
623 case PIPE_FORMAT_R10G10B10A2_USCALED:
624 case PIPE_FORMAT_B10G10R10A2_USCALED:
625 case PIPE_FORMAT_R10G10B10A2_SSCALED:
626 case PIPE_FORMAT_B10G10R10A2_SSCALED:
627 break;
628 default:
629 return false;
630 }
631 }
632
633 /* FORMAT_NONE gets allowed for ARB_framebuffer_no_attachments's probe
634 * of FRAMEBUFFER_MAX_SAMPLES
635 */
636 if ((usage & PIPE_BIND_RENDER_TARGET) &&
637 format != PIPE_FORMAT_NONE &&
638 !v3d_rt_format_supported(&screen->devinfo, format)) {
639 return false;
640 }
641
642 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
643 !v3d_tex_format_supported(&screen->devinfo, format)) {
644 return false;
645 }
646
647 if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
648 !(format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
649 format == PIPE_FORMAT_X8Z24_UNORM ||
650 format == PIPE_FORMAT_Z16_UNORM ||
651 format == PIPE_FORMAT_Z32_FLOAT ||
652 format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT)) {
653 return false;
654 }
655
656 if ((usage & PIPE_BIND_INDEX_BUFFER) &&
657 !(format == PIPE_FORMAT_R8_UINT ||
658 format == PIPE_FORMAT_R16_UINT ||
659 format == PIPE_FORMAT_R32_UINT)) {
660 return false;
661 }
662
663 if (usage & PIPE_BIND_SHADER_IMAGE) {
664 switch (format) {
665 /* FIXME: maybe we can implement a swizzle-on-writes to add
666 * support for BGRA-alike formats.
667 */
668 case PIPE_FORMAT_A4B4G4R4_UNORM:
669 case PIPE_FORMAT_A1B5G5R5_UNORM:
670 case PIPE_FORMAT_B5G6R5_UNORM:
671 case PIPE_FORMAT_B8G8R8A8_UNORM:
672 case PIPE_FORMAT_X8Z24_UNORM:
673 case PIPE_FORMAT_Z16_UNORM:
674 return false;
675 default:
676 return true;
677 }
678 }
679
680 return true;
681 }
682
683 static const nir_shader_compiler_options v3d_nir_options = {
684 .lower_uadd_sat = true,
685 .lower_usub_sat = true,
686 .lower_iadd_sat = true,
687 .lower_all_io_to_temps = true,
688 .lower_extract_byte = true,
689 .lower_extract_word = true,
690 .lower_insert_byte = true,
691 .lower_insert_word = true,
692 .lower_bitfield_insert = true,
693 .lower_bitfield_extract = true,
694 .lower_bitfield_reverse = true,
695 .lower_bit_count = true,
696 .lower_cs_local_id_to_index = true,
697 .lower_ffract = true,
698 .lower_fmod = true,
699 .lower_pack_unorm_2x16 = true,
700 .lower_pack_snorm_2x16 = true,
701 .lower_pack_unorm_4x8 = true,
702 .lower_pack_snorm_4x8 = true,
703 .lower_unpack_unorm_4x8 = true,
704 .lower_unpack_snorm_4x8 = true,
705 .lower_pack_half_2x16 = true,
706 .lower_unpack_half_2x16 = true,
707 .lower_pack_32_2x16 = true,
708 .lower_pack_32_2x16_split = true,
709 .lower_unpack_32_2x16_split = true,
710 .lower_fdiv = true,
711 .lower_find_lsb = true,
712 .lower_ffma16 = true,
713 .lower_ffma32 = true,
714 .lower_ffma64 = true,
715 .lower_flrp32 = true,
716 .lower_fpow = true,
717 .lower_fsat = true,
718 .lower_fsqrt = true,
719 .lower_ifind_msb = true,
720 .lower_isign = true,
721 .lower_ldexp = true,
722 .lower_mul_high = true,
723 .lower_wpos_pntc = true,
724 .lower_to_scalar = true,
725 .lower_int64_options = nir_lower_imul_2x32_64,
726 .lower_fquantize2f16 = true,
727 .has_fsub = true,
728 .has_isub = true,
729 .divergence_analysis_options =
730 nir_divergence_multiple_workgroup_per_compute_subgroup,
731 /* This will enable loop unrolling in the state tracker so we won't
732 * be able to selectively disable it in backend if it leads to
733 * lower thread counts or TMU spills. Choose a conservative maximum to
734 * limit register pressure impact.
735 */
736 .max_unroll_iterations = 16,
737 .force_indirect_unrolling_sampler = true,
738 };
739
740 static const void *
v3d_screen_get_compiler_options(struct pipe_screen * pscreen,enum pipe_shader_ir ir,enum pipe_shader_type shader)741 v3d_screen_get_compiler_options(struct pipe_screen *pscreen,
742 enum pipe_shader_ir ir, enum pipe_shader_type shader)
743 {
744 return &v3d_nir_options;
745 }
746
747 static const uint64_t v3d_available_modifiers[] = {
748 DRM_FORMAT_MOD_BROADCOM_UIF,
749 DRM_FORMAT_MOD_LINEAR,
750 DRM_FORMAT_MOD_BROADCOM_SAND128,
751 };
752
753 static void
v3d_screen_query_dmabuf_modifiers(struct pipe_screen * pscreen,enum pipe_format format,int max,uint64_t * modifiers,unsigned int * external_only,int * count)754 v3d_screen_query_dmabuf_modifiers(struct pipe_screen *pscreen,
755 enum pipe_format format, int max,
756 uint64_t *modifiers,
757 unsigned int *external_only,
758 int *count)
759 {
760 int i;
761 int num_modifiers = ARRAY_SIZE(v3d_available_modifiers);
762
763 switch (format) {
764 case PIPE_FORMAT_P030:
765 /* Expose SAND128, but not LINEAR or UIF */
766 *count = 1;
767 if (modifiers && max > 0) {
768 modifiers[0] = DRM_FORMAT_MOD_BROADCOM_SAND128;
769 if (external_only)
770 external_only[0] = true;
771 }
772 return;
773
774 case PIPE_FORMAT_NV12:
775 /* Expose UIF, LINEAR and SAND128 */
776 break;
777
778 case PIPE_FORMAT_R8_UNORM:
779 case PIPE_FORMAT_R8G8_UNORM:
780 case PIPE_FORMAT_R16_UNORM:
781 case PIPE_FORMAT_R16G16_UNORM:
782 /* Expose UIF, LINEAR and SAND128 */
783 if (!modifiers) break;
784 *count = MIN2(max, num_modifiers);
785 for (i = 0; i < *count; i++) {
786 modifiers[i] = v3d_available_modifiers[i];
787 if (external_only)
788 external_only[i] = modifiers[i] == DRM_FORMAT_MOD_BROADCOM_SAND128;
789 }
790 return;
791
792 default:
793 /* Expose UIF and LINEAR, but not SAND128 */
794 num_modifiers--;
795 }
796
797 if (!modifiers) {
798 *count = num_modifiers;
799 return;
800 }
801
802 *count = MIN2(max, num_modifiers);
803 for (i = 0; i < *count; i++) {
804 modifiers[i] = v3d_available_modifiers[i];
805 if (external_only)
806 external_only[i] = util_format_is_yuv(format);
807 }
808 }
809
810 static bool
v3d_screen_is_dmabuf_modifier_supported(struct pipe_screen * pscreen,uint64_t modifier,enum pipe_format format,bool * external_only)811 v3d_screen_is_dmabuf_modifier_supported(struct pipe_screen *pscreen,
812 uint64_t modifier,
813 enum pipe_format format,
814 bool *external_only)
815 {
816 int i;
817 if (fourcc_mod_broadcom_mod(modifier) == DRM_FORMAT_MOD_BROADCOM_SAND128) {
818 switch(format) {
819 case PIPE_FORMAT_NV12:
820 case PIPE_FORMAT_P030:
821 case PIPE_FORMAT_R8_UNORM:
822 case PIPE_FORMAT_R8G8_UNORM:
823 case PIPE_FORMAT_R16_UNORM:
824 case PIPE_FORMAT_R16G16_UNORM:
825 if (external_only)
826 *external_only = true;
827 return true;
828 default:
829 return false;
830 }
831 } else if (format == PIPE_FORMAT_P030) {
832 /* For PIPE_FORMAT_P030 we don't expose LINEAR or UIF. */
833 return false;
834 }
835
836 /* We don't want to generally allow DRM_FORMAT_MOD_BROADCOM_SAND128
837 * modifier, that is the last v3d_available_modifiers. We only accept
838 * it in the case of having a PIPE_FORMAT_NV12 or PIPE_FORMAT_P030.
839 */
840 assert(v3d_available_modifiers[ARRAY_SIZE(v3d_available_modifiers) - 1] ==
841 DRM_FORMAT_MOD_BROADCOM_SAND128);
842 for (i = 0; i < ARRAY_SIZE(v3d_available_modifiers) - 1; i++) {
843 if (v3d_available_modifiers[i] == modifier) {
844 if (external_only)
845 *external_only = util_format_is_yuv(format);
846
847 return true;
848 }
849 }
850
851 return false;
852 }
853
854 static enum pipe_format
v3d_screen_get_compatible_tlb_format(struct pipe_screen * screen,enum pipe_format format)855 v3d_screen_get_compatible_tlb_format(struct pipe_screen *screen,
856 enum pipe_format format)
857 {
858 switch (format) {
859 case PIPE_FORMAT_R16G16_UNORM:
860 return PIPE_FORMAT_R16G16_UINT;
861 default:
862 return format;
863 }
864 }
865
866 static struct disk_cache *
v3d_screen_get_disk_shader_cache(struct pipe_screen * pscreen)867 v3d_screen_get_disk_shader_cache(struct pipe_screen *pscreen)
868 {
869 struct v3d_screen *screen = v3d_screen(pscreen);
870
871 return screen->disk_cache;
872 }
873
874 static int
v3d_screen_get_fd(struct pipe_screen * pscreen)875 v3d_screen_get_fd(struct pipe_screen *pscreen)
876 {
877 struct v3d_screen *screen = v3d_screen(pscreen);
878
879 return screen->fd;
880 }
881
882 struct pipe_screen *
v3d_screen_create(int fd,const struct pipe_screen_config * config,struct renderonly * ro)883 v3d_screen_create(int fd, const struct pipe_screen_config *config,
884 struct renderonly *ro)
885 {
886 struct v3d_screen *screen = rzalloc(NULL, struct v3d_screen);
887 struct pipe_screen *pscreen;
888
889 pscreen = &screen->base;
890
891 pscreen->destroy = v3d_screen_destroy;
892 pscreen->get_screen_fd = v3d_screen_get_fd;
893 pscreen->get_param = v3d_screen_get_param;
894 pscreen->get_paramf = v3d_screen_get_paramf;
895 pscreen->get_shader_param = v3d_screen_get_shader_param;
896 pscreen->get_compute_param = v3d_get_compute_param;
897 pscreen->context_create = v3d_context_create;
898 pscreen->is_format_supported = v3d_screen_is_format_supported;
899 pscreen->get_canonical_format = v3d_screen_get_compatible_tlb_format;
900
901 screen->fd = fd;
902 screen->ro = ro;
903
904 list_inithead(&screen->bo_cache.time_list);
905 (void)mtx_init(&screen->bo_handles_mutex, mtx_plain);
906 screen->bo_handles = util_hash_table_create_ptr_keys();
907
908 #if defined(USE_V3D_SIMULATOR)
909 screen->sim_file = v3d_simulator_init(screen->fd);
910 #endif
911
912 if (!v3d_get_device_info(screen->fd, &screen->devinfo, &v3d_ioctl))
913 goto fail;
914
915 driParseConfigFiles(config->options, config->options_info, 0, "v3d",
916 NULL, NULL, NULL, 0, NULL, 0);
917
918 /* We have to driCheckOption for the simulator mode to not assertion
919 * fail on not having our XML config.
920 */
921 const char *nonmsaa_name = "v3d_nonmsaa_texture_size_limit";
922 screen->nonmsaa_texture_size_limit =
923 driCheckOption(config->options, nonmsaa_name, DRI_BOOL) &&
924 driQueryOptionb(config->options, nonmsaa_name);
925
926 slab_create_parent(&screen->transfer_pool, sizeof(struct v3d_transfer), 16);
927
928 screen->has_csd = v3d_has_feature(screen, DRM_V3D_PARAM_SUPPORTS_CSD);
929 screen->has_cache_flush =
930 v3d_has_feature(screen, DRM_V3D_PARAM_SUPPORTS_CACHE_FLUSH);
931 screen->has_perfmon = v3d_has_feature(screen, DRM_V3D_PARAM_SUPPORTS_PERFMON);
932
933 v3d_fence_screen_init(screen);
934
935 v3d_process_debug_variable();
936
937 v3d_resource_screen_init(pscreen);
938
939 screen->compiler = v3d_compiler_init(&screen->devinfo, 0);
940
941 #ifdef ENABLE_SHADER_CACHE
942 v3d_disk_cache_init(screen);
943 #endif
944
945 pscreen->get_name = v3d_screen_get_name;
946 pscreen->get_vendor = v3d_screen_get_vendor;
947 pscreen->get_device_vendor = v3d_screen_get_vendor;
948 pscreen->get_compiler_options = v3d_screen_get_compiler_options;
949 pscreen->get_disk_shader_cache = v3d_screen_get_disk_shader_cache;
950 pscreen->query_dmabuf_modifiers = v3d_screen_query_dmabuf_modifiers;
951 pscreen->is_dmabuf_modifier_supported =
952 v3d_screen_is_dmabuf_modifier_supported;
953
954 if (screen->has_perfmon) {
955 pscreen->get_driver_query_group_info = v3d_get_driver_query_group_info;
956 pscreen->get_driver_query_info = v3d_get_driver_query_info;
957 }
958
959 /* Generate the bitmask of supported draw primitives. */
960 screen->prim_types = BITFIELD_BIT(MESA_PRIM_POINTS) |
961 BITFIELD_BIT(MESA_PRIM_LINES) |
962 BITFIELD_BIT(MESA_PRIM_LINE_LOOP) |
963 BITFIELD_BIT(MESA_PRIM_LINE_STRIP) |
964 BITFIELD_BIT(MESA_PRIM_TRIANGLES) |
965 BITFIELD_BIT(MESA_PRIM_TRIANGLE_STRIP) |
966 BITFIELD_BIT(MESA_PRIM_TRIANGLE_FAN) |
967 BITFIELD_BIT(MESA_PRIM_LINES_ADJACENCY) |
968 BITFIELD_BIT(MESA_PRIM_LINE_STRIP_ADJACENCY) |
969 BITFIELD_BIT(MESA_PRIM_TRIANGLES_ADJACENCY) |
970 BITFIELD_BIT(MESA_PRIM_TRIANGLE_STRIP_ADJACENCY);
971
972 return pscreen;
973
974 fail:
975 close(fd);
976 ralloc_free(pscreen);
977 return NULL;
978 }
979