1 /************************************************************************** 2 * 3 * Copyright 2009 Younes Manton. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28 #ifndef PIPE_VIDEO_STATE_H 29 #define PIPE_VIDEO_STATE_H 30 31 #include "pipe/p_defines.h" 32 #include "util/format/u_formats.h" 33 #include "pipe/p_state.h" 34 #include "pipe/p_screen.h" 35 #include "util/u_hash_table.h" 36 #include "util/u_inlines.h" 37 #include "util/u_rect.h" 38 39 #ifdef __cplusplus 40 extern "C" { 41 #endif 42 43 #define PIPE_H264_MAX_REFERENCES 16 44 #define PIPE_H265_MAX_REFERENCES 15 45 #define PIPE_H265_MAX_SLICES 128 46 #define PIPE_AV1_MAX_REFERENCES 8 47 #define PIPE_DEFAULT_FRAME_RATE_DEN 1 48 #define PIPE_DEFAULT_FRAME_RATE_NUM 30 49 #define PIPE_DEFAULT_INTRA_IDR_PERIOD 30 50 #define PIPE_H2645_EXTENDED_SAR 255 51 #define PIPE_ENC_ROI_REGION_NUM_MAX 32 52 #define PIPE_DEFAULT_DECODER_FEEDBACK_TIMEOUT_NS 1000000000 53 54 /* 55 * see table 6-12 in the spec 56 */ 57 enum pipe_mpeg12_picture_coding_type 58 { 59 PIPE_MPEG12_PICTURE_CODING_TYPE_I = 0x01, 60 PIPE_MPEG12_PICTURE_CODING_TYPE_P = 0x02, 61 PIPE_MPEG12_PICTURE_CODING_TYPE_B = 0x03, 62 PIPE_MPEG12_PICTURE_CODING_TYPE_D = 0x04 63 }; 64 65 /* 66 * see table 6-14 in the spec 67 */ 68 enum pipe_mpeg12_picture_structure 69 { 70 PIPE_MPEG12_PICTURE_STRUCTURE_RESERVED = 0x00, 71 PIPE_MPEG12_PICTURE_STRUCTURE_FIELD_TOP = 0x01, 72 PIPE_MPEG12_PICTURE_STRUCTURE_FIELD_BOTTOM = 0x02, 73 PIPE_MPEG12_PICTURE_STRUCTURE_FRAME = 0x03 74 }; 75 76 /* 77 * flags for macroblock_type, see section 6.3.17.1 in the spec 78 */ 79 enum pipe_mpeg12_macroblock_type 80 { 81 PIPE_MPEG12_MB_TYPE_QUANT = 0x01, 82 PIPE_MPEG12_MB_TYPE_MOTION_FORWARD = 0x02, 83 PIPE_MPEG12_MB_TYPE_MOTION_BACKWARD = 0x04, 84 PIPE_MPEG12_MB_TYPE_PATTERN = 0x08, 85 PIPE_MPEG12_MB_TYPE_INTRA = 0x10 86 }; 87 88 /* 89 * flags for motion_type, see table 6-17 and 6-18 in the spec 90 */ 91 enum pipe_mpeg12_motion_type 92 { 93 PIPE_MPEG12_MO_TYPE_RESERVED = 0x00, 94 PIPE_MPEG12_MO_TYPE_FIELD = 0x01, 95 PIPE_MPEG12_MO_TYPE_FRAME = 0x02, 96 PIPE_MPEG12_MO_TYPE_16x8 = 0x02, 97 PIPE_MPEG12_MO_TYPE_DUAL_PRIME = 0x03 98 }; 99 100 /* 101 * see section 6.3.17.1 and table 6-19 in the spec 102 */ 103 enum pipe_mpeg12_dct_type 104 { 105 PIPE_MPEG12_DCT_TYPE_FRAME = 0, 106 PIPE_MPEG12_DCT_TYPE_FIELD = 1 107 }; 108 109 enum pipe_mpeg12_field_select 110 { 111 PIPE_MPEG12_FS_FIRST_FORWARD = 0x01, 112 PIPE_MPEG12_FS_FIRST_BACKWARD = 0x02, 113 PIPE_MPEG12_FS_SECOND_FORWARD = 0x04, 114 PIPE_MPEG12_FS_SECOND_BACKWARD = 0x08 115 }; 116 117 enum pipe_h264_slice_type 118 { 119 PIPE_H264_SLICE_TYPE_P = 0x0, 120 PIPE_H264_SLICE_TYPE_B = 0x1, 121 PIPE_H264_SLICE_TYPE_I = 0x2, 122 PIPE_H264_SLICE_TYPE_SP = 0x3, 123 PIPE_H264_SLICE_TYPE_SI = 0x4 124 }; 125 126 enum pipe_h265_slice_type 127 { 128 /* Values match Table 7-7 in HEVC spec 129 for Name association of slice_type */ 130 PIPE_H265_SLICE_TYPE_B = 0x0, 131 PIPE_H265_SLICE_TYPE_P = 0x1, 132 PIPE_H265_SLICE_TYPE_I = 0x2, 133 }; 134 135 /* To be used on each encoding feature bit field */ 136 enum pipe_enc_feature 137 { 138 PIPE_ENC_FEATURE_NOT_SUPPORTED = 0x0, 139 PIPE_ENC_FEATURE_SUPPORTED = 0x1, 140 PIPE_ENC_FEATURE_REQUIRED = 0x2, 141 }; 142 143 /* Same enum for h264/h265 */ 144 enum pipe_h2645_enc_picture_type 145 { 146 PIPE_H2645_ENC_PICTURE_TYPE_P = 0x00, 147 PIPE_H2645_ENC_PICTURE_TYPE_B = 0x01, 148 PIPE_H2645_ENC_PICTURE_TYPE_I = 0x02, 149 PIPE_H2645_ENC_PICTURE_TYPE_IDR = 0x03, 150 PIPE_H2645_ENC_PICTURE_TYPE_SKIP = 0x04 151 }; 152 153 enum pipe_av1_enc_frame_type 154 { 155 PIPE_AV1_ENC_FRAME_TYPE_KEY = 0x00, 156 PIPE_AV1_ENC_FRAME_TYPE_INTER = 0x01, 157 PIPE_AV1_ENC_FRAME_TYPE_INTRA_ONLY = 0x02, 158 PIPE_AV1_ENC_FRAME_TYPE_SWITCH = 0x03, 159 PIPE_AV1_ENC_FRAME_TYPE_SHOW_EXISTING = 0x04 160 }; 161 162 enum pipe_h2645_enc_rate_control_method 163 { 164 PIPE_H2645_ENC_RATE_CONTROL_METHOD_DISABLE = 0x00, 165 PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT_SKIP = 0x01, 166 PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE_SKIP = 0x02, 167 PIPE_H2645_ENC_RATE_CONTROL_METHOD_CONSTANT = 0x03, 168 PIPE_H2645_ENC_RATE_CONTROL_METHOD_VARIABLE = 0x04, 169 PIPE_H2645_ENC_RATE_CONTROL_METHOD_QUALITY_VARIABLE = 0x05 170 }; 171 172 enum pipe_slice_buffer_placement_type 173 { 174 /* whole slice is in the buffer */ 175 PIPE_SLICE_BUFFER_PLACEMENT_TYPE_WHOLE = 0x0, 176 /* The beginning of the slice is in the buffer but the end is not */ 177 PIPE_SLICE_BUFFER_PLACEMENT_TYPE_BEGIN = 0x1, 178 /* Neither beginning nor end of the slice is in the buffer */ 179 PIPE_SLICE_BUFFER_PLACEMENT_TYPE_MIDDLE = 0x2, 180 /* end of the slice is in the buffer */ 181 PIPE_SLICE_BUFFER_PLACEMENT_TYPE_END = 0x3, 182 }; 183 184 struct pipe_picture_desc 185 { 186 enum pipe_video_profile profile; 187 enum pipe_video_entrypoint entry_point; 188 bool protected_playback; 189 uint8_t *decrypt_key; 190 uint32_t key_size; 191 enum pipe_format input_format; 192 bool input_full_range; 193 enum pipe_format output_format; 194 /* A fence used on PIPE_VIDEO_ENTRYPOINT_DECODE/PROCESSING to signal job completion */ 195 struct pipe_fence_handle **fence; 196 }; 197 198 struct pipe_quant_matrix 199 { 200 enum pipe_video_format codec; 201 }; 202 203 struct pipe_macroblock 204 { 205 enum pipe_video_format codec; 206 }; 207 208 struct pipe_mpeg12_picture_desc 209 { 210 struct pipe_picture_desc base; 211 212 unsigned picture_coding_type; 213 unsigned picture_structure; 214 unsigned frame_pred_frame_dct; 215 unsigned q_scale_type; 216 unsigned alternate_scan; 217 unsigned intra_vlc_format; 218 unsigned concealment_motion_vectors; 219 unsigned intra_dc_precision; 220 unsigned f_code[2][2]; 221 unsigned top_field_first; 222 unsigned full_pel_forward_vector; 223 unsigned full_pel_backward_vector; 224 unsigned num_slices; 225 226 const uint8_t *intra_matrix; 227 const uint8_t *non_intra_matrix; 228 229 struct pipe_video_buffer *ref[2]; 230 }; 231 232 struct pipe_mpeg12_macroblock 233 { 234 struct pipe_macroblock base; 235 236 /* see section 6.3.17 in the spec */ 237 unsigned short x, y; 238 239 /* see section 6.3.17.1 in the spec */ 240 unsigned char macroblock_type; 241 242 union { 243 struct { 244 /* see table 6-17 in the spec */ 245 unsigned int frame_motion_type:2; 246 247 /* see table 6-18 in the spec */ 248 unsigned int field_motion_type:2; 249 250 /* see table 6-19 in the spec */ 251 unsigned int dct_type:1; 252 } bits; 253 unsigned int value; 254 } macroblock_modes; 255 256 /* see section 6.3.17.2 in the spec */ 257 unsigned char motion_vertical_field_select; 258 259 /* see Table 7-7 in the spec */ 260 short PMV[2][2][2]; 261 262 /* see figure 6.10-12 in the spec */ 263 unsigned short coded_block_pattern; 264 265 /* see figure 6.10-12 in the spec */ 266 short *blocks; 267 268 /* Number of skipped macroblocks after this macroblock */ 269 unsigned short num_skipped_macroblocks; 270 }; 271 272 struct pipe_mpeg4_picture_desc 273 { 274 struct pipe_picture_desc base; 275 276 int32_t trd[2]; 277 int32_t trb[2]; 278 uint16_t vop_time_increment_resolution; 279 uint8_t vop_coding_type; 280 uint8_t vop_fcode_forward; 281 uint8_t vop_fcode_backward; 282 uint8_t resync_marker_disable; 283 uint8_t interlaced; 284 uint8_t quant_type; 285 uint8_t quarter_sample; 286 uint8_t short_video_header; 287 uint8_t rounding_control; 288 uint8_t alternate_vertical_scan_flag; 289 uint8_t top_field_first; 290 291 const uint8_t *intra_matrix; 292 const uint8_t *non_intra_matrix; 293 294 struct pipe_video_buffer *ref[2]; 295 }; 296 297 struct pipe_vc1_picture_desc 298 { 299 struct pipe_picture_desc base; 300 301 uint32_t slice_count; 302 uint8_t picture_type; 303 uint8_t frame_coding_mode; 304 uint8_t postprocflag; 305 uint8_t pulldown; 306 uint8_t interlace; 307 uint8_t tfcntrflag; 308 uint8_t finterpflag; 309 uint8_t psf; 310 uint8_t dquant; 311 uint8_t panscan_flag; 312 uint8_t refdist_flag; 313 uint8_t quantizer; 314 uint8_t extended_mv; 315 uint8_t extended_dmv; 316 uint8_t overlap; 317 uint8_t vstransform; 318 uint8_t loopfilter; 319 uint8_t fastuvmc; 320 uint8_t range_mapy_flag; 321 uint8_t range_mapy; 322 uint8_t range_mapuv_flag; 323 uint8_t range_mapuv; 324 uint8_t multires; 325 uint8_t syncmarker; 326 uint8_t rangered; 327 uint8_t maxbframes; 328 uint8_t deblockEnable; 329 uint8_t pquant; 330 331 struct pipe_video_buffer *ref[2]; 332 }; 333 334 struct pipe_h264_sps 335 { 336 uint8_t level_idc; 337 uint8_t chroma_format_idc; 338 uint8_t separate_colour_plane_flag; 339 uint8_t bit_depth_luma_minus8; 340 uint8_t bit_depth_chroma_minus8; 341 uint8_t seq_scaling_matrix_present_flag; 342 uint8_t ScalingList4x4[6][16]; 343 uint8_t ScalingList8x8[6][64]; 344 uint8_t log2_max_frame_num_minus4; 345 uint8_t pic_order_cnt_type; 346 uint8_t log2_max_pic_order_cnt_lsb_minus4; 347 uint8_t delta_pic_order_always_zero_flag; 348 int32_t offset_for_non_ref_pic; 349 int32_t offset_for_top_to_bottom_field; 350 uint8_t num_ref_frames_in_pic_order_cnt_cycle; 351 int32_t offset_for_ref_frame[256]; 352 uint8_t max_num_ref_frames; 353 uint8_t frame_mbs_only_flag; 354 uint8_t mb_adaptive_frame_field_flag; 355 uint8_t direct_8x8_inference_flag; 356 uint8_t MinLumaBiPredSize8x8; 357 }; 358 359 struct pipe_h264_pps 360 { 361 struct pipe_h264_sps *sps; 362 363 uint8_t entropy_coding_mode_flag; 364 uint8_t bottom_field_pic_order_in_frame_present_flag; 365 uint8_t num_slice_groups_minus1; 366 uint8_t slice_group_map_type; 367 uint8_t slice_group_change_rate_minus1; 368 uint8_t num_ref_idx_l0_default_active_minus1; 369 uint8_t num_ref_idx_l1_default_active_minus1; 370 uint8_t weighted_pred_flag; 371 uint8_t weighted_bipred_idc; 372 int8_t pic_init_qp_minus26; 373 int8_t pic_init_qs_minus26; 374 int8_t chroma_qp_index_offset; 375 uint8_t deblocking_filter_control_present_flag; 376 uint8_t constrained_intra_pred_flag; 377 uint8_t redundant_pic_cnt_present_flag; 378 uint8_t ScalingList4x4[6][16]; 379 uint8_t ScalingList8x8[6][64]; 380 uint8_t transform_8x8_mode_flag; 381 int8_t second_chroma_qp_index_offset; 382 }; 383 384 struct pipe_h264_picture_desc 385 { 386 struct pipe_picture_desc base; 387 388 struct pipe_h264_pps *pps; 389 390 /* slice header */ 391 uint32_t frame_num; 392 uint8_t field_pic_flag; 393 uint8_t bottom_field_flag; 394 uint8_t num_ref_idx_l0_active_minus1; 395 uint8_t num_ref_idx_l1_active_minus1; 396 397 uint32_t slice_count; 398 int32_t field_order_cnt[2]; 399 bool is_reference; 400 uint8_t num_ref_frames; 401 402 bool is_long_term[16]; 403 bool top_is_reference[16]; 404 bool bottom_is_reference[16]; 405 uint32_t field_order_cnt_list[16][2]; 406 uint32_t frame_num_list[16]; 407 408 struct pipe_video_buffer *ref[16]; 409 410 struct 411 { 412 bool slice_info_present; 413 uint32_t slice_count; 414 uint32_t slice_data_size[128]; 415 uint32_t slice_data_offset[128]; 416 enum pipe_slice_buffer_placement_type slice_data_flag[128]; 417 } slice_parameter; 418 }; 419 420 struct pipe_enc_quality_modes 421 { 422 unsigned int level; 423 unsigned int preset_mode; 424 unsigned int pre_encode_mode; 425 unsigned int vbaq_mode; 426 }; 427 428 /* 429 * intra refresh supports row or column only, it doens't support 430 * row and column mixed, if mixed it will pick up column mode. 431 * Also the assumption is the first row/column since the offset 432 * is zero, and it marks the start of intra-refresh, it will need 433 * to have headers at this point. 434 */ 435 struct pipe_enc_intra_refresh 436 { 437 unsigned int mode; 438 unsigned int region_size; 439 unsigned int offset; 440 unsigned int need_sequence_header; 441 }; 442 443 /* 444 * In AVC, unit is MB, HEVC (CTB) and AV1(SB) 445 */ 446 enum 447 { 448 INTRA_REFRESH_MODE_NONE, 449 INTRA_REFRESH_MODE_UNIT_ROWS, 450 INTRA_REFRESH_MODE_UNIT_COLUMNS, 451 }; 452 453 /* All the values are in pixels, driver converts it into 454 * different units for different codecs, for example: h264 455 * is in 16x16 block, hevc/av1 is in 64x64 block. 456 * x, y means the location of region start, width/height defines 457 * the region size; the qp value carries the qp_delta. 458 */ 459 struct pipe_enc_region_in_roi 460 { 461 bool valid; 462 int32_t qp_value; 463 unsigned int x, y; 464 unsigned int width, height; 465 }; 466 /* It does not support prioirty only qp_delta. 467 * The priority is implied by the region sequence number. 468 * Region 0 is most significant one, and region 1 is less 469 * significant, and lesser significant when region number 470 * grows. It allows region overlapping, and lower 471 * priority region would be overwritten by the higher one. 472 */ 473 struct pipe_enc_roi 474 { 475 unsigned int num; 476 struct pipe_enc_region_in_roi region[PIPE_ENC_ROI_REGION_NUM_MAX]; 477 }; 478 479 struct pipe_h264_enc_rate_control 480 { 481 enum pipe_h2645_enc_rate_control_method rate_ctrl_method; 482 unsigned target_bitrate; 483 unsigned peak_bitrate; 484 unsigned frame_rate_num; 485 unsigned frame_rate_den; 486 unsigned vbv_buffer_size; 487 unsigned vbv_buf_lv; 488 unsigned vbv_buf_initial_size; 489 bool app_requested_hrd_buffer; 490 unsigned target_bits_picture; 491 unsigned peak_bits_picture_integer; 492 unsigned peak_bits_picture_fraction; 493 unsigned fill_data_enable; 494 unsigned skip_frame_enable; 495 unsigned enforce_hrd; 496 unsigned max_au_size; 497 unsigned max_qp; 498 unsigned min_qp; 499 bool app_requested_qp_range; 500 501 /* Used with PIPE_H2645_ENC_RATE_CONTROL_METHOD_QUALITY_VARIABLE */ 502 unsigned vbr_quality_factor; 503 }; 504 505 struct pipe_h264_enc_motion_estimation 506 { 507 unsigned motion_est_quarter_pixel; 508 unsigned enc_disable_sub_mode; 509 unsigned lsmvert; 510 unsigned enc_en_ime_overw_dis_subm; 511 unsigned enc_ime_overw_dis_subm_no; 512 unsigned enc_ime2_search_range_x; 513 unsigned enc_ime2_search_range_y; 514 }; 515 516 struct pipe_h264_enc_pic_control 517 { 518 unsigned enc_cabac_enable; 519 unsigned enc_cabac_init_idc; 520 unsigned chroma_qp_index_offset; 521 unsigned second_chroma_qp_index_offset; 522 struct { 523 uint32_t deblocking_filter_control_present_flag : 1; 524 uint32_t redundant_pic_cnt_present_flag : 1; 525 }; 526 }; 527 528 struct pipe_h264_enc_dbk_param 529 { 530 unsigned disable_deblocking_filter_idc; 531 signed alpha_c0_offset_div2; 532 signed beta_offset_div2; 533 }; 534 535 struct h264_slice_descriptor 536 { 537 /** Starting MB address for this slice. */ 538 uint32_t macroblock_address; 539 /** Number of macroblocks in this slice. */ 540 uint32_t num_macroblocks; 541 /** slice type. */ 542 enum pipe_h264_slice_type slice_type; 543 }; 544 545 struct h265_slice_descriptor 546 { 547 /** Starting CTU address for this slice. */ 548 uint32_t slice_segment_address; 549 /** Number of CTUs in this slice. */ 550 uint32_t num_ctu_in_slice; 551 /** slice type. */ 552 enum pipe_h265_slice_type slice_type; 553 }; 554 555 typedef struct pipe_h264_enc_hrd_params 556 { 557 uint32_t cpb_cnt_minus1; 558 uint32_t bit_rate_scale; 559 uint32_t cpb_size_scale; 560 uint32_t bit_rate_value_minus1[32]; 561 uint32_t cpb_size_value_minus1[32]; 562 uint32_t cbr_flag[32]; 563 uint32_t initial_cpb_removal_delay_length_minus1; 564 uint32_t cpb_removal_delay_length_minus1; 565 uint32_t dpb_output_delay_length_minus1; 566 uint32_t time_offset_length; 567 } pipe_h264_enc_hrd_params; 568 569 struct pipe_h264_enc_seq_param 570 { 571 unsigned enc_constraint_set_flags; 572 unsigned enc_frame_cropping_flag; 573 unsigned enc_frame_crop_left_offset; 574 unsigned enc_frame_crop_right_offset; 575 unsigned enc_frame_crop_top_offset; 576 unsigned enc_frame_crop_bottom_offset; 577 unsigned pic_order_cnt_type; 578 unsigned log2_max_frame_num_minus4; 579 unsigned log2_max_pic_order_cnt_lsb_minus4; 580 unsigned num_temporal_layers; 581 uint32_t vui_parameters_present_flag; 582 struct { 583 uint32_t aspect_ratio_info_present_flag: 1; 584 uint32_t timing_info_present_flag: 1; 585 uint32_t video_signal_type_present_flag: 1; 586 uint32_t colour_description_present_flag: 1; 587 uint32_t chroma_loc_info_present_flag: 1; 588 uint32_t overscan_info_present_flag: 1; 589 uint32_t overscan_appropriate_flag: 1; 590 uint32_t fixed_frame_rate_flag: 1; 591 uint32_t nal_hrd_parameters_present_flag: 1; 592 uint32_t vcl_hrd_parameters_present_flag: 1; 593 uint32_t low_delay_hrd_flag: 1; 594 uint32_t pic_struct_present_flag: 1; 595 uint32_t bitstream_restriction_flag: 1; 596 uint32_t motion_vectors_over_pic_boundaries_flag: 1; 597 } vui_flags; 598 uint32_t aspect_ratio_idc; 599 uint32_t sar_width; 600 uint32_t sar_height; 601 uint32_t num_units_in_tick; 602 uint32_t time_scale; 603 uint32_t video_format; 604 uint32_t video_full_range_flag; 605 uint32_t colour_primaries; 606 uint32_t transfer_characteristics; 607 uint32_t matrix_coefficients; 608 uint32_t chroma_sample_loc_type_top_field; 609 uint32_t chroma_sample_loc_type_bottom_field; 610 uint32_t max_num_reorder_frames; 611 pipe_h264_enc_hrd_params nal_hrd_parameters; 612 pipe_h264_enc_hrd_params vcl_hrd_parameters; 613 uint32_t max_bytes_per_pic_denom; 614 uint32_t max_bits_per_mb_denom; 615 uint32_t log2_max_mv_length_vertical; 616 uint32_t log2_max_mv_length_horizontal; 617 uint32_t max_dec_frame_buffering; 618 }; 619 620 struct pipe_h264_enc_picture_desc 621 { 622 struct pipe_picture_desc base; 623 624 struct pipe_h264_enc_seq_param seq; 625 struct pipe_h264_enc_rate_control rate_ctrl[4]; 626 627 struct pipe_h264_enc_motion_estimation motion_est; 628 struct pipe_h264_enc_pic_control pic_ctrl; 629 struct pipe_h264_enc_dbk_param dbk; 630 631 unsigned intra_idr_period; 632 unsigned ip_period; 633 634 unsigned quant_i_frames; 635 unsigned quant_p_frames; 636 unsigned quant_b_frames; 637 638 enum pipe_h2645_enc_picture_type picture_type; 639 unsigned frame_num; 640 unsigned frame_num_cnt; 641 unsigned p_remain; 642 unsigned i_remain; 643 unsigned idr_pic_id; 644 unsigned gop_cnt; 645 unsigned pic_order_cnt; 646 unsigned num_ref_idx_l0_active_minus1; 647 unsigned num_ref_idx_l1_active_minus1; 648 unsigned ref_idx_l0_list[32]; 649 bool l0_is_long_term[32]; 650 unsigned ref_idx_l1_list[32]; 651 bool l1_is_long_term[32]; 652 unsigned gop_size; 653 struct pipe_enc_quality_modes quality_modes; 654 struct pipe_enc_intra_refresh intra_refresh; 655 struct pipe_enc_roi roi; 656 657 bool not_referenced; 658 bool is_ltr; 659 unsigned ltr_index; 660 bool enable_vui; 661 struct hash_table *frame_idx; 662 663 enum pipe_video_slice_mode slice_mode; 664 665 /* Use with PIPE_VIDEO_SLICE_MODE_BLOCKS */ 666 unsigned num_slice_descriptors; 667 struct h264_slice_descriptor slices_descriptors[128]; 668 669 /* Use with PIPE_VIDEO_SLICE_MODE_MAX_SLICE_SIZE */ 670 unsigned max_slice_bytes; 671 672 bool insert_aud_nalu; 673 enum pipe_video_feedback_metadata_type requested_metadata; 674 bool renew_headers_on_idr; 675 }; 676 677 struct pipe_h265_st_ref_pic_set 678 { 679 uint32_t num_neg_pics; 680 uint32_t num_pos_pics; 681 }; 682 683 struct pipe_h265_enc_sublayer_hrd_params 684 { 685 uint32_t bit_rate_value_minus1[32]; 686 uint32_t cpb_size_value_minus1[32]; 687 uint32_t cpb_size_du_value_minus1[32]; 688 uint32_t bit_rate_du_value_minus1[32]; 689 uint32_t cbr_flag[32]; 690 }; 691 692 struct pipe_h265_enc_hrd_params 693 { 694 uint32_t nal_hrd_parameters_present_flag; 695 uint32_t vcl_hrd_parameters_present_flag; 696 uint32_t sub_pic_hrd_params_present_flag; 697 uint32_t tick_divisor_minus2; 698 uint32_t du_cpb_removal_delay_increment_length_minus1; 699 uint32_t sub_pic_cpb_params_in_pic_timing_sei_flag; 700 uint32_t dpb_output_delay_du_length_minus1; 701 uint32_t bit_rate_scale; 702 uint32_t cpb_rate_scale; 703 uint32_t cpb_size_du_scale; 704 uint32_t initial_cpb_removal_delay_length_minus1; 705 uint32_t au_cpb_removal_delay_length_minus1; 706 uint32_t dpb_output_delay_length_minus1; 707 uint32_t fixed_pic_rate_general_flag[7]; 708 uint32_t fixed_pic_rate_within_cvs_flag[7]; 709 uint32_t elemental_duration_in_tc_minus1[7]; 710 uint32_t low_delay_hrd_flag[7]; 711 uint32_t cpb_cnt_minus1[7]; 712 struct pipe_h265_enc_sublayer_hrd_params nal_hrd_parameters[7]; 713 struct pipe_h265_enc_sublayer_hrd_params vlc_hrd_parameters[7]; 714 }; 715 716 struct pipe_h265_enc_seq_param 717 { 718 uint8_t general_profile_idc; 719 uint8_t general_level_idc; 720 uint8_t general_tier_flag; 721 uint32_t intra_period; 722 uint32_t ip_period; 723 uint16_t pic_width_in_luma_samples; 724 uint16_t pic_height_in_luma_samples; 725 uint32_t chroma_format_idc; 726 uint32_t bit_depth_luma_minus8; 727 uint32_t bit_depth_chroma_minus8; 728 bool strong_intra_smoothing_enabled_flag; 729 bool amp_enabled_flag; 730 bool sample_adaptive_offset_enabled_flag; 731 bool pcm_enabled_flag; 732 bool sps_temporal_mvp_enabled_flag; 733 uint8_t log2_min_luma_coding_block_size_minus3; 734 uint8_t log2_diff_max_min_luma_coding_block_size; 735 uint8_t log2_min_transform_block_size_minus2; 736 uint8_t log2_diff_max_min_transform_block_size; 737 uint8_t max_transform_hierarchy_depth_inter; 738 uint8_t max_transform_hierarchy_depth_intra; 739 uint8_t conformance_window_flag; 740 uint16_t conf_win_left_offset; 741 uint16_t conf_win_right_offset; 742 uint16_t conf_win_top_offset; 743 uint16_t conf_win_bottom_offset; 744 uint32_t vui_parameters_present_flag; 745 struct { 746 uint32_t aspect_ratio_info_present_flag: 1; 747 uint32_t timing_info_present_flag: 1; 748 uint32_t video_signal_type_present_flag: 1; 749 uint32_t colour_description_present_flag: 1; 750 uint32_t chroma_loc_info_present_flag: 1; 751 uint32_t overscan_info_present_flag: 1; 752 uint32_t overscan_appropriate_flag: 1; 753 uint32_t neutral_chroma_indication_flag: 1; 754 uint32_t field_seq_flag: 1; 755 uint32_t frame_field_info_present_flag: 1; 756 uint32_t default_display_window_flag: 1; 757 uint32_t poc_proportional_to_timing_flag: 1; 758 uint32_t hrd_parameters_present_flag: 1; 759 uint32_t bitstream_restriction_flag: 1; 760 uint32_t tiles_fixed_structure_flag: 1; 761 uint32_t motion_vectors_over_pic_boundaries_flag: 1; 762 uint32_t restricted_ref_pic_lists_flag: 1; 763 } vui_flags; 764 uint32_t aspect_ratio_idc; 765 uint32_t sar_width; 766 uint32_t sar_height; 767 uint32_t num_units_in_tick; 768 uint32_t time_scale; 769 uint32_t video_format; 770 uint32_t video_full_range_flag; 771 uint32_t colour_primaries; 772 uint32_t transfer_characteristics; 773 uint32_t matrix_coefficients; 774 uint32_t chroma_sample_loc_type_top_field; 775 uint32_t chroma_sample_loc_type_bottom_field; 776 uint32_t def_disp_win_left_offset; 777 uint32_t def_disp_win_right_offset; 778 uint32_t def_disp_win_top_offset; 779 uint32_t def_disp_win_bottom_offset; 780 uint32_t num_ticks_poc_diff_one_minus1; 781 uint32_t min_spatial_segmentation_idc; 782 uint32_t max_bytes_per_pic_denom; 783 uint32_t max_bits_per_min_cu_denom; 784 uint32_t log2_max_mv_length_horizontal; 785 uint32_t log2_max_mv_length_vertical; 786 struct pipe_h265_enc_hrd_params hrd_parameters; 787 }; 788 789 struct pipe_h265_enc_pic_param 790 { 791 uint8_t log2_parallel_merge_level_minus2; 792 uint8_t nal_unit_type; 793 bool constrained_intra_pred_flag; 794 bool pps_loop_filter_across_slices_enabled_flag; 795 bool transform_skip_enabled_flag; 796 }; 797 798 struct pipe_h265_enc_slice_param 799 { 800 uint8_t max_num_merge_cand; 801 int8_t slice_cb_qp_offset; 802 int8_t slice_cr_qp_offset; 803 int8_t slice_beta_offset_div2; 804 int8_t slice_tc_offset_div2; 805 bool cabac_init_flag; 806 uint32_t slice_deblocking_filter_disabled_flag; 807 bool slice_loop_filter_across_slices_enabled_flag; 808 }; 809 810 struct pipe_h265_enc_rate_control 811 { 812 enum pipe_h2645_enc_rate_control_method rate_ctrl_method; 813 unsigned target_bitrate; 814 unsigned peak_bitrate; 815 unsigned frame_rate_num; 816 unsigned frame_rate_den; 817 unsigned quant_i_frames; 818 unsigned quant_p_frames; 819 unsigned quant_b_frames; 820 unsigned vbv_buffer_size; 821 unsigned vbv_buf_lv; 822 unsigned vbv_buf_initial_size; 823 bool app_requested_hrd_buffer; 824 unsigned target_bits_picture; 825 unsigned peak_bits_picture_integer; 826 unsigned peak_bits_picture_fraction; 827 unsigned fill_data_enable; 828 unsigned skip_frame_enable; 829 unsigned enforce_hrd; 830 unsigned max_au_size; 831 unsigned max_qp; 832 unsigned min_qp; 833 bool app_requested_qp_range; 834 835 /* Used with PIPE_H2645_ENC_RATE_CONTROL_METHOD_QUALITY_VARIABLE */ 836 unsigned vbr_quality_factor; 837 }; 838 839 struct pipe_h265_enc_picture_desc 840 { 841 struct pipe_picture_desc base; 842 843 struct pipe_h265_enc_seq_param seq; 844 struct pipe_h265_enc_pic_param pic; 845 struct pipe_h265_enc_slice_param slice; 846 struct pipe_h265_enc_rate_control rc; 847 848 enum pipe_h2645_enc_picture_type picture_type; 849 unsigned decoded_curr_pic; 850 unsigned reference_frames[16]; 851 unsigned frame_num; 852 unsigned pic_order_cnt; 853 unsigned pic_order_cnt_type; 854 struct pipe_enc_quality_modes quality_modes; 855 struct pipe_enc_intra_refresh intra_refresh; 856 struct pipe_enc_roi roi; 857 unsigned num_ref_idx_l0_active_minus1; 858 unsigned num_ref_idx_l1_active_minus1; 859 unsigned ref_idx_l0_list[PIPE_H265_MAX_REFERENCES]; 860 unsigned ref_idx_l1_list[PIPE_H265_MAX_REFERENCES]; 861 bool not_referenced; 862 struct hash_table *frame_idx; 863 864 enum pipe_video_slice_mode slice_mode; 865 866 /* Use with PIPE_VIDEO_SLICE_MODE_BLOCKS */ 867 unsigned num_slice_descriptors; 868 struct h265_slice_descriptor slices_descriptors[128]; 869 870 /* Use with PIPE_VIDEO_SLICE_MODE_MAX_SLICE_SIZE */ 871 unsigned max_slice_bytes; 872 enum pipe_video_feedback_metadata_type requested_metadata; 873 bool renew_headers_on_idr; 874 }; 875 876 struct pipe_av1_enc_rate_control 877 { 878 enum pipe_h2645_enc_rate_control_method rate_ctrl_method; 879 unsigned target_bitrate; 880 unsigned peak_bitrate; 881 unsigned frame_rate_num; 882 unsigned frame_rate_den; 883 unsigned vbv_buffer_size; 884 unsigned vbv_buf_lv; 885 unsigned vbv_buf_initial_size; 886 bool app_requested_hrd_buffer; 887 unsigned target_bits_picture; 888 unsigned peak_bits_picture_integer; 889 unsigned peak_bits_picture_fraction; 890 unsigned fill_data_enable; 891 unsigned skip_frame_enable; 892 unsigned enforce_hrd; 893 unsigned max_au_size; 894 unsigned qp; /* Initial QP */ 895 unsigned max_qp; 896 unsigned min_qp; 897 bool app_requested_qp_range; 898 bool app_requested_initial_qp; 899 900 /* Used with PIPE_H2645_ENC_RATE_CONTROL_METHOD_QUALITY_VARIABLE */ 901 unsigned vbr_quality_factor; 902 }; 903 904 struct pipe_av1_enc_decoder_model_info 905 { 906 uint32_t buffer_delay_length_minus1; 907 uint32_t num_units_in_decoding_tick; 908 uint32_t buffer_removal_time_length_minus1; 909 uint32_t frame_presentation_time_length_minus1; 910 }; 911 912 struct pipe_av1_enc_color_description 913 { 914 uint32_t color_primaries; 915 uint32_t transfer_characteristics; 916 uint32_t matrix_coefficients; 917 uint32_t color_range; 918 uint32_t chroma_sample_position; 919 }; 920 struct pipe_av1_enc_seq_param 921 { 922 uint32_t profile; 923 uint32_t level; 924 uint32_t tier; 925 uint32_t num_temporal_layers; 926 uint32_t intra_period; 927 uint32_t ip_period; 928 uint32_t bit_depth_minus8; 929 uint32_t pic_width_in_luma_samples; 930 uint32_t pic_height_in_luma_samples; 931 struct 932 { 933 uint32_t use_128x128_superblock:1; 934 uint32_t enable_filter_intra :1; 935 uint32_t enable_intra_edge_filter :1; 936 uint32_t enable_interintra_compound :1; 937 uint32_t enable_masked_compound :1; 938 uint32_t enable_warped_motion :1; 939 uint32_t enable_dual_filter :1; 940 uint32_t enable_cdef:1; 941 uint32_t enable_restoration:1; 942 uint32_t enable_superres:1; 943 uint32_t enable_order_hint:1; 944 uint32_t enable_jnt_comp:1; 945 uint32_t color_description_present_flag:1; 946 uint32_t enable_ref_frame_mvs:1; 947 uint32_t frame_id_number_present_flag:1; 948 uint32_t disable_screen_content_tools:1; 949 uint32_t timing_info_present_flag:1; 950 uint32_t equal_picture_interval:1; 951 uint32_t decoder_model_info_present_flag:1; 952 uint32_t force_screen_content_tools:2; 953 uint32_t force_integer_mv:2; 954 } seq_bits; 955 956 /* timing info params */ 957 uint32_t num_units_in_display_tick; 958 uint32_t time_scale; 959 uint32_t num_tick_per_picture_minus1; 960 uint32_t delta_frame_id_length; 961 uint32_t additional_frame_id_length; 962 uint32_t order_hint_bits; 963 struct pipe_av1_enc_decoder_model_info decoder_model_info; 964 struct pipe_av1_enc_color_description color_config; 965 uint16_t frame_width_bits_minus1; 966 uint16_t frame_height_bits_minus1; 967 uint16_t operating_point_idc[32]; 968 uint8_t decoder_model_present_for_this_op[32]; 969 }; 970 971 struct pipe_av1_tile_group { 972 uint8_t tile_group_start; 973 uint8_t tile_group_end; 974 }; 975 976 struct pipe_av1_enc_picture_desc 977 { 978 struct pipe_picture_desc base; 979 enum pipe_av1_enc_frame_type frame_type; 980 struct pipe_av1_enc_seq_param seq; 981 struct pipe_av1_enc_rate_control rc[4]; 982 struct { 983 uint32_t enable_frame_obu:1; 984 uint32_t error_resilient_mode:1; 985 uint32_t disable_cdf_update:1; 986 uint32_t frame_size_override_flag:1; 987 uint32_t allow_screen_content_tools:1; 988 uint32_t allow_intrabc:1; 989 uint32_t force_integer_mv:1; 990 uint32_t disable_frame_end_update_cdf:1; 991 uint32_t palette_mode_enable:1; 992 uint32_t allow_high_precision_mv:1; 993 uint32_t use_ref_frame_mvs; 994 uint32_t show_existing_frame:1; 995 uint32_t enable_render_size:1; 996 uint32_t use_superres:1; 997 uint32_t reduced_tx_set:1; 998 uint32_t skip_mode_present:1; 999 uint32_t long_term_reference:1; 1000 }; 1001 struct pipe_enc_quality_modes quality_modes; 1002 struct pipe_enc_intra_refresh intra_refresh; 1003 struct pipe_enc_roi roi; 1004 uint32_t num_tiles_in_pic; /* [1, 32], */ 1005 uint32_t tile_rows; 1006 uint32_t tile_cols; 1007 unsigned num_tile_groups; 1008 struct pipe_av1_tile_group tile_groups[256]; 1009 uint32_t context_update_tile_id; 1010 uint16_t width_in_sbs_minus_1[63]; 1011 uint16_t height_in_sbs_minus_1[63]; 1012 uint32_t frame_num; 1013 uint32_t last_key_frame_num; 1014 uint32_t number_of_skips; 1015 uint32_t temporal_id; 1016 uint32_t spatial_id; 1017 uint16_t frame_width; 1018 uint16_t frame_height; 1019 uint16_t frame_width_sb; 1020 uint16_t frame_height_sb; 1021 uint16_t upscaled_width; 1022 uint16_t render_width; 1023 uint16_t render_height; 1024 uint32_t interpolation_filter; 1025 uint8_t tx_mode; 1026 uint8_t compound_reference_mode; 1027 uint32_t order_hint; 1028 uint8_t superres_scale_denominator; 1029 uint32_t primary_ref_frame; 1030 uint8_t refresh_frame_flags; 1031 uint8_t ref_frame_idx[7]; 1032 uint32_t ref_frame_ctrl_l0; /* forward prediction only */ 1033 void *ref_list[8]; /* for tracking ref frames */ 1034 void *recon_frame; 1035 1036 struct { 1037 uint8_t cdef_damping_minus_3; 1038 uint8_t cdef_bits; 1039 uint8_t cdef_y_strengths[8]; 1040 uint8_t cdef_uv_strengths[8]; 1041 } cdef; 1042 1043 struct { 1044 uint8_t yframe_restoration_type; 1045 uint8_t cbframe_restoration_type; 1046 uint8_t crframe_restoration_type; 1047 uint8_t lr_unit_shift; 1048 uint8_t lr_uv_shift; 1049 } restoration; 1050 1051 struct { 1052 uint8_t filter_level[2]; 1053 uint8_t filter_level_u; 1054 uint8_t filter_level_v; 1055 uint8_t sharpness_level; 1056 uint8_t mode_ref_delta_enabled; 1057 uint8_t mode_ref_delta_update; 1058 int8_t ref_deltas[8]; 1059 int8_t mode_deltas[2]; 1060 uint8_t delta_lf_present; 1061 uint8_t delta_lf_res; 1062 uint8_t delta_lf_multi; 1063 } loop_filter; 1064 1065 struct { 1066 uint8_t base_qindex; 1067 int8_t y_dc_delta_q; 1068 int8_t u_dc_delta_q; 1069 int8_t u_ac_delta_q; 1070 int8_t v_dc_delta_q; 1071 int8_t v_ac_delta_q; 1072 uint8_t min_base_qindex; 1073 uint8_t max_base_qindex; 1074 uint8_t using_qmatrix; 1075 uint8_t qm_y; 1076 uint8_t qm_u; 1077 uint8_t qm_v; 1078 uint8_t delta_q_present; 1079 uint8_t delta_q_res; 1080 } quantization; 1081 1082 struct { 1083 uint8_t obu_extension_flag; 1084 uint8_t obu_has_size_field; 1085 uint8_t temporal_id; 1086 uint8_t spatial_id; 1087 } tg_obu_header; 1088 enum pipe_video_feedback_metadata_type requested_metadata; 1089 }; 1090 1091 struct pipe_h265_sps 1092 { 1093 uint8_t chroma_format_idc; 1094 uint8_t separate_colour_plane_flag; 1095 uint32_t pic_width_in_luma_samples; 1096 uint32_t pic_height_in_luma_samples; 1097 uint8_t bit_depth_luma_minus8; 1098 uint8_t bit_depth_chroma_minus8; 1099 uint8_t log2_max_pic_order_cnt_lsb_minus4; 1100 uint8_t sps_max_dec_pic_buffering_minus1; 1101 uint8_t log2_min_luma_coding_block_size_minus3; 1102 uint8_t log2_diff_max_min_luma_coding_block_size; 1103 uint8_t log2_min_transform_block_size_minus2; 1104 uint8_t log2_diff_max_min_transform_block_size; 1105 uint8_t max_transform_hierarchy_depth_inter; 1106 uint8_t max_transform_hierarchy_depth_intra; 1107 uint8_t scaling_list_enabled_flag; 1108 uint8_t ScalingList4x4[6][16]; 1109 uint8_t ScalingList8x8[6][64]; 1110 uint8_t ScalingList16x16[6][64]; 1111 uint8_t ScalingList32x32[2][64]; 1112 uint8_t ScalingListDCCoeff16x16[6]; 1113 uint8_t ScalingListDCCoeff32x32[2]; 1114 uint8_t amp_enabled_flag; 1115 uint8_t sample_adaptive_offset_enabled_flag; 1116 uint8_t pcm_enabled_flag; 1117 uint8_t pcm_sample_bit_depth_luma_minus1; 1118 uint8_t pcm_sample_bit_depth_chroma_minus1; 1119 uint8_t log2_min_pcm_luma_coding_block_size_minus3; 1120 uint8_t log2_diff_max_min_pcm_luma_coding_block_size; 1121 uint8_t pcm_loop_filter_disabled_flag; 1122 uint8_t num_short_term_ref_pic_sets; 1123 uint8_t long_term_ref_pics_present_flag; 1124 uint8_t num_long_term_ref_pics_sps; 1125 uint8_t sps_temporal_mvp_enabled_flag; 1126 uint8_t strong_intra_smoothing_enabled_flag; 1127 uint8_t no_pic_reordering_flag; 1128 uint8_t no_bi_pred_flag; 1129 }; 1130 1131 struct pipe_h265_pps 1132 { 1133 struct pipe_h265_sps *sps; 1134 1135 uint8_t dependent_slice_segments_enabled_flag; 1136 uint8_t output_flag_present_flag; 1137 uint8_t num_extra_slice_header_bits; 1138 uint8_t sign_data_hiding_enabled_flag; 1139 uint8_t cabac_init_present_flag; 1140 uint8_t num_ref_idx_l0_default_active_minus1; 1141 uint8_t num_ref_idx_l1_default_active_minus1; 1142 int8_t init_qp_minus26; 1143 uint8_t constrained_intra_pred_flag; 1144 uint8_t transform_skip_enabled_flag; 1145 uint8_t cu_qp_delta_enabled_flag; 1146 uint8_t diff_cu_qp_delta_depth; 1147 int8_t pps_cb_qp_offset; 1148 int8_t pps_cr_qp_offset; 1149 uint8_t pps_slice_chroma_qp_offsets_present_flag; 1150 uint8_t weighted_pred_flag; 1151 uint8_t weighted_bipred_flag; 1152 uint8_t transquant_bypass_enabled_flag; 1153 uint8_t tiles_enabled_flag; 1154 uint8_t entropy_coding_sync_enabled_flag; 1155 uint8_t num_tile_columns_minus1; 1156 uint8_t num_tile_rows_minus1; 1157 uint8_t uniform_spacing_flag; 1158 uint16_t column_width_minus1[20]; 1159 uint16_t row_height_minus1[22]; 1160 uint8_t loop_filter_across_tiles_enabled_flag; 1161 uint8_t pps_loop_filter_across_slices_enabled_flag; 1162 uint8_t deblocking_filter_control_present_flag; 1163 uint8_t deblocking_filter_override_enabled_flag; 1164 uint8_t pps_deblocking_filter_disabled_flag; 1165 int8_t pps_beta_offset_div2; 1166 int8_t pps_tc_offset_div2; 1167 uint8_t lists_modification_present_flag; 1168 uint8_t log2_parallel_merge_level_minus2; 1169 uint8_t slice_segment_header_extension_present_flag; 1170 uint16_t st_rps_bits; 1171 }; 1172 1173 struct pipe_h265_picture_desc 1174 { 1175 struct pipe_picture_desc base; 1176 1177 struct pipe_h265_pps *pps; 1178 1179 uint8_t IDRPicFlag; 1180 uint8_t RAPPicFlag; 1181 /* 1182 When the current picture is an IRAP picture, IntraPicFlag shall be equal to 1. 1183 When the current picture is not an IRAP picture, the host software decoder is 1184 not required to determine whether all slices of the current picture are I slices 1185 – i.e. it may simply set IntraPicFlag to 0 in this case.... 1186 1187 Some frontends have IntraPicFlag defined (ie. VAPictureParameterBufferHEVC) 1188 and some others like VDPAU/OMX can derive it from RAPPicFlag 1189 */ 1190 uint8_t IntraPicFlag; 1191 uint8_t CurrRpsIdx; 1192 uint32_t NumPocTotalCurr; 1193 uint32_t NumDeltaPocsOfRefRpsIdx; 1194 uint32_t NumShortTermPictureSliceHeaderBits; 1195 uint32_t NumLongTermPictureSliceHeaderBits; 1196 1197 int32_t CurrPicOrderCntVal; 1198 struct pipe_video_buffer *ref[16]; 1199 int32_t PicOrderCntVal[16]; 1200 uint8_t IsLongTerm[16]; 1201 uint8_t NumPocStCurrBefore; 1202 uint8_t NumPocStCurrAfter; 1203 uint8_t NumPocLtCurr; 1204 uint8_t RefPicSetStCurrBefore[8]; 1205 uint8_t RefPicSetStCurrAfter[8]; 1206 uint8_t RefPicSetLtCurr[8]; 1207 uint8_t RefPicList[PIPE_H265_MAX_SLICES][2][15]; 1208 bool UseRefPicList; 1209 bool UseStRpsBits; 1210 1211 struct 1212 { 1213 bool slice_info_present; 1214 uint32_t slice_count; 1215 uint32_t slice_data_size[PIPE_H265_MAX_SLICES]; 1216 uint32_t slice_data_offset[PIPE_H265_MAX_SLICES]; 1217 enum pipe_slice_buffer_placement_type slice_data_flag[PIPE_H265_MAX_SLICES]; 1218 } slice_parameter; 1219 }; 1220 1221 struct pipe_mjpeg_picture_desc 1222 { 1223 struct pipe_picture_desc base; 1224 1225 struct 1226 { 1227 uint16_t picture_width; 1228 uint16_t picture_height; 1229 1230 struct { 1231 uint8_t component_id; 1232 uint8_t h_sampling_factor; 1233 uint8_t v_sampling_factor; 1234 uint8_t quantiser_table_selector; 1235 } components[255]; 1236 1237 uint8_t num_components; 1238 uint16_t crop_x; 1239 uint16_t crop_y; 1240 uint16_t crop_width; 1241 uint16_t crop_height; 1242 } picture_parameter; 1243 1244 struct 1245 { 1246 uint8_t load_quantiser_table[4]; 1247 uint8_t quantiser_table[4][64]; 1248 } quantization_table; 1249 1250 struct 1251 { 1252 uint8_t load_huffman_table[2]; 1253 1254 struct { 1255 uint8_t num_dc_codes[16]; 1256 uint8_t dc_values[12]; 1257 uint8_t num_ac_codes[16]; 1258 uint8_t ac_values[162]; 1259 uint8_t pad[2]; 1260 } table[2]; 1261 } huffman_table; 1262 1263 struct 1264 { 1265 unsigned slice_data_size; 1266 unsigned slice_data_offset; 1267 unsigned slice_data_flag; 1268 unsigned slice_horizontal_position; 1269 unsigned slice_vertical_position; 1270 1271 struct { 1272 uint8_t component_selector; 1273 uint8_t dc_table_selector; 1274 uint8_t ac_table_selector; 1275 } components[4]; 1276 1277 uint8_t num_components; 1278 1279 uint16_t restart_interval; 1280 unsigned num_mcus; 1281 } slice_parameter; 1282 }; 1283 1284 struct vp9_segment_parameter 1285 { 1286 struct { 1287 uint16_t segment_reference_enabled:1; 1288 uint16_t segment_reference:2; 1289 uint16_t segment_reference_skipped:1; 1290 } segment_flags; 1291 1292 bool alt_quant_enabled; 1293 int16_t alt_quant; 1294 1295 bool alt_lf_enabled; 1296 int16_t alt_lf; 1297 1298 uint8_t filter_level[4][2]; 1299 1300 int16_t luma_ac_quant_scale; 1301 int16_t luma_dc_quant_scale; 1302 1303 int16_t chroma_ac_quant_scale; 1304 int16_t chroma_dc_quant_scale; 1305 }; 1306 1307 struct pipe_vp9_picture_desc 1308 { 1309 struct pipe_picture_desc base; 1310 1311 struct pipe_video_buffer *ref[16]; 1312 1313 struct { 1314 uint16_t frame_width; 1315 uint16_t frame_height; 1316 uint16_t prev_frame_width; 1317 uint16_t prev_frame_height; 1318 1319 struct { 1320 uint32_t subsampling_x:1; 1321 uint32_t subsampling_y:1; 1322 uint32_t frame_type:1; 1323 uint32_t show_frame:1; 1324 uint32_t prev_show_frame:1; 1325 uint32_t error_resilient_mode:1; 1326 uint32_t intra_only:1; 1327 uint32_t allow_high_precision_mv:1; 1328 uint32_t mcomp_filter_type:3; 1329 uint32_t frame_parallel_decoding_mode:1; 1330 uint32_t reset_frame_context:2; 1331 uint32_t refresh_frame_context:1; 1332 uint32_t frame_context_idx:2; 1333 uint32_t segmentation_enabled:1; 1334 uint32_t segmentation_temporal_update:1; 1335 uint32_t segmentation_update_map:1; 1336 uint32_t last_ref_frame:3; 1337 uint32_t last_ref_frame_sign_bias:1; 1338 uint32_t golden_ref_frame:3; 1339 uint32_t golden_ref_frame_sign_bias:1; 1340 uint32_t alt_ref_frame:3; 1341 uint32_t alt_ref_frame_sign_bias:1; 1342 uint32_t lossless_flag:1; 1343 } pic_fields; 1344 1345 uint8_t filter_level; 1346 uint8_t sharpness_level; 1347 1348 uint8_t log2_tile_rows; 1349 uint8_t log2_tile_columns; 1350 1351 uint8_t frame_header_length_in_bytes; 1352 1353 uint16_t first_partition_size; 1354 1355 uint8_t mb_segment_tree_probs[7]; 1356 uint8_t segment_pred_probs[3]; 1357 1358 uint8_t profile; 1359 1360 uint8_t bit_depth; 1361 1362 bool mode_ref_delta_enabled; 1363 bool mode_ref_delta_update; 1364 1365 uint8_t base_qindex; 1366 int8_t y_dc_delta_q; 1367 int8_t uv_ac_delta_q; 1368 int8_t uv_dc_delta_q; 1369 uint8_t abs_delta; 1370 uint8_t ref_deltas[4]; 1371 uint8_t mode_deltas[2]; 1372 } picture_parameter; 1373 1374 struct { 1375 bool slice_info_present; 1376 uint32_t slice_count; 1377 uint32_t slice_data_size[128]; 1378 uint32_t slice_data_offset[128]; 1379 enum pipe_slice_buffer_placement_type slice_data_flag[128]; 1380 struct vp9_segment_parameter seg_param[8]; 1381 } slice_parameter; 1382 }; 1383 1384 struct pipe_av1_picture_desc 1385 { 1386 struct pipe_picture_desc base; 1387 1388 struct pipe_video_buffer *ref[16]; 1389 struct pipe_video_buffer *film_grain_target; 1390 struct { 1391 uint8_t profile; 1392 uint8_t order_hint_bits_minus_1; 1393 uint8_t bit_depth_idx; 1394 1395 struct { 1396 uint32_t use_128x128_superblock:1; 1397 uint32_t enable_filter_intra:1; 1398 uint32_t enable_intra_edge_filter:1; 1399 uint32_t enable_interintra_compound:1; 1400 uint32_t enable_masked_compound:1; 1401 uint32_t enable_dual_filter:1; 1402 uint32_t enable_order_hint:1; 1403 uint32_t enable_jnt_comp:1; 1404 uint32_t enable_cdef:1; 1405 uint32_t mono_chrome:1; 1406 uint32_t ref_frame_mvs:1; 1407 uint32_t film_grain_params_present:1; 1408 } seq_info_fields; 1409 1410 uint32_t current_frame_id; 1411 1412 uint16_t frame_width; 1413 uint16_t frame_height; 1414 uint16_t max_width; 1415 uint16_t max_height; 1416 1417 uint8_t ref_frame_idx[7]; 1418 uint8_t primary_ref_frame; 1419 uint8_t order_hint; 1420 1421 struct { 1422 struct { 1423 uint32_t enabled:1; 1424 uint32_t update_map:1; 1425 uint32_t update_data:1; 1426 uint32_t temporal_update:1; 1427 } segment_info_fields; 1428 1429 int16_t feature_data[8][8]; 1430 uint8_t feature_mask[8]; 1431 } seg_info; 1432 1433 struct { 1434 struct { 1435 uint32_t apply_grain:1; 1436 uint32_t chroma_scaling_from_luma:1; 1437 uint32_t grain_scaling_minus_8:2; 1438 uint32_t ar_coeff_lag:2; 1439 uint32_t ar_coeff_shift_minus_6:2; 1440 uint32_t grain_scale_shift:2; 1441 uint32_t overlap_flag:1; 1442 uint32_t clip_to_restricted_range:1; 1443 } film_grain_info_fields; 1444 1445 uint16_t grain_seed; 1446 uint8_t num_y_points; 1447 uint8_t point_y_value[14]; 1448 uint8_t point_y_scaling[14]; 1449 uint8_t num_cb_points; 1450 uint8_t point_cb_value[10]; 1451 uint8_t point_cb_scaling[10]; 1452 uint8_t num_cr_points; 1453 uint8_t point_cr_value[10]; 1454 uint8_t point_cr_scaling[10]; 1455 int8_t ar_coeffs_y[24]; 1456 int8_t ar_coeffs_cb[25]; 1457 int8_t ar_coeffs_cr[25]; 1458 uint8_t cb_mult; 1459 uint8_t cb_luma_mult; 1460 uint16_t cb_offset; 1461 uint8_t cr_mult; 1462 uint8_t cr_luma_mult; 1463 uint16_t cr_offset; 1464 } film_grain_info; 1465 1466 uint8_t tile_cols; 1467 uint8_t tile_rows; 1468 uint32_t tile_col_start_sb[65]; 1469 uint32_t tile_row_start_sb[65]; 1470 uint16_t width_in_sbs[64]; 1471 uint16_t height_in_sbs[64]; 1472 uint16_t context_update_tile_id; 1473 1474 struct { 1475 uint32_t frame_type:2; 1476 uint32_t show_frame:1; 1477 uint32_t showable_frame:1; 1478 uint32_t error_resilient_mode:1; 1479 uint32_t disable_cdf_update:1; 1480 uint32_t allow_screen_content_tools:1; 1481 uint32_t force_integer_mv:1; 1482 uint32_t allow_intrabc:1; 1483 uint32_t use_superres:1; 1484 uint32_t allow_high_precision_mv:1; 1485 uint32_t is_motion_mode_switchable:1; 1486 uint32_t use_ref_frame_mvs:1; 1487 uint32_t disable_frame_end_update_cdf:1; 1488 uint32_t uniform_tile_spacing_flag:1; 1489 uint32_t allow_warped_motion:1; 1490 uint32_t large_scale_tile:1; 1491 } pic_info_fields; 1492 1493 uint8_t superres_scale_denominator; 1494 1495 uint8_t interp_filter; 1496 uint8_t filter_level[2]; 1497 uint8_t filter_level_u; 1498 uint8_t filter_level_v; 1499 struct { 1500 uint8_t sharpness_level:3; 1501 uint8_t mode_ref_delta_enabled:1; 1502 uint8_t mode_ref_delta_update:1; 1503 } loop_filter_info_fields; 1504 1505 int8_t ref_deltas[8]; 1506 int8_t mode_deltas[2]; 1507 1508 uint8_t base_qindex; 1509 int8_t y_dc_delta_q; 1510 int8_t u_dc_delta_q; 1511 int8_t u_ac_delta_q; 1512 int8_t v_dc_delta_q; 1513 int8_t v_ac_delta_q; 1514 1515 struct { 1516 uint16_t using_qmatrix:1; 1517 uint16_t qm_y:4; 1518 uint16_t qm_u:4; 1519 uint16_t qm_v:4; 1520 } qmatrix_fields; 1521 1522 struct { 1523 uint32_t delta_q_present_flag:1; 1524 uint32_t log2_delta_q_res:2; 1525 uint32_t delta_lf_present_flag:1; 1526 uint32_t log2_delta_lf_res:2; 1527 uint32_t delta_lf_multi:1; 1528 uint32_t tx_mode:2; 1529 uint32_t reference_select:1; 1530 uint32_t reduced_tx_set_used:1; 1531 uint32_t skip_mode_present:1; 1532 } mode_control_fields; 1533 1534 uint8_t cdef_damping_minus_3; 1535 uint8_t cdef_bits; 1536 uint8_t cdef_y_strengths[8]; 1537 uint8_t cdef_uv_strengths[8]; 1538 1539 struct { 1540 uint16_t yframe_restoration_type:2; 1541 uint16_t cbframe_restoration_type:2; 1542 uint16_t crframe_restoration_type:2; 1543 uint16_t lr_unit_shift:2; 1544 uint16_t lr_uv_shift:1; 1545 } loop_restoration_fields; 1546 1547 uint16_t lr_unit_size[3]; 1548 1549 struct { 1550 uint32_t wmtype; 1551 uint8_t invalid; 1552 int32_t wmmat[8]; 1553 } wm[7]; 1554 1555 uint32_t refresh_frame_flags; 1556 uint8_t matrix_coefficients; 1557 } picture_parameter; 1558 1559 struct { 1560 uint32_t slice_data_size[256]; 1561 uint32_t slice_data_offset[256]; 1562 uint16_t slice_data_row[256]; 1563 uint16_t slice_data_col[256]; 1564 uint8_t slice_data_anchor_frame_idx[256]; 1565 uint16_t slice_count; 1566 } slice_parameter; 1567 }; 1568 1569 struct pipe_vpp_blend 1570 { 1571 enum pipe_video_vpp_blend_mode mode; 1572 /* To be used with PIPE_VIDEO_VPP_BLEND_MODE_GLOBAL_ALPHA */ 1573 float global_alpha; 1574 }; 1575 1576 struct pipe_vpp_desc 1577 { 1578 struct pipe_picture_desc base; 1579 struct u_rect src_region; 1580 struct u_rect dst_region; 1581 enum pipe_video_vpp_orientation orientation; 1582 struct pipe_vpp_blend blend; 1583 1584 /* Fence to wait on for the src surface */ 1585 struct pipe_fence_handle *src_surface_fence; 1586 1587 uint32_t background_color; 1588 enum pipe_video_vpp_color_standard_type in_colors_standard; 1589 enum pipe_video_vpp_color_range in_color_range; 1590 enum pipe_video_vpp_chroma_siting in_chroma_siting; 1591 enum pipe_video_vpp_color_standard_type out_colors_standard; 1592 enum pipe_video_vpp_color_range out_color_range; 1593 enum pipe_video_vpp_chroma_siting out_chroma_siting; 1594 }; 1595 1596 1597 /* To be used with PIPE_VIDEO_CAP_ENC_HEVC_PREDICTION_DIRECTION */ 1598 enum pipe_h265_enc_pred_direction 1599 { 1600 /* No restrictions*/ 1601 PIPE_H265_PRED_DIRECTION_ALL = 0x0, 1602 /* P Frame*/ 1603 PIPE_H265_PRED_DIRECTION_PREVIOUS = 0x1, 1604 /* Same reference lists for B Frame*/ 1605 PIPE_H265_PRED_DIRECTION_FUTURE = 0x2, 1606 /* Low delay B frames */ 1607 PIPE_H265_PRED_DIRECTION_BI_NOT_EMPTY = 0x4, 1608 }; 1609 1610 /* To be used with PIPE_VIDEO_CAP_ENC_HEVC_FEATURE_FLAGS 1611 the config_supported bit is used to differenciate a supported 1612 config with all bits as zero and unsupported by driver with value=0 1613 */ 1614 union pipe_h265_enc_cap_features { 1615 struct { 1616 /** Separate colour planes. 1617 * 1618 * Allows setting separate_colour_plane_flag in the SPS. 1619 */ 1620 uint32_t separate_colour_planes : 2; 1621 /** Scaling lists. 1622 * 1623 * Allows scaling_list() elements to be present in both the SPS 1624 * and the PPS. The decoded form of the scaling lists must also 1625 * be supplied in a VAQMatrixBufferHEVC buffer when scaling lists 1626 * are enabled. 1627 */ 1628 uint32_t scaling_lists : 2; 1629 /** Asymmetric motion partitions. 1630 * 1631 * Allows setting amp_enabled_flag in the SPS. 1632 */ 1633 uint32_t amp : 2; 1634 /** Sample adaptive offset filter. 1635 * 1636 * Allows setting slice_sao_luma_flag and slice_sao_chroma_flag 1637 * in slice headers. 1638 */ 1639 uint32_t sao : 2; 1640 /** PCM sample blocks. 1641 * 1642 * Allows setting pcm_enabled_flag in the SPS. When enabled 1643 * PCM parameters must be supplied with the sequence parameters, 1644 * including block sizes which may be further constrained as 1645 * noted in the VAConfigAttribEncHEVCBlockSizes attribute. 1646 */ 1647 uint32_t pcm : 2; 1648 /** Temporal motion vector Prediction. 1649 * 1650 * Allows setting slice_temporal_mvp_enabled_flag in slice 1651 * headers. 1652 */ 1653 uint32_t temporal_mvp : 2; 1654 /** Strong intra smoothing. 1655 * 1656 * Allows setting strong_intra_smoothing_enabled_flag in the SPS. 1657 */ 1658 uint32_t strong_intra_smoothing : 2; 1659 /** Dependent slices. 1660 * 1661 * Allows setting dependent_slice_segment_flag in slice headers. 1662 */ 1663 uint32_t dependent_slices : 2; 1664 /** Sign data hiding. 1665 * 1666 * Allows setting sign_data_hiding_enable_flag in the PPS. 1667 */ 1668 uint32_t sign_data_hiding : 2; 1669 /** Constrained intra prediction. 1670 * 1671 * Allows setting constrained_intra_pred_flag in the PPS. 1672 */ 1673 uint32_t constrained_intra_pred : 2; 1674 /** Transform skipping. 1675 * 1676 * Allows setting transform_skip_enabled_flag in the PPS. 1677 */ 1678 uint32_t transform_skip : 2; 1679 /** QP delta within coding units. 1680 * 1681 * Allows setting cu_qp_delta_enabled_flag in the PPS. 1682 */ 1683 uint32_t cu_qp_delta : 2; 1684 /** Weighted prediction. 1685 * 1686 * Allows setting weighted_pred_flag and weighted_bipred_flag in 1687 * the PPS. The pred_weight_table() data must be supplied with 1688 * every slice header when weighted prediction is enabled. 1689 */ 1690 uint32_t weighted_prediction : 2; 1691 /** Transform and quantisation bypass. 1692 * 1693 * Allows setting transquant_bypass_enabled_flag in the PPS. 1694 */ 1695 uint32_t transquant_bypass : 2; 1696 /** Deblocking filter disable. 1697 * 1698 * Allows setting slice_deblocking_filter_disabled_flag. 1699 */ 1700 uint32_t deblocking_filter_disable : 2; 1701 /** Flag indicating this is a supported configuration 1702 * 1703 * It could be possible all the bits above are set to zero 1704 * and this is a valid configuration, so we distinguish 1705 * between get_video_param returning 0 for no support 1706 * and this case with this bit flag. 1707 */ 1708 uint32_t config_supported : 1; 1709 } bits; 1710 uint32_t value; 1711 }; 1712 1713 /* To be used with PIPE_VIDEO_CAP_ENC_HEVC_BLOCK_SIZES 1714 the config_supported bit is used to differenciate a supported 1715 config with all bits as zero and unsupported by driver with value=0 */ 1716 union pipe_h265_enc_cap_block_sizes { 1717 struct { 1718 /** Largest supported size of coding tree blocks. 1719 * 1720 * CtbLog2SizeY must not be larger than this. 1721 */ 1722 uint32_t log2_max_coding_tree_block_size_minus3 : 2; 1723 /** Smallest supported size of coding tree blocks. 1724 * 1725 * CtbLog2SizeY must not be smaller than this. 1726 * 1727 * This may be the same as the maximum size, indicating that only 1728 * one CTB size is supported. 1729 */ 1730 uint32_t log2_min_coding_tree_block_size_minus3 : 2; 1731 1732 /** Smallest supported size of luma coding blocks. 1733 * 1734 * MinCbLog2SizeY must not be smaller than this. 1735 */ 1736 uint32_t log2_min_luma_coding_block_size_minus3 : 2; 1737 1738 /** Largest supported size of luma transform blocks. 1739 * 1740 * MaxTbLog2SizeY must not be larger than this. 1741 */ 1742 uint32_t log2_max_luma_transform_block_size_minus2 : 2; 1743 /** Smallest supported size of luma transform blocks. 1744 * 1745 * MinTbLog2SizeY must not be smaller than this. 1746 */ 1747 uint32_t log2_min_luma_transform_block_size_minus2 : 2; 1748 1749 /** Largest supported transform hierarchy depth in inter 1750 * coding units. 1751 * 1752 * max_transform_hierarchy_depth_inter must not be larger 1753 * than this. 1754 */ 1755 uint32_t max_max_transform_hierarchy_depth_inter : 2; 1756 /** Smallest supported transform hierarchy depth in inter 1757 * coding units. 1758 * 1759 * max_transform_hierarchy_depth_inter must not be smaller 1760 * than this. 1761 */ 1762 uint32_t min_max_transform_hierarchy_depth_inter : 2; 1763 1764 /** Largest supported transform hierarchy depth in intra 1765 * coding units. 1766 * 1767 * max_transform_hierarchy_depth_intra must not be larger 1768 * than this. 1769 */ 1770 uint32_t max_max_transform_hierarchy_depth_intra : 2; 1771 /** Smallest supported transform hierarchy depth in intra 1772 * coding units. 1773 * 1774 * max_transform_hierarchy_depth_intra must not be smaller 1775 * than this. 1776 */ 1777 uint32_t min_max_transform_hierarchy_depth_intra : 2; 1778 1779 /** Largest supported size of PCM coding blocks. 1780 * 1781 * Log2MaxIpcmCbSizeY must not be larger than this. 1782 */ 1783 uint32_t log2_max_pcm_coding_block_size_minus3 : 2; 1784 /** Smallest supported size of PCM coding blocks. 1785 * 1786 * Log2MinIpcmCbSizeY must not be smaller than this. 1787 */ 1788 uint32_t log2_min_pcm_coding_block_size_minus3 : 2; 1789 /** Flag indicating this is a supported configuration 1790 * 1791 * It could be possible all the bits above are set to zero 1792 * and this is a valid configuration, so we distinguish 1793 * between get_video_param returning 0 for no support 1794 * and this case with this bit flag. 1795 */ 1796 uint32_t config_supported : 1; 1797 } bits; 1798 uint32_t value; 1799 }; 1800 1801 union pipe_av1_enc_cap_features { 1802 struct { 1803 /** 1804 * Use 128x128 superblock. 1805 * 1806 * Allows setting use_128x128_superblock in the SPS. 1807 */ 1808 uint32_t support_128x128_superblock : 2; 1809 /** 1810 * Intra filter. 1811 * Allows setting enable_filter_intra in the SPS. 1812 */ 1813 uint32_t support_filter_intra : 2; 1814 /** 1815 * Intra edge filter. 1816 * Allows setting enable_intra_edge_filter in the SPS. 1817 */ 1818 uint32_t support_intra_edge_filter : 2; 1819 /** 1820 * Interintra compound. 1821 * Allows setting enable_interintra_compound in the SPS. 1822 */ 1823 uint32_t support_interintra_compound : 2; 1824 /** 1825 * Masked compound. 1826 * Allows setting enable_masked_compound in the SPS. 1827 */ 1828 uint32_t support_masked_compound : 2; 1829 /** 1830 * Warped motion. 1831 * Allows setting enable_warped_motion in the SPS. 1832 */ 1833 uint32_t support_warped_motion : 2; 1834 /** 1835 * Palette mode. 1836 * Allows setting palette_mode in the PPS. 1837 */ 1838 uint32_t support_palette_mode : 2; 1839 /** 1840 * Dual filter. 1841 * Allows setting enable_dual_filter in the SPS. 1842 */ 1843 uint32_t support_dual_filter : 2; 1844 /** 1845 * Jnt compound. 1846 * Allows setting enable_jnt_comp in the SPS. 1847 */ 1848 uint32_t support_jnt_comp : 2; 1849 /** 1850 * Refrence frame mvs. 1851 * Allows setting enable_ref_frame_mvs in the SPS. 1852 */ 1853 uint32_t support_ref_frame_mvs : 2; 1854 /** 1855 * Super resolution. 1856 * Allows setting enable_superres in the SPS. 1857 */ 1858 uint32_t support_superres : 2; 1859 /** 1860 * Restoration. 1861 * Allows setting enable_restoration in the SPS. 1862 */ 1863 uint32_t support_restoration : 2; 1864 /** 1865 * Allow intraBC. 1866 * Allows setting allow_intrabc in the PPS. 1867 */ 1868 uint32_t support_allow_intrabc : 2; 1869 /** 1870 * Cdef channel strength. 1871 * Allows setting cdef_y_strengths and cdef_uv_strengths in PPS. 1872 */ 1873 uint32_t support_cdef_channel_strength : 2; 1874 /** Reserved bits for future, must be zero. */ 1875 uint32_t reserved : 4; 1876 } bits; 1877 uint32_t value; 1878 }; 1879 1880 union pipe_av1_enc_cap_features_ext1 { 1881 struct { 1882 /** 1883 * Fields indicate which types of interpolation filter are supported. 1884 * (interpolation_filter & 0x01) == 1: eight_tap filter is supported, 0: not. 1885 * (interpolation_filter & 0x02) == 1: eight_tap_smooth filter is supported, 0: not. 1886 * (interpolation_filter & 0x04) == 1: eight_sharp filter is supported, 0: not. 1887 * (interpolation_filter & 0x08) == 1: bilinear filter is supported, 0: not. 1888 * (interpolation_filter & 0x10) == 1: switchable filter is supported, 0: not. 1889 */ 1890 uint32_t interpolation_filter : 5; 1891 /** 1892 * Min segmentId block size accepted. 1893 * Application need to send seg_id_block_size in PPS equal or larger than this value. 1894 */ 1895 uint32_t min_segid_block_size_accepted : 8; 1896 /** 1897 * Type of segment feature supported. 1898 * (segment_feature_support & 0x01) == 1: SEG_LVL_ALT_Q is supported, 0: not. 1899 * (segment_feature_support & 0x02) == 1: SEG_LVL_ALT_LF_Y_V is supported, 0: not. 1900 * (segment_feature_support & 0x04) == 1: SEG_LVL_ALT_LF_Y_H is supported, 0: not. 1901 * (segment_feature_support & 0x08) == 1: SEG_LVL_ALT_LF_U is supported, 0: not. 1902 * (segment_feature_support & 0x10) == 1: SEG_LVL_ALT_LF_V is supported, 0: not. 1903 * (segment_feature_support & 0x20) == 1: SEG_LVL_REF_FRAME is supported, 0: not. 1904 * (segment_feature_support & 0x40) == 1: SEG_LVL_SKIP is supported, 0: not. 1905 * (segment_feature_support & 0x80) == 1: SEG_LVL_GLOBALMV is supported, 0: not. 1906 */ 1907 uint32_t segment_feature_support : 8; 1908 /** Reserved bits for future, must be zero. */ 1909 uint32_t reserved : 11; 1910 } bits; 1911 uint32_t value; 1912 }; 1913 1914 union pipe_av1_enc_cap_features_ext2 { 1915 struct { 1916 /** 1917 * Tile size bytes minus1. 1918 * Specify the number of bytes needed to code tile size supported. 1919 * This value need to be set in frame header obu. 1920 */ 1921 uint32_t tile_size_bytes_minus1 : 2; 1922 /** 1923 * Tile size bytes minus1. 1924 * Specify the fixed number of bytes needed to code syntax obu_size. 1925 */ 1926 uint32_t obu_size_bytes_minus1 : 2; 1927 /** 1928 * tx_mode supported. 1929 * (tx_mode_support & 0x01) == 1: ONLY_4X4 is supported, 0: not. 1930 * (tx_mode_support & 0x02) == 1: TX_MODE_LARGEST is supported, 0: not. 1931 * (tx_mode_support & 0x04) == 1: TX_MODE_SELECT is supported, 0: not. 1932 */ 1933 uint32_t tx_mode_support : 3; 1934 /** 1935 * Max tile num minus1. 1936 * Specify the max number of tile supported by driver. 1937 */ 1938 uint32_t max_tile_num_minus1 : 13; 1939 /** Reserved bits for future, must be zero. */ 1940 uint32_t reserved : 12; 1941 } bits; 1942 uint32_t value; 1943 }; 1944 1945 struct codec_unit_location_t 1946 { 1947 uint64_t offset; 1948 uint64_t size; 1949 enum codec_unit_location_flags flags; 1950 }; 1951 1952 struct pipe_enc_feedback_metadata 1953 { 1954 /* 1955 * Driver writes the metadata types present in this struct 1956 */ 1957 enum pipe_video_feedback_metadata_type present_metadata; 1958 1959 /* 1960 * Driver writes the result of encoding the associated frame. 1961 * Requires PIPE_VIDEO_FEEDBACK_METADATA_TYPE_ENCODE_RESULT 1962 */ 1963 enum pipe_video_feedback_encode_result_flags encode_result; 1964 1965 /* 1966 * Driver fills in with coded headers information 1967 * and a number codec_unit_metadata_count of valid entries 1968 * Requires PIPE_VIDEO_FEEDBACK_METADATA_TYPE_CODEC_UNIT_LOCATION 1969 */ 1970 struct codec_unit_location_t codec_unit_metadata[256]; 1971 unsigned codec_unit_metadata_count; 1972 1973 /* 1974 * Driver writes the average QP used to encode this frame 1975 */ 1976 unsigned int average_frame_qp; 1977 }; 1978 1979 union pipe_enc_cap_roi { 1980 struct { 1981 /** 1982 * The number of ROI regions supported, 0 if ROI is not supported 1983 */ 1984 uint32_t num_roi_regions : 8; 1985 /** 1986 * A flag indicates whether ROI priority is supported 1987 * 1988 * roi_rc_priority_support equal to 1 specifies the underlying driver supports 1989 * ROI priority when VAConfigAttribRateControl != VA_RC_CQP, user can use roi_value 1990 * in #VAEncROI to set ROI priority. roi_rc_priority_support equal to 0 specifies 1991 * the underlying driver doesn't support ROI priority. 1992 * 1993 * User should ignore roi_rc_priority_support when VAConfigAttribRateControl == VA_RC_CQP 1994 * because ROI delta QP is always required when VAConfigAttribRateControl == VA_RC_CQP. 1995 */ 1996 uint32_t roi_rc_priority_support : 1; 1997 /** 1998 * A flag indicates whether ROI delta QP is supported 1999 * 2000 * roi_rc_qp_delta_support equal to 1 specifies the underlying driver supports 2001 * ROI delta QP when VAConfigAttribRateControl != VA_RC_CQP, user can use roi_value 2002 * in #VAEncROI to set ROI delta QP. roi_rc_qp_delta_support equal to 0 specifies 2003 * the underlying driver doesn't support ROI delta QP. 2004 * 2005 * User should ignore roi_rc_qp_delta_support when VAConfigAttribRateControl == VA_RC_CQP 2006 * because ROI delta QP is always required when VAConfigAttribRateControl == VA_RC_CQP. 2007 */ 2008 uint32_t roi_rc_qp_delta_support : 1; 2009 uint32_t reserved : 22; 2010 2011 } bits; 2012 uint32_t value; 2013 }; 2014 2015 #ifdef __cplusplus 2016 } 2017 #endif 2018 2019 #endif /* PIPE_VIDEO_STATE_H */ 2020