1 /*
2 * Copyright (c) 2016 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "elk_nir.h"
25 #include "compiler/nir/nir_builder.h"
26
27 struct lower_intrinsics_state {
28 nir_shader *nir;
29 nir_function_impl *impl;
30 bool progress;
31 bool hw_generated_local_id;
32 nir_builder builder;
33 };
34
35 static void
compute_local_index_id(nir_builder * b,nir_shader * nir,nir_def ** local_index,nir_def ** local_id)36 compute_local_index_id(nir_builder *b,
37 nir_shader *nir,
38 nir_def **local_index,
39 nir_def **local_id)
40 {
41 nir_def *subgroup_id = nir_load_subgroup_id(b);
42
43 nir_def *thread_local_id =
44 nir_imul(b, subgroup_id, nir_load_simd_width_intel(b));
45 nir_def *channel = nir_load_subgroup_invocation(b);
46 nir_def *linear = nir_iadd(b, channel, thread_local_id);
47
48 nir_def *size_x;
49 nir_def *size_y;
50 if (nir->info.workgroup_size_variable) {
51 nir_def *size_xyz = nir_load_workgroup_size(b);
52 size_x = nir_channel(b, size_xyz, 0);
53 size_y = nir_channel(b, size_xyz, 1);
54 } else {
55 size_x = nir_imm_int(b, nir->info.workgroup_size[0]);
56 size_y = nir_imm_int(b, nir->info.workgroup_size[1]);
57 }
58 nir_def *size_xy = nir_imul(b, size_x, size_y);
59
60 /* The local invocation index and ID must respect the following
61 *
62 * gl_LocalInvocationID.x =
63 * gl_LocalInvocationIndex % gl_WorkGroupSize.x;
64 * gl_LocalInvocationID.y =
65 * (gl_LocalInvocationIndex / gl_WorkGroupSize.x) %
66 * gl_WorkGroupSize.y;
67 * gl_LocalInvocationID.z =
68 * (gl_LocalInvocationIndex /
69 * (gl_WorkGroupSize.x * gl_WorkGroupSize.y)) %
70 * gl_WorkGroupSize.z;
71 *
72 * However, the final % gl_WorkGroupSize.z does nothing unless we
73 * accidentally end up with a gl_LocalInvocationIndex that is too
74 * large so it can safely be omitted.
75 */
76
77 nir_def *id_x, *id_y, *id_z;
78 switch (nir->info.cs.derivative_group) {
79 case DERIVATIVE_GROUP_NONE:
80 if (nir->info.num_images == 0 &&
81 nir->info.num_textures == 0) {
82 /* X-major lid order. Optimal for linear accesses only,
83 * which are usually buffers. X,Y ordering will look like:
84 * (0,0) (1,0) (2,0) ... (size_x-1,0) (0,1) (1,1) ...
85 */
86 id_x = nir_umod(b, linear, size_x);
87 id_y = nir_umod(b, nir_udiv(b, linear, size_x), size_y);
88 *local_index = linear;
89 } else if (!nir->info.workgroup_size_variable &&
90 nir->info.workgroup_size[1] % 4 == 0) {
91 /* 1x4 block X-major lid order. Same as X-major except increments in
92 * blocks of width=1 height=4. Always optimal for tileY and usually
93 * optimal for linear accesses.
94 * x = (linear / 4) % size_x
95 * y = ((linear % 4) + (linear / 4 / size_x) * 4) % size_y
96 * X,Y ordering will look like: (0,0) (0,1) (0,2) (0,3) (1,0) (1,1)
97 * (1,2) (1,3) (2,0) ... (size_x-1,3) (0,4) (0,5) (0,6) (0,7) (1,4) ...
98 */
99 const unsigned height = 4;
100 nir_def *block = nir_udiv_imm(b, linear, height);
101 id_x = nir_umod(b, block, size_x);
102 id_y = nir_umod(b,
103 nir_iadd(b,
104 nir_umod_imm(b, linear, height),
105 nir_imul_imm(b,
106 nir_udiv(b, block, size_x),
107 height)),
108 size_y);
109 } else {
110 /* Y-major lid order. Optimal for tileY accesses only,
111 * which are usually images. X,Y ordering will look like:
112 * (0,0) (0,1) (0,2) ... (0,size_y-1) (1,0) (1,1) ...
113 */
114 id_y = nir_umod(b, linear, size_y);
115 id_x = nir_umod(b, nir_udiv(b, linear, size_y), size_x);
116 }
117
118 id_z = nir_udiv(b, linear, size_xy);
119 *local_id = nir_vec3(b, id_x, id_y, id_z);
120 if (!*local_index) {
121 *local_index = nir_iadd(b, nir_iadd(b, id_x,
122 nir_imul(b, id_y, size_x)),
123 nir_imul(b, id_z, size_xy));
124 }
125 break;
126 case DERIVATIVE_GROUP_LINEAR:
127 /* For linear, just set the local invocation index linearly,
128 * and calculate local invocation ID from that.
129 */
130 id_x = nir_umod(b, linear, size_x);
131 id_y = nir_umod(b, nir_udiv(b, linear, size_x), size_y);
132 id_z = nir_udiv(b, linear, size_xy);
133 *local_id = nir_vec3(b, id_x, id_y, id_z);
134 *local_index = linear;
135 break;
136 case DERIVATIVE_GROUP_QUADS: {
137 /* For quads, first we figure out the 2x2 grid the invocation
138 * belongs to -- treating extra Z layers as just more rows.
139 * Then map that into local invocation ID (trivial) and local
140 * invocation index. Skipping Z simplify index calculation.
141 */
142
143 nir_def *one = nir_imm_int(b, 1);
144 nir_def *double_size_x = nir_ishl(b, size_x, one);
145
146 /* ID within a pair of rows, where each group of 4 is 2x2 quad. */
147 nir_def *row_pair_id = nir_umod(b, linear, double_size_x);
148 nir_def *y_row_pairs = nir_udiv(b, linear, double_size_x);
149
150 nir_def *x =
151 nir_ior(b,
152 nir_iand(b, row_pair_id, one),
153 nir_iand(b, nir_ishr(b, row_pair_id, one),
154 nir_imm_int(b, 0xfffffffe)));
155 nir_def *y =
156 nir_ior(b,
157 nir_ishl(b, y_row_pairs, one),
158 nir_iand(b, nir_ishr(b, row_pair_id, one), one));
159
160 *local_id = nir_vec3(b, x,
161 nir_umod(b, y, size_y),
162 nir_udiv(b, y, size_y));
163 *local_index = nir_iadd(b, x, nir_imul(b, y, size_x));
164 break;
165 }
166 default:
167 unreachable("invalid derivative group");
168 }
169 }
170
171 static bool
lower_cs_intrinsics_convert_block(struct lower_intrinsics_state * state,nir_block * block)172 lower_cs_intrinsics_convert_block(struct lower_intrinsics_state *state,
173 nir_block *block)
174 {
175 bool progress = false;
176 nir_builder *b = &state->builder;
177 nir_shader *nir = state->nir;
178
179 /* Reuse calculated values inside the block. */
180 nir_def *local_index = NULL;
181 nir_def *local_id = NULL;
182
183 nir_foreach_instr_safe(instr, block) {
184 if (instr->type != nir_instr_type_intrinsic)
185 continue;
186
187 nir_intrinsic_instr *intrinsic = nir_instr_as_intrinsic(instr);
188
189 b->cursor = nir_after_instr(&intrinsic->instr);
190
191 nir_def *sysval;
192 switch (intrinsic->intrinsic) {
193 case nir_intrinsic_load_local_invocation_id:
194 if (state->hw_generated_local_id)
195 continue;
196
197 FALLTHROUGH;
198 case nir_intrinsic_load_local_invocation_index: {
199 if (!local_index && !nir->info.workgroup_size_variable) {
200 const uint16_t *ws = nir->info.workgroup_size;
201 if (ws[0] * ws[1] * ws[2] == 1) {
202 nir_def *zero = nir_imm_int(b, 0);
203 local_index = zero;
204 local_id = nir_replicate(b, zero, 3);
205 }
206 }
207
208 if (!local_index) {
209 if (nir->info.stage == MESA_SHADER_TASK ||
210 nir->info.stage == MESA_SHADER_MESH) {
211 /* Will be lowered by nir_emit_task_mesh_intrinsic() using
212 * information from the payload.
213 */
214 continue;
215 }
216
217 if (state->hw_generated_local_id) {
218 nir_def *local_id_vec = nir_load_local_invocation_id(b);
219 nir_def *local_id[3] = { nir_channel(b, local_id_vec, 0),
220 nir_channel(b, local_id_vec, 1),
221 nir_channel(b, local_id_vec, 2) };
222 nir_def *size_x = nir_imm_int(b, nir->info.workgroup_size[0]);
223 nir_def *size_y = nir_imm_int(b, nir->info.workgroup_size[1]);
224
225 sysval = nir_imul(b, local_id[2], nir_imul(b, size_x, size_y));
226 sysval = nir_iadd(b, sysval, nir_imul(b, local_id[1], size_x));
227 sysval = nir_iadd(b, sysval, local_id[0]);
228 local_index = sysval;
229 break;
230 }
231
232 /* First time we are using those, so let's calculate them. */
233 assert(!local_id);
234 compute_local_index_id(b, nir, &local_index, &local_id);
235 }
236
237 assert(local_id);
238 assert(local_index);
239 if (intrinsic->intrinsic == nir_intrinsic_load_local_invocation_id)
240 sysval = local_id;
241 else
242 sysval = local_index;
243 break;
244 }
245
246 case nir_intrinsic_load_num_subgroups: {
247 nir_def *size;
248 if (state->nir->info.workgroup_size_variable) {
249 nir_def *size_xyz = nir_load_workgroup_size(b);
250 nir_def *size_x = nir_channel(b, size_xyz, 0);
251 nir_def *size_y = nir_channel(b, size_xyz, 1);
252 nir_def *size_z = nir_channel(b, size_xyz, 2);
253 size = nir_imul(b, nir_imul(b, size_x, size_y), size_z);
254 } else {
255 size = nir_imm_int(b, nir->info.workgroup_size[0] *
256 nir->info.workgroup_size[1] *
257 nir->info.workgroup_size[2]);
258 }
259
260 /* Calculate the equivalent of DIV_ROUND_UP. */
261 nir_def *simd_width = nir_load_simd_width_intel(b);
262 sysval =
263 nir_udiv(b, nir_iadd_imm(b, nir_iadd(b, size, simd_width), -1),
264 simd_width);
265 break;
266 }
267
268 default:
269 continue;
270 }
271
272 if (intrinsic->def.bit_size == 64)
273 sysval = nir_u2u64(b, sysval);
274
275 nir_def_rewrite_uses(&intrinsic->def, sysval);
276 nir_instr_remove(&intrinsic->instr);
277
278 state->progress = true;
279 }
280
281 return progress;
282 }
283
284 static void
lower_cs_intrinsics_convert_impl(struct lower_intrinsics_state * state)285 lower_cs_intrinsics_convert_impl(struct lower_intrinsics_state *state)
286 {
287 state->builder = nir_builder_create(state->impl);
288
289 nir_foreach_block(block, state->impl) {
290 lower_cs_intrinsics_convert_block(state, block);
291 }
292
293 nir_metadata_preserve(state->impl,
294 nir_metadata_block_index | nir_metadata_dominance);
295 }
296
297 bool
elk_nir_lower_cs_intrinsics(nir_shader * nir,const struct intel_device_info * devinfo,struct elk_cs_prog_data * prog_data)298 elk_nir_lower_cs_intrinsics(nir_shader *nir,
299 const struct intel_device_info *devinfo,
300 struct elk_cs_prog_data *prog_data)
301 {
302 assert(gl_shader_stage_uses_workgroup(nir->info.stage));
303
304 struct lower_intrinsics_state state = {
305 .nir = nir,
306 .hw_generated_local_id = false,
307 };
308
309 /* Constraints from NV_compute_shader_derivatives. */
310 if (gl_shader_stage_is_compute(nir->info.stage) &&
311 !nir->info.workgroup_size_variable) {
312 if (nir->info.cs.derivative_group == DERIVATIVE_GROUP_QUADS) {
313 assert(nir->info.workgroup_size[0] % 2 == 0);
314 assert(nir->info.workgroup_size[1] % 2 == 0);
315 } else if (nir->info.cs.derivative_group == DERIVATIVE_GROUP_LINEAR) {
316 ASSERTED unsigned workgroup_size =
317 nir->info.workgroup_size[0] *
318 nir->info.workgroup_size[1] *
319 nir->info.workgroup_size[2];
320 assert(workgroup_size % 4 == 0);
321 }
322 }
323
324 if (devinfo->verx10 >= 125 && prog_data &&
325 nir->info.stage == MESA_SHADER_COMPUTE &&
326 nir->info.cs.derivative_group != DERIVATIVE_GROUP_QUADS &&
327 !nir->info.workgroup_size_variable &&
328 util_is_power_of_two_nonzero(nir->info.workgroup_size[0]) &&
329 util_is_power_of_two_nonzero(nir->info.workgroup_size[1])) {
330
331 state.hw_generated_local_id = true;
332
333 /* TODO: more heuristics about 1D/SLM access vs. 2D access */
334 bool linear =
335 BITSET_TEST(nir->info.system_values_read,
336 SYSTEM_VALUE_LOCAL_INVOCATION_INDEX) ||
337 (nir->info.workgroup_size[1] == 1 &&
338 nir->info.workgroup_size[2] == 1) ||
339 (nir->info.num_images == 0 && nir->info.num_textures == 0);
340
341 prog_data->walk_order =
342 linear ? INTEL_WALK_ORDER_XYZ : INTEL_WALK_ORDER_YXZ;
343
344 /* nir_lower_compute_system_values will replace any references to
345 * SYSTEM_VALUE_LOCAL_INVOCATION_ID vector components with zero for
346 * any dimension where the workgroup size is 1, so we can skip
347 * generating those. However, the hardware can only generate
348 * X, XY, or XYZ - it can't skip earlier components.
349 */
350 prog_data->generate_local_id =
351 (nir->info.workgroup_size[0] > 1 ? WRITEMASK_X : 0) |
352 (nir->info.workgroup_size[1] > 1 ? WRITEMASK_XY : 0) |
353 (nir->info.workgroup_size[2] > 1 ? WRITEMASK_XYZ : 0);
354 }
355
356 nir_foreach_function_impl(impl, nir) {
357 state.impl = impl;
358 lower_cs_intrinsics_convert_impl(&state);
359 }
360
361 return state.progress;
362 }
363