1 /*
2 * Copyright © 2021 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <stdio.h>
25 #include <stdlib.h>
26
27 #include "intel_device_info.h"
28 #include "intel_hwconfig.h"
29 #include "intel_hwconfig_types.h"
30 #include "intel/common/intel_gem.h"
31 #include "i915/intel_device_info.h"
32 #include "xe/intel_device_info.h"
33
34 #include "util/log.h"
35
36 #ifdef NDEBUG
37 #define DEBUG_BUILD false
38 #else
39 #define DEBUG_BUILD true
40 #endif
41
42 struct hwconfig {
43 uint32_t key;
44 uint32_t len;
45 uint32_t val[];
46 };
47
48 static char *
key_to_name(uint32_t key)49 key_to_name(uint32_t key)
50 {
51 #define HANDLE(key_name) case key_name: return #key_name
52 switch (key) {
53 HANDLE(INTEL_HWCONFIG_MAX_SLICES_SUPPORTED);
54 HANDLE(INTEL_HWCONFIG_MAX_DUAL_SUBSLICES_SUPPORTED);
55 HANDLE(INTEL_HWCONFIG_MAX_NUM_EU_PER_DSS);
56 HANDLE(INTEL_HWCONFIG_NUM_PIXEL_PIPES);
57 HANDLE(INTEL_HWCONFIG_DEPRECATED_MAX_NUM_GEOMETRY_PIPES);
58 HANDLE(INTEL_HWCONFIG_DEPRECATED_L3_CACHE_SIZE_IN_KB);
59 HANDLE(INTEL_HWCONFIG_DEPRECATED_L3_BANK_COUNT);
60 HANDLE(INTEL_HWCONFIG_L3_CACHE_WAYS_SIZE_IN_BYTES);
61 HANDLE(INTEL_HWCONFIG_L3_CACHE_WAYS_PER_SECTOR);
62 HANDLE(INTEL_HWCONFIG_MAX_MEMORY_CHANNELS);
63 HANDLE(INTEL_HWCONFIG_MEMORY_TYPE);
64 HANDLE(INTEL_HWCONFIG_CACHE_TYPES);
65 HANDLE(INTEL_HWCONFIG_LOCAL_MEMORY_PAGE_SIZES_SUPPORTED);
66 HANDLE(INTEL_HWCONFIG_DEPRECATED_SLM_SIZE_IN_KB);
67 HANDLE(INTEL_HWCONFIG_NUM_THREADS_PER_EU);
68 HANDLE(INTEL_HWCONFIG_TOTAL_VS_THREADS);
69 HANDLE(INTEL_HWCONFIG_TOTAL_GS_THREADS);
70 HANDLE(INTEL_HWCONFIG_TOTAL_HS_THREADS);
71 HANDLE(INTEL_HWCONFIG_TOTAL_DS_THREADS);
72 HANDLE(INTEL_HWCONFIG_TOTAL_VS_THREADS_POCS);
73 HANDLE(INTEL_HWCONFIG_TOTAL_PS_THREADS);
74 HANDLE(INTEL_HWCONFIG_DEPRECATED_MAX_FILL_RATE);
75 HANDLE(INTEL_HWCONFIG_MAX_RCS);
76 HANDLE(INTEL_HWCONFIG_MAX_CCS);
77 HANDLE(INTEL_HWCONFIG_MAX_VCS);
78 HANDLE(INTEL_HWCONFIG_MAX_VECS);
79 HANDLE(INTEL_HWCONFIG_MAX_COPY_CS);
80 HANDLE(INTEL_HWCONFIG_DEPRECATED_URB_SIZE_IN_KB);
81 HANDLE(INTEL_HWCONFIG_MIN_VS_URB_ENTRIES);
82 HANDLE(INTEL_HWCONFIG_MAX_VS_URB_ENTRIES);
83 HANDLE(INTEL_HWCONFIG_MIN_PCS_URB_ENTRIES);
84 HANDLE(INTEL_HWCONFIG_MAX_PCS_URB_ENTRIES);
85 HANDLE(INTEL_HWCONFIG_MIN_HS_URB_ENTRIES);
86 HANDLE(INTEL_HWCONFIG_MAX_HS_URB_ENTRIES);
87 HANDLE(INTEL_HWCONFIG_MIN_GS_URB_ENTRIES);
88 HANDLE(INTEL_HWCONFIG_MAX_GS_URB_ENTRIES);
89 HANDLE(INTEL_HWCONFIG_MIN_DS_URB_ENTRIES);
90 HANDLE(INTEL_HWCONFIG_MAX_DS_URB_ENTRIES);
91 HANDLE(INTEL_HWCONFIG_PUSH_CONSTANT_URB_RESERVED_SIZE);
92 HANDLE(INTEL_HWCONFIG_POCS_PUSH_CONSTANT_URB_RESERVED_SIZE);
93 HANDLE(INTEL_HWCONFIG_URB_REGION_ALIGNMENT_SIZE_IN_BYTES);
94 HANDLE(INTEL_HWCONFIG_URB_ALLOCATION_SIZE_UNITS_IN_BYTES);
95 HANDLE(INTEL_HWCONFIG_MAX_URB_SIZE_CCS_IN_BYTES);
96 HANDLE(INTEL_HWCONFIG_VS_MIN_DEREF_BLOCK_SIZE_HANDLE_COUNT);
97 HANDLE(INTEL_HWCONFIG_DS_MIN_DEREF_BLOCK_SIZE_HANDLE_COUNT);
98 HANDLE(INTEL_HWCONFIG_NUM_RT_STACKS_PER_DSS);
99 HANDLE(INTEL_HWCONFIG_MAX_URB_STARTING_ADDRESS);
100 HANDLE(INTEL_HWCONFIG_MIN_CS_URB_ENTRIES);
101 HANDLE(INTEL_HWCONFIG_MAX_CS_URB_ENTRIES);
102 HANDLE(INTEL_HWCONFIG_L3_ALLOC_PER_BANK_URB);
103 HANDLE(INTEL_HWCONFIG_L3_ALLOC_PER_BANK_REST);
104 HANDLE(INTEL_HWCONFIG_L3_ALLOC_PER_BANK_DC);
105 HANDLE(INTEL_HWCONFIG_L3_ALLOC_PER_BANK_RO);
106 HANDLE(INTEL_HWCONFIG_L3_ALLOC_PER_BANK_Z);
107 HANDLE(INTEL_HWCONFIG_L3_ALLOC_PER_BANK_COLOR);
108 HANDLE(INTEL_HWCONFIG_L3_ALLOC_PER_BANK_UNIFIED_TILE_CACHE);
109 HANDLE(INTEL_HWCONFIG_L3_ALLOC_PER_BANK_COMMAND_BUFFER);
110 HANDLE(INTEL_HWCONFIG_L3_ALLOC_PER_BANK_RW);
111 HANDLE(INTEL_HWCONFIG_MAX_NUM_L3_CONFIGS);
112 HANDLE(INTEL_HWCONFIG_BINDLESS_SURFACE_OFFSET_BIT_COUNT);
113 HANDLE(INTEL_HWCONFIG_RESERVED_CCS_WAYS);
114 HANDLE(INTEL_HWCONFIG_CSR_SIZE_IN_MB);
115 HANDLE(INTEL_HWCONFIG_GEOMETRY_PIPES_PER_SLICE);
116 HANDLE(INTEL_HWCONFIG_L3_BANK_SIZE_IN_KB);
117 HANDLE(INTEL_HWCONFIG_SLM_SIZE_PER_DSS);
118 HANDLE(INTEL_HWCONFIG_MAX_PIXEL_FILL_RATE_PER_SLICE);
119 HANDLE(INTEL_HWCONFIG_MAX_PIXEL_FILL_RATE_PER_DSS);
120 HANDLE(INTEL_HWCONFIG_URB_SIZE_PER_SLICE_IN_KB);
121 HANDLE(INTEL_HWCONFIG_URB_SIZE_PER_L3_BANK_COUNT_IN_KB);
122 HANDLE(INTEL_HWCONFIG_MAX_SUBSLICE);
123 HANDLE(INTEL_HWCONFIG_MAX_EU_PER_SUBSLICE);
124 HANDLE(INTEL_HWCONFIG_RAMBO_L3_BANK_SIZE_IN_KB);
125 HANDLE(INTEL_HWCONFIG_SLM_SIZE_PER_SS_IN_KB);
126 #undef HANDLE
127 }
128 return "UNKNOWN_INTEL_HWCONFIG";
129 }
130
131 typedef void (*hwconfig_item_cb)(struct intel_device_info *devinfo,
132 const struct hwconfig *item);
133
134 static void
process_hwconfig_table(struct intel_device_info * devinfo,const struct hwconfig * hwconfig,int32_t hwconfig_len,hwconfig_item_cb item_callback_func)135 process_hwconfig_table(struct intel_device_info *devinfo,
136 const struct hwconfig *hwconfig,
137 int32_t hwconfig_len,
138 hwconfig_item_cb item_callback_func)
139 {
140 assert(hwconfig);
141 assert(hwconfig_len % 4 == 0);
142 const struct hwconfig *current = hwconfig;
143 const struct hwconfig *end =
144 (struct hwconfig*)(((uint32_t*)hwconfig) + (hwconfig_len / 4));
145 while (current < end) {
146 assert(current + 1 < end);
147 struct hwconfig *next =
148 (struct hwconfig*)((uint32_t*)current + 2 + current->len);
149 assert(next <= end);
150 item_callback_func(devinfo, current);
151 current = next;
152 }
153 assert(current == end);
154 }
155
156 /* If devinfo->apply_hwconfig is true, then we apply the hwconfig value.
157 *
158 * For debug builds, if devinfo->apply_hwconfig is false, we will compare the
159 * hwconfig value with the current value in the devinfo and log a warning
160 * message if they differ. This should help to make sure the values in our
161 * devinfo structures match what hwconfig is specified.
162 */
163 #define DEVINFO_HWCONFIG(F, V) \
164 do { \
165 if (devinfo->apply_hwconfig) \
166 devinfo->F = V; \
167 else if (DEBUG_BUILD && devinfo->F != (V)) \
168 mesa_logw("%s (%u) != devinfo->%s (%u)", \
169 key_to_name(item->key), (V), #F, \
170 devinfo->F); \
171 } while (0)
172
173 static void
apply_hwconfig_item(struct intel_device_info * devinfo,const struct hwconfig * item)174 apply_hwconfig_item(struct intel_device_info *devinfo,
175 const struct hwconfig *item)
176 {
177 switch (item->key) {
178 case INTEL_HWCONFIG_MAX_SLICES_SUPPORTED:
179 case INTEL_HWCONFIG_MAX_DUAL_SUBSLICES_SUPPORTED:
180 case INTEL_HWCONFIG_NUM_PIXEL_PIPES:
181 case INTEL_HWCONFIG_DEPRECATED_MAX_NUM_GEOMETRY_PIPES:
182 case INTEL_HWCONFIG_DEPRECATED_L3_CACHE_SIZE_IN_KB:
183 case INTEL_HWCONFIG_DEPRECATED_L3_BANK_COUNT:
184 case INTEL_HWCONFIG_L3_CACHE_WAYS_SIZE_IN_BYTES:
185 case INTEL_HWCONFIG_L3_CACHE_WAYS_PER_SECTOR:
186 case INTEL_HWCONFIG_MAX_MEMORY_CHANNELS:
187 case INTEL_HWCONFIG_MEMORY_TYPE:
188 case INTEL_HWCONFIG_CACHE_TYPES:
189 case INTEL_HWCONFIG_LOCAL_MEMORY_PAGE_SIZES_SUPPORTED:
190 case INTEL_HWCONFIG_DEPRECATED_SLM_SIZE_IN_KB:
191 break; /* ignore */
192 case INTEL_HWCONFIG_MAX_NUM_EU_PER_DSS:
193 DEVINFO_HWCONFIG(max_eus_per_subslice, item->val[0]);
194 break;
195 case INTEL_HWCONFIG_NUM_THREADS_PER_EU:
196 DEVINFO_HWCONFIG(num_thread_per_eu, item->val[0]);
197 break;
198 case INTEL_HWCONFIG_TOTAL_VS_THREADS:
199 DEVINFO_HWCONFIG(max_vs_threads, item->val[0]);
200 break;
201 case INTEL_HWCONFIG_TOTAL_GS_THREADS:
202 DEVINFO_HWCONFIG(max_gs_threads, item->val[0]);
203 break;
204 case INTEL_HWCONFIG_TOTAL_HS_THREADS:
205 DEVINFO_HWCONFIG(max_tcs_threads, item->val[0]);
206 break;
207 case INTEL_HWCONFIG_TOTAL_DS_THREADS:
208 DEVINFO_HWCONFIG(max_tes_threads, item->val[0]);
209 break;
210 case INTEL_HWCONFIG_TOTAL_VS_THREADS_POCS:
211 break; /* ignore */
212 case INTEL_HWCONFIG_TOTAL_PS_THREADS:
213 DEVINFO_HWCONFIG(max_threads_per_psd, item->val[0] / 2);
214 break;
215 case INTEL_HWCONFIG_URB_SIZE_PER_SLICE_IN_KB:
216 DEVINFO_HWCONFIG(urb.size, item->val[0]);
217 break;
218 case INTEL_HWCONFIG_DEPRECATED_MAX_FILL_RATE:
219 case INTEL_HWCONFIG_MAX_RCS:
220 case INTEL_HWCONFIG_MAX_CCS:
221 case INTEL_HWCONFIG_MAX_VCS:
222 case INTEL_HWCONFIG_MAX_VECS:
223 case INTEL_HWCONFIG_MAX_COPY_CS:
224 case INTEL_HWCONFIG_DEPRECATED_URB_SIZE_IN_KB:
225 case INTEL_HWCONFIG_MIN_VS_URB_ENTRIES:
226 case INTEL_HWCONFIG_MAX_VS_URB_ENTRIES:
227 case INTEL_HWCONFIG_MIN_PCS_URB_ENTRIES:
228 case INTEL_HWCONFIG_MAX_PCS_URB_ENTRIES:
229 case INTEL_HWCONFIG_MIN_HS_URB_ENTRIES:
230 case INTEL_HWCONFIG_MAX_HS_URB_ENTRIES:
231 case INTEL_HWCONFIG_MIN_GS_URB_ENTRIES:
232 case INTEL_HWCONFIG_MAX_GS_URB_ENTRIES:
233 case INTEL_HWCONFIG_MIN_DS_URB_ENTRIES:
234 case INTEL_HWCONFIG_MAX_DS_URB_ENTRIES:
235 case INTEL_HWCONFIG_PUSH_CONSTANT_URB_RESERVED_SIZE:
236 case INTEL_HWCONFIG_POCS_PUSH_CONSTANT_URB_RESERVED_SIZE:
237 case INTEL_HWCONFIG_URB_REGION_ALIGNMENT_SIZE_IN_BYTES:
238 case INTEL_HWCONFIG_URB_ALLOCATION_SIZE_UNITS_IN_BYTES:
239 case INTEL_HWCONFIG_MAX_URB_SIZE_CCS_IN_BYTES:
240 case INTEL_HWCONFIG_VS_MIN_DEREF_BLOCK_SIZE_HANDLE_COUNT:
241 case INTEL_HWCONFIG_DS_MIN_DEREF_BLOCK_SIZE_HANDLE_COUNT:
242 case INTEL_HWCONFIG_NUM_RT_STACKS_PER_DSS:
243 case INTEL_HWCONFIG_MAX_URB_STARTING_ADDRESS:
244 case INTEL_HWCONFIG_MIN_CS_URB_ENTRIES:
245 case INTEL_HWCONFIG_MAX_CS_URB_ENTRIES:
246 case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_URB:
247 case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_REST:
248 case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_DC:
249 case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_RO:
250 case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_Z:
251 case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_COLOR:
252 case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_UNIFIED_TILE_CACHE:
253 case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_COMMAND_BUFFER:
254 case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_RW:
255 case INTEL_HWCONFIG_MAX_NUM_L3_CONFIGS:
256 case INTEL_HWCONFIG_BINDLESS_SURFACE_OFFSET_BIT_COUNT:
257 case INTEL_HWCONFIG_RESERVED_CCS_WAYS:
258 case INTEL_HWCONFIG_CSR_SIZE_IN_MB:
259 case INTEL_HWCONFIG_GEOMETRY_PIPES_PER_SLICE:
260 case INTEL_HWCONFIG_L3_BANK_SIZE_IN_KB:
261 case INTEL_HWCONFIG_SLM_SIZE_PER_DSS:
262 case INTEL_HWCONFIG_MAX_PIXEL_FILL_RATE_PER_SLICE:
263 case INTEL_HWCONFIG_MAX_PIXEL_FILL_RATE_PER_DSS:
264 case INTEL_HWCONFIG_URB_SIZE_PER_L3_BANK_COUNT_IN_KB:
265 case INTEL_HWCONFIG_MAX_SUBSLICE:
266 case INTEL_HWCONFIG_MAX_EU_PER_SUBSLICE:
267 case INTEL_HWCONFIG_RAMBO_L3_BANK_SIZE_IN_KB:
268 case INTEL_HWCONFIG_SLM_SIZE_PER_SS_IN_KB:
269 default:
270 break; /* ignore */
271 }
272 }
273
274 bool
intel_hwconfig_process_table(struct intel_device_info * devinfo,void * data,int32_t len)275 intel_hwconfig_process_table(struct intel_device_info *devinfo,
276 void *data, int32_t len)
277 {
278 process_hwconfig_table(devinfo, data, len, apply_hwconfig_item);
279
280 return devinfo->apply_hwconfig;
281 }
282
283 static void
print_hwconfig_item(struct intel_device_info * devinfo,const struct hwconfig * item)284 print_hwconfig_item(struct intel_device_info *devinfo,
285 const struct hwconfig *item)
286 {
287 printf("%s: ", key_to_name(item->key));
288 for (int i = 0; i < item->len; i++)
289 printf(i ? ", 0x%x (%d)" : "0x%x (%d)", item->val[i],
290 item->val[i]);
291 printf("\n");
292 }
293
294 static void
intel_print_hwconfig_table(const struct hwconfig * hwconfig,int32_t hwconfig_len)295 intel_print_hwconfig_table(const struct hwconfig *hwconfig,
296 int32_t hwconfig_len)
297 {
298 process_hwconfig_table(NULL, hwconfig, hwconfig_len, print_hwconfig_item);
299 }
300
301 void
intel_get_and_print_hwconfig_table(int fd,struct intel_device_info * devinfo)302 intel_get_and_print_hwconfig_table(int fd, struct intel_device_info *devinfo)
303 {
304 struct hwconfig *hwconfig;
305 int32_t hwconfig_len = 0;
306
307 switch (devinfo->kmd_type) {
308 case INTEL_KMD_TYPE_I915:
309 hwconfig = intel_device_info_i915_query_hwconfig(fd, &hwconfig_len);
310 break;
311 case INTEL_KMD_TYPE_XE:
312 hwconfig = intel_device_info_xe_query_hwconfig(fd, &hwconfig_len);
313 break;
314 default:
315 unreachable("unknown kmd type");
316 break;
317 }
318
319 if (hwconfig) {
320 intel_print_hwconfig_table(hwconfig, hwconfig_len);
321 free(hwconfig);
322 }
323 }
324