1 /*
2 * Copyright 2017 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25 #include <stdlib.h>
26
27 #include "drm-uapi/drm_fourcc.h"
28 #include "drm-uapi/i915_drm.h"
29
30 #include "isl.h"
31 #include "dev/intel_device_info.h"
32 #include "dev/intel_debug.h"
33
34 uint32_t
isl_tiling_to_i915_tiling(enum isl_tiling tiling)35 isl_tiling_to_i915_tiling(enum isl_tiling tiling)
36 {
37 switch (tiling) {
38 case ISL_TILING_LINEAR:
39 return I915_TILING_NONE;
40
41 case ISL_TILING_X:
42 return I915_TILING_X;
43
44 case ISL_TILING_Y0:
45 case ISL_TILING_HIZ:
46 case ISL_TILING_CCS:
47 return I915_TILING_Y;
48
49 case ISL_TILING_W:
50 case ISL_TILING_SKL_Yf:
51 case ISL_TILING_SKL_Ys:
52 case ISL_TILING_ICL_Yf:
53 case ISL_TILING_ICL_Ys:
54 case ISL_TILING_4:
55 case ISL_TILING_64:
56 case ISL_TILING_64_XE2:
57 case ISL_TILING_GFX12_CCS:
58 return I915_TILING_NONE;
59 }
60
61 unreachable("Invalid ISL tiling");
62 }
63
64 enum isl_tiling
isl_tiling_from_i915_tiling(uint32_t tiling)65 isl_tiling_from_i915_tiling(uint32_t tiling)
66 {
67 switch (tiling) {
68 case I915_TILING_NONE:
69 return ISL_TILING_LINEAR;
70
71 case I915_TILING_X:
72 return ISL_TILING_X;
73
74 case I915_TILING_Y:
75 return ISL_TILING_Y0;
76 }
77
78 unreachable("Invalid i915 tiling");
79 }
80
81 /** Sentinel is DRM_FORMAT_MOD_INVALID. */
82 const struct isl_drm_modifier_info
83 isl_drm_modifier_info_list[] = {
84 {
85 .modifier = DRM_FORMAT_MOD_NONE,
86 .name = "DRM_FORMAT_MOD_NONE",
87 .tiling = ISL_TILING_LINEAR,
88 },
89 {
90 .modifier = I915_FORMAT_MOD_X_TILED,
91 .name = "I915_FORMAT_MOD_X_TILED",
92 .tiling = ISL_TILING_X,
93 },
94 {
95 .modifier = I915_FORMAT_MOD_Y_TILED,
96 .name = "I915_FORMAT_MOD_Y_TILED",
97 .tiling = ISL_TILING_Y0,
98 },
99 {
100 .modifier = I915_FORMAT_MOD_Y_TILED_CCS,
101 .name = "I915_FORMAT_MOD_Y_TILED_CCS",
102 .tiling = ISL_TILING_Y0,
103 .supports_render_compression = true,
104 .supports_clear_color = false,
105 },
106 {
107 .modifier = I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS,
108 .name = "I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS",
109 .tiling = ISL_TILING_Y0,
110 .supports_render_compression = true,
111 .supports_clear_color = false,
112 },
113 {
114 .modifier = I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS,
115 .name = "I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS",
116 .tiling = ISL_TILING_Y0,
117 .supports_media_compression = true,
118 .supports_clear_color = false,
119 },
120 {
121 .modifier = I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC,
122 .name = "I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC",
123 .tiling = ISL_TILING_Y0,
124 .supports_render_compression = true,
125 .supports_clear_color = true,
126 },
127 {
128 .modifier = I915_FORMAT_MOD_4_TILED,
129 .name = "I915_FORMAT_MOD_4_TILED",
130 .tiling = ISL_TILING_4,
131 },
132 {
133 .modifier = I915_FORMAT_MOD_4_TILED_DG2_RC_CCS,
134 .name = "I915_FORMAT_MOD_4_TILED_DG2_RC_CCS",
135 .tiling = ISL_TILING_4,
136 .supports_render_compression = true,
137 .supports_clear_color = false,
138 },
139 {
140 .modifier = I915_FORMAT_MOD_4_TILED_DG2_MC_CCS,
141 .name = "I915_FORMAT_MOD_4_TILED_DG2_MC_CCS",
142 .tiling = ISL_TILING_4,
143 .supports_media_compression = true,
144 .supports_clear_color = false,
145 },
146 {
147 .modifier = I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC,
148 .name = "I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC",
149 .tiling = ISL_TILING_4,
150 .supports_render_compression = true,
151 .supports_clear_color = true,
152 },
153 {
154 .modifier = I915_FORMAT_MOD_4_TILED_MTL_RC_CCS,
155 .name = "I915_FORMAT_MOD_4_TILED_MTL_RC_CCS",
156 .tiling = ISL_TILING_4,
157 .supports_render_compression = true,
158 .supports_clear_color = false,
159 },
160 {
161 .modifier = I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC,
162 .name = "I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC",
163 .tiling = ISL_TILING_4,
164 .supports_render_compression = true,
165 .supports_clear_color = true,
166 },
167 {
168 .modifier = I915_FORMAT_MOD_4_TILED_MTL_MC_CCS,
169 .name = "I915_FORMAT_MOD_4_TILED_MTL_MC_CCS",
170 .tiling = ISL_TILING_4,
171 .supports_media_compression = true,
172 .supports_clear_color = false,
173 },
174 {
175 .modifier = DRM_FORMAT_MOD_INVALID,
176 },
177 };
178
179 const struct isl_drm_modifier_info *
isl_drm_modifier_get_info(uint64_t modifier)180 isl_drm_modifier_get_info(uint64_t modifier)
181 {
182 isl_drm_modifier_info_for_each(info) {
183 if (info->modifier == modifier)
184 return info;
185 }
186
187 return NULL;
188 }
189
190 uint32_t
isl_drm_modifier_get_score(const struct intel_device_info * devinfo,uint64_t modifier)191 isl_drm_modifier_get_score(const struct intel_device_info *devinfo,
192 uint64_t modifier)
193 {
194 /* We want to know the absence of the debug environment variable
195 * and don't want to provide a default value either, so we don't
196 * use debug_get_num_option() here.
197 */
198 const char *mod_str = getenv("INTEL_MODIFIER_OVERRIDE");
199 if (mod_str != NULL) {
200 return modifier == strtoul(mod_str, NULL, 0);
201 }
202 /* FINISHME: Add gfx12 modifiers */
203 switch (modifier) {
204 default:
205 return 0;
206 case DRM_FORMAT_MOD_LINEAR:
207 return 1;
208 case I915_FORMAT_MOD_X_TILED:
209 return 2;
210 case I915_FORMAT_MOD_Y_TILED:
211 /* Gfx12.5 doesn't have Y-tiling. */
212 if (devinfo->verx10 >= 125)
213 return 0;
214
215 return 3;
216 case I915_FORMAT_MOD_Y_TILED_CCS:
217 /* Not supported before Gfx9 and also Gfx12's CCS layout differs from
218 * Gfx9-11.
219 */
220 if (devinfo->ver <= 8 || devinfo->ver >= 12)
221 return 0;
222
223 if (INTEL_DEBUG(DEBUG_NO_CCS))
224 return 0;
225
226 return 4;
227 case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
228 if (devinfo->verx10 != 120)
229 return 0;
230
231 if (INTEL_DEBUG(DEBUG_NO_CCS))
232 return 0;
233
234 return 4;
235 case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC:
236 if (devinfo->verx10 != 120)
237 return 0;
238
239 if (INTEL_DEBUG(DEBUG_NO_CCS) || INTEL_DEBUG(DEBUG_NO_FAST_CLEAR))
240 return 0;
241
242 return 5;
243 case I915_FORMAT_MOD_4_TILED:
244 /* Gfx12.5 introduces Tile4. */
245 if (devinfo->verx10 < 125)
246 return 0;
247
248 return 3;
249 case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS:
250 if (!intel_device_info_is_dg2(devinfo))
251 return 0;
252
253 if (INTEL_DEBUG(DEBUG_NO_CCS))
254 return 0;
255
256 return 4;
257 case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC:
258 if (!intel_device_info_is_dg2(devinfo))
259 return 0;
260
261 if (INTEL_DEBUG(DEBUG_NO_CCS) || INTEL_DEBUG(DEBUG_NO_FAST_CLEAR))
262 return 0;
263
264 return 5;
265 case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS:
266 if (!intel_device_info_is_mtl_or_arl(devinfo))
267 return 0;
268
269 if (INTEL_DEBUG(DEBUG_NO_CCS))
270 return 0;
271
272 return 4;
273 case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC:
274 if (!intel_device_info_is_mtl_or_arl(devinfo))
275 return 0;
276
277 if (INTEL_DEBUG(DEBUG_NO_CCS) || INTEL_DEBUG(DEBUG_NO_FAST_CLEAR))
278 return 0;
279
280 return 5;
281 }
282 }
283
284 uint32_t
isl_drm_modifier_get_plane_count(const struct intel_device_info * devinfo,uint64_t modifier,uint32_t fmt_planes)285 isl_drm_modifier_get_plane_count(const struct intel_device_info *devinfo,
286 uint64_t modifier,
287 uint32_t fmt_planes)
288 {
289 /* This function could return the wrong value if the modifier is not
290 * supported by the device.
291 */
292 assert(isl_drm_modifier_get_score(devinfo, modifier) > 0);
293
294 /* Planar images don't support clear color. */
295 if (isl_drm_modifier_get_info(modifier)->supports_clear_color)
296 assert(fmt_planes == 1);
297
298 if (devinfo->has_flat_ccs) {
299 if (isl_drm_modifier_get_info(modifier)->supports_clear_color)
300 return 2 * fmt_planes;
301 else
302 return 1 * fmt_planes;
303 } else {
304 if (isl_drm_modifier_get_info(modifier)->supports_clear_color)
305 return 3 * fmt_planes;
306 else if (isl_drm_modifier_has_aux(modifier))
307 return 2 * fmt_planes;
308 else
309 return 1 * fmt_planes;
310 }
311 }
312