1 /*
2 * Copyright © 2022 Collabora Ltd. and Red Hat Inc.
3 * SPDX-License-Identifier: MIT
4 */
5 #include "nvk_mme.h"
6
7 #include "nvk_private.h"
8
9 static const nvk_mme_builder_func mme_builders[NVK_MME_COUNT] = {
10 [NVK_MME_BIND_CBUF_DESC] = nvk_mme_bind_cbuf_desc,
11 [NVK_MME_CLEAR] = nvk_mme_clear,
12 [NVK_MME_DRAW] = nvk_mme_draw,
13 [NVK_MME_DRAW_INDEXED] = nvk_mme_draw_indexed,
14 [NVK_MME_DRAW_INDIRECT] = nvk_mme_draw_indirect,
15 [NVK_MME_DRAW_INDEXED_INDIRECT] = nvk_mme_draw_indexed_indirect,
16 [NVK_MME_DRAW_INDIRECT_COUNT] = nvk_mme_draw_indirect_count,
17 [NVK_MME_DRAW_INDEXED_INDIRECT_COUNT] = nvk_mme_draw_indexed_indirect_count,
18 [NVK_MME_ADD_CS_INVOCATIONS] = nvk_mme_add_cs_invocations,
19 [NVK_MME_DISPATCH_INDIRECT] = nvk_mme_dispatch_indirect,
20 [NVK_MME_WRITE_CS_INVOCATIONS] = nvk_mme_write_cs_invocations,
21 [NVK_MME_COPY_QUERIES] = nvk_mme_copy_queries,
22 [NVK_MME_XFB_COUNTER_LOAD] = nvk_mme_xfb_counter_load,
23 [NVK_MME_XFB_DRAW_INDIRECT] = nvk_mme_xfb_draw_indirect,
24 [NVK_MME_SET_PRIV_REG] = nvk_mme_set_priv_reg,
25 [NVK_MME_SET_WRITE_MASK] = nvk_mme_set_write_mask,
26 };
27
28 uint32_t *
nvk_build_mme(const struct nv_device_info * devinfo,enum nvk_mme mme,size_t * size_out)29 nvk_build_mme(const struct nv_device_info *devinfo,
30 enum nvk_mme mme, size_t *size_out)
31 {
32 struct mme_builder b;
33 mme_builder_init(&b, devinfo);
34
35 mme_builders[mme](&b);
36
37 return mme_builder_finish(&b, size_out);
38 }
39
40 void
nvk_test_build_all_mmes(const struct nv_device_info * devinfo)41 nvk_test_build_all_mmes(const struct nv_device_info *devinfo)
42 {
43 for (uint32_t mme = 0; mme < NVK_MME_COUNT; mme++) {
44 size_t size;
45 uint32_t *dw = nvk_build_mme(devinfo, mme, &size);
46 assert(dw != NULL);
47 free(dw);
48 }
49 }
50