1 /*
2 * Copyright (C) 2019 Collabora, Ltd.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
25 */
26
27 #include "kmod/pan_kmod.h"
28 #include "panfrost/util/pan_ir.h"
29 #include "pan_props.h"
30
31 #include <genxml/gen_macros.h>
32
33 /* Fixed "minimum revisions" */
34 #define NO_ANISO (~0)
35 #define HAS_ANISO (0)
36
37 #define MODEL(gpu_id_, shortname, counters_, min_rev_anisotropic_, tib_size_, \
38 quirks_) \
39 { \
40 .gpu_id = gpu_id_, .name = "Mali-" shortname " (Panfrost)", \
41 .performance_counters = counters_, \
42 .min_rev_anisotropic = min_rev_anisotropic_, \
43 .tilebuffer_size = tib_size_, .quirks = quirks_, \
44 }
45
46 /* Table of supported Mali GPUs */
47 /* clang-format off */
48 const struct panfrost_model panfrost_model_list[] = {
49 MODEL(0x620, "T620", "T62x", NO_ANISO, 8192, {}),
50 MODEL(0x720, "T720", "T72x", NO_ANISO, 8192, { .no_hierarchical_tiling = true }),
51 MODEL(0x750, "T760", "T76x", NO_ANISO, 8192, {}),
52 MODEL(0x820, "T820", "T82x", NO_ANISO, 8192, { .no_hierarchical_tiling = true }),
53 MODEL(0x830, "T830", "T83x", NO_ANISO, 8192, { .no_hierarchical_tiling = true }),
54 MODEL(0x860, "T860", "T86x", NO_ANISO, 8192, {}),
55 MODEL(0x880, "T880", "T88x", NO_ANISO, 8192, {}),
56
57 MODEL(0x6000, "G71", "TMIx", NO_ANISO, 8192, {}),
58 MODEL(0x6221, "G72", "THEx", 0x0030 /* r0p3 */, 16384, {}),
59 MODEL(0x7090, "G51", "TSIx", 0x1010 /* r1p1 */, 16384, {}),
60 MODEL(0x7093, "G31", "TDVx", HAS_ANISO, 16384, {}),
61 MODEL(0x7211, "G76", "TNOx", HAS_ANISO, 16384, {}),
62 MODEL(0x7212, "G52", "TGOx", HAS_ANISO, 16384, {}),
63 MODEL(0x7402, "G52 r1", "TGOx", HAS_ANISO, 16384, {}),
64 MODEL(0x9091, "G57", "TNAx", HAS_ANISO, 16384, {}),
65 MODEL(0x9093, "G57", "TNAx", HAS_ANISO, 16384, {}),
66 };
67 /* clang-format on */
68
69 #undef NO_ANISO
70 #undef HAS_ANISO
71 #undef MODEL
72
73 /*
74 * Look up a supported model by its GPU ID, or return NULL if the model is not
75 * supported at this time.
76 */
77 const struct panfrost_model *
panfrost_get_model(uint32_t gpu_id)78 panfrost_get_model(uint32_t gpu_id)
79 {
80 for (unsigned i = 0; i < ARRAY_SIZE(panfrost_model_list); ++i) {
81 if (panfrost_model_list[i].gpu_id == gpu_id)
82 return &panfrost_model_list[i];
83 }
84
85 return NULL;
86 }
87
88 unsigned
panfrost_query_l2_slices(const struct pan_kmod_dev_props * props)89 panfrost_query_l2_slices(const struct pan_kmod_dev_props *props)
90 {
91 /* L2_SLICES is MEM_FEATURES[11:8] minus(1) */
92 return ((props->mem_features >> 8) & 0xF) + 1;
93 }
94
95 struct panfrost_tiler_features
panfrost_query_tiler_features(const struct pan_kmod_dev_props * props)96 panfrost_query_tiler_features(const struct pan_kmod_dev_props *props)
97 {
98 /* Default value (2^9 bytes and 8 levels) to match old behaviour */
99 uint32_t raw = props->tiler_features;
100
101 /* Bin size is log2 in the first byte, max levels in the second byte */
102 return (struct panfrost_tiler_features){
103 .bin_size = (1 << (raw & BITFIELD_MASK(5))),
104 .max_levels = (raw >> 8) & BITFIELD_MASK(4),
105 };
106 }
107
108 unsigned
panfrost_query_core_count(const struct pan_kmod_dev_props * props,unsigned * core_id_range)109 panfrost_query_core_count(const struct pan_kmod_dev_props *props,
110 unsigned *core_id_range)
111 {
112 /* On older kernels, worst-case to 16 cores */
113
114 unsigned mask = props->shader_present;
115
116 /* Some cores might be absent. In some cases, we care
117 * about the range of core IDs (that is, the greatest core ID + 1). If
118 * the core mask is contiguous, this equals the core count.
119 */
120 *core_id_range = util_last_bit(mask);
121
122 /* The actual core count skips overs the gaps */
123 return util_bitcount(mask);
124 }
125
126 unsigned
panfrost_query_thread_tls_alloc(const struct pan_kmod_dev_props * props)127 panfrost_query_thread_tls_alloc(const struct pan_kmod_dev_props *props)
128 {
129 unsigned tls = props->thread_tls_alloc;
130
131 return (tls > 0)
132 ? tls
133 : panfrost_max_thread_count(pan_arch(props->gpu_prod_id), 0);
134 }
135
136 uint32_t
panfrost_query_compressed_formats(const struct pan_kmod_dev_props * props)137 panfrost_query_compressed_formats(const struct pan_kmod_dev_props *props)
138 {
139 return props->texture_features[0];
140 }
141
142 /* Check for AFBC hardware support. AFBC is introduced in v5. Implementations
143 * may omit it, signaled as a nonzero value in the AFBC_FEATURES property. */
144
145 bool
panfrost_query_afbc(const struct pan_kmod_dev_props * props)146 panfrost_query_afbc(const struct pan_kmod_dev_props *props)
147 {
148 unsigned reg = props->afbc_features;
149
150 return (pan_arch(props->gpu_prod_id) >= 5) && (reg == 0);
151 }
152
153 /*
154 * To pipeline multiple tiles, a given tile may use at most half of the tile
155 * buffer. This function returns the optimal size (assuming pipelining).
156 *
157 * For Mali-G510 and Mali-G310, we will need extra logic to query the tilebuffer
158 * size for the particular variant. The CORE_FEATURES register might help.
159 */
160 unsigned
panfrost_query_optimal_tib_size(const struct panfrost_model * model)161 panfrost_query_optimal_tib_size(const struct panfrost_model *model)
162 {
163 /* Preconditions ensure the returned value is a multiple of 1 KiB, the
164 * granularity of the colour buffer allocation field.
165 */
166 assert(model->tilebuffer_size >= 2048);
167 assert(util_is_power_of_two_nonzero(model->tilebuffer_size));
168
169 return model->tilebuffer_size / 2;
170 }
171
172 uint64_t
panfrost_clamp_to_usable_va_range(const struct pan_kmod_dev * dev,uint64_t va)173 panfrost_clamp_to_usable_va_range(const struct pan_kmod_dev *dev, uint64_t va)
174 {
175 struct pan_kmod_va_range user_va_range =
176 pan_kmod_dev_query_user_va_range(dev);
177
178 if (va < user_va_range.start)
179 return user_va_range.start;
180 else if (va > user_va_range.start + user_va_range.size)
181 return user_va_range.start + user_va_range.size;
182
183 return va;
184 }
185