1 /*
2 * AES-NI support functions
3 *
4 * Copyright The Mbed TLS Contributors
5 * SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
6 */
7
8 /*
9 * [AES-WP] https://www.intel.com/content/www/us/en/developer/articles/tool/intel-advanced-encryption-standard-aes-instructions-set.html
10 * [CLMUL-WP] https://www.intel.com/content/www/us/en/develop/download/intel-carry-less-multiplication-instruction-and-its-usage-for-computing-the-gcm-mode.html
11 */
12
13 #include "common.h"
14
15 #if defined(MBEDTLS_AESNI_C)
16
17 #include "mbedtls/aesni.h"
18
19 #include <string.h>
20
21 /* *INDENT-OFF* */
22 #ifndef asm
23 #define asm __asm
24 #endif
25 /* *INDENT-ON* */
26
27 #if defined(MBEDTLS_AESNI_HAVE_CODE)
28
29 #if MBEDTLS_AESNI_HAVE_CODE == 2
30 #if !defined(_WIN32)
31 #include <cpuid.h>
32 #else
33 #include <intrin.h>
34 #endif
35 #include <immintrin.h>
36 #endif
37
38 /*
39 * AES-NI support detection routine
40 */
mbedtls_aesni_has_support(unsigned int what)41 int mbedtls_aesni_has_support(unsigned int what)
42 {
43 static int done = 0;
44 static unsigned int c = 0;
45
46 if (!done) {
47 #if MBEDTLS_AESNI_HAVE_CODE == 2
48 static unsigned info[4] = { 0, 0, 0, 0 };
49 #if defined(_MSC_VER)
50 __cpuid(info, 1);
51 #else
52 __cpuid(1, info[0], info[1], info[2], info[3]);
53 #endif
54 c = info[2];
55 #else /* AESNI using asm */
56 asm ("movl $1, %%eax \n\t"
57 "cpuid \n\t"
58 : "=c" (c)
59 :
60 : "eax", "ebx", "edx");
61 #endif /* MBEDTLS_AESNI_HAVE_CODE */
62 done = 1;
63 }
64
65 return (c & what) != 0;
66 }
67
68 #if MBEDTLS_AESNI_HAVE_CODE == 2
69
70 /*
71 * AES-NI AES-ECB block en(de)cryption
72 */
mbedtls_aesni_crypt_ecb(mbedtls_aes_context * ctx,int mode,const unsigned char input[16],unsigned char output[16])73 int mbedtls_aesni_crypt_ecb(mbedtls_aes_context *ctx,
74 int mode,
75 const unsigned char input[16],
76 unsigned char output[16])
77 {
78 const __m128i *rk = (const __m128i *) (ctx->rk);
79 unsigned nr = ctx->nr; // Number of remaining rounds
80
81 // Load round key 0
82 __m128i state;
83 memcpy(&state, input, 16);
84 state = _mm_xor_si128(state, rk[0]); // state ^= *rk;
85 ++rk;
86 --nr;
87
88 if (mode == 0) {
89 while (nr != 0) {
90 state = _mm_aesdec_si128(state, *rk);
91 ++rk;
92 --nr;
93 }
94 state = _mm_aesdeclast_si128(state, *rk);
95 } else {
96 while (nr != 0) {
97 state = _mm_aesenc_si128(state, *rk);
98 ++rk;
99 --nr;
100 }
101 state = _mm_aesenclast_si128(state, *rk);
102 }
103
104 memcpy(output, &state, 16);
105 return 0;
106 }
107
108 /*
109 * GCM multiplication: c = a times b in GF(2^128)
110 * Based on [CLMUL-WP] algorithms 1 (with equation 27) and 5.
111 */
112
gcm_clmul(const __m128i aa,const __m128i bb,__m128i * cc,__m128i * dd)113 static void gcm_clmul(const __m128i aa, const __m128i bb,
114 __m128i *cc, __m128i *dd)
115 {
116 /*
117 * Caryless multiplication dd:cc = aa * bb
118 * using [CLMUL-WP] algorithm 1 (p. 12).
119 */
120 *cc = _mm_clmulepi64_si128(aa, bb, 0x00); // a0*b0 = c1:c0
121 *dd = _mm_clmulepi64_si128(aa, bb, 0x11); // a1*b1 = d1:d0
122 __m128i ee = _mm_clmulepi64_si128(aa, bb, 0x10); // a0*b1 = e1:e0
123 __m128i ff = _mm_clmulepi64_si128(aa, bb, 0x01); // a1*b0 = f1:f0
124 ff = _mm_xor_si128(ff, ee); // e1+f1:e0+f0
125 ee = ff; // e1+f1:e0+f0
126 ff = _mm_srli_si128(ff, 8); // 0:e1+f1
127 ee = _mm_slli_si128(ee, 8); // e0+f0:0
128 *dd = _mm_xor_si128(*dd, ff); // d1:d0+e1+f1
129 *cc = _mm_xor_si128(*cc, ee); // c1+e0+f0:c0
130 }
131
gcm_shift(__m128i * cc,__m128i * dd)132 static void gcm_shift(__m128i *cc, __m128i *dd)
133 {
134 /* [CMUCL-WP] Algorithm 5 Step 1: shift cc:dd one bit to the left,
135 * taking advantage of [CLMUL-WP] eq 27 (p. 18). */
136 // // *cc = r1:r0
137 // // *dd = r3:r2
138 __m128i cc_lo = _mm_slli_epi64(*cc, 1); // r1<<1:r0<<1
139 __m128i dd_lo = _mm_slli_epi64(*dd, 1); // r3<<1:r2<<1
140 __m128i cc_hi = _mm_srli_epi64(*cc, 63); // r1>>63:r0>>63
141 __m128i dd_hi = _mm_srli_epi64(*dd, 63); // r3>>63:r2>>63
142 __m128i xmm5 = _mm_srli_si128(cc_hi, 8); // 0:r1>>63
143 cc_hi = _mm_slli_si128(cc_hi, 8); // r0>>63:0
144 dd_hi = _mm_slli_si128(dd_hi, 8); // 0:r1>>63
145
146 *cc = _mm_or_si128(cc_lo, cc_hi); // r1<<1|r0>>63:r0<<1
147 *dd = _mm_or_si128(_mm_or_si128(dd_lo, dd_hi), xmm5); // r3<<1|r2>>62:r2<<1|r1>>63
148 }
149
gcm_reduce(__m128i xx)150 static __m128i gcm_reduce(__m128i xx)
151 {
152 // // xx = x1:x0
153 /* [CLMUL-WP] Algorithm 5 Step 2 */
154 __m128i aa = _mm_slli_epi64(xx, 63); // x1<<63:x0<<63 = stuff:a
155 __m128i bb = _mm_slli_epi64(xx, 62); // x1<<62:x0<<62 = stuff:b
156 __m128i cc = _mm_slli_epi64(xx, 57); // x1<<57:x0<<57 = stuff:c
157 __m128i dd = _mm_slli_si128(_mm_xor_si128(_mm_xor_si128(aa, bb), cc), 8); // a+b+c:0
158 return _mm_xor_si128(dd, xx); // x1+a+b+c:x0 = d:x0
159 }
160
gcm_mix(__m128i dx)161 static __m128i gcm_mix(__m128i dx)
162 {
163 /* [CLMUL-WP] Algorithm 5 Steps 3 and 4 */
164 __m128i ee = _mm_srli_epi64(dx, 1); // e1:x0>>1 = e1:e0'
165 __m128i ff = _mm_srli_epi64(dx, 2); // f1:x0>>2 = f1:f0'
166 __m128i gg = _mm_srli_epi64(dx, 7); // g1:x0>>7 = g1:g0'
167
168 // e0'+f0'+g0' is almost e0+f0+g0, except for some missing
169 // bits carried from d. Now get those bits back in.
170 __m128i eh = _mm_slli_epi64(dx, 63); // d<<63:stuff
171 __m128i fh = _mm_slli_epi64(dx, 62); // d<<62:stuff
172 __m128i gh = _mm_slli_epi64(dx, 57); // d<<57:stuff
173 __m128i hh = _mm_srli_si128(_mm_xor_si128(_mm_xor_si128(eh, fh), gh), 8); // 0:missing bits of d
174
175 return _mm_xor_si128(_mm_xor_si128(_mm_xor_si128(_mm_xor_si128(ee, ff), gg), hh), dx);
176 }
177
mbedtls_aesni_gcm_mult(unsigned char c[16],const unsigned char a[16],const unsigned char b[16])178 void mbedtls_aesni_gcm_mult(unsigned char c[16],
179 const unsigned char a[16],
180 const unsigned char b[16])
181 {
182 __m128i aa, bb, cc, dd;
183
184 /* The inputs are in big-endian order, so byte-reverse them */
185 for (size_t i = 0; i < 16; i++) {
186 ((uint8_t *) &aa)[i] = a[15 - i];
187 ((uint8_t *) &bb)[i] = b[15 - i];
188 }
189
190 gcm_clmul(aa, bb, &cc, &dd);
191 gcm_shift(&cc, &dd);
192 /*
193 * Now reduce modulo the GCM polynomial x^128 + x^7 + x^2 + x + 1
194 * using [CLMUL-WP] algorithm 5 (p. 18).
195 * Currently dd:cc holds x3:x2:x1:x0 (already shifted).
196 */
197 __m128i dx = gcm_reduce(cc);
198 __m128i xh = gcm_mix(dx);
199 cc = _mm_xor_si128(xh, dd); // x3+h1:x2+h0
200
201 /* Now byte-reverse the outputs */
202 for (size_t i = 0; i < 16; i++) {
203 c[i] = ((uint8_t *) &cc)[15 - i];
204 }
205
206 return;
207 }
208
209 /*
210 * Compute decryption round keys from encryption round keys
211 */
mbedtls_aesni_inverse_key(unsigned char * invkey,const unsigned char * fwdkey,int nr)212 void mbedtls_aesni_inverse_key(unsigned char *invkey,
213 const unsigned char *fwdkey, int nr)
214 {
215 __m128i *ik = (__m128i *) invkey;
216 const __m128i *fk = (const __m128i *) fwdkey + nr;
217
218 *ik = *fk;
219 for (--fk, ++ik; fk > (const __m128i *) fwdkey; --fk, ++ik) {
220 *ik = _mm_aesimc_si128(*fk);
221 }
222 *ik = *fk;
223 }
224
225 /*
226 * Key expansion, 128-bit case
227 */
aesni_set_rk_128(__m128i state,__m128i xword)228 static __m128i aesni_set_rk_128(__m128i state, __m128i xword)
229 {
230 /*
231 * Finish generating the next round key.
232 *
233 * On entry state is r3:r2:r1:r0 and xword is X:stuff:stuff:stuff
234 * with X = rot( sub( r3 ) ) ^ RCON (obtained with AESKEYGENASSIST).
235 *
236 * On exit, xword is r7:r6:r5:r4
237 * with r4 = X + r0, r5 = r4 + r1, r6 = r5 + r2, r7 = r6 + r3
238 * and this is returned, to be written to the round key buffer.
239 */
240 xword = _mm_shuffle_epi32(xword, 0xff); // X:X:X:X
241 xword = _mm_xor_si128(xword, state); // X+r3:X+r2:X+r1:r4
242 state = _mm_slli_si128(state, 4); // r2:r1:r0:0
243 xword = _mm_xor_si128(xword, state); // X+r3+r2:X+r2+r1:r5:r4
244 state = _mm_slli_si128(state, 4); // r1:r0:0:0
245 xword = _mm_xor_si128(xword, state); // X+r3+r2+r1:r6:r5:r4
246 state = _mm_slli_si128(state, 4); // r0:0:0:0
247 state = _mm_xor_si128(xword, state); // r7:r6:r5:r4
248 return state;
249 }
250
aesni_setkey_enc_128(unsigned char * rk_bytes,const unsigned char * key)251 static void aesni_setkey_enc_128(unsigned char *rk_bytes,
252 const unsigned char *key)
253 {
254 __m128i *rk = (__m128i *) rk_bytes;
255
256 memcpy(&rk[0], key, 16);
257 rk[1] = aesni_set_rk_128(rk[0], _mm_aeskeygenassist_si128(rk[0], 0x01));
258 rk[2] = aesni_set_rk_128(rk[1], _mm_aeskeygenassist_si128(rk[1], 0x02));
259 rk[3] = aesni_set_rk_128(rk[2], _mm_aeskeygenassist_si128(rk[2], 0x04));
260 rk[4] = aesni_set_rk_128(rk[3], _mm_aeskeygenassist_si128(rk[3], 0x08));
261 rk[5] = aesni_set_rk_128(rk[4], _mm_aeskeygenassist_si128(rk[4], 0x10));
262 rk[6] = aesni_set_rk_128(rk[5], _mm_aeskeygenassist_si128(rk[5], 0x20));
263 rk[7] = aesni_set_rk_128(rk[6], _mm_aeskeygenassist_si128(rk[6], 0x40));
264 rk[8] = aesni_set_rk_128(rk[7], _mm_aeskeygenassist_si128(rk[7], 0x80));
265 rk[9] = aesni_set_rk_128(rk[8], _mm_aeskeygenassist_si128(rk[8], 0x1B));
266 rk[10] = aesni_set_rk_128(rk[9], _mm_aeskeygenassist_si128(rk[9], 0x36));
267 }
268
269 /*
270 * Key expansion, 192-bit case
271 */
aesni_set_rk_192(__m128i * state0,__m128i * state1,__m128i xword,unsigned char * rk)272 static void aesni_set_rk_192(__m128i *state0, __m128i *state1, __m128i xword,
273 unsigned char *rk)
274 {
275 /*
276 * Finish generating the next 6 quarter-keys.
277 *
278 * On entry state0 is r3:r2:r1:r0, state1 is stuff:stuff:r5:r4
279 * and xword is stuff:stuff:X:stuff with X = rot( sub( r3 ) ) ^ RCON
280 * (obtained with AESKEYGENASSIST).
281 *
282 * On exit, state0 is r9:r8:r7:r6 and state1 is stuff:stuff:r11:r10
283 * and those are written to the round key buffer.
284 */
285 xword = _mm_shuffle_epi32(xword, 0x55); // X:X:X:X
286 xword = _mm_xor_si128(xword, *state0); // X+r3:X+r2:X+r1:X+r0
287 *state0 = _mm_slli_si128(*state0, 4); // r2:r1:r0:0
288 xword = _mm_xor_si128(xword, *state0); // X+r3+r2:X+r2+r1:X+r1+r0:X+r0
289 *state0 = _mm_slli_si128(*state0, 4); // r1:r0:0:0
290 xword = _mm_xor_si128(xword, *state0); // X+r3+r2+r1:X+r2+r1+r0:X+r1+r0:X+r0
291 *state0 = _mm_slli_si128(*state0, 4); // r0:0:0:0
292 xword = _mm_xor_si128(xword, *state0); // X+r3+r2+r1+r0:X+r2+r1+r0:X+r1+r0:X+r0
293 *state0 = xword; // = r9:r8:r7:r6
294
295 xword = _mm_shuffle_epi32(xword, 0xff); // r9:r9:r9:r9
296 xword = _mm_xor_si128(xword, *state1); // stuff:stuff:r9+r5:r9+r4
297 *state1 = _mm_slli_si128(*state1, 4); // stuff:stuff:r4:0
298 xword = _mm_xor_si128(xword, *state1); // stuff:stuff:r9+r5+r4:r9+r4
299 *state1 = xword; // = stuff:stuff:r11:r10
300
301 /* Store state0 and the low half of state1 into rk, which is conceptually
302 * an array of 24-byte elements. Since 24 is not a multiple of 16,
303 * rk is not necessarily aligned so just `*rk = *state0` doesn't work. */
304 memcpy(rk, state0, 16);
305 memcpy(rk + 16, state1, 8);
306 }
307
aesni_setkey_enc_192(unsigned char * rk,const unsigned char * key)308 static void aesni_setkey_enc_192(unsigned char *rk,
309 const unsigned char *key)
310 {
311 /* First round: use original key */
312 memcpy(rk, key, 24);
313 /* aes.c guarantees that rk is aligned on a 16-byte boundary. */
314 __m128i state0 = ((__m128i *) rk)[0];
315 __m128i state1 = _mm_loadl_epi64(((__m128i *) rk) + 1);
316
317 aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x01), rk + 24 * 1);
318 aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x02), rk + 24 * 2);
319 aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x04), rk + 24 * 3);
320 aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x08), rk + 24 * 4);
321 aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x10), rk + 24 * 5);
322 aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x20), rk + 24 * 6);
323 aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x40), rk + 24 * 7);
324 aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x80), rk + 24 * 8);
325 }
326
327 /*
328 * Key expansion, 256-bit case
329 */
aesni_set_rk_256(__m128i state0,__m128i state1,__m128i xword,__m128i * rk0,__m128i * rk1)330 static void aesni_set_rk_256(__m128i state0, __m128i state1, __m128i xword,
331 __m128i *rk0, __m128i *rk1)
332 {
333 /*
334 * Finish generating the next two round keys.
335 *
336 * On entry state0 is r3:r2:r1:r0, state1 is r7:r6:r5:r4 and
337 * xword is X:stuff:stuff:stuff with X = rot( sub( r7 )) ^ RCON
338 * (obtained with AESKEYGENASSIST).
339 *
340 * On exit, *rk0 is r11:r10:r9:r8 and *rk1 is r15:r14:r13:r12
341 */
342 xword = _mm_shuffle_epi32(xword, 0xff);
343 xword = _mm_xor_si128(xword, state0);
344 state0 = _mm_slli_si128(state0, 4);
345 xword = _mm_xor_si128(xword, state0);
346 state0 = _mm_slli_si128(state0, 4);
347 xword = _mm_xor_si128(xword, state0);
348 state0 = _mm_slli_si128(state0, 4);
349 state0 = _mm_xor_si128(state0, xword);
350 *rk0 = state0;
351
352 /* Set xword to stuff:Y:stuff:stuff with Y = subword( r11 )
353 * and proceed to generate next round key from there */
354 xword = _mm_aeskeygenassist_si128(state0, 0x00);
355 xword = _mm_shuffle_epi32(xword, 0xaa);
356 xword = _mm_xor_si128(xword, state1);
357 state1 = _mm_slli_si128(state1, 4);
358 xword = _mm_xor_si128(xword, state1);
359 state1 = _mm_slli_si128(state1, 4);
360 xword = _mm_xor_si128(xword, state1);
361 state1 = _mm_slli_si128(state1, 4);
362 state1 = _mm_xor_si128(state1, xword);
363 *rk1 = state1;
364 }
365
aesni_setkey_enc_256(unsigned char * rk_bytes,const unsigned char * key)366 static void aesni_setkey_enc_256(unsigned char *rk_bytes,
367 const unsigned char *key)
368 {
369 __m128i *rk = (__m128i *) rk_bytes;
370
371 memcpy(&rk[0], key, 16);
372 memcpy(&rk[1], key + 16, 16);
373
374 /*
375 * Main "loop" - Generating one more key than necessary,
376 * see definition of mbedtls_aes_context.buf
377 */
378 aesni_set_rk_256(rk[0], rk[1], _mm_aeskeygenassist_si128(rk[1], 0x01), &rk[2], &rk[3]);
379 aesni_set_rk_256(rk[2], rk[3], _mm_aeskeygenassist_si128(rk[3], 0x02), &rk[4], &rk[5]);
380 aesni_set_rk_256(rk[4], rk[5], _mm_aeskeygenassist_si128(rk[5], 0x04), &rk[6], &rk[7]);
381 aesni_set_rk_256(rk[6], rk[7], _mm_aeskeygenassist_si128(rk[7], 0x08), &rk[8], &rk[9]);
382 aesni_set_rk_256(rk[8], rk[9], _mm_aeskeygenassist_si128(rk[9], 0x10), &rk[10], &rk[11]);
383 aesni_set_rk_256(rk[10], rk[11], _mm_aeskeygenassist_si128(rk[11], 0x20), &rk[12], &rk[13]);
384 aesni_set_rk_256(rk[12], rk[13], _mm_aeskeygenassist_si128(rk[13], 0x40), &rk[14], &rk[15]);
385 }
386
387 #else /* MBEDTLS_AESNI_HAVE_CODE == 1 */
388
389 #if defined(__has_feature)
390 #if __has_feature(memory_sanitizer)
391 #warning \
392 "MBEDTLS_AESNI_C is known to cause spurious error reports with some memory sanitizers as they do not understand the assembly code."
393 #endif
394 #endif
395
396 /*
397 * Binutils needs to be at least 2.19 to support AES-NI instructions.
398 * Unfortunately, a lot of users have a lower version now (2014-04).
399 * Emit bytecode directly in order to support "old" version of gas.
400 *
401 * Opcodes from the Intel architecture reference manual, vol. 3.
402 * We always use registers, so we don't need prefixes for memory operands.
403 * Operand macros are in gas order (src, dst) as opposed to Intel order
404 * (dst, src) in order to blend better into the surrounding assembly code.
405 */
406 #define AESDEC(regs) ".byte 0x66,0x0F,0x38,0xDE," regs "\n\t"
407 #define AESDECLAST(regs) ".byte 0x66,0x0F,0x38,0xDF," regs "\n\t"
408 #define AESENC(regs) ".byte 0x66,0x0F,0x38,0xDC," regs "\n\t"
409 #define AESENCLAST(regs) ".byte 0x66,0x0F,0x38,0xDD," regs "\n\t"
410 #define AESIMC(regs) ".byte 0x66,0x0F,0x38,0xDB," regs "\n\t"
411 #define AESKEYGENA(regs, imm) ".byte 0x66,0x0F,0x3A,0xDF," regs "," imm "\n\t"
412 #define PCLMULQDQ(regs, imm) ".byte 0x66,0x0F,0x3A,0x44," regs "," imm "\n\t"
413
414 #define xmm0_xmm0 "0xC0"
415 #define xmm0_xmm1 "0xC8"
416 #define xmm0_xmm2 "0xD0"
417 #define xmm0_xmm3 "0xD8"
418 #define xmm0_xmm4 "0xE0"
419 #define xmm1_xmm0 "0xC1"
420 #define xmm1_xmm2 "0xD1"
421
422 /*
423 * AES-NI AES-ECB block en(de)cryption
424 */
mbedtls_aesni_crypt_ecb(mbedtls_aes_context * ctx,int mode,const unsigned char input[16],unsigned char output[16])425 int mbedtls_aesni_crypt_ecb(mbedtls_aes_context *ctx,
426 int mode,
427 const unsigned char input[16],
428 unsigned char output[16])
429 {
430 asm ("movdqu (%3), %%xmm0 \n\t" // load input
431 "movdqu (%1), %%xmm1 \n\t" // load round key 0
432 "pxor %%xmm1, %%xmm0 \n\t" // round 0
433 "add $16, %1 \n\t" // point to next round key
434 "subl $1, %0 \n\t" // normal rounds = nr - 1
435 "test %2, %2 \n\t" // mode?
436 "jz 2f \n\t" // 0 = decrypt
437
438 "1: \n\t" // encryption loop
439 "movdqu (%1), %%xmm1 \n\t" // load round key
440 AESENC(xmm1_xmm0) // do round
441 "add $16, %1 \n\t" // point to next round key
442 "subl $1, %0 \n\t" // loop
443 "jnz 1b \n\t"
444 "movdqu (%1), %%xmm1 \n\t" // load round key
445 AESENCLAST(xmm1_xmm0) // last round
446 "jmp 3f \n\t"
447
448 "2: \n\t" // decryption loop
449 "movdqu (%1), %%xmm1 \n\t"
450 AESDEC(xmm1_xmm0) // do round
451 "add $16, %1 \n\t"
452 "subl $1, %0 \n\t"
453 "jnz 2b \n\t"
454 "movdqu (%1), %%xmm1 \n\t" // load round key
455 AESDECLAST(xmm1_xmm0) // last round
456
457 "3: \n\t"
458 "movdqu %%xmm0, (%4) \n\t" // export output
459 :
460 : "r" (ctx->nr), "r" (ctx->rk), "r" (mode), "r" (input), "r" (output)
461 : "memory", "cc", "xmm0", "xmm1");
462
463
464 return 0;
465 }
466
467 /*
468 * GCM multiplication: c = a times b in GF(2^128)
469 * Based on [CLMUL-WP] algorithms 1 (with equation 27) and 5.
470 */
mbedtls_aesni_gcm_mult(unsigned char c[16],const unsigned char a[16],const unsigned char b[16])471 void mbedtls_aesni_gcm_mult(unsigned char c[16],
472 const unsigned char a[16],
473 const unsigned char b[16])
474 {
475 unsigned char aa[16], bb[16], cc[16];
476 size_t i;
477
478 /* The inputs are in big-endian order, so byte-reverse them */
479 for (i = 0; i < 16; i++) {
480 aa[i] = a[15 - i];
481 bb[i] = b[15 - i];
482 }
483
484 asm ("movdqu (%0), %%xmm0 \n\t" // a1:a0
485 "movdqu (%1), %%xmm1 \n\t" // b1:b0
486
487 /*
488 * Caryless multiplication xmm2:xmm1 = xmm0 * xmm1
489 * using [CLMUL-WP] algorithm 1 (p. 12).
490 */
491 "movdqa %%xmm1, %%xmm2 \n\t" // copy of b1:b0
492 "movdqa %%xmm1, %%xmm3 \n\t" // same
493 "movdqa %%xmm1, %%xmm4 \n\t" // same
494 PCLMULQDQ(xmm0_xmm1, "0x00") // a0*b0 = c1:c0
495 PCLMULQDQ(xmm0_xmm2, "0x11") // a1*b1 = d1:d0
496 PCLMULQDQ(xmm0_xmm3, "0x10") // a0*b1 = e1:e0
497 PCLMULQDQ(xmm0_xmm4, "0x01") // a1*b0 = f1:f0
498 "pxor %%xmm3, %%xmm4 \n\t" // e1+f1:e0+f0
499 "movdqa %%xmm4, %%xmm3 \n\t" // same
500 "psrldq $8, %%xmm4 \n\t" // 0:e1+f1
501 "pslldq $8, %%xmm3 \n\t" // e0+f0:0
502 "pxor %%xmm4, %%xmm2 \n\t" // d1:d0+e1+f1
503 "pxor %%xmm3, %%xmm1 \n\t" // c1+e0+f1:c0
504
505 /*
506 * Now shift the result one bit to the left,
507 * taking advantage of [CLMUL-WP] eq 27 (p. 18)
508 */
509 "movdqa %%xmm1, %%xmm3 \n\t" // r1:r0
510 "movdqa %%xmm2, %%xmm4 \n\t" // r3:r2
511 "psllq $1, %%xmm1 \n\t" // r1<<1:r0<<1
512 "psllq $1, %%xmm2 \n\t" // r3<<1:r2<<1
513 "psrlq $63, %%xmm3 \n\t" // r1>>63:r0>>63
514 "psrlq $63, %%xmm4 \n\t" // r3>>63:r2>>63
515 "movdqa %%xmm3, %%xmm5 \n\t" // r1>>63:r0>>63
516 "pslldq $8, %%xmm3 \n\t" // r0>>63:0
517 "pslldq $8, %%xmm4 \n\t" // r2>>63:0
518 "psrldq $8, %%xmm5 \n\t" // 0:r1>>63
519 "por %%xmm3, %%xmm1 \n\t" // r1<<1|r0>>63:r0<<1
520 "por %%xmm4, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1
521 "por %%xmm5, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1|r1>>63
522
523 /*
524 * Now reduce modulo the GCM polynomial x^128 + x^7 + x^2 + x + 1
525 * using [CLMUL-WP] algorithm 5 (p. 18).
526 * Currently xmm2:xmm1 holds x3:x2:x1:x0 (already shifted).
527 */
528 /* Step 2 (1) */
529 "movdqa %%xmm1, %%xmm3 \n\t" // x1:x0
530 "movdqa %%xmm1, %%xmm4 \n\t" // same
531 "movdqa %%xmm1, %%xmm5 \n\t" // same
532 "psllq $63, %%xmm3 \n\t" // x1<<63:x0<<63 = stuff:a
533 "psllq $62, %%xmm4 \n\t" // x1<<62:x0<<62 = stuff:b
534 "psllq $57, %%xmm5 \n\t" // x1<<57:x0<<57 = stuff:c
535
536 /* Step 2 (2) */
537 "pxor %%xmm4, %%xmm3 \n\t" // stuff:a+b
538 "pxor %%xmm5, %%xmm3 \n\t" // stuff:a+b+c
539 "pslldq $8, %%xmm3 \n\t" // a+b+c:0
540 "pxor %%xmm3, %%xmm1 \n\t" // x1+a+b+c:x0 = d:x0
541
542 /* Steps 3 and 4 */
543 "movdqa %%xmm1,%%xmm0 \n\t" // d:x0
544 "movdqa %%xmm1,%%xmm4 \n\t" // same
545 "movdqa %%xmm1,%%xmm5 \n\t" // same
546 "psrlq $1, %%xmm0 \n\t" // e1:x0>>1 = e1:e0'
547 "psrlq $2, %%xmm4 \n\t" // f1:x0>>2 = f1:f0'
548 "psrlq $7, %%xmm5 \n\t" // g1:x0>>7 = g1:g0'
549 "pxor %%xmm4, %%xmm0 \n\t" // e1+f1:e0'+f0'
550 "pxor %%xmm5, %%xmm0 \n\t" // e1+f1+g1:e0'+f0'+g0'
551 // e0'+f0'+g0' is almost e0+f0+g0, ex\tcept for some missing
552 // bits carried from d. Now get those\t bits back in.
553 "movdqa %%xmm1,%%xmm3 \n\t" // d:x0
554 "movdqa %%xmm1,%%xmm4 \n\t" // same
555 "movdqa %%xmm1,%%xmm5 \n\t" // same
556 "psllq $63, %%xmm3 \n\t" // d<<63:stuff
557 "psllq $62, %%xmm4 \n\t" // d<<62:stuff
558 "psllq $57, %%xmm5 \n\t" // d<<57:stuff
559 "pxor %%xmm4, %%xmm3 \n\t" // d<<63+d<<62:stuff
560 "pxor %%xmm5, %%xmm3 \n\t" // missing bits of d:stuff
561 "psrldq $8, %%xmm3 \n\t" // 0:missing bits of d
562 "pxor %%xmm3, %%xmm0 \n\t" // e1+f1+g1:e0+f0+g0
563 "pxor %%xmm1, %%xmm0 \n\t" // h1:h0
564 "pxor %%xmm2, %%xmm0 \n\t" // x3+h1:x2+h0
565
566 "movdqu %%xmm0, (%2) \n\t" // done
567 :
568 : "r" (aa), "r" (bb), "r" (cc)
569 : "memory", "cc", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5");
570
571 /* Now byte-reverse the outputs */
572 for (i = 0; i < 16; i++) {
573 c[i] = cc[15 - i];
574 }
575
576 return;
577 }
578
579 /*
580 * Compute decryption round keys from encryption round keys
581 */
mbedtls_aesni_inverse_key(unsigned char * invkey,const unsigned char * fwdkey,int nr)582 void mbedtls_aesni_inverse_key(unsigned char *invkey,
583 const unsigned char *fwdkey, int nr)
584 {
585 unsigned char *ik = invkey;
586 const unsigned char *fk = fwdkey + 16 * nr;
587
588 memcpy(ik, fk, 16);
589
590 for (fk -= 16, ik += 16; fk > fwdkey; fk -= 16, ik += 16) {
591 asm ("movdqu (%0), %%xmm0 \n\t"
592 AESIMC(xmm0_xmm0)
593 "movdqu %%xmm0, (%1) \n\t"
594 :
595 : "r" (fk), "r" (ik)
596 : "memory", "xmm0");
597 }
598
599 memcpy(ik, fk, 16);
600 }
601
602 /*
603 * Key expansion, 128-bit case
604 */
aesni_setkey_enc_128(unsigned char * rk,const unsigned char * key)605 static void aesni_setkey_enc_128(unsigned char *rk,
606 const unsigned char *key)
607 {
608 asm ("movdqu (%1), %%xmm0 \n\t" // copy the original key
609 "movdqu %%xmm0, (%0) \n\t" // as round key 0
610 "jmp 2f \n\t" // skip auxiliary routine
611
612 /*
613 * Finish generating the next round key.
614 *
615 * On entry xmm0 is r3:r2:r1:r0 and xmm1 is X:stuff:stuff:stuff
616 * with X = rot( sub( r3 ) ) ^ RCON.
617 *
618 * On exit, xmm0 is r7:r6:r5:r4
619 * with r4 = X + r0, r5 = r4 + r1, r6 = r5 + r2, r7 = r6 + r3
620 * and those are written to the round key buffer.
621 */
622 "1: \n\t"
623 "pshufd $0xff, %%xmm1, %%xmm1 \n\t" // X:X:X:X
624 "pxor %%xmm0, %%xmm1 \n\t" // X+r3:X+r2:X+r1:r4
625 "pslldq $4, %%xmm0 \n\t" // r2:r1:r0:0
626 "pxor %%xmm0, %%xmm1 \n\t" // X+r3+r2:X+r2+r1:r5:r4
627 "pslldq $4, %%xmm0 \n\t" // etc
628 "pxor %%xmm0, %%xmm1 \n\t"
629 "pslldq $4, %%xmm0 \n\t"
630 "pxor %%xmm1, %%xmm0 \n\t" // update xmm0 for next time!
631 "add $16, %0 \n\t" // point to next round key
632 "movdqu %%xmm0, (%0) \n\t" // write it
633 "ret \n\t"
634
635 /* Main "loop" */
636 "2: \n\t"
637 AESKEYGENA(xmm0_xmm1, "0x01") "call 1b \n\t"
638 AESKEYGENA(xmm0_xmm1, "0x02") "call 1b \n\t"
639 AESKEYGENA(xmm0_xmm1, "0x04") "call 1b \n\t"
640 AESKEYGENA(xmm0_xmm1, "0x08") "call 1b \n\t"
641 AESKEYGENA(xmm0_xmm1, "0x10") "call 1b \n\t"
642 AESKEYGENA(xmm0_xmm1, "0x20") "call 1b \n\t"
643 AESKEYGENA(xmm0_xmm1, "0x40") "call 1b \n\t"
644 AESKEYGENA(xmm0_xmm1, "0x80") "call 1b \n\t"
645 AESKEYGENA(xmm0_xmm1, "0x1B") "call 1b \n\t"
646 AESKEYGENA(xmm0_xmm1, "0x36") "call 1b \n\t"
647 :
648 : "r" (rk), "r" (key)
649 : "memory", "cc", "0");
650 }
651
652 /*
653 * Key expansion, 192-bit case
654 */
aesni_setkey_enc_192(unsigned char * rk,const unsigned char * key)655 static void aesni_setkey_enc_192(unsigned char *rk,
656 const unsigned char *key)
657 {
658 asm ("movdqu (%1), %%xmm0 \n\t" // copy original round key
659 "movdqu %%xmm0, (%0) \n\t"
660 "add $16, %0 \n\t"
661 "movq 16(%1), %%xmm1 \n\t"
662 "movq %%xmm1, (%0) \n\t"
663 "add $8, %0 \n\t"
664 "jmp 2f \n\t" // skip auxiliary routine
665
666 /*
667 * Finish generating the next 6 quarter-keys.
668 *
669 * On entry xmm0 is r3:r2:r1:r0, xmm1 is stuff:stuff:r5:r4
670 * and xmm2 is stuff:stuff:X:stuff with X = rot( sub( r3 ) ) ^ RCON.
671 *
672 * On exit, xmm0 is r9:r8:r7:r6 and xmm1 is stuff:stuff:r11:r10
673 * and those are written to the round key buffer.
674 */
675 "1: \n\t"
676 "pshufd $0x55, %%xmm2, %%xmm2 \n\t" // X:X:X:X
677 "pxor %%xmm0, %%xmm2 \n\t" // X+r3:X+r2:X+r1:r4
678 "pslldq $4, %%xmm0 \n\t" // etc
679 "pxor %%xmm0, %%xmm2 \n\t"
680 "pslldq $4, %%xmm0 \n\t"
681 "pxor %%xmm0, %%xmm2 \n\t"
682 "pslldq $4, %%xmm0 \n\t"
683 "pxor %%xmm2, %%xmm0 \n\t" // update xmm0 = r9:r8:r7:r6
684 "movdqu %%xmm0, (%0) \n\t"
685 "add $16, %0 \n\t"
686 "pshufd $0xff, %%xmm0, %%xmm2 \n\t" // r9:r9:r9:r9
687 "pxor %%xmm1, %%xmm2 \n\t" // stuff:stuff:r9+r5:r10
688 "pslldq $4, %%xmm1 \n\t" // r2:r1:r0:0
689 "pxor %%xmm2, %%xmm1 \n\t" // xmm1 = stuff:stuff:r11:r10
690 "movq %%xmm1, (%0) \n\t"
691 "add $8, %0 \n\t"
692 "ret \n\t"
693
694 "2: \n\t"
695 AESKEYGENA(xmm1_xmm2, "0x01") "call 1b \n\t"
696 AESKEYGENA(xmm1_xmm2, "0x02") "call 1b \n\t"
697 AESKEYGENA(xmm1_xmm2, "0x04") "call 1b \n\t"
698 AESKEYGENA(xmm1_xmm2, "0x08") "call 1b \n\t"
699 AESKEYGENA(xmm1_xmm2, "0x10") "call 1b \n\t"
700 AESKEYGENA(xmm1_xmm2, "0x20") "call 1b \n\t"
701 AESKEYGENA(xmm1_xmm2, "0x40") "call 1b \n\t"
702 AESKEYGENA(xmm1_xmm2, "0x80") "call 1b \n\t"
703
704 :
705 : "r" (rk), "r" (key)
706 : "memory", "cc", "0");
707 }
708
709 /*
710 * Key expansion, 256-bit case
711 */
aesni_setkey_enc_256(unsigned char * rk,const unsigned char * key)712 static void aesni_setkey_enc_256(unsigned char *rk,
713 const unsigned char *key)
714 {
715 asm ("movdqu (%1), %%xmm0 \n\t"
716 "movdqu %%xmm0, (%0) \n\t"
717 "add $16, %0 \n\t"
718 "movdqu 16(%1), %%xmm1 \n\t"
719 "movdqu %%xmm1, (%0) \n\t"
720 "jmp 2f \n\t" // skip auxiliary routine
721
722 /*
723 * Finish generating the next two round keys.
724 *
725 * On entry xmm0 is r3:r2:r1:r0, xmm1 is r7:r6:r5:r4 and
726 * xmm2 is X:stuff:stuff:stuff with X = rot( sub( r7 )) ^ RCON
727 *
728 * On exit, xmm0 is r11:r10:r9:r8 and xmm1 is r15:r14:r13:r12
729 * and those have been written to the output buffer.
730 */
731 "1: \n\t"
732 "pshufd $0xff, %%xmm2, %%xmm2 \n\t"
733 "pxor %%xmm0, %%xmm2 \n\t"
734 "pslldq $4, %%xmm0 \n\t"
735 "pxor %%xmm0, %%xmm2 \n\t"
736 "pslldq $4, %%xmm0 \n\t"
737 "pxor %%xmm0, %%xmm2 \n\t"
738 "pslldq $4, %%xmm0 \n\t"
739 "pxor %%xmm2, %%xmm0 \n\t"
740 "add $16, %0 \n\t"
741 "movdqu %%xmm0, (%0) \n\t"
742
743 /* Set xmm2 to stuff:Y:stuff:stuff with Y = subword( r11 )
744 * and proceed to generate next round key from there */
745 AESKEYGENA(xmm0_xmm2, "0x00")
746 "pshufd $0xaa, %%xmm2, %%xmm2 \n\t"
747 "pxor %%xmm1, %%xmm2 \n\t"
748 "pslldq $4, %%xmm1 \n\t"
749 "pxor %%xmm1, %%xmm2 \n\t"
750 "pslldq $4, %%xmm1 \n\t"
751 "pxor %%xmm1, %%xmm2 \n\t"
752 "pslldq $4, %%xmm1 \n\t"
753 "pxor %%xmm2, %%xmm1 \n\t"
754 "add $16, %0 \n\t"
755 "movdqu %%xmm1, (%0) \n\t"
756 "ret \n\t"
757
758 /*
759 * Main "loop" - Generating one more key than necessary,
760 * see definition of mbedtls_aes_context.buf
761 */
762 "2: \n\t"
763 AESKEYGENA(xmm1_xmm2, "0x01") "call 1b \n\t"
764 AESKEYGENA(xmm1_xmm2, "0x02") "call 1b \n\t"
765 AESKEYGENA(xmm1_xmm2, "0x04") "call 1b \n\t"
766 AESKEYGENA(xmm1_xmm2, "0x08") "call 1b \n\t"
767 AESKEYGENA(xmm1_xmm2, "0x10") "call 1b \n\t"
768 AESKEYGENA(xmm1_xmm2, "0x20") "call 1b \n\t"
769 AESKEYGENA(xmm1_xmm2, "0x40") "call 1b \n\t"
770 :
771 : "r" (rk), "r" (key)
772 : "memory", "cc", "0");
773 }
774
775 #endif /* MBEDTLS_AESNI_HAVE_CODE */
776
777 /*
778 * Key expansion, wrapper
779 */
mbedtls_aesni_setkey_enc(unsigned char * rk,const unsigned char * key,size_t bits)780 int mbedtls_aesni_setkey_enc(unsigned char *rk,
781 const unsigned char *key,
782 size_t bits)
783 {
784 switch (bits) {
785 case 128: aesni_setkey_enc_128(rk, key); break;
786 case 192: aesni_setkey_enc_192(rk, key); break;
787 case 256: aesni_setkey_enc_256(rk, key); break;
788 default: return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
789 }
790
791 return 0;
792 }
793
794 #endif /* MBEDTLS_AESNI_HAVE_CODE */
795
796 #endif /* MBEDTLS_AESNI_C */
797