1 /* 2 * Copyright 2022 Google LLC 3 * 4 * Use of this source code is governed by a BSD-style license that can be 5 * found in the LICENSE file. 6 */ 7 8 #ifndef SkFeatures_DEFINED 9 #define SkFeatures_DEFINED 10 11 #if !defined(SK_BUILD_FOR_ANDROID) && !defined(SK_BUILD_FOR_IOS) && !defined(SK_BUILD_FOR_WIN) && \ 12 !defined(SK_BUILD_FOR_UNIX) && !defined(SK_BUILD_FOR_MAC) 13 14 #ifdef __APPLE__ 15 #include <TargetConditionals.h> 16 #endif 17 18 #if defined(_WIN32) || defined(__SYMBIAN32__) 19 #define SK_BUILD_FOR_WIN 20 #elif defined(ANDROID) || defined(__ANDROID__) 21 #define SK_BUILD_FOR_ANDROID 22 #elif defined(linux) || defined(__linux) || defined(__FreeBSD__) || \ 23 defined(__OpenBSD__) || defined(__sun) || defined(__NetBSD__) || \ 24 defined(__DragonFly__) || defined(__Fuchsia__) || \ 25 defined(__GLIBC__) || defined(__GNU__) || defined(__unix__) 26 #define SK_BUILD_FOR_UNIX 27 #elif TARGET_OS_IPHONE || TARGET_IPHONE_SIMULATOR 28 #define SK_BUILD_FOR_IOS 29 #else 30 #define SK_BUILD_FOR_MAC 31 #endif 32 #endif // end SK_BUILD_FOR_* 33 34 35 #if defined(SK_BUILD_FOR_WIN) && !defined(__clang__) 36 #if !defined(SK_RESTRICT) 37 #define SK_RESTRICT __restrict 38 #endif 39 #endif 40 41 #if !defined(SK_RESTRICT) 42 #define SK_RESTRICT __restrict__ 43 #endif 44 45 #if !defined(SK_CPU_BENDIAN) && !defined(SK_CPU_LENDIAN) 46 #if defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__) 47 #define SK_CPU_BENDIAN 48 #elif defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__) 49 #define SK_CPU_LENDIAN 50 #elif defined(__sparc) || defined(__sparc__) || \ 51 defined(_POWER) || defined(__powerpc__) || \ 52 defined(__ppc__) || defined(__hppa) || \ 53 defined(__PPC__) || defined(__PPC64__) || \ 54 defined(_MIPSEB) || defined(__ARMEB__) || \ 55 defined(__s390__) || \ 56 (defined(__sh__) && defined(__BIG_ENDIAN__)) || \ 57 (defined(__ia64) && defined(__BIG_ENDIAN__)) 58 #define SK_CPU_BENDIAN 59 #else 60 #define SK_CPU_LENDIAN 61 #endif 62 #endif 63 64 #if defined(__i386) || defined(_M_IX86) || defined(__x86_64__) || defined(_M_X64) 65 #define SK_CPU_X86 1 66 #endif 67 68 #if defined(__loongarch__) || defined (__loongarch64) 69 #define SK_CPU_LOONGARCH 1 70 #endif 71 72 /** 73 * SK_CPU_SSE_LEVEL 74 * 75 * If defined, SK_CPU_SSE_LEVEL should be set to the highest supported level. 76 * On non-intel CPU this should be undefined. 77 */ 78 #define SK_CPU_SSE_LEVEL_SSE1 10 79 #define SK_CPU_SSE_LEVEL_SSE2 20 80 #define SK_CPU_SSE_LEVEL_SSE3 30 81 #define SK_CPU_SSE_LEVEL_SSSE3 31 82 #define SK_CPU_SSE_LEVEL_SSE41 41 83 #define SK_CPU_SSE_LEVEL_SSE42 42 84 #define SK_CPU_SSE_LEVEL_AVX 51 85 #define SK_CPU_SSE_LEVEL_AVX2 52 86 #define SK_CPU_SSE_LEVEL_SKX 60 87 88 /** 89 * SK_CPU_LSX_LEVEL 90 * 91 * If defined, SK_CPU_LSX_LEVEL should be set to the highest supported level. 92 * On non-loongarch CPU this should be undefined. 93 */ 94 #define SK_CPU_LSX_LEVEL_LSX 70 95 #define SK_CPU_LSX_LEVEL_LASX 80 96 97 // TODO(brianosman,kjlubick) clean up these checks 98 99 // Are we in GCC/Clang? 100 #ifndef SK_CPU_SSE_LEVEL 101 // These checks must be done in descending order to ensure we set the highest 102 // available SSE level. 103 #if defined(__AVX512F__) && defined(__AVX512DQ__) && defined(__AVX512CD__) && \ 104 defined(__AVX512BW__) && defined(__AVX512VL__) 105 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SKX 106 #elif defined(__AVX2__) 107 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_AVX2 108 #elif defined(__AVX__) 109 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_AVX 110 #elif defined(__SSE4_2__) 111 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE42 112 #elif defined(__SSE4_1__) 113 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE41 114 #elif defined(__SSSE3__) 115 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSSE3 116 #elif defined(__SSE3__) 117 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE3 118 #elif defined(__SSE2__) 119 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE2 120 #endif 121 #endif 122 123 #ifndef SK_CPU_LSX_LEVEL 124 #if defined(__loongarch_asx) 125 #define SK_CPU_LSX_LEVEL SK_CPU_LSX_LEVEL_LASX 126 #elif defined(__loongarch_sx) 127 #define SK_CPU_LSX_LEVEL SK_CPU_LSX_LEVEL_LSX 128 #endif 129 #endif 130 131 // Are we in VisualStudio? 132 #ifndef SK_CPU_SSE_LEVEL 133 // These checks must be done in descending order to ensure we set the highest 134 // available SSE level. 64-bit intel guarantees at least SSE2 support. 135 #if defined(__AVX512F__) && defined(__AVX512DQ__) && defined(__AVX512CD__) && \ 136 defined(__AVX512BW__) && defined(__AVX512VL__) 137 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SKX 138 #elif defined(__AVX2__) 139 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_AVX2 140 #elif defined(__AVX__) 141 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_AVX 142 #elif defined(_M_X64) || defined(_M_AMD64) 143 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE2 144 #elif defined(_M_IX86_FP) 145 #if _M_IX86_FP >= 2 146 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE2 147 #elif _M_IX86_FP == 1 148 #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE1 149 #endif 150 #endif 151 #endif 152 153 // ARM defines 154 #if defined(__arm__) && (!defined(__APPLE__) || !TARGET_IPHONE_SIMULATOR) 155 #define SK_CPU_ARM32 156 #elif defined(__aarch64__) 157 #define SK_CPU_ARM64 158 #endif 159 160 // All 64-bit ARM chips have NEON. Many 32-bit ARM chips do too. 161 #if !defined(SK_ARM_HAS_NEON) && defined(__ARM_NEON) 162 #define SK_ARM_HAS_NEON 163 #endif 164 165 #endif // SkFeatures_DEFINED 166