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1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|*                                                                            *|
3|* Calling Convention Implementation Fragment                                 *|
4|*                                                                            *|
5|* Automatically generated file, do not edit!                                 *|
6|*                                                                            *|
7\*===----------------------------------------------------------------------===*/
8
9bool llvm::CC_ARM_AAPCS(unsigned ValNo, MVT ValVT,
10                        MVT LocVT, CCValAssign::LocInfo LocInfo,
11                        ISD::ArgFlagsTy ArgFlags, CCState &State);
12static bool CC_ARM_AAPCS_Common(unsigned ValNo, MVT ValVT,
13                                MVT LocVT, CCValAssign::LocInfo LocInfo,
14                                ISD::ArgFlagsTy ArgFlags, CCState &State);
15bool llvm::CC_ARM_AAPCS_VFP(unsigned ValNo, MVT ValVT,
16                            MVT LocVT, CCValAssign::LocInfo LocInfo,
17                            ISD::ArgFlagsTy ArgFlags, CCState &State);
18bool llvm::CC_ARM_APCS(unsigned ValNo, MVT ValVT,
19                       MVT LocVT, CCValAssign::LocInfo LocInfo,
20                       ISD::ArgFlagsTy ArgFlags, CCState &State);
21bool llvm::CC_ARM_APCS_GHC(unsigned ValNo, MVT ValVT,
22                           MVT LocVT, CCValAssign::LocInfo LocInfo,
23                           ISD::ArgFlagsTy ArgFlags, CCState &State);
24bool llvm::CC_ARM_Win32_CFGuard_Check(unsigned ValNo, MVT ValVT,
25                                      MVT LocVT, CCValAssign::LocInfo LocInfo,
26                                      ISD::ArgFlagsTy ArgFlags, CCState &State);
27bool llvm::FastCC_ARM_APCS(unsigned ValNo, MVT ValVT,
28                           MVT LocVT, CCValAssign::LocInfo LocInfo,
29                           ISD::ArgFlagsTy ArgFlags, CCState &State);
30bool llvm::RetCC_ARM_AAPCS(unsigned ValNo, MVT ValVT,
31                           MVT LocVT, CCValAssign::LocInfo LocInfo,
32                           ISD::ArgFlagsTy ArgFlags, CCState &State);
33static bool RetCC_ARM_AAPCS_Common(unsigned ValNo, MVT ValVT,
34                                   MVT LocVT, CCValAssign::LocInfo LocInfo,
35                                   ISD::ArgFlagsTy ArgFlags, CCState &State);
36bool llvm::RetCC_ARM_AAPCS_VFP(unsigned ValNo, MVT ValVT,
37                               MVT LocVT, CCValAssign::LocInfo LocInfo,
38                               ISD::ArgFlagsTy ArgFlags, CCState &State);
39bool llvm::RetCC_ARM_APCS(unsigned ValNo, MVT ValVT,
40                          MVT LocVT, CCValAssign::LocInfo LocInfo,
41                          ISD::ArgFlagsTy ArgFlags, CCState &State);
42bool llvm::RetFastCC_ARM_APCS(unsigned ValNo, MVT ValVT,
43                              MVT LocVT, CCValAssign::LocInfo LocInfo,
44                              ISD::ArgFlagsTy ArgFlags, CCState &State);
45
46
47bool llvm::CC_ARM_AAPCS(unsigned ValNo, MVT ValVT,
48                        MVT LocVT, CCValAssign::LocInfo LocInfo,
49                        ISD::ArgFlagsTy ArgFlags, CCState &State) {
50
51  if (ArgFlags.isByVal()) {
52    State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
53    return false;
54  }
55
56  if (ArgFlags.isNest()) {
57    if (unsigned Reg = State.AllocateReg(ARM::R12)) {
58      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
59      return false;
60    }
61  }
62
63  if (LocVT == MVT::v1i64 ||
64      LocVT == MVT::v2i32 ||
65      LocVT == MVT::v4i16 ||
66      LocVT == MVT::v4f16 ||
67      LocVT == MVT::v8i8 ||
68      LocVT == MVT::v2f32) {
69    LocVT = MVT::f64;
70    LocInfo = CCValAssign::BCvt;
71  }
72
73  if (LocVT == MVT::v2i64 ||
74      LocVT == MVT::v4i32 ||
75      LocVT == MVT::v8i16 ||
76      LocVT == MVT::v8f16 ||
77      LocVT == MVT::v16i8 ||
78      LocVT == MVT::v4f32) {
79    LocVT = MVT::v2f64;
80    LocInfo = CCValAssign::BCvt;
81  }
82
83  if (ArgFlags.isSwiftSelf()) {
84    if (LocVT == MVT::i32) {
85      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
86        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
87        return false;
88      }
89    }
90  }
91
92  if (ArgFlags.isSwiftError()) {
93    if (LocVT == MVT::i32) {
94      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
95        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
96        return false;
97      }
98    }
99  }
100
101  if (LocVT == MVT::f64 ||
102      LocVT == MVT::v2f64) {
103    if (CC_ARM_AAPCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
104        return false;
105  }
106
107  if (LocVT == MVT::f32) {
108    LocVT = MVT::i32;
109    LocInfo = CCValAssign::BCvt;
110  }
111
112  if (!CC_ARM_AAPCS_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
113    return false;
114
115  return true;  // CC didn't match.
116}
117
118
119static bool CC_ARM_AAPCS_Common(unsigned ValNo, MVT ValVT,
120                                MVT LocVT, CCValAssign::LocInfo LocInfo,
121                                ISD::ArgFlagsTy ArgFlags, CCState &State) {
122
123  if (LocVT == MVT::i1 ||
124      LocVT == MVT::i8 ||
125      LocVT == MVT::i16) {
126    LocVT = MVT::i32;
127    if (ArgFlags.isSExt())
128        LocInfo = CCValAssign::SExt;
129    else if (ArgFlags.isZExt())
130        LocInfo = CCValAssign::ZExt;
131    else
132        LocInfo = CCValAssign::AExt;
133  }
134
135  if (LocVT == MVT::i32) {
136    if (ArgFlags.getOrigAlign() == 8) {
137      static const MCPhysReg RegList1[] = {
138        ARM::R0, ARM::R2
139      };
140      static const MCPhysReg RegList2[] = {
141        ARM::R0, ARM::R1
142      };
143      if (unsigned Reg = State.AllocateReg(RegList1, RegList2)) {
144        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
145        return false;
146      }
147    }
148  }
149
150  if (LocVT == MVT::i32) {
151    if (ArgFlags.getOrigAlign() != 8) {
152      static const MCPhysReg RegList3[] = {
153        ARM::R0, ARM::R1, ARM::R2, ARM::R3
154      };
155      if (unsigned Reg = State.AllocateReg(RegList3)) {
156        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
157        return false;
158      }
159    }
160  }
161
162  if (LocVT == MVT::i32) {
163    if (ArgFlags.getOrigAlign() == 8) {
164      static const MCPhysReg ShadowRegList4[] = {
165        ARM::R0, ARM::R1, ARM::R2, ARM::R3
166      };
167      unsigned Offset5 = State.AllocateStack(4, 8, ShadowRegList4);
168      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset5, LocVT, LocInfo));
169      return false;
170    }
171  }
172
173  if (LocVT == MVT::i32) {
174    static const MCPhysReg ShadowRegList6[] = {
175      ARM::R0, ARM::R1, ARM::R2, ARM::R3
176    };
177    unsigned Offset7 = State.AllocateStack(4, 4, ShadowRegList6);
178    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset7, LocVT, LocInfo));
179    return false;
180  }
181
182  if (LocVT == MVT::f32) {
183    static const MCPhysReg ShadowRegList8[] = {
184      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
185    };
186    unsigned Offset9 = State.AllocateStack(4, 4, ShadowRegList8);
187    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset9, LocVT, LocInfo));
188    return false;
189  }
190
191  if (LocVT == MVT::f64) {
192    static const MCPhysReg ShadowRegList10[] = {
193      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
194    };
195    unsigned Offset11 = State.AllocateStack(8, 8, ShadowRegList10);
196    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset11, LocVT, LocInfo));
197    return false;
198  }
199
200  if (LocVT == MVT::v2f64) {
201    if (ArgFlags.getOrigAlign() == 16) {
202      static const MCPhysReg ShadowRegList12[] = {
203        ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
204      };
205      unsigned Offset13 = State.AllocateStack(16, 16, ShadowRegList12);
206      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset13, LocVT, LocInfo));
207      return false;
208    }
209  }
210
211  if (LocVT == MVT::v2f64) {
212    static const MCPhysReg ShadowRegList14[] = {
213      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
214    };
215    unsigned Offset15 = State.AllocateStack(16, 8, ShadowRegList14);
216    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset15, LocVT, LocInfo));
217    return false;
218  }
219
220  return true;  // CC didn't match.
221}
222
223
224bool llvm::CC_ARM_AAPCS_VFP(unsigned ValNo, MVT ValVT,
225                            MVT LocVT, CCValAssign::LocInfo LocInfo,
226                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
227
228  if (ArgFlags.isByVal()) {
229    State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
230    return false;
231  }
232
233  if (LocVT == MVT::v1i64 ||
234      LocVT == MVT::v2i32 ||
235      LocVT == MVT::v4i16 ||
236      LocVT == MVT::v4f16 ||
237      LocVT == MVT::v8i8 ||
238      LocVT == MVT::v2f32) {
239    LocVT = MVT::f64;
240    LocInfo = CCValAssign::BCvt;
241  }
242
243  if (LocVT == MVT::v2i64 ||
244      LocVT == MVT::v4i32 ||
245      LocVT == MVT::v8i16 ||
246      LocVT == MVT::v8f16 ||
247      LocVT == MVT::v16i8 ||
248      LocVT == MVT::v4f32) {
249    LocVT = MVT::v2f64;
250    LocInfo = CCValAssign::BCvt;
251  }
252
253  if (ArgFlags.isSwiftSelf()) {
254    if (LocVT == MVT::i32) {
255      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
256        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
257        return false;
258      }
259    }
260  }
261
262  if (ArgFlags.isSwiftError()) {
263    if (LocVT == MVT::i32) {
264      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
265        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
266        return false;
267      }
268    }
269  }
270
271  if (ArgFlags.isInConsecutiveRegs()) {
272    if (CC_ARM_AAPCS_Custom_Aggregate(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
273        return false;
274  }
275
276  if (LocVT == MVT::v2f64) {
277    static const MCPhysReg RegList1[] = {
278      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
279    };
280    if (unsigned Reg = State.AllocateReg(RegList1)) {
281      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
282      return false;
283    }
284  }
285
286  if (LocVT == MVT::f64) {
287    static const MCPhysReg RegList2[] = {
288      ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7
289    };
290    if (unsigned Reg = State.AllocateReg(RegList2)) {
291      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
292      return false;
293    }
294  }
295
296  if (LocVT == MVT::f32) {
297    static const MCPhysReg RegList3[] = {
298      ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
299    };
300    if (unsigned Reg = State.AllocateReg(RegList3)) {
301      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
302      return false;
303    }
304  }
305
306  if (!CC_ARM_AAPCS_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
307    return false;
308
309  return true;  // CC didn't match.
310}
311
312
313bool llvm::CC_ARM_APCS(unsigned ValNo, MVT ValVT,
314                       MVT LocVT, CCValAssign::LocInfo LocInfo,
315                       ISD::ArgFlagsTy ArgFlags, CCState &State) {
316
317  if (ArgFlags.isByVal()) {
318    State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
319    return false;
320  }
321
322  if (LocVT == MVT::i1 ||
323      LocVT == MVT::i8 ||
324      LocVT == MVT::i16) {
325    LocVT = MVT::i32;
326    if (ArgFlags.isSExt())
327        LocInfo = CCValAssign::SExt;
328    else if (ArgFlags.isZExt())
329        LocInfo = CCValAssign::ZExt;
330    else
331        LocInfo = CCValAssign::AExt;
332  }
333
334  if (ArgFlags.isSwiftSelf()) {
335    if (LocVT == MVT::i32) {
336      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
337        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
338        return false;
339      }
340    }
341  }
342
343  if (ArgFlags.isSwiftError()) {
344    if (LocVT == MVT::i32) {
345      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
346        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
347        return false;
348      }
349    }
350  }
351
352  if (LocVT == MVT::v1i64 ||
353      LocVT == MVT::v2i32 ||
354      LocVT == MVT::v4i16 ||
355      LocVT == MVT::v4f16 ||
356      LocVT == MVT::v8i8 ||
357      LocVT == MVT::v2f32) {
358    LocVT = MVT::f64;
359    LocInfo = CCValAssign::BCvt;
360  }
361
362  if (LocVT == MVT::v2i64 ||
363      LocVT == MVT::v4i32 ||
364      LocVT == MVT::v8i16 ||
365      LocVT == MVT::v8f16 ||
366      LocVT == MVT::v16i8 ||
367      LocVT == MVT::v4f32) {
368    LocVT = MVT::v2f64;
369    LocInfo = CCValAssign::BCvt;
370  }
371
372  if (LocVT == MVT::f64 ||
373      LocVT == MVT::v2f64) {
374    if (CC_ARM_APCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
375        return false;
376  }
377
378  if (LocVT == MVT::f32) {
379    LocVT = MVT::i32;
380    LocInfo = CCValAssign::BCvt;
381  }
382
383  if (LocVT == MVT::i32) {
384    static const MCPhysReg RegList1[] = {
385      ARM::R0, ARM::R1, ARM::R2, ARM::R3
386    };
387    if (unsigned Reg = State.AllocateReg(RegList1)) {
388      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
389      return false;
390    }
391  }
392
393  if (LocVT == MVT::i32) {
394    unsigned Offset2 = State.AllocateStack(4, 4);
395    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset2, LocVT, LocInfo));
396    return false;
397  }
398
399  if (LocVT == MVT::f64) {
400    unsigned Offset3 = State.AllocateStack(8, 4);
401    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset3, LocVT, LocInfo));
402    return false;
403  }
404
405  if (LocVT == MVT::v2f64) {
406    unsigned Offset4 = State.AllocateStack(16, 4);
407    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset4, LocVT, LocInfo));
408    return false;
409  }
410
411  return true;  // CC didn't match.
412}
413
414
415bool llvm::CC_ARM_APCS_GHC(unsigned ValNo, MVT ValVT,
416                           MVT LocVT, CCValAssign::LocInfo LocInfo,
417                           ISD::ArgFlagsTy ArgFlags, CCState &State) {
418
419  if (LocVT == MVT::v1i64 ||
420      LocVT == MVT::v2i32 ||
421      LocVT == MVT::v4i16 ||
422      LocVT == MVT::v4f16 ||
423      LocVT == MVT::v8i8 ||
424      LocVT == MVT::v2f32) {
425    LocVT = MVT::f64;
426    LocInfo = CCValAssign::BCvt;
427  }
428
429  if (LocVT == MVT::v2i64 ||
430      LocVT == MVT::v4i32 ||
431      LocVT == MVT::v8i16 ||
432      LocVT == MVT::v8f16 ||
433      LocVT == MVT::v16i8 ||
434      LocVT == MVT::v4f32) {
435    LocVT = MVT::v2f64;
436    LocInfo = CCValAssign::BCvt;
437  }
438
439  if (LocVT == MVT::v2f64) {
440    static const MCPhysReg RegList1[] = {
441      ARM::Q4, ARM::Q5
442    };
443    if (unsigned Reg = State.AllocateReg(RegList1)) {
444      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
445      return false;
446    }
447  }
448
449  if (LocVT == MVT::f64) {
450    static const MCPhysReg RegList2[] = {
451      ARM::D8, ARM::D9, ARM::D10, ARM::D11
452    };
453    if (unsigned Reg = State.AllocateReg(RegList2)) {
454      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
455      return false;
456    }
457  }
458
459  if (LocVT == MVT::f32) {
460    static const MCPhysReg RegList3[] = {
461      ARM::S16, ARM::S17, ARM::S18, ARM::S19, ARM::S20, ARM::S21, ARM::S22, ARM::S23
462    };
463    if (unsigned Reg = State.AllocateReg(RegList3)) {
464      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
465      return false;
466    }
467  }
468
469  if (LocVT == MVT::i8 ||
470      LocVT == MVT::i16) {
471    LocVT = MVT::i32;
472    if (ArgFlags.isSExt())
473        LocInfo = CCValAssign::SExt;
474    else if (ArgFlags.isZExt())
475        LocInfo = CCValAssign::ZExt;
476    else
477        LocInfo = CCValAssign::AExt;
478  }
479
480  if (LocVT == MVT::i32) {
481    static const MCPhysReg RegList4[] = {
482      ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11
483    };
484    if (unsigned Reg = State.AllocateReg(RegList4)) {
485      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
486      return false;
487    }
488  }
489
490  return true;  // CC didn't match.
491}
492
493
494bool llvm::CC_ARM_Win32_CFGuard_Check(unsigned ValNo, MVT ValVT,
495                                      MVT LocVT, CCValAssign::LocInfo LocInfo,
496                                      ISD::ArgFlagsTy ArgFlags, CCState &State) {
497
498  if (LocVT == MVT::i32) {
499    if (unsigned Reg = State.AllocateReg(ARM::R0)) {
500      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
501      return false;
502    }
503  }
504
505  return true;  // CC didn't match.
506}
507
508
509bool llvm::FastCC_ARM_APCS(unsigned ValNo, MVT ValVT,
510                           MVT LocVT, CCValAssign::LocInfo LocInfo,
511                           ISD::ArgFlagsTy ArgFlags, CCState &State) {
512
513  if (LocVT == MVT::v1i64 ||
514      LocVT == MVT::v2i32 ||
515      LocVT == MVT::v4i16 ||
516      LocVT == MVT::v4f16 ||
517      LocVT == MVT::v8i8 ||
518      LocVT == MVT::v2f32) {
519    LocVT = MVT::f64;
520    LocInfo = CCValAssign::BCvt;
521  }
522
523  if (LocVT == MVT::v2i64 ||
524      LocVT == MVT::v4i32 ||
525      LocVT == MVT::v8i16 ||
526      LocVT == MVT::v8f16 ||
527      LocVT == MVT::v16i8 ||
528      LocVT == MVT::v4f32) {
529    LocVT = MVT::v2f64;
530    LocInfo = CCValAssign::BCvt;
531  }
532
533  if (LocVT == MVT::v2f64) {
534    static const MCPhysReg RegList1[] = {
535      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
536    };
537    if (unsigned Reg = State.AllocateReg(RegList1)) {
538      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
539      return false;
540    }
541  }
542
543  if (LocVT == MVT::f64) {
544    static const MCPhysReg RegList2[] = {
545      ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7
546    };
547    if (unsigned Reg = State.AllocateReg(RegList2)) {
548      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
549      return false;
550    }
551  }
552
553  if (LocVT == MVT::f32) {
554    static const MCPhysReg RegList3[] = {
555      ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
556    };
557    if (unsigned Reg = State.AllocateReg(RegList3)) {
558      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
559      return false;
560    }
561  }
562
563  if (LocVT == MVT::f32) {
564    static const MCPhysReg ShadowRegList4[] = {
565      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
566    };
567    unsigned Offset5 = State.AllocateStack(4, 4, ShadowRegList4);
568    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset5, LocVT, LocInfo));
569    return false;
570  }
571
572  if (LocVT == MVT::f64) {
573    static const MCPhysReg ShadowRegList6[] = {
574      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
575    };
576    unsigned Offset7 = State.AllocateStack(8, 4, ShadowRegList6);
577    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset7, LocVT, LocInfo));
578    return false;
579  }
580
581  if (LocVT == MVT::v2f64) {
582    static const MCPhysReg ShadowRegList8[] = {
583      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
584    };
585    unsigned Offset9 = State.AllocateStack(16, 4, ShadowRegList8);
586    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset9, LocVT, LocInfo));
587    return false;
588  }
589
590  if (!CC_ARM_APCS(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
591    return false;
592
593  return true;  // CC didn't match.
594}
595
596
597bool llvm::RetCC_ARM_AAPCS(unsigned ValNo, MVT ValVT,
598                           MVT LocVT, CCValAssign::LocInfo LocInfo,
599                           ISD::ArgFlagsTy ArgFlags, CCState &State) {
600
601  if (LocVT == MVT::v1i64 ||
602      LocVT == MVT::v2i32 ||
603      LocVT == MVT::v4i16 ||
604      LocVT == MVT::v4f16 ||
605      LocVT == MVT::v8i8 ||
606      LocVT == MVT::v2f32) {
607    LocVT = MVT::f64;
608    LocInfo = CCValAssign::BCvt;
609  }
610
611  if (LocVT == MVT::v2i64 ||
612      LocVT == MVT::v4i32 ||
613      LocVT == MVT::v8i16 ||
614      LocVT == MVT::v8f16 ||
615      LocVT == MVT::v16i8 ||
616      LocVT == MVT::v4f32) {
617    LocVT = MVT::v2f64;
618    LocInfo = CCValAssign::BCvt;
619  }
620
621  if (ArgFlags.isSwiftSelf()) {
622    if (LocVT == MVT::i32) {
623      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
624        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
625        return false;
626      }
627    }
628  }
629
630  if (ArgFlags.isSwiftError()) {
631    if (LocVT == MVT::i32) {
632      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
633        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
634        return false;
635      }
636    }
637  }
638
639  if (LocVT == MVT::f64 ||
640      LocVT == MVT::v2f64) {
641    if (RetCC_ARM_AAPCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
642        return false;
643  }
644
645  if (LocVT == MVT::f32) {
646    LocVT = MVT::i32;
647    LocInfo = CCValAssign::BCvt;
648  }
649
650  if (!RetCC_ARM_AAPCS_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
651    return false;
652
653  return true;  // CC didn't match.
654}
655
656
657static bool RetCC_ARM_AAPCS_Common(unsigned ValNo, MVT ValVT,
658                                   MVT LocVT, CCValAssign::LocInfo LocInfo,
659                                   ISD::ArgFlagsTy ArgFlags, CCState &State) {
660
661  if (LocVT == MVT::i1 ||
662      LocVT == MVT::i8 ||
663      LocVT == MVT::i16) {
664    LocVT = MVT::i32;
665    if (ArgFlags.isSExt())
666        LocInfo = CCValAssign::SExt;
667    else if (ArgFlags.isZExt())
668        LocInfo = CCValAssign::ZExt;
669    else
670        LocInfo = CCValAssign::AExt;
671  }
672
673  if (LocVT == MVT::i32) {
674    static const MCPhysReg RegList1[] = {
675      ARM::R0, ARM::R1, ARM::R2, ARM::R3
676    };
677    if (unsigned Reg = State.AllocateReg(RegList1)) {
678      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
679      return false;
680    }
681  }
682
683  if (LocVT == MVT::i64) {
684    static const MCPhysReg RegList2[] = {
685      ARM::R0, ARM::R2
686    };
687    static const MCPhysReg RegList3[] = {
688      ARM::R1, ARM::R3
689    };
690    if (unsigned Reg = State.AllocateReg(RegList2, RegList3)) {
691      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
692      return false;
693    }
694  }
695
696  return true;  // CC didn't match.
697}
698
699
700bool llvm::RetCC_ARM_AAPCS_VFP(unsigned ValNo, MVT ValVT,
701                               MVT LocVT, CCValAssign::LocInfo LocInfo,
702                               ISD::ArgFlagsTy ArgFlags, CCState &State) {
703
704  if (LocVT == MVT::v1i64 ||
705      LocVT == MVT::v2i32 ||
706      LocVT == MVT::v4i16 ||
707      LocVT == MVT::v4f16 ||
708      LocVT == MVT::v8i8 ||
709      LocVT == MVT::v2f32) {
710    LocVT = MVT::f64;
711    LocInfo = CCValAssign::BCvt;
712  }
713
714  if (LocVT == MVT::v2i64 ||
715      LocVT == MVT::v4i32 ||
716      LocVT == MVT::v8i16 ||
717      LocVT == MVT::v8f16 ||
718      LocVT == MVT::v16i8 ||
719      LocVT == MVT::v4f32) {
720    LocVT = MVT::v2f64;
721    LocInfo = CCValAssign::BCvt;
722  }
723
724  if (ArgFlags.isSwiftSelf()) {
725    if (LocVT == MVT::i32) {
726      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
727        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
728        return false;
729      }
730    }
731  }
732
733  if (ArgFlags.isSwiftError()) {
734    if (LocVT == MVT::i32) {
735      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
736        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
737        return false;
738      }
739    }
740  }
741
742  if (LocVT == MVT::v2f64) {
743    static const MCPhysReg RegList1[] = {
744      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
745    };
746    if (unsigned Reg = State.AllocateReg(RegList1)) {
747      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
748      return false;
749    }
750  }
751
752  if (LocVT == MVT::f64) {
753    static const MCPhysReg RegList2[] = {
754      ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7
755    };
756    if (unsigned Reg = State.AllocateReg(RegList2)) {
757      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
758      return false;
759    }
760  }
761
762  if (LocVT == MVT::f32) {
763    static const MCPhysReg RegList3[] = {
764      ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
765    };
766    if (unsigned Reg = State.AllocateReg(RegList3)) {
767      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
768      return false;
769    }
770  }
771
772  if (!RetCC_ARM_AAPCS_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
773    return false;
774
775  return true;  // CC didn't match.
776}
777
778
779bool llvm::RetCC_ARM_APCS(unsigned ValNo, MVT ValVT,
780                          MVT LocVT, CCValAssign::LocInfo LocInfo,
781                          ISD::ArgFlagsTy ArgFlags, CCState &State) {
782
783  if (LocVT == MVT::i1 ||
784      LocVT == MVT::i8 ||
785      LocVT == MVT::i16) {
786    LocVT = MVT::i32;
787    if (ArgFlags.isSExt())
788        LocInfo = CCValAssign::SExt;
789    else if (ArgFlags.isZExt())
790        LocInfo = CCValAssign::ZExt;
791    else
792        LocInfo = CCValAssign::AExt;
793  }
794
795  if (LocVT == MVT::f32) {
796    LocVT = MVT::i32;
797    LocInfo = CCValAssign::BCvt;
798  }
799
800  if (ArgFlags.isSwiftSelf()) {
801    if (LocVT == MVT::i32) {
802      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
803        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
804        return false;
805      }
806    }
807  }
808
809  if (ArgFlags.isSwiftError()) {
810    if (LocVT == MVT::i32) {
811      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
812        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
813        return false;
814      }
815    }
816  }
817
818  if (LocVT == MVT::v1i64 ||
819      LocVT == MVT::v2i32 ||
820      LocVT == MVT::v4i16 ||
821      LocVT == MVT::v4f16 ||
822      LocVT == MVT::v8i8 ||
823      LocVT == MVT::v2f32) {
824    LocVT = MVT::f64;
825    LocInfo = CCValAssign::BCvt;
826  }
827
828  if (LocVT == MVT::v2i64 ||
829      LocVT == MVT::v4i32 ||
830      LocVT == MVT::v8i16 ||
831      LocVT == MVT::v8f16 ||
832      LocVT == MVT::v16i8 ||
833      LocVT == MVT::v4f32) {
834    LocVT = MVT::v2f64;
835    LocInfo = CCValAssign::BCvt;
836  }
837
838  if (LocVT == MVT::f64 ||
839      LocVT == MVT::v2f64) {
840    if (RetCC_ARM_APCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
841        return false;
842  }
843
844  if (LocVT == MVT::i32) {
845    static const MCPhysReg RegList1[] = {
846      ARM::R0, ARM::R1, ARM::R2, ARM::R3
847    };
848    if (unsigned Reg = State.AllocateReg(RegList1)) {
849      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
850      return false;
851    }
852  }
853
854  if (LocVT == MVT::i64) {
855    static const MCPhysReg RegList2[] = {
856      ARM::R0, ARM::R2
857    };
858    static const MCPhysReg RegList3[] = {
859      ARM::R1, ARM::R3
860    };
861    if (unsigned Reg = State.AllocateReg(RegList2, RegList3)) {
862      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
863      return false;
864    }
865  }
866
867  return true;  // CC didn't match.
868}
869
870
871bool llvm::RetFastCC_ARM_APCS(unsigned ValNo, MVT ValVT,
872                              MVT LocVT, CCValAssign::LocInfo LocInfo,
873                              ISD::ArgFlagsTy ArgFlags, CCState &State) {
874
875  if (LocVT == MVT::v1i64 ||
876      LocVT == MVT::v2i32 ||
877      LocVT == MVT::v4i16 ||
878      LocVT == MVT::v4f16 ||
879      LocVT == MVT::v8i8 ||
880      LocVT == MVT::v2f32) {
881    LocVT = MVT::f64;
882    LocInfo = CCValAssign::BCvt;
883  }
884
885  if (LocVT == MVT::v2i64 ||
886      LocVT == MVT::v4i32 ||
887      LocVT == MVT::v8i16 ||
888      LocVT == MVT::v8f16 ||
889      LocVT == MVT::v16i8 ||
890      LocVT == MVT::v4f32) {
891    LocVT = MVT::v2f64;
892    LocInfo = CCValAssign::BCvt;
893  }
894
895  if (LocVT == MVT::v2f64) {
896    static const MCPhysReg RegList1[] = {
897      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
898    };
899    if (unsigned Reg = State.AllocateReg(RegList1)) {
900      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
901      return false;
902    }
903  }
904
905  if (LocVT == MVT::f64) {
906    static const MCPhysReg RegList2[] = {
907      ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7
908    };
909    if (unsigned Reg = State.AllocateReg(RegList2)) {
910      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
911      return false;
912    }
913  }
914
915  if (LocVT == MVT::f32) {
916    static const MCPhysReg RegList3[] = {
917      ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
918    };
919    if (unsigned Reg = State.AllocateReg(RegList3)) {
920      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
921      return false;
922    }
923  }
924
925  if (!RetCC_ARM_APCS(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
926    return false;
927
928  return true;  // CC didn't match.
929}
930