1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ 2|* *| 3|* Assembly Matcher Source Fragment *| 4|* *| 5|* Automatically generated file, do not edit! *| 6|* *| 7\*===----------------------------------------------------------------------===*/ 8 9 10#ifdef GET_ASSEMBLER_HEADER 11#undef GET_ASSEMBLER_HEADER 12 // This should be included into the middle of the declaration of 13 // your subclasses implementation of MCTargetAsmParser. 14 FeatureBitset ComputeAvailableFeatures(const FeatureBitset &FB) const; 15 void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, 16 const OperandVector &Operands); 17 void convertToMapAndConstraints(unsigned Kind, 18 const OperandVector &Operands) override; 19 unsigned MatchInstructionImpl(const OperandVector &Operands, 20 MCInst &Inst, 21 uint64_t &ErrorInfo, 22 FeatureBitset &MissingFeatures, 23 bool matchingInlineAsm, 24 unsigned VariantID = 0); 25 unsigned MatchInstructionImpl(const OperandVector &Operands, 26 MCInst &Inst, 27 uint64_t &ErrorInfo, 28 bool matchingInlineAsm, 29 unsigned VariantID = 0) { 30 FeatureBitset MissingFeatures; 31 return MatchInstructionImpl(Operands, Inst, ErrorInfo, MissingFeatures, 32 matchingInlineAsm, VariantID); 33 } 34 35 OperandMatchResultTy MatchOperandParserImpl( 36 OperandVector &Operands, 37 StringRef Mnemonic, 38 bool ParseForAllFeatures = false); 39 OperandMatchResultTy tryCustomParseOperand( 40 OperandVector &Operands, 41 unsigned MCK); 42 43#endif // GET_ASSEMBLER_HEADER_INFO 44 45 46#ifdef GET_OPERAND_DIAGNOSTIC_TYPES 47#undef GET_OPERAND_DIAGNOSTIC_TYPES 48 49 Match_InvalidBareSymbol, 50 Match_InvalidImm32, 51 Match_InvalidSImm12, 52 Match_InvalidSImm12addlike, 53 Match_InvalidSImm12lu52id, 54 Match_InvalidSImm14lsl2, 55 Match_InvalidSImm16, 56 Match_InvalidSImm16lsl2, 57 Match_InvalidSImm20, 58 Match_InvalidSImm20lu12iw, 59 Match_InvalidSImm20lu32id, 60 Match_InvalidSImm20pcalau12i, 61 Match_InvalidSImm21lsl2, 62 Match_InvalidSImm26Operand, 63 Match_InvalidUImm12, 64 Match_InvalidUImm12ori, 65 Match_InvalidUImm14, 66 Match_InvalidUImm15, 67 Match_InvalidUImm2, 68 Match_InvalidUImm2plus1, 69 Match_InvalidUImm3, 70 Match_InvalidUImm5, 71 Match_InvalidUImm6, 72 Match_InvalidUImm8, 73 END_OPERAND_DIAGNOSTIC_TYPES 74#endif // GET_OPERAND_DIAGNOSTIC_TYPES 75 76 77#ifdef GET_REGISTER_MATCHER 78#undef GET_REGISTER_MATCHER 79 80// Bits for subtarget features that participate in instruction matching. 81enum SubtargetFeatureBits : uint8_t { 82 Feature_IsLA64Bit = 10, 83 Feature_IsLA32Bit = 9, 84 Feature_HasBasicFBit = 1, 85 Feature_HasBasicDBit = 0, 86 Feature_HasExtLSXBit = 4, 87 Feature_HasExtLASXBit = 2, 88 Feature_HasExtLVZBit = 5, 89 Feature_HasExtLBTBit = 3, 90 Feature_HasLaGlobalWithPcrelBit = 7, 91 Feature_HasLaGlobalWithAbsBit = 6, 92 Feature_HasLaLocalWithAbsBit = 8, 93}; 94 95static unsigned MatchRegisterName(StringRef Name) { 96 switch (Name.size()) { 97 default: break; 98 case 2: // 30 strings to match. 99 switch (Name[0]) { 100 default: break; 101 case 'f': // 20 strings to match. 102 switch (Name[1]) { 103 default: break; 104 case '0': // 2 strings to match. 105 return 1; // "f0" 106 case '1': // 2 strings to match. 107 return 2; // "f1" 108 case '2': // 2 strings to match. 109 return 3; // "f2" 110 case '3': // 2 strings to match. 111 return 4; // "f3" 112 case '4': // 2 strings to match. 113 return 5; // "f4" 114 case '5': // 2 strings to match. 115 return 6; // "f5" 116 case '6': // 2 strings to match. 117 return 7; // "f6" 118 case '7': // 2 strings to match. 119 return 8; // "f7" 120 case '8': // 2 strings to match. 121 return 9; // "f8" 122 case '9': // 2 strings to match. 123 return 10; // "f9" 124 } 125 break; 126 case 'r': // 10 strings to match. 127 switch (Name[1]) { 128 default: break; 129 case '0': // 1 string to match. 130 return 45; // "r0" 131 case '1': // 1 string to match. 132 return 46; // "r1" 133 case '2': // 1 string to match. 134 return 47; // "r2" 135 case '3': // 1 string to match. 136 return 48; // "r3" 137 case '4': // 1 string to match. 138 return 49; // "r4" 139 case '5': // 1 string to match. 140 return 50; // "r5" 141 case '6': // 1 string to match. 142 return 51; // "r6" 143 case '7': // 1 string to match. 144 return 52; // "r7" 145 case '8': // 1 string to match. 146 return 53; // "r8" 147 case '9': // 1 string to match. 148 return 54; // "r9" 149 } 150 break; 151 } 152 break; 153 case 3: // 66 strings to match. 154 switch (Name[0]) { 155 default: break; 156 case 'f': // 44 strings to match. 157 switch (Name[1]) { 158 default: break; 159 case '1': // 20 strings to match. 160 switch (Name[2]) { 161 default: break; 162 case '0': // 2 strings to match. 163 return 11; // "f10" 164 case '1': // 2 strings to match. 165 return 12; // "f11" 166 case '2': // 2 strings to match. 167 return 13; // "f12" 168 case '3': // 2 strings to match. 169 return 14; // "f13" 170 case '4': // 2 strings to match. 171 return 15; // "f14" 172 case '5': // 2 strings to match. 173 return 16; // "f15" 174 case '6': // 2 strings to match. 175 return 17; // "f16" 176 case '7': // 2 strings to match. 177 return 18; // "f17" 178 case '8': // 2 strings to match. 179 return 19; // "f18" 180 case '9': // 2 strings to match. 181 return 20; // "f19" 182 } 183 break; 184 case '2': // 20 strings to match. 185 switch (Name[2]) { 186 default: break; 187 case '0': // 2 strings to match. 188 return 21; // "f20" 189 case '1': // 2 strings to match. 190 return 22; // "f21" 191 case '2': // 2 strings to match. 192 return 23; // "f22" 193 case '3': // 2 strings to match. 194 return 24; // "f23" 195 case '4': // 2 strings to match. 196 return 25; // "f24" 197 case '5': // 2 strings to match. 198 return 26; // "f25" 199 case '6': // 2 strings to match. 200 return 27; // "f26" 201 case '7': // 2 strings to match. 202 return 28; // "f27" 203 case '8': // 2 strings to match. 204 return 29; // "f28" 205 case '9': // 2 strings to match. 206 return 30; // "f29" 207 } 208 break; 209 case '3': // 4 strings to match. 210 switch (Name[2]) { 211 default: break; 212 case '0': // 2 strings to match. 213 return 31; // "f30" 214 case '1': // 2 strings to match. 215 return 32; // "f31" 216 } 217 break; 218 } 219 break; 220 case 'r': // 22 strings to match. 221 switch (Name[1]) { 222 default: break; 223 case '1': // 10 strings to match. 224 switch (Name[2]) { 225 default: break; 226 case '0': // 1 string to match. 227 return 55; // "r10" 228 case '1': // 1 string to match. 229 return 56; // "r11" 230 case '2': // 1 string to match. 231 return 57; // "r12" 232 case '3': // 1 string to match. 233 return 58; // "r13" 234 case '4': // 1 string to match. 235 return 59; // "r14" 236 case '5': // 1 string to match. 237 return 60; // "r15" 238 case '6': // 1 string to match. 239 return 61; // "r16" 240 case '7': // 1 string to match. 241 return 62; // "r17" 242 case '8': // 1 string to match. 243 return 63; // "r18" 244 case '9': // 1 string to match. 245 return 64; // "r19" 246 } 247 break; 248 case '2': // 10 strings to match. 249 switch (Name[2]) { 250 default: break; 251 case '0': // 1 string to match. 252 return 65; // "r20" 253 case '1': // 1 string to match. 254 return 66; // "r21" 255 case '2': // 1 string to match. 256 return 67; // "r22" 257 case '3': // 1 string to match. 258 return 68; // "r23" 259 case '4': // 1 string to match. 260 return 69; // "r24" 261 case '5': // 1 string to match. 262 return 70; // "r25" 263 case '6': // 1 string to match. 264 return 71; // "r26" 265 case '7': // 1 string to match. 266 return 72; // "r27" 267 case '8': // 1 string to match. 268 return 73; // "r28" 269 case '9': // 1 string to match. 270 return 74; // "r29" 271 } 272 break; 273 case '3': // 2 strings to match. 274 switch (Name[2]) { 275 default: break; 276 case '0': // 1 string to match. 277 return 75; // "r30" 278 case '1': // 1 string to match. 279 return 76; // "r31" 280 } 281 break; 282 } 283 break; 284 } 285 break; 286 case 4: // 8 strings to match. 287 if (memcmp(Name.data()+0, "fcc", 3) != 0) 288 break; 289 switch (Name[3]) { 290 default: break; 291 case '0': // 1 string to match. 292 return 33; // "fcc0" 293 case '1': // 1 string to match. 294 return 34; // "fcc1" 295 case '2': // 1 string to match. 296 return 35; // "fcc2" 297 case '3': // 1 string to match. 298 return 36; // "fcc3" 299 case '4': // 1 string to match. 300 return 37; // "fcc4" 301 case '5': // 1 string to match. 302 return 38; // "fcc5" 303 case '6': // 1 string to match. 304 return 39; // "fcc6" 305 case '7': // 1 string to match. 306 return 40; // "fcc7" 307 } 308 break; 309 case 5: // 4 strings to match. 310 if (memcmp(Name.data()+0, "fcsr", 4) != 0) 311 break; 312 switch (Name[4]) { 313 default: break; 314 case '0': // 1 string to match. 315 return 41; // "fcsr0" 316 case '1': // 1 string to match. 317 return 42; // "fcsr1" 318 case '2': // 1 string to match. 319 return 43; // "fcsr2" 320 case '3': // 1 string to match. 321 return 44; // "fcsr3" 322 } 323 break; 324 } 325 return 0; 326} 327 328static unsigned MatchRegisterAltName(StringRef Name) { 329 switch (Name.size()) { 330 default: break; 331 case 2: // 31 strings to match. 332 switch (Name[0]) { 333 default: break; 334 case 'a': // 8 strings to match. 335 switch (Name[1]) { 336 default: break; 337 case '0': // 1 string to match. 338 return 49; // "a0" 339 case '1': // 1 string to match. 340 return 50; // "a1" 341 case '2': // 1 string to match. 342 return 51; // "a2" 343 case '3': // 1 string to match. 344 return 52; // "a3" 345 case '4': // 1 string to match. 346 return 53; // "a4" 347 case '5': // 1 string to match. 348 return 54; // "a5" 349 case '6': // 1 string to match. 350 return 55; // "a6" 351 case '7': // 1 string to match. 352 return 56; // "a7" 353 } 354 break; 355 case 'f': // 1 string to match. 356 if (Name[1] != 'p') 357 break; 358 return 67; // "fp" 359 case 'r': // 1 string to match. 360 if (Name[1] != 'a') 361 break; 362 return 46; // "ra" 363 case 's': // 11 strings to match. 364 switch (Name[1]) { 365 default: break; 366 case '0': // 1 string to match. 367 return 68; // "s0" 368 case '1': // 1 string to match. 369 return 69; // "s1" 370 case '2': // 1 string to match. 371 return 70; // "s2" 372 case '3': // 1 string to match. 373 return 71; // "s3" 374 case '4': // 1 string to match. 375 return 72; // "s4" 376 case '5': // 1 string to match. 377 return 73; // "s5" 378 case '6': // 1 string to match. 379 return 74; // "s6" 380 case '7': // 1 string to match. 381 return 75; // "s7" 382 case '8': // 1 string to match. 383 return 76; // "s8" 384 case '9': // 1 string to match. 385 return 67; // "s9" 386 case 'p': // 1 string to match. 387 return 48; // "sp" 388 } 389 break; 390 case 't': // 10 strings to match. 391 switch (Name[1]) { 392 default: break; 393 case '0': // 1 string to match. 394 return 57; // "t0" 395 case '1': // 1 string to match. 396 return 58; // "t1" 397 case '2': // 1 string to match. 398 return 59; // "t2" 399 case '3': // 1 string to match. 400 return 60; // "t3" 401 case '4': // 1 string to match. 402 return 61; // "t4" 403 case '5': // 1 string to match. 404 return 62; // "t5" 405 case '6': // 1 string to match. 406 return 63; // "t6" 407 case '7': // 1 string to match. 408 return 64; // "t7" 409 case '8': // 1 string to match. 410 return 65; // "t8" 411 case 'p': // 1 string to match. 412 return 47; // "tp" 413 } 414 break; 415 } 416 break; 417 case 3: // 52 strings to match. 418 if (Name[0] != 'f') 419 break; 420 switch (Name[1]) { 421 default: break; 422 case 'a': // 16 strings to match. 423 switch (Name[2]) { 424 default: break; 425 case '0': // 2 strings to match. 426 return 1; // "fa0" 427 case '1': // 2 strings to match. 428 return 2; // "fa1" 429 case '2': // 2 strings to match. 430 return 3; // "fa2" 431 case '3': // 2 strings to match. 432 return 4; // "fa3" 433 case '4': // 2 strings to match. 434 return 5; // "fa4" 435 case '5': // 2 strings to match. 436 return 6; // "fa5" 437 case '6': // 2 strings to match. 438 return 7; // "fa6" 439 case '7': // 2 strings to match. 440 return 8; // "fa7" 441 } 442 break; 443 case 's': // 16 strings to match. 444 switch (Name[2]) { 445 default: break; 446 case '0': // 2 strings to match. 447 return 25; // "fs0" 448 case '1': // 2 strings to match. 449 return 26; // "fs1" 450 case '2': // 2 strings to match. 451 return 27; // "fs2" 452 case '3': // 2 strings to match. 453 return 28; // "fs3" 454 case '4': // 2 strings to match. 455 return 29; // "fs4" 456 case '5': // 2 strings to match. 457 return 30; // "fs5" 458 case '6': // 2 strings to match. 459 return 31; // "fs6" 460 case '7': // 2 strings to match. 461 return 32; // "fs7" 462 } 463 break; 464 case 't': // 20 strings to match. 465 switch (Name[2]) { 466 default: break; 467 case '0': // 2 strings to match. 468 return 9; // "ft0" 469 case '1': // 2 strings to match. 470 return 10; // "ft1" 471 case '2': // 2 strings to match. 472 return 11; // "ft2" 473 case '3': // 2 strings to match. 474 return 12; // "ft3" 475 case '4': // 2 strings to match. 476 return 13; // "ft4" 477 case '5': // 2 strings to match. 478 return 14; // "ft5" 479 case '6': // 2 strings to match. 480 return 15; // "ft6" 481 case '7': // 2 strings to match. 482 return 16; // "ft7" 483 case '8': // 2 strings to match. 484 return 17; // "ft8" 485 case '9': // 2 strings to match. 486 return 18; // "ft9" 487 } 488 break; 489 } 490 break; 491 case 4: // 13 strings to match. 492 switch (Name[0]) { 493 default: break; 494 case 'f': // 12 strings to match. 495 if (memcmp(Name.data()+1, "t1", 2) != 0) 496 break; 497 switch (Name[3]) { 498 default: break; 499 case '0': // 2 strings to match. 500 return 19; // "ft10" 501 case '1': // 2 strings to match. 502 return 20; // "ft11" 503 case '2': // 2 strings to match. 504 return 21; // "ft12" 505 case '3': // 2 strings to match. 506 return 22; // "ft13" 507 case '4': // 2 strings to match. 508 return 23; // "ft14" 509 case '5': // 2 strings to match. 510 return 24; // "ft15" 511 } 512 break; 513 case 'z': // 1 string to match. 514 if (memcmp(Name.data()+1, "ero", 3) != 0) 515 break; 516 return 45; // "zero" 517 } 518 break; 519 } 520 return 0; 521} 522 523#endif // GET_REGISTER_MATCHER 524 525 526#ifdef GET_SUBTARGET_FEATURE_NAME 527#undef GET_SUBTARGET_FEATURE_NAME 528 529// User-level names for subtarget features that participate in 530// instruction matching. 531static const char *getSubtargetFeatureName(uint64_t Val) { 532 switch(Val) { 533 case Feature_IsLA64Bit: return "LA64 Basic Integer and Privilege Instruction Set"; 534 case Feature_IsLA32Bit: return "LA32 Basic Integer and Privilege Instruction Set"; 535 case Feature_HasBasicFBit: return "'F' (Single-Precision Floating-Point)"; 536 case Feature_HasBasicDBit: return "'D' (Double-Precision Floating-Point)"; 537 case Feature_HasExtLSXBit: return "'LSX' (Loongson SIMD Extension)"; 538 case Feature_HasExtLASXBit: return "'LASX' (Loongson Advanced SIMD Extension)"; 539 case Feature_HasExtLVZBit: return "'LVZ' (Loongson Virtualization Extension)"; 540 case Feature_HasExtLBTBit: return "'LBT' (Loongson Binary Translation Extension)"; 541 case Feature_HasLaGlobalWithPcrelBit: return "Expand la.global as la.pcrel"; 542 case Feature_HasLaGlobalWithAbsBit: return "Expand la.global as la.abs"; 543 case Feature_HasLaLocalWithAbsBit: return "Expand la.local as la.abs"; 544 default: return "(unknown)"; 545 } 546} 547 548#endif // GET_SUBTARGET_FEATURE_NAME 549 550 551#ifdef GET_MATCHER_IMPLEMENTATION 552#undef GET_MATCHER_IMPLEMENTATION 553 554enum { 555 Tie0_1_1, 556}; 557 558static const uint8_t TiedAsmOperandTable[][3] = { 559 /* Tie0_1_1 */ { 0, 1, 1 }, 560}; 561 562namespace { 563enum OperatorConversionKind { 564 CVT_Done, 565 CVT_Reg, 566 CVT_Tied, 567 CVT_95_Reg, 568 CVT_95_addImmOperands, 569 CVT_95_addRegOperands, 570 CVT_regR0, 571 CVT_imm_95_0, 572 CVT_regR1, 573 CVT_NUM_CONVERTERS 574}; 575 576enum InstructionConversionKind { 577 Convert__Reg1_0__Reg1_1__Reg1_2, 578 Convert__Reg1_0__Reg1_1__SImm12addlike1_2, 579 Convert__Reg1_0__Reg1_1__SImm161_2, 580 Convert__Reg1_0__Reg1_1__Reg1_2__UImm2plus11_3, 581 Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, 582 Convert__Reg1_0__Reg1_1__UImm121_2, 583 Convert__Reg1_0__Reg1_1, 584 Convert__SImm26OperandB1_0, 585 Convert__Reg1_0__SImm21lsl21_1, 586 Convert__Reg1_0__Reg1_1__SImm16lsl21_2, 587 Convert__Reg1_0__regR0__SImm16lsl21_1, 588 Convert__Reg1_1__Reg1_0__SImm16lsl21_2, 589 Convert__regR0__Reg1_0__SImm16lsl21_1, 590 Convert__SImm26OperandBL1_0, 591 Convert__UImm151_0, 592 Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2__UImm61_3, 593 Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2__UImm51_3, 594 Convert__Reg1_0__Reg1_1__UImm61_2__UImm61_3, 595 Convert__Reg1_0__Reg1_1__UImm51_2__UImm51_3, 596 Convert__Reg1_0__Reg1_1__Reg1_2__UImm31_3, 597 Convert__Reg1_0__Reg1_1__Reg1_2__UImm21_3, 598 Convert__UImm51_0__Reg1_1__SImm121_2, 599 Convert__Reg1_0__UImm141_1, 600 Convert__Reg1_0__Tie0_1_1__UImm141_1, 601 Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm141_2, 602 Convert_NoOperands, 603 Convert__Reg1_0__Reg1_1__SImm121_2, 604 Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 605 Convert__Reg1_2__Reg1_1__UImm51_0, 606 Convert__regR0__Reg1_0__imm_95_0, 607 Convert__Reg1_0__BareSymbol1_1, 608 Convert__Reg1_0__imm_95_0__BareSymbol1_1, 609 Convert__Reg1_0__Reg1_1__BareSymbol1_2, 610 Convert__Reg1_0__Reg1_1__UImm81_2, 611 Convert__Reg1_0__UImm81_1, 612 Convert__Reg1_0__Reg1_1__SImm14lsl21_2, 613 Convert__Reg1_0__Imm1_1, 614 Convert__Reg1_0__Imm321_1, 615 Convert__Reg1_0__SImm20lu12iw1_1, 616 Convert__Reg1_0__Tie0_1_1__SImm20lu32id1_1, 617 Convert__Reg1_0__Reg1_1__SImm12lu52id1_2, 618 Convert__Reg1_0__Reg1_1__regR0, 619 Convert__Reg1_0__Tie0_1_1__Reg1_1, 620 Convert__regR0__regR0__imm_95_0, 621 Convert__Reg1_0__Reg1_1__UImm12ori1_2, 622 Convert__Reg1_0__SImm201_1, 623 Convert__Reg1_0__SImm20pcalau12i1_1, 624 Convert__UImm51_0__Reg1_1__Reg1_2, 625 Convert__regR0__regR1__imm_95_0, 626 Convert__Reg1_0__Reg1_1__UImm61_2, 627 Convert__Reg1_0__Reg1_1__UImm51_2, 628 Convert__Reg1_0__Tie0_1_1__Reg1_1__SImm14lsl21_2, 629 CVT_NUM_SIGNATURES 630}; 631 632} // end anonymous namespace 633 634static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][11] = { 635 // Convert__Reg1_0__Reg1_1__Reg1_2 636 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done }, 637 // Convert__Reg1_0__Reg1_1__SImm12addlike1_2 638 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 639 // Convert__Reg1_0__Reg1_1__SImm161_2 640 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 641 // Convert__Reg1_0__Reg1_1__Reg1_2__UImm2plus11_3 642 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done }, 643 // Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2 644 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addRegOperands, 3, CVT_Done }, 645 // Convert__Reg1_0__Reg1_1__UImm121_2 646 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 647 // Convert__Reg1_0__Reg1_1 648 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done }, 649 // Convert__SImm26OperandB1_0 650 { CVT_95_addImmOperands, 1, CVT_Done }, 651 // Convert__Reg1_0__SImm21lsl21_1 652 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, 653 // Convert__Reg1_0__Reg1_1__SImm16lsl21_2 654 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 655 // Convert__Reg1_0__regR0__SImm16lsl21_1 656 { CVT_95_Reg, 1, CVT_regR0, 0, CVT_95_addImmOperands, 2, CVT_Done }, 657 // Convert__Reg1_1__Reg1_0__SImm16lsl21_2 658 { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_Done }, 659 // Convert__regR0__Reg1_0__SImm16lsl21_1 660 { CVT_regR0, 0, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, 661 // Convert__SImm26OperandBL1_0 662 { CVT_95_addImmOperands, 1, CVT_Done }, 663 // Convert__UImm151_0 664 { CVT_95_addImmOperands, 1, CVT_Done }, 665 // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2__UImm61_3 666 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, 667 // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2__UImm51_3 668 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, 669 // Convert__Reg1_0__Reg1_1__UImm61_2__UImm61_3 670 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, 671 // Convert__Reg1_0__Reg1_1__UImm51_2__UImm51_3 672 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, 673 // Convert__Reg1_0__Reg1_1__Reg1_2__UImm31_3 674 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done }, 675 // Convert__Reg1_0__Reg1_1__Reg1_2__UImm21_3 676 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done }, 677 // Convert__UImm51_0__Reg1_1__SImm121_2 678 { CVT_95_addImmOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 679 // Convert__Reg1_0__UImm141_1 680 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, 681 // Convert__Reg1_0__Tie0_1_1__UImm141_1 682 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done }, 683 // Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm141_2 684 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 685 // Convert_NoOperands 686 { CVT_Done }, 687 // Convert__Reg1_0__Reg1_1__SImm121_2 688 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 689 // Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3 690 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done }, 691 // Convert__Reg1_2__Reg1_1__UImm51_0 692 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done }, 693 // Convert__regR0__Reg1_0__imm_95_0 694 { CVT_regR0, 0, CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_Done }, 695 // Convert__Reg1_0__BareSymbol1_1 696 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, 697 // Convert__Reg1_0__imm_95_0__BareSymbol1_1 698 { CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_95_addImmOperands, 2, CVT_Done }, 699 // Convert__Reg1_0__Reg1_1__BareSymbol1_2 700 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 701 // Convert__Reg1_0__Reg1_1__UImm81_2 702 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 703 // Convert__Reg1_0__UImm81_1 704 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, 705 // Convert__Reg1_0__Reg1_1__SImm14lsl21_2 706 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 707 // Convert__Reg1_0__Imm1_1 708 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, 709 // Convert__Reg1_0__Imm321_1 710 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, 711 // Convert__Reg1_0__SImm20lu12iw1_1 712 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, 713 // Convert__Reg1_0__Tie0_1_1__SImm20lu32id1_1 714 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done }, 715 // Convert__Reg1_0__Reg1_1__SImm12lu52id1_2 716 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 717 // Convert__Reg1_0__Reg1_1__regR0 718 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_regR0, 0, CVT_Done }, 719 // Convert__Reg1_0__Tie0_1_1__Reg1_1 720 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_Done }, 721 // Convert__regR0__regR0__imm_95_0 722 { CVT_regR0, 0, CVT_regR0, 0, CVT_imm_95_0, 0, CVT_Done }, 723 // Convert__Reg1_0__Reg1_1__UImm12ori1_2 724 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 725 // Convert__Reg1_0__SImm201_1 726 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, 727 // Convert__Reg1_0__SImm20pcalau12i1_1 728 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, 729 // Convert__UImm51_0__Reg1_1__Reg1_2 730 { CVT_95_addImmOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done }, 731 // Convert__regR0__regR1__imm_95_0 732 { CVT_regR0, 0, CVT_regR1, 0, CVT_imm_95_0, 0, CVT_Done }, 733 // Convert__Reg1_0__Reg1_1__UImm61_2 734 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 735 // Convert__Reg1_0__Reg1_1__UImm51_2 736 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 737 // Convert__Reg1_0__Tie0_1_1__Reg1_1__SImm14lsl21_2 738 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done }, 739}; 740 741void LoongArchAsmParser:: 742convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, 743 const OperandVector &Operands) { 744 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!"); 745 const uint8_t *Converter = ConversionTable[Kind]; 746 unsigned OpIdx; 747 Inst.setOpcode(Opcode); 748 for (const uint8_t *p = Converter; *p; p += 2) { 749 OpIdx = *(p + 1); 750 switch (*p) { 751 default: llvm_unreachable("invalid conversion entry!"); 752 case CVT_Reg: 753 static_cast<LoongArchOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1); 754 break; 755 case CVT_Tied: { 756 assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) - 757 std::begin(TiedAsmOperandTable)) && 758 "Tied operand not found"); 759 unsigned TiedResOpnd = TiedAsmOperandTable[OpIdx][0]; 760 if (TiedResOpnd != (uint8_t)-1) 761 Inst.addOperand(Inst.getOperand(TiedResOpnd)); 762 break; 763 } 764 case CVT_95_Reg: 765 static_cast<LoongArchOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1); 766 break; 767 case CVT_95_addImmOperands: 768 static_cast<LoongArchOperand &>(*Operands[OpIdx]).addImmOperands(Inst, 1); 769 break; 770 case CVT_95_addRegOperands: 771 static_cast<LoongArchOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1); 772 break; 773 case CVT_regR0: 774 Inst.addOperand(MCOperand::createReg(LoongArch::R0)); 775 break; 776 case CVT_imm_95_0: 777 Inst.addOperand(MCOperand::createImm(0)); 778 break; 779 case CVT_regR1: 780 Inst.addOperand(MCOperand::createReg(LoongArch::R1)); 781 break; 782 } 783 } 784} 785 786void LoongArchAsmParser:: 787convertToMapAndConstraints(unsigned Kind, 788 const OperandVector &Operands) { 789 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!"); 790 unsigned NumMCOperands = 0; 791 const uint8_t *Converter = ConversionTable[Kind]; 792 for (const uint8_t *p = Converter; *p; p += 2) { 793 switch (*p) { 794 default: llvm_unreachable("invalid conversion entry!"); 795 case CVT_Reg: 796 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 797 Operands[*(p + 1)]->setConstraint("r"); 798 ++NumMCOperands; 799 break; 800 case CVT_Tied: 801 ++NumMCOperands; 802 break; 803 case CVT_95_Reg: 804 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 805 Operands[*(p + 1)]->setConstraint("r"); 806 NumMCOperands += 1; 807 break; 808 case CVT_95_addImmOperands: 809 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 810 Operands[*(p + 1)]->setConstraint("m"); 811 NumMCOperands += 1; 812 break; 813 case CVT_95_addRegOperands: 814 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 815 Operands[*(p + 1)]->setConstraint("m"); 816 NumMCOperands += 1; 817 break; 818 case CVT_regR0: 819 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 820 Operands[*(p + 1)]->setConstraint("m"); 821 ++NumMCOperands; 822 break; 823 case CVT_imm_95_0: 824 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 825 Operands[*(p + 1)]->setConstraint(""); 826 ++NumMCOperands; 827 break; 828 case CVT_regR1: 829 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); 830 Operands[*(p + 1)]->setConstraint("m"); 831 ++NumMCOperands; 832 break; 833 } 834 } 835} 836 837namespace { 838 839/// MatchClassKind - The kinds of classes which participate in 840/// instruction matching. 841enum MatchClassKind { 842 InvalidMatchClass = 0, 843 OptionalMatchClass = 1, 844 MCK_LAST_TOKEN = OptionalMatchClass, 845 MCK_FCSR, // register class 'FCSR' 846 MCK_CFR, // register class 'CFR' 847 MCK_GPRT, // register class 'GPRT' 848 MCK_FPR32, // register class 'FPR32' 849 MCK_FPR64, // register class 'FPR64' 850 MCK_GPR, // register class 'GPR' 851 MCK_LAST_REGISTER = MCK_GPR, 852 MCK_AtomicMemAsmOperand, // user defined class 'AtomicMemAsmOperand' 853 MCK_BareSymbol, // user defined class 'BareSymbol' 854 MCK_Imm, // user defined class 'ImmAsmOperand' 855 MCK_SImm26OperandB, // user defined class 'SImm26OperandB' 856 MCK_SImm26OperandBL, // user defined class 'SImm26OperandBL' 857 MCK_Imm32, // user defined class 'anonymous_3918' 858 MCK_UImm2, // user defined class 'anonymous_3919' 859 MCK_UImm2plus1, // user defined class 'anonymous_3920' 860 MCK_UImm3, // user defined class 'anonymous_3921' 861 MCK_UImm5, // user defined class 'anonymous_3922' 862 MCK_UImm6, // user defined class 'anonymous_3923' 863 MCK_UImm8, // user defined class 'anonymous_3924' 864 MCK_UImm12, // user defined class 'anonymous_3925' 865 MCK_UImm12ori, // user defined class 'anonymous_3926' 866 MCK_UImm14, // user defined class 'anonymous_3927' 867 MCK_UImm15, // user defined class 'anonymous_3928' 868 MCK_SImm12, // user defined class 'anonymous_3929' 869 MCK_SImm12addlike, // user defined class 'anonymous_3930' 870 MCK_SImm12lu52id, // user defined class 'anonymous_3931' 871 MCK_SImm14lsl2, // user defined class 'anonymous_3932' 872 MCK_SImm16, // user defined class 'anonymous_3933' 873 MCK_SImm16lsl2, // user defined class 'anonymous_3934' 874 MCK_SImm20, // user defined class 'anonymous_3935' 875 MCK_SImm20pcalau12i, // user defined class 'anonymous_3936' 876 MCK_SImm20lu12iw, // user defined class 'anonymous_3937' 877 MCK_SImm20lu32id, // user defined class 'anonymous_3938' 878 MCK_SImm21lsl2, // user defined class 'anonymous_3939' 879 NumMatchClassKinds 880}; 881 882} // end anonymous namespace 883 884static unsigned getDiagKindFromRegisterClass(MatchClassKind RegisterClass) { 885 return MCTargetAsmParser::Match_InvalidOperand; 886} 887 888static MatchClassKind matchTokenString(StringRef Name) { 889 return InvalidMatchClass; 890} 891 892/// isSubclass - Compute whether \p A is a subclass of \p B. 893static bool isSubclass(MatchClassKind A, MatchClassKind B) { 894 if (A == B) 895 return true; 896 897 switch (A) { 898 default: 899 return false; 900 901 case MCK_GPRT: 902 return B == MCK_GPR; 903 } 904} 905 906static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) { 907 LoongArchOperand &Operand = (LoongArchOperand &)GOp; 908 if (Kind == InvalidMatchClass) 909 return MCTargetAsmParser::Match_InvalidOperand; 910 911 if (Operand.isToken() && Kind <= MCK_LAST_TOKEN) 912 return isSubclass(matchTokenString(Operand.getToken()), Kind) ? 913 MCTargetAsmParser::Match_Success : 914 MCTargetAsmParser::Match_InvalidOperand; 915 916 switch (Kind) { 917 default: break; 918 // 'AtomicMemAsmOperand' class 919 case MCK_AtomicMemAsmOperand: { 920 DiagnosticPredicate DP(Operand.isGPR()); 921 if (DP.isMatch()) 922 return MCTargetAsmParser::Match_Success; 923 break; 924 } 925 // 'BareSymbol' class 926 case MCK_BareSymbol: { 927 DiagnosticPredicate DP(Operand.isBareSymbol()); 928 if (DP.isMatch()) 929 return MCTargetAsmParser::Match_Success; 930 if (DP.isNearMatch()) 931 return LoongArchAsmParser::Match_InvalidBareSymbol; 932 break; 933 } 934 // 'Imm' class 935 case MCK_Imm: { 936 DiagnosticPredicate DP(Operand.isImm()); 937 if (DP.isMatch()) 938 return MCTargetAsmParser::Match_Success; 939 break; 940 } 941 // 'SImm26OperandB' class 942 case MCK_SImm26OperandB: { 943 DiagnosticPredicate DP(Operand.isSImm26Operand()); 944 if (DP.isMatch()) 945 return MCTargetAsmParser::Match_Success; 946 if (DP.isNearMatch()) 947 return LoongArchAsmParser::Match_InvalidSImm26Operand; 948 break; 949 } 950 // 'SImm26OperandBL' class 951 case MCK_SImm26OperandBL: { 952 DiagnosticPredicate DP(Operand.isSImm26Operand()); 953 if (DP.isMatch()) 954 return MCTargetAsmParser::Match_Success; 955 if (DP.isNearMatch()) 956 return LoongArchAsmParser::Match_InvalidSImm26Operand; 957 break; 958 } 959 // 'Imm32' class 960 case MCK_Imm32: { 961 DiagnosticPredicate DP(Operand.isImm32()); 962 if (DP.isMatch()) 963 return MCTargetAsmParser::Match_Success; 964 if (DP.isNearMatch()) 965 return LoongArchAsmParser::Match_InvalidImm32; 966 break; 967 } 968 // 'UImm2' class 969 case MCK_UImm2: { 970 DiagnosticPredicate DP(Operand.isUImm2()); 971 if (DP.isMatch()) 972 return MCTargetAsmParser::Match_Success; 973 if (DP.isNearMatch()) 974 return LoongArchAsmParser::Match_InvalidUImm2; 975 break; 976 } 977 // 'UImm2plus1' class 978 case MCK_UImm2plus1: { 979 DiagnosticPredicate DP(Operand.isUImm2plus1()); 980 if (DP.isMatch()) 981 return MCTargetAsmParser::Match_Success; 982 if (DP.isNearMatch()) 983 return LoongArchAsmParser::Match_InvalidUImm2plus1; 984 break; 985 } 986 // 'UImm3' class 987 case MCK_UImm3: { 988 DiagnosticPredicate DP(Operand.isUImm3()); 989 if (DP.isMatch()) 990 return MCTargetAsmParser::Match_Success; 991 if (DP.isNearMatch()) 992 return LoongArchAsmParser::Match_InvalidUImm3; 993 break; 994 } 995 // 'UImm5' class 996 case MCK_UImm5: { 997 DiagnosticPredicate DP(Operand.isUImm5()); 998 if (DP.isMatch()) 999 return MCTargetAsmParser::Match_Success; 1000 if (DP.isNearMatch()) 1001 return LoongArchAsmParser::Match_InvalidUImm5; 1002 break; 1003 } 1004 // 'UImm6' class 1005 case MCK_UImm6: { 1006 DiagnosticPredicate DP(Operand.isUImm6()); 1007 if (DP.isMatch()) 1008 return MCTargetAsmParser::Match_Success; 1009 if (DP.isNearMatch()) 1010 return LoongArchAsmParser::Match_InvalidUImm6; 1011 break; 1012 } 1013 // 'UImm8' class 1014 case MCK_UImm8: { 1015 DiagnosticPredicate DP(Operand.isUImm8()); 1016 if (DP.isMatch()) 1017 return MCTargetAsmParser::Match_Success; 1018 if (DP.isNearMatch()) 1019 return LoongArchAsmParser::Match_InvalidUImm8; 1020 break; 1021 } 1022 // 'UImm12' class 1023 case MCK_UImm12: { 1024 DiagnosticPredicate DP(Operand.isUImm12()); 1025 if (DP.isMatch()) 1026 return MCTargetAsmParser::Match_Success; 1027 if (DP.isNearMatch()) 1028 return LoongArchAsmParser::Match_InvalidUImm12; 1029 break; 1030 } 1031 // 'UImm12ori' class 1032 case MCK_UImm12ori: { 1033 DiagnosticPredicate DP(Operand.isUImm12ori()); 1034 if (DP.isMatch()) 1035 return MCTargetAsmParser::Match_Success; 1036 if (DP.isNearMatch()) 1037 return LoongArchAsmParser::Match_InvalidUImm12ori; 1038 break; 1039 } 1040 // 'UImm14' class 1041 case MCK_UImm14: { 1042 DiagnosticPredicate DP(Operand.isUImm14()); 1043 if (DP.isMatch()) 1044 return MCTargetAsmParser::Match_Success; 1045 if (DP.isNearMatch()) 1046 return LoongArchAsmParser::Match_InvalidUImm14; 1047 break; 1048 } 1049 // 'UImm15' class 1050 case MCK_UImm15: { 1051 DiagnosticPredicate DP(Operand.isUImm15()); 1052 if (DP.isMatch()) 1053 return MCTargetAsmParser::Match_Success; 1054 if (DP.isNearMatch()) 1055 return LoongArchAsmParser::Match_InvalidUImm15; 1056 break; 1057 } 1058 // 'SImm12' class 1059 case MCK_SImm12: { 1060 DiagnosticPredicate DP(Operand.isSImm12()); 1061 if (DP.isMatch()) 1062 return MCTargetAsmParser::Match_Success; 1063 if (DP.isNearMatch()) 1064 return LoongArchAsmParser::Match_InvalidSImm12; 1065 break; 1066 } 1067 // 'SImm12addlike' class 1068 case MCK_SImm12addlike: { 1069 DiagnosticPredicate DP(Operand.isSImm12addlike()); 1070 if (DP.isMatch()) 1071 return MCTargetAsmParser::Match_Success; 1072 if (DP.isNearMatch()) 1073 return LoongArchAsmParser::Match_InvalidSImm12addlike; 1074 break; 1075 } 1076 // 'SImm12lu52id' class 1077 case MCK_SImm12lu52id: { 1078 DiagnosticPredicate DP(Operand.isSImm12lu52id()); 1079 if (DP.isMatch()) 1080 return MCTargetAsmParser::Match_Success; 1081 if (DP.isNearMatch()) 1082 return LoongArchAsmParser::Match_InvalidSImm12lu52id; 1083 break; 1084 } 1085 // 'SImm14lsl2' class 1086 case MCK_SImm14lsl2: { 1087 DiagnosticPredicate DP(Operand.isSImm14lsl2()); 1088 if (DP.isMatch()) 1089 return MCTargetAsmParser::Match_Success; 1090 if (DP.isNearMatch()) 1091 return LoongArchAsmParser::Match_InvalidSImm14lsl2; 1092 break; 1093 } 1094 // 'SImm16' class 1095 case MCK_SImm16: { 1096 DiagnosticPredicate DP(Operand.isSImm16()); 1097 if (DP.isMatch()) 1098 return MCTargetAsmParser::Match_Success; 1099 if (DP.isNearMatch()) 1100 return LoongArchAsmParser::Match_InvalidSImm16; 1101 break; 1102 } 1103 // 'SImm16lsl2' class 1104 case MCK_SImm16lsl2: { 1105 DiagnosticPredicate DP(Operand.isSImm16lsl2()); 1106 if (DP.isMatch()) 1107 return MCTargetAsmParser::Match_Success; 1108 if (DP.isNearMatch()) 1109 return LoongArchAsmParser::Match_InvalidSImm16lsl2; 1110 break; 1111 } 1112 // 'SImm20' class 1113 case MCK_SImm20: { 1114 DiagnosticPredicate DP(Operand.isSImm20()); 1115 if (DP.isMatch()) 1116 return MCTargetAsmParser::Match_Success; 1117 if (DP.isNearMatch()) 1118 return LoongArchAsmParser::Match_InvalidSImm20; 1119 break; 1120 } 1121 // 'SImm20pcalau12i' class 1122 case MCK_SImm20pcalau12i: { 1123 DiagnosticPredicate DP(Operand.isSImm20pcalau12i()); 1124 if (DP.isMatch()) 1125 return MCTargetAsmParser::Match_Success; 1126 if (DP.isNearMatch()) 1127 return LoongArchAsmParser::Match_InvalidSImm20pcalau12i; 1128 break; 1129 } 1130 // 'SImm20lu12iw' class 1131 case MCK_SImm20lu12iw: { 1132 DiagnosticPredicate DP(Operand.isSImm20lu12iw()); 1133 if (DP.isMatch()) 1134 return MCTargetAsmParser::Match_Success; 1135 if (DP.isNearMatch()) 1136 return LoongArchAsmParser::Match_InvalidSImm20lu12iw; 1137 break; 1138 } 1139 // 'SImm20lu32id' class 1140 case MCK_SImm20lu32id: { 1141 DiagnosticPredicate DP(Operand.isSImm20lu32id()); 1142 if (DP.isMatch()) 1143 return MCTargetAsmParser::Match_Success; 1144 if (DP.isNearMatch()) 1145 return LoongArchAsmParser::Match_InvalidSImm20lu32id; 1146 break; 1147 } 1148 // 'SImm21lsl2' class 1149 case MCK_SImm21lsl2: { 1150 DiagnosticPredicate DP(Operand.isSImm21lsl2()); 1151 if (DP.isMatch()) 1152 return MCTargetAsmParser::Match_Success; 1153 if (DP.isNearMatch()) 1154 return LoongArchAsmParser::Match_InvalidSImm21lsl2; 1155 break; 1156 } 1157 } // end switch (Kind) 1158 1159 if (Operand.isReg()) { 1160 MatchClassKind OpKind; 1161 switch (Operand.getReg()) { 1162 default: OpKind = InvalidMatchClass; break; 1163 case LoongArch::R0: OpKind = MCK_GPR; break; 1164 case LoongArch::R1: OpKind = MCK_GPR; break; 1165 case LoongArch::R2: OpKind = MCK_GPR; break; 1166 case LoongArch::R3: OpKind = MCK_GPR; break; 1167 case LoongArch::R4: OpKind = MCK_GPRT; break; 1168 case LoongArch::R5: OpKind = MCK_GPRT; break; 1169 case LoongArch::R6: OpKind = MCK_GPRT; break; 1170 case LoongArch::R7: OpKind = MCK_GPRT; break; 1171 case LoongArch::R8: OpKind = MCK_GPRT; break; 1172 case LoongArch::R9: OpKind = MCK_GPRT; break; 1173 case LoongArch::R10: OpKind = MCK_GPRT; break; 1174 case LoongArch::R11: OpKind = MCK_GPRT; break; 1175 case LoongArch::R12: OpKind = MCK_GPRT; break; 1176 case LoongArch::R13: OpKind = MCK_GPRT; break; 1177 case LoongArch::R14: OpKind = MCK_GPRT; break; 1178 case LoongArch::R15: OpKind = MCK_GPRT; break; 1179 case LoongArch::R16: OpKind = MCK_GPRT; break; 1180 case LoongArch::R17: OpKind = MCK_GPRT; break; 1181 case LoongArch::R18: OpKind = MCK_GPRT; break; 1182 case LoongArch::R19: OpKind = MCK_GPRT; break; 1183 case LoongArch::R20: OpKind = MCK_GPRT; break; 1184 case LoongArch::R21: OpKind = MCK_GPR; break; 1185 case LoongArch::R22: OpKind = MCK_GPR; break; 1186 case LoongArch::R23: OpKind = MCK_GPR; break; 1187 case LoongArch::R24: OpKind = MCK_GPR; break; 1188 case LoongArch::R25: OpKind = MCK_GPR; break; 1189 case LoongArch::R26: OpKind = MCK_GPR; break; 1190 case LoongArch::R27: OpKind = MCK_GPR; break; 1191 case LoongArch::R28: OpKind = MCK_GPR; break; 1192 case LoongArch::R29: OpKind = MCK_GPR; break; 1193 case LoongArch::R30: OpKind = MCK_GPR; break; 1194 case LoongArch::R31: OpKind = MCK_GPR; break; 1195 case LoongArch::F0: OpKind = MCK_FPR32; break; 1196 case LoongArch::F1: OpKind = MCK_FPR32; break; 1197 case LoongArch::F2: OpKind = MCK_FPR32; break; 1198 case LoongArch::F3: OpKind = MCK_FPR32; break; 1199 case LoongArch::F4: OpKind = MCK_FPR32; break; 1200 case LoongArch::F5: OpKind = MCK_FPR32; break; 1201 case LoongArch::F6: OpKind = MCK_FPR32; break; 1202 case LoongArch::F7: OpKind = MCK_FPR32; break; 1203 case LoongArch::F8: OpKind = MCK_FPR32; break; 1204 case LoongArch::F9: OpKind = MCK_FPR32; break; 1205 case LoongArch::F10: OpKind = MCK_FPR32; break; 1206 case LoongArch::F11: OpKind = MCK_FPR32; break; 1207 case LoongArch::F12: OpKind = MCK_FPR32; break; 1208 case LoongArch::F13: OpKind = MCK_FPR32; break; 1209 case LoongArch::F14: OpKind = MCK_FPR32; break; 1210 case LoongArch::F15: OpKind = MCK_FPR32; break; 1211 case LoongArch::F16: OpKind = MCK_FPR32; break; 1212 case LoongArch::F17: OpKind = MCK_FPR32; break; 1213 case LoongArch::F18: OpKind = MCK_FPR32; break; 1214 case LoongArch::F19: OpKind = MCK_FPR32; break; 1215 case LoongArch::F20: OpKind = MCK_FPR32; break; 1216 case LoongArch::F21: OpKind = MCK_FPR32; break; 1217 case LoongArch::F22: OpKind = MCK_FPR32; break; 1218 case LoongArch::F23: OpKind = MCK_FPR32; break; 1219 case LoongArch::F24: OpKind = MCK_FPR32; break; 1220 case LoongArch::F25: OpKind = MCK_FPR32; break; 1221 case LoongArch::F26: OpKind = MCK_FPR32; break; 1222 case LoongArch::F27: OpKind = MCK_FPR32; break; 1223 case LoongArch::F28: OpKind = MCK_FPR32; break; 1224 case LoongArch::F29: OpKind = MCK_FPR32; break; 1225 case LoongArch::F30: OpKind = MCK_FPR32; break; 1226 case LoongArch::F31: OpKind = MCK_FPR32; break; 1227 case LoongArch::F0_64: OpKind = MCK_FPR64; break; 1228 case LoongArch::F1_64: OpKind = MCK_FPR64; break; 1229 case LoongArch::F2_64: OpKind = MCK_FPR64; break; 1230 case LoongArch::F3_64: OpKind = MCK_FPR64; break; 1231 case LoongArch::F4_64: OpKind = MCK_FPR64; break; 1232 case LoongArch::F5_64: OpKind = MCK_FPR64; break; 1233 case LoongArch::F6_64: OpKind = MCK_FPR64; break; 1234 case LoongArch::F7_64: OpKind = MCK_FPR64; break; 1235 case LoongArch::F8_64: OpKind = MCK_FPR64; break; 1236 case LoongArch::F9_64: OpKind = MCK_FPR64; break; 1237 case LoongArch::F10_64: OpKind = MCK_FPR64; break; 1238 case LoongArch::F11_64: OpKind = MCK_FPR64; break; 1239 case LoongArch::F12_64: OpKind = MCK_FPR64; break; 1240 case LoongArch::F13_64: OpKind = MCK_FPR64; break; 1241 case LoongArch::F14_64: OpKind = MCK_FPR64; break; 1242 case LoongArch::F15_64: OpKind = MCK_FPR64; break; 1243 case LoongArch::F16_64: OpKind = MCK_FPR64; break; 1244 case LoongArch::F17_64: OpKind = MCK_FPR64; break; 1245 case LoongArch::F18_64: OpKind = MCK_FPR64; break; 1246 case LoongArch::F19_64: OpKind = MCK_FPR64; break; 1247 case LoongArch::F20_64: OpKind = MCK_FPR64; break; 1248 case LoongArch::F21_64: OpKind = MCK_FPR64; break; 1249 case LoongArch::F22_64: OpKind = MCK_FPR64; break; 1250 case LoongArch::F23_64: OpKind = MCK_FPR64; break; 1251 case LoongArch::F24_64: OpKind = MCK_FPR64; break; 1252 case LoongArch::F25_64: OpKind = MCK_FPR64; break; 1253 case LoongArch::F26_64: OpKind = MCK_FPR64; break; 1254 case LoongArch::F27_64: OpKind = MCK_FPR64; break; 1255 case LoongArch::F28_64: OpKind = MCK_FPR64; break; 1256 case LoongArch::F29_64: OpKind = MCK_FPR64; break; 1257 case LoongArch::F30_64: OpKind = MCK_FPR64; break; 1258 case LoongArch::F31_64: OpKind = MCK_FPR64; break; 1259 case LoongArch::FCC0: OpKind = MCK_CFR; break; 1260 case LoongArch::FCC1: OpKind = MCK_CFR; break; 1261 case LoongArch::FCC2: OpKind = MCK_CFR; break; 1262 case LoongArch::FCC3: OpKind = MCK_CFR; break; 1263 case LoongArch::FCC4: OpKind = MCK_CFR; break; 1264 case LoongArch::FCC5: OpKind = MCK_CFR; break; 1265 case LoongArch::FCC6: OpKind = MCK_CFR; break; 1266 case LoongArch::FCC7: OpKind = MCK_CFR; break; 1267 case LoongArch::FCSR0: OpKind = MCK_FCSR; break; 1268 case LoongArch::FCSR1: OpKind = MCK_FCSR; break; 1269 case LoongArch::FCSR2: OpKind = MCK_FCSR; break; 1270 case LoongArch::FCSR3: OpKind = MCK_FCSR; break; 1271 } 1272 return isSubclass(OpKind, Kind) ? (unsigned)MCTargetAsmParser::Match_Success : 1273 getDiagKindFromRegisterClass(Kind); 1274 } 1275 1276 if (Kind > MCK_LAST_TOKEN && Kind <= MCK_LAST_REGISTER) 1277 return getDiagKindFromRegisterClass(Kind); 1278 1279 return MCTargetAsmParser::Match_InvalidOperand; 1280} 1281 1282#ifndef NDEBUG 1283const char *getMatchClassName(MatchClassKind Kind) { 1284 switch (Kind) { 1285 case InvalidMatchClass: return "InvalidMatchClass"; 1286 case OptionalMatchClass: return "OptionalMatchClass"; 1287 case MCK_FCSR: return "MCK_FCSR"; 1288 case MCK_CFR: return "MCK_CFR"; 1289 case MCK_GPRT: return "MCK_GPRT"; 1290 case MCK_FPR32: return "MCK_FPR32"; 1291 case MCK_FPR64: return "MCK_FPR64"; 1292 case MCK_GPR: return "MCK_GPR"; 1293 case MCK_AtomicMemAsmOperand: return "MCK_AtomicMemAsmOperand"; 1294 case MCK_BareSymbol: return "MCK_BareSymbol"; 1295 case MCK_Imm: return "MCK_Imm"; 1296 case MCK_SImm26OperandB: return "MCK_SImm26OperandB"; 1297 case MCK_SImm26OperandBL: return "MCK_SImm26OperandBL"; 1298 case MCK_Imm32: return "MCK_Imm32"; 1299 case MCK_UImm2: return "MCK_UImm2"; 1300 case MCK_UImm2plus1: return "MCK_UImm2plus1"; 1301 case MCK_UImm3: return "MCK_UImm3"; 1302 case MCK_UImm5: return "MCK_UImm5"; 1303 case MCK_UImm6: return "MCK_UImm6"; 1304 case MCK_UImm8: return "MCK_UImm8"; 1305 case MCK_UImm12: return "MCK_UImm12"; 1306 case MCK_UImm12ori: return "MCK_UImm12ori"; 1307 case MCK_UImm14: return "MCK_UImm14"; 1308 case MCK_UImm15: return "MCK_UImm15"; 1309 case MCK_SImm12: return "MCK_SImm12"; 1310 case MCK_SImm12addlike: return "MCK_SImm12addlike"; 1311 case MCK_SImm12lu52id: return "MCK_SImm12lu52id"; 1312 case MCK_SImm14lsl2: return "MCK_SImm14lsl2"; 1313 case MCK_SImm16: return "MCK_SImm16"; 1314 case MCK_SImm16lsl2: return "MCK_SImm16lsl2"; 1315 case MCK_SImm20: return "MCK_SImm20"; 1316 case MCK_SImm20pcalau12i: return "MCK_SImm20pcalau12i"; 1317 case MCK_SImm20lu12iw: return "MCK_SImm20lu12iw"; 1318 case MCK_SImm20lu32id: return "MCK_SImm20lu32id"; 1319 case MCK_SImm21lsl2: return "MCK_SImm21lsl2"; 1320 case NumMatchClassKinds: return "NumMatchClassKinds"; 1321 } 1322 llvm_unreachable("unhandled MatchClassKind!"); 1323} 1324 1325#endif // NDEBUG 1326FeatureBitset LoongArchAsmParser:: 1327ComputeAvailableFeatures(const FeatureBitset &FB) const { 1328 FeatureBitset Features; 1329 if (FB[LoongArch::Feature64Bit]) 1330 Features.set(Feature_IsLA64Bit); 1331 if (!FB[LoongArch::Feature64Bit]) 1332 Features.set(Feature_IsLA32Bit); 1333 if (FB[LoongArch::FeatureBasicF]) 1334 Features.set(Feature_HasBasicFBit); 1335 if (FB[LoongArch::FeatureBasicD]) 1336 Features.set(Feature_HasBasicDBit); 1337 if (FB[LoongArch::FeatureExtLSX]) 1338 Features.set(Feature_HasExtLSXBit); 1339 if (FB[LoongArch::FeatureExtLASX]) 1340 Features.set(Feature_HasExtLASXBit); 1341 if (FB[LoongArch::FeatureExtLVZ]) 1342 Features.set(Feature_HasExtLVZBit); 1343 if (FB[LoongArch::FeatureExtLBT]) 1344 Features.set(Feature_HasExtLBTBit); 1345 if (FB[LoongArch::LaGlobalWithPcrel]) 1346 Features.set(Feature_HasLaGlobalWithPcrelBit); 1347 if (FB[LoongArch::LaGlobalWithAbs]) 1348 Features.set(Feature_HasLaGlobalWithAbsBit); 1349 if (FB[LoongArch::LaLocalWithAbs]) 1350 Features.set(Feature_HasLaLocalWithAbsBit); 1351 return Features; 1352} 1353 1354static bool checkAsmTiedOperandConstraints(const LoongArchAsmParser&AsmParser, 1355 unsigned Kind, 1356 const OperandVector &Operands, 1357 uint64_t &ErrorInfo) { 1358 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!"); 1359 const uint8_t *Converter = ConversionTable[Kind]; 1360 for (const uint8_t *p = Converter; *p; p += 2) { 1361 switch (*p) { 1362 case CVT_Tied: { 1363 unsigned OpIdx = *(p + 1); 1364 assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) - 1365 std::begin(TiedAsmOperandTable)) && 1366 "Tied operand not found"); 1367 unsigned OpndNum1 = TiedAsmOperandTable[OpIdx][1]; 1368 unsigned OpndNum2 = TiedAsmOperandTable[OpIdx][2]; 1369 if (OpndNum1 != OpndNum2) { 1370 auto &SrcOp1 = Operands[OpndNum1]; 1371 auto &SrcOp2 = Operands[OpndNum2]; 1372 if (!AsmParser.areEqualRegs(*SrcOp1, *SrcOp2)) { 1373 ErrorInfo = OpndNum2; 1374 return false; 1375 } 1376 } 1377 break; 1378 } 1379 default: 1380 break; 1381 } 1382 } 1383 return true; 1384} 1385 1386static const char MnemonicTable[] = 1387 "\005add.d\005add.w\006addi.d\006addi.w\taddu16i.d\006alsl.d\006alsl.w\007" 1388 "alsl.wu\007amadd.d\007amadd.w\namadd_db.d\namadd_db.w\007amand.d\007ama" 1389 "nd.w\namand_db.d\namand_db.w\007ammax.d\010ammax.du\007ammax.w\010ammax" 1390 ".wu\nammax_db.d\013ammax_db.du\nammax_db.w\013ammax_db.wu\007ammin.d\010" 1391 "ammin.du\007ammin.w\010ammin.wu\nammin_db.d\013ammin_db.du\nammin_db.w\013" 1392 "ammin_db.wu\006amor.d\006amor.w\tamor_db.d\tamor_db.w\010amswap.d\010am" 1393 "swap.w\013amswap_db.d\013amswap_db.w\007amxor.d\007amxor.w\namxor_db.d\n" 1394 "amxor_db.w\003and\004andi\004andn\010asrtgt.d\010asrtle.d\001b\005bceqz" 1395 "\005bcnez\003beq\004beqz\003bge\004bgeu\004bgez\003bgt\004bgtu\004bgtz\t" 1396 "bitrev.4b\tbitrev.8b\010bitrev.d\010bitrev.w\002bl\003ble\004bleu\004bl" 1397 "ez\003blt\004bltu\004bltz\003bne\004bnez\005break\tbstrins.d\tbstrins.w" 1398 "\nbstrpick.d\nbstrpick.w\nbytepick.d\nbytepick.w\005cacop\005clo.d\005c" 1399 "lo.w\005clz.d\005clz.w\006cpucfg\tcrc.w.b.w\tcrc.w.d.w\tcrc.w.h.w\tcrc." 1400 "w.w.w\ncrcc.w.b.w\ncrcc.w.d.w\ncrcc.w.h.w\ncrcc.w.w.w\005csrrd\005csrwr" 1401 "\007csrxchg\005cto.d\005cto.w\005ctz.d\005ctz.w\004dbar\004dbcl\005div." 1402 "d\006div.du\005div.w\006div.wu\004ertn\007ext.w.b\007ext.w.h\006fabs.d\006" 1403 "fabs.s\006fadd.d\006fadd.s\010fclass.d\010fclass.s\nfcmp.caf.d\nfcmp.ca" 1404 "f.s\nfcmp.ceq.d\nfcmp.ceq.s\nfcmp.cle.d\nfcmp.cle.s\nfcmp.clt.d\nfcmp.c" 1405 "lt.s\nfcmp.cne.d\nfcmp.cne.s\nfcmp.cor.d\nfcmp.cor.s\013fcmp.cueq.d\013" 1406 "fcmp.cueq.s\013fcmp.cule.d\013fcmp.cule.s\013fcmp.cult.d\013fcmp.cult.s" 1407 "\nfcmp.cun.d\nfcmp.cun.s\013fcmp.cune.d\013fcmp.cune.s\nfcmp.saf.d\nfcm" 1408 "p.saf.s\nfcmp.seq.d\nfcmp.seq.s\nfcmp.sle.d\nfcmp.sle.s\nfcmp.slt.d\nfc" 1409 "mp.slt.s\nfcmp.sne.d\nfcmp.sne.s\nfcmp.sor.d\nfcmp.sor.s\013fcmp.sueq.d" 1410 "\013fcmp.sueq.s\013fcmp.sule.d\013fcmp.sule.s\013fcmp.sult.d\013fcmp.su" 1411 "lt.s\nfcmp.sun.d\nfcmp.sun.s\013fcmp.sune.d\013fcmp.sune.s\013fcopysign" 1412 ".d\013fcopysign.s\010fcvt.d.s\010fcvt.s.d\006fdiv.d\006fdiv.s\tffint.d." 1413 "l\tffint.d.w\tffint.s.l\tffint.s.w\005fld.d\005fld.s\007fldgt.d\007fldg" 1414 "t.s\007fldle.d\007fldle.s\006fldx.d\006fldx.s\007flogb.d\007flogb.s\007" 1415 "fmadd.d\007fmadd.s\006fmax.d\006fmax.s\007fmaxa.d\007fmaxa.s\006fmin.d\006" 1416 "fmin.s\007fmina.d\007fmina.s\006fmov.d\006fmov.s\007fmsub.d\007fmsub.s\006" 1417 "fmul.d\006fmul.s\006fneg.d\006fneg.s\010fnmadd.d\010fnmadd.s\010fnmsub." 1418 "d\010fnmsub.s\010frecip.d\010frecip.s\007frint.d\007frint.s\010frsqrt.d" 1419 "\010frsqrt.s\tfscaleb.d\tfscaleb.s\004fsel\007fsqrt.d\007fsqrt.s\005fst" 1420 ".d\005fst.s\007fstgt.d\007fstgt.s\007fstle.d\007fstle.s\006fstx.d\006fs" 1421 "tx.s\006fsub.d\006fsub.s\tftint.l.d\tftint.l.s\tftint.w.d\tftint.w.s\013" 1422 "ftintrm.l.d\013ftintrm.l.s\013ftintrm.w.d\013ftintrm.w.s\014ftintrne.l." 1423 "d\014ftintrne.l.s\014ftintrne.w.d\014ftintrne.w.s\013ftintrp.l.d\013fti" 1424 "ntrp.l.s\013ftintrp.w.d\013ftintrp.w.s\013ftintrz.l.d\013ftintrz.l.s\013" 1425 "ftintrz.w.d\013ftintrz.w.s\004ibar\004idle\006invtlb\tiocsrrd.b\tiocsrr" 1426 "d.d\tiocsrrd.h\tiocsrrd.w\tiocsrwr.b\tiocsrwr.d\tiocsrwr.h\tiocsrwr.w\004" 1427 "jirl\002jr\002la\006la.abs\tla.global\006la.got\010la.local\010la.pcrel" 1428 "\tla.tls.gd\tla.tls.ie\tla.tls.ld\tla.tls.le\004ld.b\005ld.bu\004ld.d\004" 1429 "ld.h\005ld.hu\004ld.w\005ld.wu\005lddir\006ldgt.b\006ldgt.d\006ldgt.h\006" 1430 "ldgt.w\006ldle.b\006ldle.d\006ldle.h\006ldle.w\005ldpte\007ldptr.d\007l" 1431 "dptr.w\005ldx.b\006ldx.bu\005ldx.d\005ldx.h\006ldx.hu\005ldx.w\006ldx.w" 1432 "u\004li.d\004li.w\004ll.d\004ll.w\007lu12i.w\007lu32i.d\007lu52i.d\007m" 1433 "askeqz\007masknez\005mod.d\006mod.du\005mod.w\006mod.wu\010movcf2fr\010" 1434 "movcf2gr\004move\nmovfcsr2gr\010movfr2cf\nmovfr2gr.d\nmovfr2gr.s\013mov" 1435 "frh2gr.s\010movgr2cf\nmovgr2fcsr\nmovgr2fr.d\nmovgr2fr.w\013movgr2frh.w" 1436 "\005mul.d\005mul.w\006mulh.d\007mulh.du\006mulh.w\007mulh.wu\010mulw.d." 1437 "w\tmulw.d.wu\003nop\003nor\002or\003ori\003orn\006pcaddi\tpcaddu12i\tpc" 1438 "addu18i\tpcalau12i\005preld\006preldx\010rdtime.d\trdtimeh.w\trdtimel.w" 1439 "\003ret\007revb.2h\007revb.2w\007revb.4h\006revb.d\007revh.2w\006revh.d" 1440 "\006rotr.d\006rotr.w\007rotri.d\007rotri.w\004sc.d\004sc.w\005sll.d\005" 1441 "sll.w\006slli.d\006slli.w\003slt\004slti\004sltu\005sltui\005sra.d\005s" 1442 "ra.w\006srai.d\006srai.w\005srl.d\005srl.w\006srli.d\006srli.w\004st.b\004" 1443 "st.d\004st.h\004st.w\006stgt.b\006stgt.d\006stgt.h\006stgt.w\006stle.b\006" 1444 "stle.d\006stle.h\006stle.w\007stptr.d\007stptr.w\005stx.b\005stx.d\005s" 1445 "tx.h\005stx.w\005sub.d\005sub.w\007syscall\006tlbclr\007tlbfill\010tlbf" 1446 "lush\005tlbrd\007tlbsrch\005tlbwr\003xor\004xori"; 1447 1448// Feature bitsets. 1449enum : uint8_t { 1450 AMFBS_None, 1451 AMFBS_HasBasicD, 1452 AMFBS_HasBasicF, 1453 AMFBS_HasLaGlobalWithAbs, 1454 AMFBS_HasLaGlobalWithPcrel, 1455 AMFBS_HasLaLocalWithAbs, 1456 AMFBS_IsLA64, 1457 AMFBS_HasBasicD_IsLA64, 1458}; 1459 1460static constexpr FeatureBitset FeatureBitsets[] = { 1461 {}, // AMFBS_None 1462 {Feature_HasBasicDBit, }, 1463 {Feature_HasBasicFBit, }, 1464 {Feature_HasLaGlobalWithAbsBit, }, 1465 {Feature_HasLaGlobalWithPcrelBit, }, 1466 {Feature_HasLaLocalWithAbsBit, }, 1467 {Feature_IsLA64Bit, }, 1468 {Feature_HasBasicDBit, Feature_IsLA64Bit, }, 1469}; 1470 1471namespace { 1472 struct MatchEntry { 1473 uint16_t Mnemonic; 1474 uint16_t Opcode; 1475 uint8_t ConvertFn; 1476 uint8_t RequiredFeaturesIdx; 1477 uint8_t Classes[4]; 1478 StringRef getMnemonic() const { 1479 return StringRef(MnemonicTable + Mnemonic + 1, 1480 MnemonicTable[Mnemonic]); 1481 } 1482 }; 1483 1484 // Predicate for searching for an opcode. 1485 struct LessOpcode { 1486 bool operator()(const MatchEntry &LHS, StringRef RHS) { 1487 return LHS.getMnemonic() < RHS; 1488 } 1489 bool operator()(StringRef LHS, const MatchEntry &RHS) { 1490 return LHS < RHS.getMnemonic(); 1491 } 1492 bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) { 1493 return LHS.getMnemonic() < RHS.getMnemonic(); 1494 } 1495 }; 1496} // end anonymous namespace 1497 1498static const MatchEntry MatchTable0[] = { 1499 { 0 /* add.d */, LoongArch::ADD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1500 { 6 /* add.w */, LoongArch::ADD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1501 { 12 /* addi.d */, LoongArch::ADDI_D, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, 1502 { 19 /* addi.w */, LoongArch::ADDI_W, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, 1503 { 26 /* addu16i.d */, LoongArch::ADDU16I_D, Convert__Reg1_0__Reg1_1__SImm161_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm16 }, }, 1504 { 36 /* alsl.d */, LoongArch::ALSL_D, Convert__Reg1_0__Reg1_1__Reg1_2__UImm2plus11_3, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR, MCK_UImm2plus1 }, }, 1505 { 43 /* alsl.w */, LoongArch::ALSL_W, Convert__Reg1_0__Reg1_1__Reg1_2__UImm2plus11_3, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR, MCK_UImm2plus1 }, }, 1506 { 50 /* alsl.wu */, LoongArch::ALSL_WU, Convert__Reg1_0__Reg1_1__Reg1_2__UImm2plus11_3, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR, MCK_UImm2plus1 }, }, 1507 { 58 /* amadd.d */, LoongArch::AMADD_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1508 { 66 /* amadd.w */, LoongArch::AMADD_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1509 { 74 /* amadd_db.d */, LoongArch::AMADD_DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1510 { 85 /* amadd_db.w */, LoongArch::AMADD_DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1511 { 96 /* amand.d */, LoongArch::AMAND_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1512 { 104 /* amand.w */, LoongArch::AMAND_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1513 { 112 /* amand_db.d */, LoongArch::AMAND_DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1514 { 123 /* amand_db.w */, LoongArch::AMAND_DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1515 { 134 /* ammax.d */, LoongArch::AMMAX_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1516 { 142 /* ammax.du */, LoongArch::AMMAX_DU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1517 { 151 /* ammax.w */, LoongArch::AMMAX_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1518 { 159 /* ammax.wu */, LoongArch::AMMAX_WU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1519 { 168 /* ammax_db.d */, LoongArch::AMMAX_DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1520 { 179 /* ammax_db.du */, LoongArch::AMMAX_DB_DU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1521 { 191 /* ammax_db.w */, LoongArch::AMMAX_DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1522 { 202 /* ammax_db.wu */, LoongArch::AMMAX_DB_WU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1523 { 214 /* ammin.d */, LoongArch::AMMIN_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1524 { 222 /* ammin.du */, LoongArch::AMMIN_DU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1525 { 231 /* ammin.w */, LoongArch::AMMIN_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1526 { 239 /* ammin.wu */, LoongArch::AMMIN_WU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1527 { 248 /* ammin_db.d */, LoongArch::AMMIN_DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1528 { 259 /* ammin_db.du */, LoongArch::AMMIN_DB_DU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1529 { 271 /* ammin_db.w */, LoongArch::AMMIN_DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1530 { 282 /* ammin_db.wu */, LoongArch::AMMIN_DB_WU, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1531 { 294 /* amor.d */, LoongArch::AMOR_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1532 { 301 /* amor.w */, LoongArch::AMOR_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1533 { 308 /* amor_db.d */, LoongArch::AMOR_DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1534 { 318 /* amor_db.w */, LoongArch::AMOR_DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1535 { 328 /* amswap.d */, LoongArch::AMSWAP_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1536 { 337 /* amswap.w */, LoongArch::AMSWAP_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1537 { 346 /* amswap_db.d */, LoongArch::AMSWAP_DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1538 { 358 /* amswap_db.w */, LoongArch::AMSWAP_DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1539 { 370 /* amxor.d */, LoongArch::AMXOR_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1540 { 378 /* amxor.w */, LoongArch::AMXOR_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1541 { 386 /* amxor_db.d */, LoongArch::AMXOR_DB_D, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1542 { 397 /* amxor_db.w */, LoongArch::AMXOR_DB_W, Convert__Reg1_0__Reg1_1__AtomicMemAsmOperand1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_AtomicMemAsmOperand }, }, 1543 { 408 /* and */, LoongArch::AND, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1544 { 412 /* andi */, LoongArch::ANDI, Convert__Reg1_0__Reg1_1__UImm121_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm12 }, }, 1545 { 417 /* andn */, LoongArch::ANDN, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1546 { 422 /* asrtgt.d */, LoongArch::ASRTGT_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, 1547 { 431 /* asrtle.d */, LoongArch::ASRTLE_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, 1548 { 440 /* b */, LoongArch::B, Convert__SImm26OperandB1_0, AMFBS_None, { MCK_SImm26OperandB }, }, 1549 { 442 /* bceqz */, LoongArch::BCEQZ, Convert__Reg1_0__SImm21lsl21_1, AMFBS_HasBasicF, { MCK_CFR, MCK_SImm21lsl2 }, }, 1550 { 448 /* bcnez */, LoongArch::BCNEZ, Convert__Reg1_0__SImm21lsl21_1, AMFBS_HasBasicF, { MCK_CFR, MCK_SImm21lsl2 }, }, 1551 { 454 /* beq */, LoongArch::BEQ, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, }, 1552 { 458 /* beqz */, LoongArch::BEQZ, Convert__Reg1_0__SImm21lsl21_1, AMFBS_None, { MCK_GPR, MCK_SImm21lsl2 }, }, 1553 { 463 /* bge */, LoongArch::BGE, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, }, 1554 { 467 /* bgeu */, LoongArch::BGEU, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, }, 1555 { 472 /* bgez */, LoongArch::BGE, Convert__Reg1_0__regR0__SImm16lsl21_1, AMFBS_None, { MCK_GPR, MCK_SImm16lsl2 }, }, 1556 { 477 /* bgt */, LoongArch::BLT, Convert__Reg1_1__Reg1_0__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, }, 1557 { 481 /* bgtu */, LoongArch::BLTU, Convert__Reg1_1__Reg1_0__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, }, 1558 { 486 /* bgtz */, LoongArch::BLT, Convert__regR0__Reg1_0__SImm16lsl21_1, AMFBS_None, { MCK_GPR, MCK_SImm16lsl2 }, }, 1559 { 491 /* bitrev.4b */, LoongArch::BITREV_4B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, 1560 { 501 /* bitrev.8b */, LoongArch::BITREV_8B, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, 1561 { 511 /* bitrev.d */, LoongArch::BITREV_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, 1562 { 520 /* bitrev.w */, LoongArch::BITREV_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, 1563 { 529 /* bl */, LoongArch::BL, Convert__SImm26OperandBL1_0, AMFBS_None, { MCK_SImm26OperandBL }, }, 1564 { 532 /* ble */, LoongArch::BGE, Convert__Reg1_1__Reg1_0__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, }, 1565 { 536 /* bleu */, LoongArch::BGEU, Convert__Reg1_1__Reg1_0__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, }, 1566 { 541 /* blez */, LoongArch::BGE, Convert__regR0__Reg1_0__SImm16lsl21_1, AMFBS_None, { MCK_GPR, MCK_SImm16lsl2 }, }, 1567 { 546 /* blt */, LoongArch::BLT, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, }, 1568 { 550 /* bltu */, LoongArch::BLTU, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, }, 1569 { 555 /* bltz */, LoongArch::BLT, Convert__Reg1_0__regR0__SImm16lsl21_1, AMFBS_None, { MCK_GPR, MCK_SImm16lsl2 }, }, 1570 { 560 /* bne */, LoongArch::BNE, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, }, 1571 { 564 /* bnez */, LoongArch::BNEZ, Convert__Reg1_0__SImm21lsl21_1, AMFBS_None, { MCK_GPR, MCK_SImm21lsl2 }, }, 1572 { 569 /* break */, LoongArch::BREAK, Convert__UImm151_0, AMFBS_None, { MCK_UImm15 }, }, 1573 { 575 /* bstrins.d */, LoongArch::BSTRINS_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm61_2__UImm61_3, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_UImm6, MCK_UImm6 }, }, 1574 { 585 /* bstrins.w */, LoongArch::BSTRINS_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm51_2__UImm51_3, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm5, MCK_UImm5 }, }, 1575 { 595 /* bstrpick.d */, LoongArch::BSTRPICK_D, Convert__Reg1_0__Reg1_1__UImm61_2__UImm61_3, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_UImm6, MCK_UImm6 }, }, 1576 { 606 /* bstrpick.w */, LoongArch::BSTRPICK_W, Convert__Reg1_0__Reg1_1__UImm51_2__UImm51_3, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm5, MCK_UImm5 }, }, 1577 { 617 /* bytepick.d */, LoongArch::BYTEPICK_D, Convert__Reg1_0__Reg1_1__Reg1_2__UImm31_3, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR, MCK_UImm3 }, }, 1578 { 628 /* bytepick.w */, LoongArch::BYTEPICK_W, Convert__Reg1_0__Reg1_1__Reg1_2__UImm21_3, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR, MCK_UImm2 }, }, 1579 { 639 /* cacop */, LoongArch::CACOP, Convert__UImm51_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_UImm5, MCK_GPR, MCK_SImm12 }, }, 1580 { 645 /* clo.d */, LoongArch::CLO_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, 1581 { 651 /* clo.w */, LoongArch::CLO_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, 1582 { 657 /* clz.d */, LoongArch::CLZ_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, 1583 { 663 /* clz.w */, LoongArch::CLZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, 1584 { 669 /* cpucfg */, LoongArch::CPUCFG, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, 1585 { 676 /* crc.w.b.w */, LoongArch::CRC_W_B_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1586 { 686 /* crc.w.d.w */, LoongArch::CRC_W_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1587 { 696 /* crc.w.h.w */, LoongArch::CRC_W_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1588 { 706 /* crc.w.w.w */, LoongArch::CRC_W_W_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1589 { 716 /* crcc.w.b.w */, LoongArch::CRCC_W_B_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1590 { 727 /* crcc.w.d.w */, LoongArch::CRCC_W_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1591 { 738 /* crcc.w.h.w */, LoongArch::CRCC_W_H_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1592 { 749 /* crcc.w.w.w */, LoongArch::CRCC_W_W_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1593 { 760 /* csrrd */, LoongArch::CSRRD, Convert__Reg1_0__UImm141_1, AMFBS_None, { MCK_GPR, MCK_UImm14 }, }, 1594 { 766 /* csrwr */, LoongArch::CSRWR, Convert__Reg1_0__Tie0_1_1__UImm141_1, AMFBS_None, { MCK_GPR, MCK_UImm14 }, }, 1595 { 772 /* csrxchg */, LoongArch::CSRXCHG, Convert__Reg1_0__Tie0_1_1__Reg1_1__UImm141_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm14 }, }, 1596 { 780 /* cto.d */, LoongArch::CTO_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, 1597 { 786 /* cto.w */, LoongArch::CTO_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, 1598 { 792 /* ctz.d */, LoongArch::CTZ_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, 1599 { 798 /* ctz.w */, LoongArch::CTZ_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, 1600 { 804 /* dbar */, LoongArch::DBAR, Convert__UImm151_0, AMFBS_None, { MCK_UImm15 }, }, 1601 { 809 /* dbcl */, LoongArch::DBCL, Convert__UImm151_0, AMFBS_None, { MCK_UImm15 }, }, 1602 { 814 /* div.d */, LoongArch::DIV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1603 { 820 /* div.du */, LoongArch::DIV_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1604 { 827 /* div.w */, LoongArch::DIV_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1605 { 833 /* div.wu */, LoongArch::DIV_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1606 { 840 /* ertn */, LoongArch::ERTN, Convert_NoOperands, AMFBS_None, { }, }, 1607 { 845 /* ext.w.b */, LoongArch::EXT_W_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, 1608 { 853 /* ext.w.h */, LoongArch::EXT_W_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, 1609 { 861 /* fabs.d */, LoongArch::FABS_D, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64 }, }, 1610 { 868 /* fabs.s */, LoongArch::FABS_S, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32 }, }, 1611 { 875 /* fadd.d */, LoongArch::FADD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, 1612 { 882 /* fadd.s */, LoongArch::FADD_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, 1613 { 889 /* fclass.d */, LoongArch::FCLASS_D, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64 }, }, 1614 { 898 /* fclass.s */, LoongArch::FCLASS_S, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32 }, }, 1615 { 907 /* fcmp.caf.d */, LoongArch::FCMP_CAF_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, 1616 { 918 /* fcmp.caf.s */, LoongArch::FCMP_CAF_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, 1617 { 929 /* fcmp.ceq.d */, LoongArch::FCMP_CEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, 1618 { 940 /* fcmp.ceq.s */, LoongArch::FCMP_CEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, 1619 { 951 /* fcmp.cle.d */, LoongArch::FCMP_CLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, 1620 { 962 /* fcmp.cle.s */, LoongArch::FCMP_CLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, 1621 { 973 /* fcmp.clt.d */, LoongArch::FCMP_CLT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, 1622 { 984 /* fcmp.clt.s */, LoongArch::FCMP_CLT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, 1623 { 995 /* fcmp.cne.d */, LoongArch::FCMP_CNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, 1624 { 1006 /* fcmp.cne.s */, LoongArch::FCMP_CNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, 1625 { 1017 /* fcmp.cor.d */, LoongArch::FCMP_COR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, 1626 { 1028 /* fcmp.cor.s */, LoongArch::FCMP_COR_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, 1627 { 1039 /* fcmp.cueq.d */, LoongArch::FCMP_CUEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, 1628 { 1051 /* fcmp.cueq.s */, LoongArch::FCMP_CUEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, 1629 { 1063 /* fcmp.cule.d */, LoongArch::FCMP_CULE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, 1630 { 1075 /* fcmp.cule.s */, LoongArch::FCMP_CULE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, 1631 { 1087 /* fcmp.cult.d */, LoongArch::FCMP_CULT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, 1632 { 1099 /* fcmp.cult.s */, LoongArch::FCMP_CULT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, 1633 { 1111 /* fcmp.cun.d */, LoongArch::FCMP_CUN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, 1634 { 1122 /* fcmp.cun.s */, LoongArch::FCMP_CUN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, 1635 { 1133 /* fcmp.cune.d */, LoongArch::FCMP_CUNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, 1636 { 1145 /* fcmp.cune.s */, LoongArch::FCMP_CUNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, 1637 { 1157 /* fcmp.saf.d */, LoongArch::FCMP_SAF_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, 1638 { 1168 /* fcmp.saf.s */, LoongArch::FCMP_SAF_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, 1639 { 1179 /* fcmp.seq.d */, LoongArch::FCMP_SEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, 1640 { 1190 /* fcmp.seq.s */, LoongArch::FCMP_SEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, 1641 { 1201 /* fcmp.sle.d */, LoongArch::FCMP_SLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, 1642 { 1212 /* fcmp.sle.s */, LoongArch::FCMP_SLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, 1643 { 1223 /* fcmp.slt.d */, LoongArch::FCMP_SLT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, 1644 { 1234 /* fcmp.slt.s */, LoongArch::FCMP_SLT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, 1645 { 1245 /* fcmp.sne.d */, LoongArch::FCMP_SNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, 1646 { 1256 /* fcmp.sne.s */, LoongArch::FCMP_SNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, 1647 { 1267 /* fcmp.sor.d */, LoongArch::FCMP_SOR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, 1648 { 1278 /* fcmp.sor.s */, LoongArch::FCMP_SOR_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, 1649 { 1289 /* fcmp.sueq.d */, LoongArch::FCMP_SUEQ_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, 1650 { 1301 /* fcmp.sueq.s */, LoongArch::FCMP_SUEQ_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, 1651 { 1313 /* fcmp.sule.d */, LoongArch::FCMP_SULE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, 1652 { 1325 /* fcmp.sule.s */, LoongArch::FCMP_SULE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, 1653 { 1337 /* fcmp.sult.d */, LoongArch::FCMP_SULT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, 1654 { 1349 /* fcmp.sult.s */, LoongArch::FCMP_SULT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, 1655 { 1361 /* fcmp.sun.d */, LoongArch::FCMP_SUN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, 1656 { 1372 /* fcmp.sun.s */, LoongArch::FCMP_SUN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, 1657 { 1383 /* fcmp.sune.d */, LoongArch::FCMP_SUNE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_CFR, MCK_FPR64, MCK_FPR64 }, }, 1658 { 1395 /* fcmp.sune.s */, LoongArch::FCMP_SUNE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_CFR, MCK_FPR32, MCK_FPR32 }, }, 1659 { 1407 /* fcopysign.d */, LoongArch::FCOPYSIGN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, 1660 { 1419 /* fcopysign.s */, LoongArch::FCOPYSIGN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, 1661 { 1431 /* fcvt.d.s */, LoongArch::FCVT_D_S, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR32 }, }, 1662 { 1440 /* fcvt.s.d */, LoongArch::FCVT_S_D, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR32, MCK_FPR64 }, }, 1663 { 1449 /* fdiv.d */, LoongArch::FDIV_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, 1664 { 1456 /* fdiv.s */, LoongArch::FDIV_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, 1665 { 1463 /* ffint.d.l */, LoongArch::FFINT_D_L, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64 }, }, 1666 { 1473 /* ffint.d.w */, LoongArch::FFINT_D_W, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR32 }, }, 1667 { 1483 /* ffint.s.l */, LoongArch::FFINT_S_L, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR32, MCK_FPR64 }, }, 1668 { 1493 /* ffint.s.w */, LoongArch::FFINT_S_W, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32 }, }, 1669 { 1503 /* fld.d */, LoongArch::FLD_D, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_HasBasicD, { MCK_FPR64, MCK_GPR, MCK_SImm12 }, }, 1670 { 1509 /* fld.s */, LoongArch::FLD_S, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_HasBasicF, { MCK_FPR32, MCK_GPR, MCK_SImm12 }, }, 1671 { 1515 /* fldgt.d */, LoongArch::FLDGT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_FPR64, MCK_GPR, MCK_GPR }, }, 1672 { 1523 /* fldgt.s */, LoongArch::FLDGT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_FPR32, MCK_GPR, MCK_GPR }, }, 1673 { 1531 /* fldle.d */, LoongArch::FLDLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_FPR64, MCK_GPR, MCK_GPR }, }, 1674 { 1539 /* fldle.s */, LoongArch::FLDLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_FPR32, MCK_GPR, MCK_GPR }, }, 1675 { 1547 /* fldx.d */, LoongArch::FLDX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_FPR64, MCK_GPR, MCK_GPR }, }, 1676 { 1554 /* fldx.s */, LoongArch::FLDX_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_FPR32, MCK_GPR, MCK_GPR }, }, 1677 { 1561 /* flogb.d */, LoongArch::FLOGB_D, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64 }, }, 1678 { 1569 /* flogb.s */, LoongArch::FLOGB_S, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32 }, }, 1679 { 1577 /* fmadd.d */, LoongArch::FMADD_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, 1680 { 1585 /* fmadd.s */, LoongArch::FMADD_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, 1681 { 1593 /* fmax.d */, LoongArch::FMAX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, 1682 { 1600 /* fmax.s */, LoongArch::FMAX_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, 1683 { 1607 /* fmaxa.d */, LoongArch::FMAXA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, 1684 { 1615 /* fmaxa.s */, LoongArch::FMAXA_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, 1685 { 1623 /* fmin.d */, LoongArch::FMIN_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, 1686 { 1630 /* fmin.s */, LoongArch::FMIN_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, 1687 { 1637 /* fmina.d */, LoongArch::FMINA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, 1688 { 1645 /* fmina.s */, LoongArch::FMINA_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, 1689 { 1653 /* fmov.d */, LoongArch::FMOV_D, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64 }, }, 1690 { 1660 /* fmov.s */, LoongArch::FMOV_S, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32 }, }, 1691 { 1667 /* fmsub.d */, LoongArch::FMSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, 1692 { 1675 /* fmsub.s */, LoongArch::FMSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, 1693 { 1683 /* fmul.d */, LoongArch::FMUL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, 1694 { 1690 /* fmul.s */, LoongArch::FMUL_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, 1695 { 1697 /* fneg.d */, LoongArch::FNEG_D, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64 }, }, 1696 { 1704 /* fneg.s */, LoongArch::FNEG_S, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32 }, }, 1697 { 1711 /* fnmadd.d */, LoongArch::FNMADD_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, 1698 { 1720 /* fnmadd.s */, LoongArch::FNMADD_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, 1699 { 1729 /* fnmsub.d */, LoongArch::FNMSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, 1700 { 1738 /* fnmsub.s */, LoongArch::FNMSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, 1701 { 1747 /* frecip.d */, LoongArch::FRECIP_D, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64 }, }, 1702 { 1756 /* frecip.s */, LoongArch::FRECIP_S, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32 }, }, 1703 { 1765 /* frint.d */, LoongArch::FRINT_D, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64 }, }, 1704 { 1773 /* frint.s */, LoongArch::FRINT_S, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32 }, }, 1705 { 1781 /* frsqrt.d */, LoongArch::FRSQRT_D, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64 }, }, 1706 { 1790 /* frsqrt.s */, LoongArch::FRSQRT_S, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32 }, }, 1707 { 1799 /* fscaleb.d */, LoongArch::FSCALEB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, 1708 { 1809 /* fscaleb.s */, LoongArch::FSCALEB_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, 1709 { 1819 /* fsel */, LoongArch::FSEL_S, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_CFR }, }, 1710 { 1824 /* fsqrt.d */, LoongArch::FSQRT_D, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64 }, }, 1711 { 1832 /* fsqrt.s */, LoongArch::FSQRT_S, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32 }, }, 1712 { 1840 /* fst.d */, LoongArch::FST_D, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_HasBasicD, { MCK_FPR64, MCK_GPR, MCK_SImm12 }, }, 1713 { 1846 /* fst.s */, LoongArch::FST_S, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_HasBasicF, { MCK_FPR32, MCK_GPR, MCK_SImm12 }, }, 1714 { 1852 /* fstgt.d */, LoongArch::FSTGT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_FPR64, MCK_GPR, MCK_GPR }, }, 1715 { 1860 /* fstgt.s */, LoongArch::FSTGT_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_FPR32, MCK_GPR, MCK_GPR }, }, 1716 { 1868 /* fstle.d */, LoongArch::FSTLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_FPR64, MCK_GPR, MCK_GPR }, }, 1717 { 1876 /* fstle.s */, LoongArch::FSTLE_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_FPR32, MCK_GPR, MCK_GPR }, }, 1718 { 1884 /* fstx.d */, LoongArch::FSTX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_FPR64, MCK_GPR, MCK_GPR }, }, 1719 { 1891 /* fstx.s */, LoongArch::FSTX_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_FPR32, MCK_GPR, MCK_GPR }, }, 1720 { 1898 /* fsub.d */, LoongArch::FSUB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, 1721 { 1905 /* fsub.s */, LoongArch::FSUB_S, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, 1722 { 1912 /* ftint.l.d */, LoongArch::FTINT_L_D, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64 }, }, 1723 { 1922 /* ftint.l.s */, LoongArch::FTINT_L_S, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR32 }, }, 1724 { 1932 /* ftint.w.d */, LoongArch::FTINT_W_D, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR32, MCK_FPR64 }, }, 1725 { 1942 /* ftint.w.s */, LoongArch::FTINT_W_S, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32 }, }, 1726 { 1952 /* ftintrm.l.d */, LoongArch::FTINTRM_L_D, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64 }, }, 1727 { 1964 /* ftintrm.l.s */, LoongArch::FTINTRM_L_S, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR32 }, }, 1728 { 1976 /* ftintrm.w.d */, LoongArch::FTINTRM_W_D, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR32, MCK_FPR64 }, }, 1729 { 1988 /* ftintrm.w.s */, LoongArch::FTINTRM_W_S, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32 }, }, 1730 { 2000 /* ftintrne.l.d */, LoongArch::FTINTRNE_L_D, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64 }, }, 1731 { 2013 /* ftintrne.l.s */, LoongArch::FTINTRNE_L_S, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR32 }, }, 1732 { 2026 /* ftintrne.w.d */, LoongArch::FTINTRNE_W_D, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR32, MCK_FPR64 }, }, 1733 { 2039 /* ftintrne.w.s */, LoongArch::FTINTRNE_W_S, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32 }, }, 1734 { 2052 /* ftintrp.l.d */, LoongArch::FTINTRP_L_D, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64 }, }, 1735 { 2064 /* ftintrp.l.s */, LoongArch::FTINTRP_L_S, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR32 }, }, 1736 { 2076 /* ftintrp.w.d */, LoongArch::FTINTRP_W_D, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR32, MCK_FPR64 }, }, 1737 { 2088 /* ftintrp.w.s */, LoongArch::FTINTRP_W_S, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32 }, }, 1738 { 2100 /* ftintrz.l.d */, LoongArch::FTINTRZ_L_D, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR64 }, }, 1739 { 2112 /* ftintrz.l.s */, LoongArch::FTINTRZ_L_S, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR64, MCK_FPR32 }, }, 1740 { 2124 /* ftintrz.w.d */, LoongArch::FTINTRZ_W_D, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_FPR32, MCK_FPR64 }, }, 1741 { 2136 /* ftintrz.w.s */, LoongArch::FTINTRZ_W_S, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicF, { MCK_FPR32, MCK_FPR32 }, }, 1742 { 2148 /* ibar */, LoongArch::IBAR, Convert__UImm151_0, AMFBS_None, { MCK_UImm15 }, }, 1743 { 2153 /* idle */, LoongArch::IDLE, Convert__UImm151_0, AMFBS_None, { MCK_UImm15 }, }, 1744 { 2158 /* invtlb */, LoongArch::INVTLB, Convert__Reg1_2__Reg1_1__UImm51_0, AMFBS_None, { MCK_UImm5, MCK_GPR, MCK_GPR }, }, 1745 { 2165 /* iocsrrd.b */, LoongArch::IOCSRRD_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, 1746 { 2175 /* iocsrrd.d */, LoongArch::IOCSRRD_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, 1747 { 2185 /* iocsrrd.h */, LoongArch::IOCSRRD_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, 1748 { 2195 /* iocsrrd.w */, LoongArch::IOCSRRD_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, 1749 { 2205 /* iocsrwr.b */, LoongArch::IOCSRWR_B, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, 1750 { 2215 /* iocsrwr.d */, LoongArch::IOCSRWR_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, 1751 { 2225 /* iocsrwr.h */, LoongArch::IOCSRWR_H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, 1752 { 2235 /* iocsrwr.w */, LoongArch::IOCSRWR_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, 1753 { 2245 /* jirl */, LoongArch::JIRL, Convert__Reg1_0__Reg1_1__SImm16lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm16lsl2 }, }, 1754 { 2250 /* jr */, LoongArch::JIRL, Convert__regR0__Reg1_0__imm_95_0, AMFBS_None, { MCK_GPR }, }, 1755 { 2253 /* la */, LoongArch::PseudoLA_PCREL, Convert__Reg1_0__BareSymbol1_1, AMFBS_HasLaGlobalWithPcrel, { MCK_GPR, MCK_BareSymbol }, }, 1756 { 2253 /* la */, LoongArch::PseudoLA_ABS, Convert__Reg1_0__BareSymbol1_1, AMFBS_HasLaGlobalWithAbs, { MCK_GPR, MCK_BareSymbol }, }, 1757 { 2253 /* la */, LoongArch::PseudoLA_GOT, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, }, 1758 { 2256 /* la.abs */, LoongArch::PseudoLA_ABS, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, }, 1759 { 2256 /* la.abs */, LoongArch::PseudoLA_ABS_LARGE, Convert__Reg1_0__imm_95_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, }, 1760 { 2263 /* la.global */, LoongArch::PseudoLA_PCREL, Convert__Reg1_0__BareSymbol1_1, AMFBS_HasLaGlobalWithPcrel, { MCK_GPR, MCK_BareSymbol }, }, 1761 { 2263 /* la.global */, LoongArch::PseudoLA_ABS, Convert__Reg1_0__BareSymbol1_1, AMFBS_HasLaGlobalWithAbs, { MCK_GPR, MCK_BareSymbol }, }, 1762 { 2263 /* la.global */, LoongArch::PseudoLA_GOT, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, }, 1763 { 2263 /* la.global */, LoongArch::PseudoLA_PCREL_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_HasLaGlobalWithPcrel, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, }, 1764 { 2263 /* la.global */, LoongArch::PseudoLA_ABS_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_HasLaGlobalWithAbs, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, }, 1765 { 2263 /* la.global */, LoongArch::PseudoLA_GOT_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, }, 1766 { 2273 /* la.got */, LoongArch::PseudoLA_GOT, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, }, 1767 { 2273 /* la.got */, LoongArch::PseudoLA_GOT_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, }, 1768 { 2280 /* la.local */, LoongArch::PseudoLA_ABS, Convert__Reg1_0__BareSymbol1_1, AMFBS_HasLaLocalWithAbs, { MCK_GPR, MCK_BareSymbol }, }, 1769 { 2280 /* la.local */, LoongArch::PseudoLA_PCREL, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, }, 1770 { 2280 /* la.local */, LoongArch::PseudoLA_ABS_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_HasLaLocalWithAbs, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, }, 1771 { 2280 /* la.local */, LoongArch::PseudoLA_PCREL_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, }, 1772 { 2289 /* la.pcrel */, LoongArch::PseudoLA_PCREL, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, }, 1773 { 2289 /* la.pcrel */, LoongArch::PseudoLA_PCREL_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, }, 1774 { 2298 /* la.tls.gd */, LoongArch::PseudoLA_TLS_GD, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, }, 1775 { 2298 /* la.tls.gd */, LoongArch::PseudoLA_TLS_GD_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, }, 1776 { 2308 /* la.tls.ie */, LoongArch::PseudoLA_TLS_IE, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, }, 1777 { 2308 /* la.tls.ie */, LoongArch::PseudoLA_TLS_IE_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, }, 1778 { 2318 /* la.tls.ld */, LoongArch::PseudoLA_TLS_LD, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, }, 1779 { 2318 /* la.tls.ld */, LoongArch::PseudoLA_TLS_LD_LARGE, Convert__Reg1_0__Reg1_1__BareSymbol1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_BareSymbol }, }, 1780 { 2328 /* la.tls.le */, LoongArch::PseudoLA_TLS_LE, Convert__Reg1_0__BareSymbol1_1, AMFBS_None, { MCK_GPR, MCK_BareSymbol }, }, 1781 { 2338 /* ld.b */, LoongArch::LD_B, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, 1782 { 2343 /* ld.bu */, LoongArch::LD_BU, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, 1783 { 2349 /* ld.d */, LoongArch::LD_D, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, 1784 { 2354 /* ld.h */, LoongArch::LD_H, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, 1785 { 2359 /* ld.hu */, LoongArch::LD_HU, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, 1786 { 2365 /* ld.w */, LoongArch::LD_W, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, 1787 { 2370 /* ld.wu */, LoongArch::LD_WU, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, 1788 { 2376 /* lddir */, LoongArch::LDDIR, Convert__Reg1_0__Reg1_1__UImm81_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm8 }, }, 1789 { 2382 /* ldgt.b */, LoongArch::LDGT_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1790 { 2389 /* ldgt.d */, LoongArch::LDGT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1791 { 2396 /* ldgt.h */, LoongArch::LDGT_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1792 { 2403 /* ldgt.w */, LoongArch::LDGT_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1793 { 2410 /* ldle.b */, LoongArch::LDLE_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1794 { 2417 /* ldle.d */, LoongArch::LDLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1795 { 2424 /* ldle.h */, LoongArch::LDLE_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1796 { 2431 /* ldle.w */, LoongArch::LDLE_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1797 { 2438 /* ldpte */, LoongArch::LDPTE, Convert__Reg1_0__UImm81_1, AMFBS_None, { MCK_GPR, MCK_UImm8 }, }, 1798 { 2444 /* ldptr.d */, LoongArch::LDPTR_D, Convert__Reg1_0__Reg1_1__SImm14lsl21_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, }, 1799 { 2452 /* ldptr.w */, LoongArch::LDPTR_W, Convert__Reg1_0__Reg1_1__SImm14lsl21_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, }, 1800 { 2460 /* ldx.b */, LoongArch::LDX_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1801 { 2466 /* ldx.bu */, LoongArch::LDX_BU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1802 { 2473 /* ldx.d */, LoongArch::LDX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1803 { 2479 /* ldx.h */, LoongArch::LDX_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1804 { 2485 /* ldx.hu */, LoongArch::LDX_HU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1805 { 2492 /* ldx.w */, LoongArch::LDX_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1806 { 2498 /* ldx.wu */, LoongArch::LDX_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1807 { 2505 /* li.d */, LoongArch::PseudoLI_D, Convert__Reg1_0__Imm1_1, AMFBS_IsLA64, { MCK_GPR, MCK_Imm }, }, 1808 { 2510 /* li.w */, LoongArch::PseudoLI_W, Convert__Reg1_0__Imm321_1, AMFBS_None, { MCK_GPR, MCK_Imm32 }, }, 1809 { 2515 /* ll.d */, LoongArch::LL_D, Convert__Reg1_0__Reg1_1__SImm14lsl21_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, }, 1810 { 2520 /* ll.w */, LoongArch::LL_W, Convert__Reg1_0__Reg1_1__SImm14lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, }, 1811 { 2525 /* lu12i.w */, LoongArch::LU12I_W, Convert__Reg1_0__SImm20lu12iw1_1, AMFBS_None, { MCK_GPR, MCK_SImm20lu12iw }, }, 1812 { 2533 /* lu32i.d */, LoongArch::LU32I_D, Convert__Reg1_0__Tie0_1_1__SImm20lu32id1_1, AMFBS_IsLA64, { MCK_GPR, MCK_SImm20lu32id }, }, 1813 { 2541 /* lu52i.d */, LoongArch::LU52I_D, Convert__Reg1_0__Reg1_1__SImm12lu52id1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12lu52id }, }, 1814 { 2549 /* maskeqz */, LoongArch::MASKEQZ, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1815 { 2557 /* masknez */, LoongArch::MASKNEZ, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1816 { 2565 /* mod.d */, LoongArch::MOD_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1817 { 2571 /* mod.du */, LoongArch::MOD_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1818 { 2578 /* mod.w */, LoongArch::MOD_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1819 { 2584 /* mod.wu */, LoongArch::MOD_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1820 { 2591 /* movcf2fr */, LoongArch::MOVCF2FR_S, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicF, { MCK_FPR32, MCK_CFR }, }, 1821 { 2600 /* movcf2gr */, LoongArch::MOVCF2GR, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicF, { MCK_GPR, MCK_CFR }, }, 1822 { 2609 /* move */, LoongArch::OR, Convert__Reg1_0__Reg1_1__regR0, AMFBS_None, { MCK_GPR, MCK_GPR }, }, 1823 { 2614 /* movfcsr2gr */, LoongArch::MOVFCSR2GR, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicF, { MCK_GPR, MCK_FCSR }, }, 1824 { 2625 /* movfr2cf */, LoongArch::MOVFR2CF_S, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicF, { MCK_CFR, MCK_FPR32 }, }, 1825 { 2634 /* movfr2gr.d */, LoongArch::MOVFR2GR_D, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD_IsLA64, { MCK_GPR, MCK_FPR64 }, }, 1826 { 2645 /* movfr2gr.s */, LoongArch::MOVFR2GR_S, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicF, { MCK_GPR, MCK_FPR32 }, }, 1827 { 2656 /* movfrh2gr.s */, LoongArch::MOVFRH2GR_S, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD, { MCK_GPR, MCK_FPR64 }, }, 1828 { 2668 /* movgr2cf */, LoongArch::MOVGR2CF, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicF, { MCK_CFR, MCK_GPR }, }, 1829 { 2677 /* movgr2fcsr */, LoongArch::MOVGR2FCSR, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicF, { MCK_FCSR, MCK_GPR }, }, 1830 { 2688 /* movgr2fr.d */, LoongArch::MOVGR2FR_D, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicD_IsLA64, { MCK_FPR64, MCK_GPR }, }, 1831 { 2699 /* movgr2fr.w */, LoongArch::MOVGR2FR_W, Convert__Reg1_0__Reg1_1, AMFBS_HasBasicF, { MCK_FPR32, MCK_GPR }, }, 1832 { 2710 /* movgr2frh.w */, LoongArch::MOVGR2FRH_W, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_HasBasicD, { MCK_FPR64, MCK_GPR }, }, 1833 { 2722 /* mul.d */, LoongArch::MUL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1834 { 2728 /* mul.w */, LoongArch::MUL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1835 { 2734 /* mulh.d */, LoongArch::MULH_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1836 { 2741 /* mulh.du */, LoongArch::MULH_DU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1837 { 2749 /* mulh.w */, LoongArch::MULH_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1838 { 2756 /* mulh.wu */, LoongArch::MULH_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1839 { 2764 /* mulw.d.w */, LoongArch::MULW_D_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1840 { 2773 /* mulw.d.wu */, LoongArch::MULW_D_WU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1841 { 2783 /* nop */, LoongArch::ANDI, Convert__regR0__regR0__imm_95_0, AMFBS_None, { }, }, 1842 { 2787 /* nor */, LoongArch::NOR, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1843 { 2791 /* or */, LoongArch::OR, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1844 { 2794 /* ori */, LoongArch::ORI, Convert__Reg1_0__Reg1_1__UImm12ori1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm12ori }, }, 1845 { 2798 /* orn */, LoongArch::ORN, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1846 { 2802 /* pcaddi */, LoongArch::PCADDI, Convert__Reg1_0__SImm201_1, AMFBS_None, { MCK_GPR, MCK_SImm20 }, }, 1847 { 2809 /* pcaddu12i */, LoongArch::PCADDU12I, Convert__Reg1_0__SImm201_1, AMFBS_None, { MCK_GPR, MCK_SImm20 }, }, 1848 { 2819 /* pcaddu18i */, LoongArch::PCADDU18I, Convert__Reg1_0__SImm201_1, AMFBS_IsLA64, { MCK_GPR, MCK_SImm20 }, }, 1849 { 2829 /* pcalau12i */, LoongArch::PCALAU12I, Convert__Reg1_0__SImm20pcalau12i1_1, AMFBS_None, { MCK_GPR, MCK_SImm20pcalau12i }, }, 1850 { 2839 /* preld */, LoongArch::PRELD, Convert__UImm51_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_UImm5, MCK_GPR, MCK_SImm12 }, }, 1851 { 2845 /* preldx */, LoongArch::PRELDX, Convert__UImm51_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_UImm5, MCK_GPR, MCK_GPR }, }, 1852 { 2852 /* rdtime.d */, LoongArch::RDTIME_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, 1853 { 2861 /* rdtimeh.w */, LoongArch::RDTIMEH_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, 1854 { 2871 /* rdtimel.w */, LoongArch::RDTIMEL_W, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, 1855 { 2881 /* ret */, LoongArch::JIRL, Convert__regR0__regR1__imm_95_0, AMFBS_None, { }, }, 1856 { 2885 /* revb.2h */, LoongArch::REVB_2H, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GPR, MCK_GPR }, }, 1857 { 2893 /* revb.2w */, LoongArch::REVB_2W, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, 1858 { 2901 /* revb.4h */, LoongArch::REVB_4H, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, 1859 { 2909 /* revb.d */, LoongArch::REVB_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, 1860 { 2916 /* revh.2w */, LoongArch::REVH_2W, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, 1861 { 2924 /* revh.d */, LoongArch::REVH_D, Convert__Reg1_0__Reg1_1, AMFBS_IsLA64, { MCK_GPR, MCK_GPR }, }, 1862 { 2931 /* rotr.d */, LoongArch::ROTR_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1863 { 2938 /* rotr.w */, LoongArch::ROTR_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1864 { 2945 /* rotri.d */, LoongArch::ROTRI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_UImm6 }, }, 1865 { 2953 /* rotri.w */, LoongArch::ROTRI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm5 }, }, 1866 { 2961 /* sc.d */, LoongArch::SC_D, Convert__Reg1_0__Tie0_1_1__Reg1_1__SImm14lsl21_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, }, 1867 { 2966 /* sc.w */, LoongArch::SC_W, Convert__Reg1_0__Tie0_1_1__Reg1_1__SImm14lsl21_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, }, 1868 { 2971 /* sll.d */, LoongArch::SLL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1869 { 2977 /* sll.w */, LoongArch::SLL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1870 { 2983 /* slli.d */, LoongArch::SLLI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_UImm6 }, }, 1871 { 2990 /* slli.w */, LoongArch::SLLI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm5 }, }, 1872 { 2997 /* slt */, LoongArch::SLT, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1873 { 3001 /* slti */, LoongArch::SLTI, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12 }, }, 1874 { 3006 /* sltu */, LoongArch::SLTU, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1875 { 3011 /* sltui */, LoongArch::SLTUI, Convert__Reg1_0__Reg1_1__SImm121_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12 }, }, 1876 { 3017 /* sra.d */, LoongArch::SRA_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1877 { 3023 /* sra.w */, LoongArch::SRA_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1878 { 3029 /* srai.d */, LoongArch::SRAI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_UImm6 }, }, 1879 { 3036 /* srai.w */, LoongArch::SRAI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm5 }, }, 1880 { 3043 /* srl.d */, LoongArch::SRL_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1881 { 3049 /* srl.w */, LoongArch::SRL_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1882 { 3055 /* srli.d */, LoongArch::SRLI_D, Convert__Reg1_0__Reg1_1__UImm61_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_UImm6 }, }, 1883 { 3062 /* srli.w */, LoongArch::SRLI_W, Convert__Reg1_0__Reg1_1__UImm51_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm5 }, }, 1884 { 3069 /* st.b */, LoongArch::ST_B, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, 1885 { 3074 /* st.d */, LoongArch::ST_D, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, 1886 { 3079 /* st.h */, LoongArch::ST_H, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, 1887 { 3084 /* st.w */, LoongArch::ST_W, Convert__Reg1_0__Reg1_1__SImm12addlike1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_SImm12addlike }, }, 1888 { 3089 /* stgt.b */, LoongArch::STGT_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1889 { 3096 /* stgt.d */, LoongArch::STGT_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1890 { 3103 /* stgt.h */, LoongArch::STGT_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1891 { 3110 /* stgt.w */, LoongArch::STGT_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1892 { 3117 /* stle.b */, LoongArch::STLE_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1893 { 3124 /* stle.d */, LoongArch::STLE_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1894 { 3131 /* stle.h */, LoongArch::STLE_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1895 { 3138 /* stle.w */, LoongArch::STLE_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1896 { 3145 /* stptr.d */, LoongArch::STPTR_D, Convert__Reg1_0__Reg1_1__SImm14lsl21_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, }, 1897 { 3153 /* stptr.w */, LoongArch::STPTR_W, Convert__Reg1_0__Reg1_1__SImm14lsl21_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_SImm14lsl2 }, }, 1898 { 3161 /* stx.b */, LoongArch::STX_B, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1899 { 3167 /* stx.d */, LoongArch::STX_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1900 { 3173 /* stx.h */, LoongArch::STX_H, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1901 { 3179 /* stx.w */, LoongArch::STX_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1902 { 3185 /* sub.d */, LoongArch::SUB_D, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_IsLA64, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1903 { 3191 /* sub.w */, LoongArch::SUB_W, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1904 { 3197 /* syscall */, LoongArch::SYSCALL, Convert__UImm151_0, AMFBS_None, { MCK_UImm15 }, }, 1905 { 3205 /* tlbclr */, LoongArch::TLBCLR, Convert_NoOperands, AMFBS_None, { }, }, 1906 { 3212 /* tlbfill */, LoongArch::TLBFILL, Convert_NoOperands, AMFBS_None, { }, }, 1907 { 3220 /* tlbflush */, LoongArch::TLBFLUSH, Convert_NoOperands, AMFBS_None, { }, }, 1908 { 3229 /* tlbrd */, LoongArch::TLBRD, Convert_NoOperands, AMFBS_None, { }, }, 1909 { 3235 /* tlbsrch */, LoongArch::TLBSRCH, Convert_NoOperands, AMFBS_None, { }, }, 1910 { 3243 /* tlbwr */, LoongArch::TLBWR, Convert_NoOperands, AMFBS_None, { }, }, 1911 { 3249 /* xor */, LoongArch::XOR, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_GPR }, }, 1912 { 3253 /* xori */, LoongArch::XORI, Convert__Reg1_0__Reg1_1__UImm121_2, AMFBS_None, { MCK_GPR, MCK_GPR, MCK_UImm12 }, }, 1913}; 1914 1915#include "llvm/Support/Debug.h" 1916#include "llvm/Support/Format.h" 1917 1918unsigned LoongArchAsmParser:: 1919MatchInstructionImpl(const OperandVector &Operands, 1920 MCInst &Inst, 1921 uint64_t &ErrorInfo, 1922 FeatureBitset &MissingFeatures, 1923 bool matchingInlineAsm, unsigned VariantID) { 1924 // Eliminate obvious mismatches. 1925 if (Operands.size() > 5) { 1926 ErrorInfo = 5; 1927 return Match_InvalidOperand; 1928 } 1929 1930 // Get the current feature set. 1931 const FeatureBitset &AvailableFeatures = getAvailableFeatures(); 1932 1933 // Get the instruction mnemonic, which is the first token. 1934 StringRef Mnemonic = ((LoongArchOperand &)*Operands[0]).getToken(); 1935 1936 // Some state to try to produce better error messages. 1937 bool HadMatchOtherThanFeatures = false; 1938 bool HadMatchOtherThanPredicate = false; 1939 unsigned RetCode = Match_InvalidOperand; 1940 MissingFeatures.set(); 1941 // Set ErrorInfo to the operand that mismatches if it is 1942 // wrong for all instances of the instruction. 1943 ErrorInfo = ~0ULL; 1944 // Find the appropriate table for this asm variant. 1945 const MatchEntry *Start, *End; 1946 switch (VariantID) { 1947 default: llvm_unreachable("invalid variant!"); 1948 case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; 1949 } 1950 // Search the table. 1951 auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode()); 1952 1953 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "AsmMatcher: found " << 1954 std::distance(MnemonicRange.first, MnemonicRange.second) << 1955 " encodings with mnemonic '" << Mnemonic << "'\n"); 1956 1957 // Return a more specific error code if no mnemonics match. 1958 if (MnemonicRange.first == MnemonicRange.second) 1959 return Match_MnemonicFail; 1960 1961 for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second; 1962 it != ie; ++it) { 1963 const FeatureBitset &RequiredFeatures = FeatureBitsets[it->RequiredFeaturesIdx]; 1964 bool HasRequiredFeatures = 1965 (AvailableFeatures & RequiredFeatures) == RequiredFeatures; 1966 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Trying to match opcode " 1967 << MII.getName(it->Opcode) << "\n"); 1968 // equal_range guarantees that instruction mnemonic matches. 1969 assert(Mnemonic == it->getMnemonic()); 1970 bool OperandsValid = true; 1971 for (unsigned FormalIdx = 0, ActualIdx = 1; FormalIdx != 4; ++FormalIdx) { 1972 auto Formal = static_cast<MatchClassKind>(it->Classes[FormalIdx]); 1973 DEBUG_WITH_TYPE("asm-matcher", 1974 dbgs() << " Matching formal operand class " << getMatchClassName(Formal) 1975 << " against actual operand at index " << ActualIdx); 1976 if (ActualIdx < Operands.size()) 1977 DEBUG_WITH_TYPE("asm-matcher", dbgs() << " ("; 1978 Operands[ActualIdx]->print(dbgs()); dbgs() << "): "); 1979 else 1980 DEBUG_WITH_TYPE("asm-matcher", dbgs() << ": "); 1981 if (ActualIdx >= Operands.size()) { 1982 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "actual operand index out of range\n"); 1983 if (Formal == InvalidMatchClass) { 1984 break; 1985 } 1986 if (isSubclass(Formal, OptionalMatchClass)) { 1987 continue; 1988 } 1989 OperandsValid = false; 1990 ErrorInfo = ActualIdx; 1991 break; 1992 } 1993 MCParsedAsmOperand &Actual = *Operands[ActualIdx]; 1994 unsigned Diag = validateOperandClass(Actual, Formal); 1995 if (Diag == Match_Success) { 1996 DEBUG_WITH_TYPE("asm-matcher", 1997 dbgs() << "match success using generic matcher\n"); 1998 ++ActualIdx; 1999 continue; 2000 } 2001 // If the generic handler indicates an invalid operand 2002 // failure, check for a special case. 2003 if (Diag != Match_Success) { 2004 unsigned TargetDiag = validateTargetOperandClass(Actual, Formal); 2005 if (TargetDiag == Match_Success) { 2006 DEBUG_WITH_TYPE("asm-matcher", 2007 dbgs() << "match success using target matcher\n"); 2008 ++ActualIdx; 2009 continue; 2010 } 2011 // If the target matcher returned a specific error code use 2012 // that, else use the one from the generic matcher. 2013 if (TargetDiag != Match_InvalidOperand && HasRequiredFeatures) 2014 Diag = TargetDiag; 2015 } 2016 // If current formal operand wasn't matched and it is optional 2017 // then try to match next formal operand 2018 if (Diag == Match_InvalidOperand && isSubclass(Formal, OptionalMatchClass)) { 2019 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "ignoring optional operand\n"); 2020 continue; 2021 } 2022 // If this operand is broken for all of the instances of this 2023 // mnemonic, keep track of it so we can report loc info. 2024 // If we already had a match that only failed due to a 2025 // target predicate, that diagnostic is preferred. 2026 if (!HadMatchOtherThanPredicate && 2027 (it == MnemonicRange.first || ErrorInfo <= ActualIdx)) { 2028 if (HasRequiredFeatures && (ErrorInfo != ActualIdx || Diag != Match_InvalidOperand)) 2029 RetCode = Diag; 2030 ErrorInfo = ActualIdx; 2031 } 2032 // Otherwise, just reject this instance of the mnemonic. 2033 OperandsValid = false; 2034 break; 2035 } 2036 2037 if (!OperandsValid) { 2038 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Opcode result: multiple " 2039 "operand mismatches, ignoring " 2040 "this opcode\n"); 2041 continue; 2042 } 2043 if (!HasRequiredFeatures) { 2044 HadMatchOtherThanFeatures = true; 2045 FeatureBitset NewMissingFeatures = RequiredFeatures & ~AvailableFeatures; 2046 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Missing target features:"; 2047 for (unsigned I = 0, E = NewMissingFeatures.size(); I != E; ++I) 2048 if (NewMissingFeatures[I]) 2049 dbgs() << ' ' << I; 2050 dbgs() << "\n"); 2051 if (NewMissingFeatures.count() <= 2052 MissingFeatures.count()) 2053 MissingFeatures = NewMissingFeatures; 2054 continue; 2055 } 2056 2057 Inst.clear(); 2058 2059 Inst.setOpcode(it->Opcode); 2060 // We have a potential match but have not rendered the operands. 2061 // Check the target predicate to handle any context sensitive 2062 // constraints. 2063 // For example, Ties that are referenced multiple times must be 2064 // checked here to ensure the input is the same for each match 2065 // constraints. If we leave it any later the ties will have been 2066 // canonicalized 2067 unsigned MatchResult; 2068 if ((MatchResult = checkEarlyTargetMatchPredicate(Inst, Operands)) != Match_Success) { 2069 Inst.clear(); 2070 DEBUG_WITH_TYPE( 2071 "asm-matcher", 2072 dbgs() << "Early target match predicate failed with diag code " 2073 << MatchResult << "\n"); 2074 RetCode = MatchResult; 2075 HadMatchOtherThanPredicate = true; 2076 continue; 2077 } 2078 2079 if (matchingInlineAsm) { 2080 convertToMapAndConstraints(it->ConvertFn, Operands); 2081 if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, ErrorInfo)) 2082 return Match_InvalidTiedOperand; 2083 2084 return Match_Success; 2085 } 2086 2087 // We have selected a definite instruction, convert the parsed 2088 // operands into the appropriate MCInst. 2089 convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands); 2090 2091 // We have a potential match. Check the target predicate to 2092 // handle any context sensitive constraints. 2093 if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) { 2094 DEBUG_WITH_TYPE("asm-matcher", 2095 dbgs() << "Target match predicate failed with diag code " 2096 << MatchResult << "\n"); 2097 Inst.clear(); 2098 RetCode = MatchResult; 2099 HadMatchOtherThanPredicate = true; 2100 continue; 2101 } 2102 2103 if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, ErrorInfo)) 2104 return Match_InvalidTiedOperand; 2105 2106 DEBUG_WITH_TYPE( 2107 "asm-matcher", 2108 dbgs() << "Opcode result: complete match, selecting this opcode\n"); 2109 return Match_Success; 2110 } 2111 2112 // Okay, we had no match. Try to return a useful error code. 2113 if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures) 2114 return RetCode; 2115 2116 ErrorInfo = 0; 2117 return Match_MissingFeature; 2118} 2119 2120namespace { 2121 struct OperandMatchEntry { 2122 uint16_t Mnemonic; 2123 uint8_t OperandMask; 2124 uint8_t Class; 2125 uint8_t RequiredFeaturesIdx; 2126 2127 StringRef getMnemonic() const { 2128 return StringRef(MnemonicTable + Mnemonic + 1, 2129 MnemonicTable[Mnemonic]); 2130 } 2131 }; 2132 2133 // Predicate for searching for an opcode. 2134 struct LessOpcodeOperand { 2135 bool operator()(const OperandMatchEntry &LHS, StringRef RHS) { 2136 return LHS.getMnemonic() < RHS; 2137 } 2138 bool operator()(StringRef LHS, const OperandMatchEntry &RHS) { 2139 return LHS < RHS.getMnemonic(); 2140 } 2141 bool operator()(const OperandMatchEntry &LHS, const OperandMatchEntry &RHS) { 2142 return LHS.getMnemonic() < RHS.getMnemonic(); 2143 } 2144 }; 2145} // end anonymous namespace 2146 2147static const OperandMatchEntry OperandMatchTable[64] = { 2148 /* Operand List Mnemonic, Mask, Operand Class, Features */ 2149 { 58 /* amadd.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2150 { 66 /* amadd.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2151 { 74 /* amadd_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2152 { 85 /* amadd_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2153 { 96 /* amand.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2154 { 104 /* amand.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2155 { 112 /* amand_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2156 { 123 /* amand_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2157 { 134 /* ammax.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2158 { 142 /* ammax.du */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2159 { 151 /* ammax.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2160 { 159 /* ammax.wu */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2161 { 168 /* ammax_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2162 { 179 /* ammax_db.du */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2163 { 191 /* ammax_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2164 { 202 /* ammax_db.wu */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2165 { 214 /* ammin.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2166 { 222 /* ammin.du */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2167 { 231 /* ammin.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2168 { 239 /* ammin.wu */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2169 { 248 /* ammin_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2170 { 259 /* ammin_db.du */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2171 { 271 /* ammin_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2172 { 282 /* ammin_db.wu */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2173 { 294 /* amor.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2174 { 301 /* amor.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2175 { 308 /* amor_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2176 { 318 /* amor_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2177 { 328 /* amswap.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2178 { 337 /* amswap.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2179 { 346 /* amswap_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2180 { 358 /* amswap_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2181 { 370 /* amxor.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2182 { 378 /* amxor.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2183 { 386 /* amxor_db.d */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2184 { 397 /* amxor_db.w */, 4 /* 2 */, MCK_AtomicMemAsmOperand, AMFBS_IsLA64 }, 2185 { 440 /* b */, 1 /* 0 */, MCK_SImm26OperandB, AMFBS_None }, 2186 { 529 /* bl */, 1 /* 0 */, MCK_SImm26OperandBL, AMFBS_None }, 2187 { 2253 /* la */, 2 /* 1 */, MCK_BareSymbol, AMFBS_HasLaGlobalWithPcrel }, 2188 { 2253 /* la */, 2 /* 1 */, MCK_BareSymbol, AMFBS_HasLaGlobalWithAbs }, 2189 { 2253 /* la */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None }, 2190 { 2256 /* la.abs */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None }, 2191 { 2256 /* la.abs */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None }, 2192 { 2263 /* la.global */, 2 /* 1 */, MCK_BareSymbol, AMFBS_HasLaGlobalWithPcrel }, 2193 { 2263 /* la.global */, 2 /* 1 */, MCK_BareSymbol, AMFBS_HasLaGlobalWithAbs }, 2194 { 2263 /* la.global */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None }, 2195 { 2263 /* la.global */, 4 /* 2 */, MCK_BareSymbol, AMFBS_HasLaGlobalWithPcrel }, 2196 { 2263 /* la.global */, 4 /* 2 */, MCK_BareSymbol, AMFBS_HasLaGlobalWithAbs }, 2197 { 2263 /* la.global */, 4 /* 2 */, MCK_BareSymbol, AMFBS_None }, 2198 { 2273 /* la.got */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None }, 2199 { 2273 /* la.got */, 4 /* 2 */, MCK_BareSymbol, AMFBS_IsLA64 }, 2200 { 2280 /* la.local */, 2 /* 1 */, MCK_BareSymbol, AMFBS_HasLaLocalWithAbs }, 2201 { 2280 /* la.local */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None }, 2202 { 2280 /* la.local */, 4 /* 2 */, MCK_BareSymbol, AMFBS_HasLaLocalWithAbs }, 2203 { 2280 /* la.local */, 4 /* 2 */, MCK_BareSymbol, AMFBS_None }, 2204 { 2289 /* la.pcrel */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None }, 2205 { 2289 /* la.pcrel */, 4 /* 2 */, MCK_BareSymbol, AMFBS_IsLA64 }, 2206 { 2298 /* la.tls.gd */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None }, 2207 { 2298 /* la.tls.gd */, 4 /* 2 */, MCK_BareSymbol, AMFBS_IsLA64 }, 2208 { 2308 /* la.tls.ie */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None }, 2209 { 2308 /* la.tls.ie */, 4 /* 2 */, MCK_BareSymbol, AMFBS_IsLA64 }, 2210 { 2318 /* la.tls.ld */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None }, 2211 { 2318 /* la.tls.ld */, 4 /* 2 */, MCK_BareSymbol, AMFBS_IsLA64 }, 2212 { 2328 /* la.tls.le */, 2 /* 1 */, MCK_BareSymbol, AMFBS_None }, 2213}; 2214 2215OperandMatchResultTy LoongArchAsmParser:: 2216tryCustomParseOperand(OperandVector &Operands, 2217 unsigned MCK) { 2218 2219 switch(MCK) { 2220 case MCK_AtomicMemAsmOperand: 2221 return parseAtomicMemOp(Operands); 2222 case MCK_BareSymbol: 2223 return parseImmediate(Operands); 2224 case MCK_SImm26OperandB: 2225 return parseImmediate(Operands); 2226 case MCK_SImm26OperandBL: 2227 return parseSImm26Operand(Operands); 2228 default: 2229 return MatchOperand_NoMatch; 2230 } 2231 return MatchOperand_NoMatch; 2232} 2233 2234OperandMatchResultTy LoongArchAsmParser:: 2235MatchOperandParserImpl(OperandVector &Operands, 2236 StringRef Mnemonic, 2237 bool ParseForAllFeatures) { 2238 // Get the current feature set. 2239 const FeatureBitset &AvailableFeatures = getAvailableFeatures(); 2240 2241 // Get the next operand index. 2242 unsigned NextOpNum = Operands.size() - 1; 2243 // Search the table. 2244 auto MnemonicRange = 2245 std::equal_range(std::begin(OperandMatchTable), std::end(OperandMatchTable), 2246 Mnemonic, LessOpcodeOperand()); 2247 2248 if (MnemonicRange.first == MnemonicRange.second) 2249 return MatchOperand_NoMatch; 2250 2251 for (const OperandMatchEntry *it = MnemonicRange.first, 2252 *ie = MnemonicRange.second; it != ie; ++it) { 2253 // equal_range guarantees that instruction mnemonic matches. 2254 assert(Mnemonic == it->getMnemonic()); 2255 2256 // check if the available features match 2257 const FeatureBitset &RequiredFeatures = FeatureBitsets[it->RequiredFeaturesIdx]; 2258 if (!ParseForAllFeatures && (AvailableFeatures & RequiredFeatures) != RequiredFeatures) 2259 continue; 2260 2261 // check if the operand in question has a custom parser. 2262 if (!(it->OperandMask & (1 << NextOpNum))) 2263 continue; 2264 2265 // call custom parse method to handle the operand 2266 OperandMatchResultTy Result = tryCustomParseOperand(Operands, it->Class); 2267 if (Result != MatchOperand_NoMatch) 2268 return Result; 2269 } 2270 2271 // Okay, we had no match. 2272 return MatchOperand_NoMatch; 2273} 2274 2275#endif // GET_MATCHER_IMPLEMENTATION 2276 2277 2278#ifdef GET_MNEMONIC_SPELL_CHECKER 2279#undef GET_MNEMONIC_SPELL_CHECKER 2280 2281static std::string LoongArchMnemonicSpellCheck(StringRef S, const FeatureBitset &FBS, unsigned VariantID) { 2282 const unsigned MaxEditDist = 2; 2283 std::vector<StringRef> Candidates; 2284 StringRef Prev = ""; 2285 2286 // Find the appropriate table for this asm variant. 2287 const MatchEntry *Start, *End; 2288 switch (VariantID) { 2289 default: llvm_unreachable("invalid variant!"); 2290 case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; 2291 } 2292 2293 for (auto I = Start; I < End; I++) { 2294 // Ignore unsupported instructions. 2295 const FeatureBitset &RequiredFeatures = FeatureBitsets[I->RequiredFeaturesIdx]; 2296 if ((FBS & RequiredFeatures) != RequiredFeatures) 2297 continue; 2298 2299 StringRef T = I->getMnemonic(); 2300 // Avoid recomputing the edit distance for the same string. 2301 if (T.equals(Prev)) 2302 continue; 2303 2304 Prev = T; 2305 unsigned Dist = S.edit_distance(T, false, MaxEditDist); 2306 if (Dist <= MaxEditDist) 2307 Candidates.push_back(T); 2308 } 2309 2310 if (Candidates.empty()) 2311 return ""; 2312 2313 std::string Res = ", did you mean: "; 2314 unsigned i = 0; 2315 for (; i < Candidates.size() - 1; i++) 2316 Res += Candidates[i].str() + ", "; 2317 return Res + Candidates[i].str() + "?"; 2318} 2319 2320#endif // GET_MNEMONIC_SPELL_CHECKER 2321 2322 2323#ifdef GET_MNEMONIC_CHECKER 2324#undef GET_MNEMONIC_CHECKER 2325 2326static bool LoongArchCheckMnemonic(StringRef Mnemonic, 2327 const FeatureBitset &AvailableFeatures, 2328 unsigned VariantID) { 2329 // Find the appropriate table for this asm variant. 2330 const MatchEntry *Start, *End; 2331 switch (VariantID) { 2332 default: llvm_unreachable("invalid variant!"); 2333 case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; 2334 } 2335 2336 // Search the table. 2337 auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode()); 2338 2339 if (MnemonicRange.first == MnemonicRange.second) 2340 return false; 2341 2342 for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second; 2343 it != ie; ++it) { 2344 const FeatureBitset &RequiredFeatures = 2345 FeatureBitsets[it->RequiredFeaturesIdx]; 2346 if ((AvailableFeatures & RequiredFeatures) == RequiredFeatures) 2347 return true; 2348 } 2349 return false; 2350} 2351 2352#endif // GET_MNEMONIC_CHECKER 2353 2354