1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ 2|* *| 3|* Machine Code Emitter *| 4|* *| 5|* Automatically generated file, do not edit! *| 6|* *| 7\*===----------------------------------------------------------------------===*/ 8 9uint64_t LoongArchMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI, 10 SmallVectorImpl<MCFixup> &Fixups, 11 const MCSubtargetInfo &STI) const { 12 static const uint64_t InstBits[] = { 13 UINT64_C(0), 14 UINT64_C(0), 15 UINT64_C(0), 16 UINT64_C(0), 17 UINT64_C(0), 18 UINT64_C(0), 19 UINT64_C(0), 20 UINT64_C(0), 21 UINT64_C(0), 22 UINT64_C(0), 23 UINT64_C(0), 24 UINT64_C(0), 25 UINT64_C(0), 26 UINT64_C(0), 27 UINT64_C(0), 28 UINT64_C(0), 29 UINT64_C(0), 30 UINT64_C(0), 31 UINT64_C(0), 32 UINT64_C(0), 33 UINT64_C(0), 34 UINT64_C(0), 35 UINT64_C(0), 36 UINT64_C(0), 37 UINT64_C(0), 38 UINT64_C(0), 39 UINT64_C(0), 40 UINT64_C(0), 41 UINT64_C(0), 42 UINT64_C(0), 43 UINT64_C(0), 44 UINT64_C(0), 45 UINT64_C(0), 46 UINT64_C(0), 47 UINT64_C(0), 48 UINT64_C(0), 49 UINT64_C(0), 50 UINT64_C(0), 51 UINT64_C(0), 52 UINT64_C(0), 53 UINT64_C(0), 54 UINT64_C(0), 55 UINT64_C(0), 56 UINT64_C(0), 57 UINT64_C(0), 58 UINT64_C(0), 59 UINT64_C(0), 60 UINT64_C(0), 61 UINT64_C(0), 62 UINT64_C(0), 63 UINT64_C(0), 64 UINT64_C(0), 65 UINT64_C(0), 66 UINT64_C(0), 67 UINT64_C(0), 68 UINT64_C(0), 69 UINT64_C(0), 70 UINT64_C(0), 71 UINT64_C(0), 72 UINT64_C(0), 73 UINT64_C(0), 74 UINT64_C(0), 75 UINT64_C(0), 76 UINT64_C(0), 77 UINT64_C(0), 78 UINT64_C(0), 79 UINT64_C(0), 80 UINT64_C(0), 81 UINT64_C(0), 82 UINT64_C(0), 83 UINT64_C(0), 84 UINT64_C(0), 85 UINT64_C(0), 86 UINT64_C(0), 87 UINT64_C(0), 88 UINT64_C(0), 89 UINT64_C(0), 90 UINT64_C(0), 91 UINT64_C(0), 92 UINT64_C(0), 93 UINT64_C(0), 94 UINT64_C(0), 95 UINT64_C(0), 96 UINT64_C(0), 97 UINT64_C(0), 98 UINT64_C(0), 99 UINT64_C(0), 100 UINT64_C(0), 101 UINT64_C(0), 102 UINT64_C(0), 103 UINT64_C(0), 104 UINT64_C(0), 105 UINT64_C(0), 106 UINT64_C(0), 107 UINT64_C(0), 108 UINT64_C(0), 109 UINT64_C(0), 110 UINT64_C(0), 111 UINT64_C(0), 112 UINT64_C(0), 113 UINT64_C(0), 114 UINT64_C(0), 115 UINT64_C(0), 116 UINT64_C(0), 117 UINT64_C(0), 118 UINT64_C(0), 119 UINT64_C(0), 120 UINT64_C(0), 121 UINT64_C(0), 122 UINT64_C(0), 123 UINT64_C(0), 124 UINT64_C(0), 125 UINT64_C(0), 126 UINT64_C(0), 127 UINT64_C(0), 128 UINT64_C(0), 129 UINT64_C(0), 130 UINT64_C(0), 131 UINT64_C(0), 132 UINT64_C(0), 133 UINT64_C(0), 134 UINT64_C(0), 135 UINT64_C(0), 136 UINT64_C(0), 137 UINT64_C(0), 138 UINT64_C(0), 139 UINT64_C(0), 140 UINT64_C(0), 141 UINT64_C(0), 142 UINT64_C(0), 143 UINT64_C(0), 144 UINT64_C(0), 145 UINT64_C(0), 146 UINT64_C(0), 147 UINT64_C(0), 148 UINT64_C(0), 149 UINT64_C(0), 150 UINT64_C(0), 151 UINT64_C(0), 152 UINT64_C(0), 153 UINT64_C(0), 154 UINT64_C(0), 155 UINT64_C(0), 156 UINT64_C(0), 157 UINT64_C(0), 158 UINT64_C(0), 159 UINT64_C(0), 160 UINT64_C(0), 161 UINT64_C(0), 162 UINT64_C(0), 163 UINT64_C(0), 164 UINT64_C(0), 165 UINT64_C(0), 166 UINT64_C(0), 167 UINT64_C(0), 168 UINT64_C(0), 169 UINT64_C(0), 170 UINT64_C(0), 171 UINT64_C(0), 172 UINT64_C(0), 173 UINT64_C(0), 174 UINT64_C(0), 175 UINT64_C(0), 176 UINT64_C(0), 177 UINT64_C(0), 178 UINT64_C(0), 179 UINT64_C(0), 180 UINT64_C(0), 181 UINT64_C(0), 182 UINT64_C(0), 183 UINT64_C(0), 184 UINT64_C(0), 185 UINT64_C(0), 186 UINT64_C(0), 187 UINT64_C(0), 188 UINT64_C(0), 189 UINT64_C(0), 190 UINT64_C(0), 191 UINT64_C(0), 192 UINT64_C(0), 193 UINT64_C(0), 194 UINT64_C(0), 195 UINT64_C(0), 196 UINT64_C(0), 197 UINT64_C(0), 198 UINT64_C(0), 199 UINT64_C(0), 200 UINT64_C(0), 201 UINT64_C(0), 202 UINT64_C(0), 203 UINT64_C(0), 204 UINT64_C(0), 205 UINT64_C(0), 206 UINT64_C(0), 207 UINT64_C(0), 208 UINT64_C(0), 209 UINT64_C(0), 210 UINT64_C(0), 211 UINT64_C(0), 212 UINT64_C(0), 213 UINT64_C(0), 214 UINT64_C(0), 215 UINT64_C(0), 216 UINT64_C(0), 217 UINT64_C(0), 218 UINT64_C(0), 219 UINT64_C(0), 220 UINT64_C(0), 221 UINT64_C(0), 222 UINT64_C(0), 223 UINT64_C(0), 224 UINT64_C(0), 225 UINT64_C(0), 226 UINT64_C(0), 227 UINT64_C(0), 228 UINT64_C(0), 229 UINT64_C(0), 230 UINT64_C(0), 231 UINT64_C(0), 232 UINT64_C(0), 233 UINT64_C(0), 234 UINT64_C(0), 235 UINT64_C(0), 236 UINT64_C(0), 237 UINT64_C(0), 238 UINT64_C(0), 239 UINT64_C(0), 240 UINT64_C(0), 241 UINT64_C(0), 242 UINT64_C(0), 243 UINT64_C(0), 244 UINT64_C(0), 245 UINT64_C(0), 246 UINT64_C(0), 247 UINT64_C(0), 248 UINT64_C(0), 249 UINT64_C(0), 250 UINT64_C(0), 251 UINT64_C(0), 252 UINT64_C(0), 253 UINT64_C(0), 254 UINT64_C(0), 255 UINT64_C(0), 256 UINT64_C(0), 257 UINT64_C(0), 258 UINT64_C(0), 259 UINT64_C(0), 260 UINT64_C(0), 261 UINT64_C(0), 262 UINT64_C(0), 263 UINT64_C(0), 264 UINT64_C(0), 265 UINT64_C(0), 266 UINT64_C(0), 267 UINT64_C(0), 268 UINT64_C(0), 269 UINT64_C(0), 270 UINT64_C(0), 271 UINT64_C(0), 272 UINT64_C(0), 273 UINT64_C(0), 274 UINT64_C(0), 275 UINT64_C(0), 276 UINT64_C(0), 277 UINT64_C(0), 278 UINT64_C(0), 279 UINT64_C(0), 280 UINT64_C(0), 281 UINT64_C(0), 282 UINT64_C(0), 283 UINT64_C(0), 284 UINT64_C(0), 285 UINT64_C(0), 286 UINT64_C(0), 287 UINT64_C(0), 288 UINT64_C(0), 289 UINT64_C(0), 290 UINT64_C(0), 291 UINT64_C(0), 292 UINT64_C(0), 293 UINT64_C(0), 294 UINT64_C(0), 295 UINT64_C(0), 296 UINT64_C(0), 297 UINT64_C(0), 298 UINT64_C(0), 299 UINT64_C(0), 300 UINT64_C(0), 301 UINT64_C(0), 302 UINT64_C(0), 303 UINT64_C(0), 304 UINT64_C(0), 305 UINT64_C(0), 306 UINT64_C(0), 307 UINT64_C(0), 308 UINT64_C(0), 309 UINT64_C(0), 310 UINT64_C(0), 311 UINT64_C(0), 312 UINT64_C(0), 313 UINT64_C(0), 314 UINT64_C(0), 315 UINT64_C(0), 316 UINT64_C(0), 317 UINT64_C(46137344), // ADDI_D 318 UINT64_C(41943040), // ADDI_W 319 UINT64_C(268435456), // ADDU16I_D 320 UINT64_C(1081344), // ADD_D 321 UINT64_C(1048576), // ADD_W 322 UINT64_C(2883584), // ALSL_D 323 UINT64_C(262144), // ALSL_W 324 UINT64_C(393216), // ALSL_WU 325 UINT64_C(945913856), // AMADD_D 326 UINT64_C(946503680), // AMADD_DB_D 327 UINT64_C(946470912), // AMADD_DB_W 328 UINT64_C(945881088), // AMADD_W 329 UINT64_C(945979392), // AMAND_D 330 UINT64_C(946569216), // AMAND_DB_D 331 UINT64_C(946536448), // AMAND_DB_W 332 UINT64_C(945946624), // AMAND_W 333 UINT64_C(946176000), // AMMAX_D 334 UINT64_C(946765824), // AMMAX_DB_D 335 UINT64_C(946896896), // AMMAX_DB_DU 336 UINT64_C(946733056), // AMMAX_DB_W 337 UINT64_C(946864128), // AMMAX_DB_WU 338 UINT64_C(946307072), // AMMAX_DU 339 UINT64_C(946143232), // AMMAX_W 340 UINT64_C(946274304), // AMMAX_WU 341 UINT64_C(946241536), // AMMIN_D 342 UINT64_C(946831360), // AMMIN_DB_D 343 UINT64_C(946962432), // AMMIN_DB_DU 344 UINT64_C(946798592), // AMMIN_DB_W 345 UINT64_C(946929664), // AMMIN_DB_WU 346 UINT64_C(946372608), // AMMIN_DU 347 UINT64_C(946208768), // AMMIN_W 348 UINT64_C(946339840), // AMMIN_WU 349 UINT64_C(946044928), // AMOR_D 350 UINT64_C(946634752), // AMOR_DB_D 351 UINT64_C(946601984), // AMOR_DB_W 352 UINT64_C(946012160), // AMOR_W 353 UINT64_C(945848320), // AMSWAP_D 354 UINT64_C(946438144), // AMSWAP_DB_D 355 UINT64_C(946405376), // AMSWAP_DB_W 356 UINT64_C(945815552), // AMSWAP_W 357 UINT64_C(946110464), // AMXOR_D 358 UINT64_C(946700288), // AMXOR_DB_D 359 UINT64_C(946667520), // AMXOR_DB_W 360 UINT64_C(946077696), // AMXOR_W 361 UINT64_C(1343488), // AND 362 UINT64_C(54525952), // ANDI 363 UINT64_C(1474560), // ANDN 364 UINT64_C(98304), // ASRTGT_D 365 UINT64_C(65536), // ASRTLE_D 366 UINT64_C(1342177280), // B 367 UINT64_C(1207959552), // BCEQZ 368 UINT64_C(1207959808), // BCNEZ 369 UINT64_C(1476395008), // BEQ 370 UINT64_C(1073741824), // BEQZ 371 UINT64_C(1677721600), // BGE 372 UINT64_C(1811939328), // BGEU 373 UINT64_C(18432), // BITREV_4B 374 UINT64_C(19456), // BITREV_8B 375 UINT64_C(21504), // BITREV_D 376 UINT64_C(20480), // BITREV_W 377 UINT64_C(1409286144), // BL 378 UINT64_C(1610612736), // BLT 379 UINT64_C(1744830464), // BLTU 380 UINT64_C(1543503872), // BNE 381 UINT64_C(1140850688), // BNEZ 382 UINT64_C(2752512), // BREAK 383 UINT64_C(8388608), // BSTRINS_D 384 UINT64_C(6291456), // BSTRINS_W 385 UINT64_C(12582912), // BSTRPICK_D 386 UINT64_C(6324224), // BSTRPICK_W 387 UINT64_C(786432), // BYTEPICK_D 388 UINT64_C(524288), // BYTEPICK_W 389 UINT64_C(100663296), // CACOP 390 UINT64_C(8192), // CLO_D 391 UINT64_C(4096), // CLO_W 392 UINT64_C(9216), // CLZ_D 393 UINT64_C(5120), // CLZ_W 394 UINT64_C(27648), // CPUCFG 395 UINT64_C(2490368), // CRCC_W_B_W 396 UINT64_C(2588672), // CRCC_W_D_W 397 UINT64_C(2523136), // CRCC_W_H_W 398 UINT64_C(2555904), // CRCC_W_W_W 399 UINT64_C(2359296), // CRC_W_B_W 400 UINT64_C(2457600), // CRC_W_D_W 401 UINT64_C(2392064), // CRC_W_H_W 402 UINT64_C(2424832), // CRC_W_W_W 403 UINT64_C(67108864), // CSRRD 404 UINT64_C(67108896), // CSRWR 405 UINT64_C(67108864), // CSRXCHG 406 UINT64_C(10240), // CTO_D 407 UINT64_C(6144), // CTO_W 408 UINT64_C(11264), // CTZ_D 409 UINT64_C(7168), // CTZ_W 410 UINT64_C(946995200), // DBAR 411 UINT64_C(2785280), // DBCL 412 UINT64_C(2228224), // DIV_D 413 UINT64_C(2293760), // DIV_DU 414 UINT64_C(2097152), // DIV_W 415 UINT64_C(2162688), // DIV_WU 416 UINT64_C(105396224), // ERTN 417 UINT64_C(23552), // EXT_W_B 418 UINT64_C(22528), // EXT_W_H 419 UINT64_C(18089984), // FABS_D 420 UINT64_C(18088960), // FABS_S 421 UINT64_C(16842752), // FADD_D 422 UINT64_C(16809984), // FADD_S 423 UINT64_C(18102272), // FCLASS_D 424 UINT64_C(18101248), // FCLASS_S 425 UINT64_C(203423744), // FCMP_CAF_D 426 UINT64_C(202375168), // FCMP_CAF_S 427 UINT64_C(203554816), // FCMP_CEQ_D 428 UINT64_C(202506240), // FCMP_CEQ_S 429 UINT64_C(203620352), // FCMP_CLE_D 430 UINT64_C(202571776), // FCMP_CLE_S 431 UINT64_C(203489280), // FCMP_CLT_D 432 UINT64_C(202440704), // FCMP_CLT_S 433 UINT64_C(203948032), // FCMP_CNE_D 434 UINT64_C(202899456), // FCMP_CNE_S 435 UINT64_C(204079104), // FCMP_COR_D 436 UINT64_C(203030528), // FCMP_COR_S 437 UINT64_C(203816960), // FCMP_CUEQ_D 438 UINT64_C(202768384), // FCMP_CUEQ_S 439 UINT64_C(203882496), // FCMP_CULE_D 440 UINT64_C(202833920), // FCMP_CULE_S 441 UINT64_C(203751424), // FCMP_CULT_D 442 UINT64_C(202702848), // FCMP_CULT_S 443 UINT64_C(204210176), // FCMP_CUNE_D 444 UINT64_C(203161600), // FCMP_CUNE_S 445 UINT64_C(203685888), // FCMP_CUN_D 446 UINT64_C(202637312), // FCMP_CUN_S 447 UINT64_C(203456512), // FCMP_SAF_D 448 UINT64_C(202407936), // FCMP_SAF_S 449 UINT64_C(203587584), // FCMP_SEQ_D 450 UINT64_C(202539008), // FCMP_SEQ_S 451 UINT64_C(203653120), // FCMP_SLE_D 452 UINT64_C(202604544), // FCMP_SLE_S 453 UINT64_C(203522048), // FCMP_SLT_D 454 UINT64_C(202473472), // FCMP_SLT_S 455 UINT64_C(203980800), // FCMP_SNE_D 456 UINT64_C(202932224), // FCMP_SNE_S 457 UINT64_C(204111872), // FCMP_SOR_D 458 UINT64_C(203063296), // FCMP_SOR_S 459 UINT64_C(203849728), // FCMP_SUEQ_D 460 UINT64_C(202801152), // FCMP_SUEQ_S 461 UINT64_C(203915264), // FCMP_SULE_D 462 UINT64_C(202866688), // FCMP_SULE_S 463 UINT64_C(203784192), // FCMP_SULT_D 464 UINT64_C(202735616), // FCMP_SULT_S 465 UINT64_C(204242944), // FCMP_SUNE_D 466 UINT64_C(203194368), // FCMP_SUNE_S 467 UINT64_C(203718656), // FCMP_SUN_D 468 UINT64_C(202670080), // FCMP_SUN_S 469 UINT64_C(18022400), // FCOPYSIGN_D 470 UINT64_C(17989632), // FCOPYSIGN_S 471 UINT64_C(18424832), // FCVT_D_S 472 UINT64_C(18421760), // FCVT_S_D 473 UINT64_C(17235968), // FDIV_D 474 UINT64_C(17203200), // FDIV_S 475 UINT64_C(18688000), // FFINT_D_L 476 UINT64_C(18685952), // FFINT_D_W 477 UINT64_C(18683904), // FFINT_S_L 478 UINT64_C(18681856), // FFINT_S_W 479 UINT64_C(947159040), // FLDGT_D 480 UINT64_C(947126272), // FLDGT_S 481 UINT64_C(947224576), // FLDLE_D 482 UINT64_C(947191808), // FLDLE_S 483 UINT64_C(942931968), // FLDX_D 484 UINT64_C(942669824), // FLDX_S 485 UINT64_C(729808896), // FLD_D 486 UINT64_C(721420288), // FLD_S 487 UINT64_C(18098176), // FLOGB_D 488 UINT64_C(18097152), // FLOGB_S 489 UINT64_C(136314880), // FMADD_D 490 UINT64_C(135266304), // FMADD_S 491 UINT64_C(17629184), // FMAXA_D 492 UINT64_C(17596416), // FMAXA_S 493 UINT64_C(17367040), // FMAX_D 494 UINT64_C(17334272), // FMAX_S 495 UINT64_C(17760256), // FMINA_D 496 UINT64_C(17727488), // FMINA_S 497 UINT64_C(17498112), // FMIN_D 498 UINT64_C(17465344), // FMIN_S 499 UINT64_C(18126848), // FMOV_D 500 UINT64_C(18125824), // FMOV_S 501 UINT64_C(140509184), // FMSUB_D 502 UINT64_C(139460608), // FMSUB_S 503 UINT64_C(17104896), // FMUL_D 504 UINT64_C(17072128), // FMUL_S 505 UINT64_C(18094080), // FNEG_D 506 UINT64_C(18093056), // FNEG_S 507 UINT64_C(144703488), // FNMADD_D 508 UINT64_C(143654912), // FNMADD_S 509 UINT64_C(148897792), // FNMSUB_D 510 UINT64_C(147849216), // FNMSUB_S 511 UINT64_C(18110464), // FRECIP_D 512 UINT64_C(18109440), // FRECIP_S 513 UINT64_C(18761728), // FRINT_D 514 UINT64_C(18760704), // FRINT_S 515 UINT64_C(18114560), // FRSQRT_D 516 UINT64_C(18113536), // FRSQRT_S 517 UINT64_C(17891328), // FSCALEB_D 518 UINT64_C(17858560), // FSCALEB_S 519 UINT64_C(218103808), // FSEL_D 520 UINT64_C(218103808), // FSEL_S 521 UINT64_C(18106368), // FSQRT_D 522 UINT64_C(18105344), // FSQRT_S 523 UINT64_C(947290112), // FSTGT_D 524 UINT64_C(947257344), // FSTGT_S 525 UINT64_C(947355648), // FSTLE_D 526 UINT64_C(947322880), // FSTLE_S 527 UINT64_C(943456256), // FSTX_D 528 UINT64_C(943194112), // FSTX_S 529 UINT64_C(734003200), // FST_D 530 UINT64_C(725614592), // FST_S 531 UINT64_C(16973824), // FSUB_D 532 UINT64_C(16941056), // FSUB_S 533 UINT64_C(18491392), // FTINTRM_L_D 534 UINT64_C(18490368), // FTINTRM_L_S 535 UINT64_C(18483200), // FTINTRM_W_D 536 UINT64_C(18482176), // FTINTRM_W_S 537 UINT64_C(18540544), // FTINTRNE_L_D 538 UINT64_C(18539520), // FTINTRNE_L_S 539 UINT64_C(18532352), // FTINTRNE_W_D 540 UINT64_C(18531328), // FTINTRNE_W_S 541 UINT64_C(18507776), // FTINTRP_L_D 542 UINT64_C(18506752), // FTINTRP_L_S 543 UINT64_C(18499584), // FTINTRP_W_D 544 UINT64_C(18498560), // FTINTRP_W_S 545 UINT64_C(18524160), // FTINTRZ_L_D 546 UINT64_C(18523136), // FTINTRZ_L_S 547 UINT64_C(18515968), // FTINTRZ_W_D 548 UINT64_C(18514944), // FTINTRZ_W_S 549 UINT64_C(18556928), // FTINT_L_D 550 UINT64_C(18555904), // FTINT_L_S 551 UINT64_C(18548736), // FTINT_W_D 552 UINT64_C(18547712), // FTINT_W_S 553 UINT64_C(947027968), // IBAR 554 UINT64_C(105414656), // IDLE 555 UINT64_C(105480192), // INVTLB 556 UINT64_C(105381888), // IOCSRRD_B 557 UINT64_C(105384960), // IOCSRRD_D 558 UINT64_C(105382912), // IOCSRRD_H 559 UINT64_C(105383936), // IOCSRRD_W 560 UINT64_C(105385984), // IOCSRWR_B 561 UINT64_C(105389056), // IOCSRWR_D 562 UINT64_C(105387008), // IOCSRWR_H 563 UINT64_C(105388032), // IOCSRWR_W 564 UINT64_C(1275068416), // JIRL 565 UINT64_C(104857600), // LDDIR 566 UINT64_C(947388416), // LDGT_B 567 UINT64_C(947486720), // LDGT_D 568 UINT64_C(947421184), // LDGT_H 569 UINT64_C(947453952), // LDGT_W 570 UINT64_C(947519488), // LDLE_B 571 UINT64_C(947617792), // LDLE_D 572 UINT64_C(947552256), // LDLE_H 573 UINT64_C(947585024), // LDLE_W 574 UINT64_C(105119744), // LDPTE 575 UINT64_C(637534208), // LDPTR_D 576 UINT64_C(603979776), // LDPTR_W 577 UINT64_C(939524096), // LDX_B 578 UINT64_C(941621248), // LDX_BU 579 UINT64_C(940310528), // LDX_D 580 UINT64_C(939786240), // LDX_H 581 UINT64_C(941883392), // LDX_HU 582 UINT64_C(940048384), // LDX_W 583 UINT64_C(942145536), // LDX_WU 584 UINT64_C(671088640), // LD_B 585 UINT64_C(704643072), // LD_BU 586 UINT64_C(683671552), // LD_D 587 UINT64_C(675282944), // LD_H 588 UINT64_C(708837376), // LD_HU 589 UINT64_C(679477248), // LD_W 590 UINT64_C(713031680), // LD_WU 591 UINT64_C(570425344), // LL_D 592 UINT64_C(536870912), // LL_W 593 UINT64_C(335544320), // LU12I_W 594 UINT64_C(369098752), // LU32I_D 595 UINT64_C(50331648), // LU52I_D 596 UINT64_C(1245184), // MASKEQZ 597 UINT64_C(1277952), // MASKNEZ 598 UINT64_C(2260992), // MOD_D 599 UINT64_C(2326528), // MOD_DU 600 UINT64_C(2129920), // MOD_W 601 UINT64_C(2195456), // MOD_WU 602 UINT64_C(18142208), // MOVCF2FR_S 603 UINT64_C(18144256), // MOVCF2GR 604 UINT64_C(18139136), // MOVFCSR2GR 605 UINT64_C(18141184), // MOVFR2CF_S 606 UINT64_C(18135040), // MOVFR2GR_D 607 UINT64_C(18134016), // MOVFR2GR_S 608 UINT64_C(18134016), // MOVFR2GR_S_64 609 UINT64_C(18136064), // MOVFRH2GR_S 610 UINT64_C(18143232), // MOVGR2CF 611 UINT64_C(18137088), // MOVGR2FCSR 612 UINT64_C(18131968), // MOVGR2FRH_W 613 UINT64_C(18130944), // MOVGR2FR_D 614 UINT64_C(18129920), // MOVGR2FR_W 615 UINT64_C(18129920), // MOVGR2FR_W_64 616 UINT64_C(1966080), // MULH_D 617 UINT64_C(1998848), // MULH_DU 618 UINT64_C(1867776), // MULH_W 619 UINT64_C(1900544), // MULH_WU 620 UINT64_C(2031616), // MULW_D_W 621 UINT64_C(2064384), // MULW_D_WU 622 UINT64_C(1933312), // MUL_D 623 UINT64_C(1835008), // MUL_W 624 UINT64_C(1310720), // NOR 625 UINT64_C(1376256), // OR 626 UINT64_C(58720256), // ORI 627 UINT64_C(1441792), // ORN 628 UINT64_C(402653184), // PCADDI 629 UINT64_C(469762048), // PCADDU12I 630 UINT64_C(503316480), // PCADDU18I 631 UINT64_C(436207616), // PCALAU12I 632 UINT64_C(717225984), // PRELD 633 UINT64_C(942407680), // PRELDX 634 UINT64_C(25600), // RDTIMEH_W 635 UINT64_C(24576), // RDTIMEL_W 636 UINT64_C(26624), // RDTIME_D 637 UINT64_C(12288), // REVB_2H 638 UINT64_C(14336), // REVB_2W 639 UINT64_C(13312), // REVB_4H 640 UINT64_C(15360), // REVB_D 641 UINT64_C(16384), // REVH_2W 642 UINT64_C(17408), // REVH_D 643 UINT64_C(5046272), // ROTRI_D 644 UINT64_C(5013504), // ROTRI_W 645 UINT64_C(1802240), // ROTR_D 646 UINT64_C(1769472), // ROTR_W 647 UINT64_C(587202560), // SC_D 648 UINT64_C(553648128), // SC_W 649 UINT64_C(4259840), // SLLI_D 650 UINT64_C(4227072), // SLLI_W 651 UINT64_C(1605632), // SLL_D 652 UINT64_C(1507328), // SLL_W 653 UINT64_C(1179648), // SLT 654 UINT64_C(33554432), // SLTI 655 UINT64_C(1212416), // SLTU 656 UINT64_C(37748736), // SLTUI 657 UINT64_C(4784128), // SRAI_D 658 UINT64_C(4751360), // SRAI_W 659 UINT64_C(1671168), // SRA_D 660 UINT64_C(1572864), // SRA_W 661 UINT64_C(4521984), // SRLI_D 662 UINT64_C(4489216), // SRLI_W 663 UINT64_C(1638400), // SRL_D 664 UINT64_C(1540096), // SRL_W 665 UINT64_C(947650560), // STGT_B 666 UINT64_C(947748864), // STGT_D 667 UINT64_C(947683328), // STGT_H 668 UINT64_C(947716096), // STGT_W 669 UINT64_C(947781632), // STLE_B 670 UINT64_C(947879936), // STLE_D 671 UINT64_C(947814400), // STLE_H 672 UINT64_C(947847168), // STLE_W 673 UINT64_C(654311424), // STPTR_D 674 UINT64_C(620756992), // STPTR_W 675 UINT64_C(940572672), // STX_B 676 UINT64_C(941359104), // STX_D 677 UINT64_C(940834816), // STX_H 678 UINT64_C(941096960), // STX_W 679 UINT64_C(687865856), // ST_B 680 UINT64_C(700448768), // ST_D 681 UINT64_C(692060160), // ST_H 682 UINT64_C(696254464), // ST_W 683 UINT64_C(1146880), // SUB_D 684 UINT64_C(1114112), // SUB_W 685 UINT64_C(2818048), // SYSCALL 686 UINT64_C(105390080), // TLBCLR 687 UINT64_C(105395200), // TLBFILL 688 UINT64_C(105391104), // TLBFLUSH 689 UINT64_C(105393152), // TLBRD 690 UINT64_C(105392128), // TLBSRCH 691 UINT64_C(105394176), // TLBWR 692 UINT64_C(1409024), // XOR 693 UINT64_C(62914560), // XORI 694 UINT64_C(0) 695 }; 696 const unsigned opcode = MI.getOpcode(); 697 uint64_t Value = InstBits[opcode]; 698 uint64_t op = 0; 699 (void)op; // suppress warning 700 switch (opcode) { 701 case LoongArch::ERTN: 702 case LoongArch::TLBCLR: 703 case LoongArch::TLBFILL: 704 case LoongArch::TLBFLUSH: 705 case LoongArch::TLBRD: 706 case LoongArch::TLBSRCH: 707 case LoongArch::TLBWR: { 708 break; 709 } 710 case LoongArch::FSEL_D: 711 case LoongArch::FSEL_S: { 712 // op: ca 713 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 714 op &= UINT64_C(7); 715 op <<= 15; 716 Value |= op; 717 // op: fk 718 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 719 op &= UINT64_C(31); 720 op <<= 10; 721 Value |= op; 722 // op: fj 723 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 724 op &= UINT64_C(31); 725 op <<= 5; 726 Value |= op; 727 // op: fd 728 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 729 op &= UINT64_C(31); 730 Value |= op; 731 break; 732 } 733 case LoongArch::CSRRD: { 734 // op: csr_num 735 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 736 op &= UINT64_C(16383); 737 op <<= 10; 738 Value |= op; 739 // op: rd 740 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 741 op &= UINT64_C(31); 742 Value |= op; 743 break; 744 } 745 case LoongArch::CSRWR: { 746 // op: csr_num 747 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 748 op &= UINT64_C(16383); 749 op <<= 10; 750 Value |= op; 751 // op: rd 752 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 753 op &= UINT64_C(31); 754 Value |= op; 755 break; 756 } 757 case LoongArch::CSRXCHG: { 758 // op: csr_num 759 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 760 op &= UINT64_C(16383); 761 op <<= 10; 762 Value |= op; 763 // op: rj 764 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 765 op &= UINT64_C(31); 766 op <<= 5; 767 Value |= op; 768 // op: rd 769 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 770 op &= UINT64_C(31); 771 Value |= op; 772 break; 773 } 774 case LoongArch::FMADD_D: 775 case LoongArch::FMADD_S: 776 case LoongArch::FMSUB_D: 777 case LoongArch::FMSUB_S: 778 case LoongArch::FNMADD_D: 779 case LoongArch::FNMADD_S: 780 case LoongArch::FNMSUB_D: 781 case LoongArch::FNMSUB_S: { 782 // op: fa 783 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 784 op &= UINT64_C(31); 785 op <<= 15; 786 Value |= op; 787 // op: fk 788 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 789 op &= UINT64_C(31); 790 op <<= 10; 791 Value |= op; 792 // op: fj 793 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 794 op &= UINT64_C(31); 795 op <<= 5; 796 Value |= op; 797 // op: fd 798 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 799 op &= UINT64_C(31); 800 Value |= op; 801 break; 802 } 803 case LoongArch::FABS_D: 804 case LoongArch::FABS_S: 805 case LoongArch::FCLASS_D: 806 case LoongArch::FCLASS_S: 807 case LoongArch::FCVT_D_S: 808 case LoongArch::FCVT_S_D: 809 case LoongArch::FFINT_D_L: 810 case LoongArch::FFINT_D_W: 811 case LoongArch::FFINT_S_L: 812 case LoongArch::FFINT_S_W: 813 case LoongArch::FLOGB_D: 814 case LoongArch::FLOGB_S: 815 case LoongArch::FNEG_D: 816 case LoongArch::FNEG_S: 817 case LoongArch::FRECIP_D: 818 case LoongArch::FRECIP_S: 819 case LoongArch::FRINT_D: 820 case LoongArch::FRINT_S: 821 case LoongArch::FRSQRT_D: 822 case LoongArch::FRSQRT_S: 823 case LoongArch::FSQRT_D: 824 case LoongArch::FSQRT_S: 825 case LoongArch::FTINTRM_L_D: 826 case LoongArch::FTINTRM_L_S: 827 case LoongArch::FTINTRM_W_D: 828 case LoongArch::FTINTRM_W_S: 829 case LoongArch::FTINTRNE_L_D: 830 case LoongArch::FTINTRNE_L_S: 831 case LoongArch::FTINTRNE_W_D: 832 case LoongArch::FTINTRNE_W_S: 833 case LoongArch::FTINTRP_L_D: 834 case LoongArch::FTINTRP_L_S: 835 case LoongArch::FTINTRP_W_D: 836 case LoongArch::FTINTRP_W_S: 837 case LoongArch::FTINTRZ_L_D: 838 case LoongArch::FTINTRZ_L_S: 839 case LoongArch::FTINTRZ_W_D: 840 case LoongArch::FTINTRZ_W_S: 841 case LoongArch::FTINT_L_D: 842 case LoongArch::FTINT_L_S: 843 case LoongArch::FTINT_W_D: 844 case LoongArch::FTINT_W_S: { 845 // op: fj 846 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 847 op &= UINT64_C(31); 848 op <<= 5; 849 Value |= op; 850 // op: fd 851 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 852 op &= UINT64_C(31); 853 Value |= op; 854 break; 855 } 856 case LoongArch::FCMP_CAF_D: 857 case LoongArch::FCMP_CAF_S: 858 case LoongArch::FCMP_CEQ_D: 859 case LoongArch::FCMP_CEQ_S: 860 case LoongArch::FCMP_CLE_D: 861 case LoongArch::FCMP_CLE_S: 862 case LoongArch::FCMP_CLT_D: 863 case LoongArch::FCMP_CLT_S: 864 case LoongArch::FCMP_CNE_D: 865 case LoongArch::FCMP_CNE_S: 866 case LoongArch::FCMP_COR_D: 867 case LoongArch::FCMP_COR_S: 868 case LoongArch::FCMP_CUEQ_D: 869 case LoongArch::FCMP_CUEQ_S: 870 case LoongArch::FCMP_CULE_D: 871 case LoongArch::FCMP_CULE_S: 872 case LoongArch::FCMP_CULT_D: 873 case LoongArch::FCMP_CULT_S: 874 case LoongArch::FCMP_CUNE_D: 875 case LoongArch::FCMP_CUNE_S: 876 case LoongArch::FCMP_CUN_D: 877 case LoongArch::FCMP_CUN_S: 878 case LoongArch::FCMP_SAF_D: 879 case LoongArch::FCMP_SAF_S: 880 case LoongArch::FCMP_SEQ_D: 881 case LoongArch::FCMP_SEQ_S: 882 case LoongArch::FCMP_SLE_D: 883 case LoongArch::FCMP_SLE_S: 884 case LoongArch::FCMP_SLT_D: 885 case LoongArch::FCMP_SLT_S: 886 case LoongArch::FCMP_SNE_D: 887 case LoongArch::FCMP_SNE_S: 888 case LoongArch::FCMP_SOR_D: 889 case LoongArch::FCMP_SOR_S: 890 case LoongArch::FCMP_SUEQ_D: 891 case LoongArch::FCMP_SUEQ_S: 892 case LoongArch::FCMP_SULE_D: 893 case LoongArch::FCMP_SULE_S: 894 case LoongArch::FCMP_SULT_D: 895 case LoongArch::FCMP_SULT_S: 896 case LoongArch::FCMP_SUNE_D: 897 case LoongArch::FCMP_SUNE_S: 898 case LoongArch::FCMP_SUN_D: 899 case LoongArch::FCMP_SUN_S: { 900 // op: fk 901 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 902 op &= UINT64_C(31); 903 op <<= 10; 904 Value |= op; 905 // op: fj 906 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 907 op &= UINT64_C(31); 908 op <<= 5; 909 Value |= op; 910 // op: cd 911 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 912 op &= UINT64_C(7); 913 Value |= op; 914 break; 915 } 916 case LoongArch::FADD_D: 917 case LoongArch::FADD_S: 918 case LoongArch::FCOPYSIGN_D: 919 case LoongArch::FCOPYSIGN_S: 920 case LoongArch::FDIV_D: 921 case LoongArch::FDIV_S: 922 case LoongArch::FMAXA_D: 923 case LoongArch::FMAXA_S: 924 case LoongArch::FMAX_D: 925 case LoongArch::FMAX_S: 926 case LoongArch::FMINA_D: 927 case LoongArch::FMINA_S: 928 case LoongArch::FMIN_D: 929 case LoongArch::FMIN_S: 930 case LoongArch::FMUL_D: 931 case LoongArch::FMUL_S: 932 case LoongArch::FSCALEB_D: 933 case LoongArch::FSCALEB_S: 934 case LoongArch::FSUB_D: 935 case LoongArch::FSUB_S: { 936 // op: fk 937 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 938 op &= UINT64_C(31); 939 op <<= 10; 940 Value |= op; 941 // op: fj 942 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 943 op &= UINT64_C(31); 944 op <<= 5; 945 Value |= op; 946 // op: fd 947 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 948 op &= UINT64_C(31); 949 Value |= op; 950 break; 951 } 952 case LoongArch::FLD_D: 953 case LoongArch::FLD_S: 954 case LoongArch::FST_D: 955 case LoongArch::FST_S: { 956 // op: imm12 957 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 958 op &= UINT64_C(4095); 959 op <<= 10; 960 Value |= op; 961 // op: rj 962 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 963 op &= UINT64_C(31); 964 op <<= 5; 965 Value |= op; 966 // op: fd 967 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 968 op &= UINT64_C(31); 969 Value |= op; 970 break; 971 } 972 case LoongArch::PRELD: { 973 // op: imm12 974 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 975 op &= UINT64_C(4095); 976 op <<= 10; 977 Value |= op; 978 // op: rj 979 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 980 op &= UINT64_C(31); 981 op <<= 5; 982 Value |= op; 983 // op: imm5 984 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 985 op &= UINT64_C(31); 986 Value |= op; 987 break; 988 } 989 case LoongArch::CACOP: { 990 // op: imm12 991 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 992 op &= UINT64_C(4095); 993 op <<= 10; 994 Value |= op; 995 // op: rj 996 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 997 op &= UINT64_C(31); 998 op <<= 5; 999 Value |= op; 1000 // op: op 1001 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 1002 op &= UINT64_C(31); 1003 Value |= op; 1004 break; 1005 } 1006 case LoongArch::ADDI_D: 1007 case LoongArch::ADDI_W: 1008 case LoongArch::ANDI: 1009 case LoongArch::LD_B: 1010 case LoongArch::LD_BU: 1011 case LoongArch::LD_D: 1012 case LoongArch::LD_H: 1013 case LoongArch::LD_HU: 1014 case LoongArch::LD_W: 1015 case LoongArch::LD_WU: 1016 case LoongArch::LU52I_D: 1017 case LoongArch::ORI: 1018 case LoongArch::SLTI: 1019 case LoongArch::SLTUI: 1020 case LoongArch::ST_B: 1021 case LoongArch::ST_D: 1022 case LoongArch::ST_H: 1023 case LoongArch::ST_W: 1024 case LoongArch::XORI: { 1025 // op: imm12 1026 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 1027 op &= UINT64_C(4095); 1028 op <<= 10; 1029 Value |= op; 1030 // op: rj 1031 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1032 op &= UINT64_C(31); 1033 op <<= 5; 1034 Value |= op; 1035 // op: rd 1036 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 1037 op &= UINT64_C(31); 1038 Value |= op; 1039 break; 1040 } 1041 case LoongArch::LDPTR_D: 1042 case LoongArch::LDPTR_W: 1043 case LoongArch::LL_D: 1044 case LoongArch::LL_W: 1045 case LoongArch::STPTR_D: 1046 case LoongArch::STPTR_W: { 1047 // op: imm14 1048 op = getImmOpValueAsr2(MI, 2, Fixups, STI); 1049 op &= UINT64_C(16383); 1050 op <<= 10; 1051 Value |= op; 1052 // op: rj 1053 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1054 op &= UINT64_C(31); 1055 op <<= 5; 1056 Value |= op; 1057 // op: rd 1058 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 1059 op &= UINT64_C(31); 1060 Value |= op; 1061 break; 1062 } 1063 case LoongArch::SC_D: 1064 case LoongArch::SC_W: { 1065 // op: imm14 1066 op = getImmOpValueAsr2(MI, 3, Fixups, STI); 1067 op &= UINT64_C(16383); 1068 op <<= 10; 1069 Value |= op; 1070 // op: rj 1071 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 1072 op &= UINT64_C(31); 1073 op <<= 5; 1074 Value |= op; 1075 // op: rd 1076 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1077 op &= UINT64_C(31); 1078 Value |= op; 1079 break; 1080 } 1081 case LoongArch::BREAK: 1082 case LoongArch::DBAR: 1083 case LoongArch::DBCL: 1084 case LoongArch::IBAR: 1085 case LoongArch::IDLE: 1086 case LoongArch::SYSCALL: { 1087 // op: imm15 1088 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 1089 op &= UINT64_C(32767); 1090 Value |= op; 1091 break; 1092 } 1093 case LoongArch::BEQ: 1094 case LoongArch::BGE: 1095 case LoongArch::BGEU: 1096 case LoongArch::BLT: 1097 case LoongArch::BLTU: 1098 case LoongArch::BNE: { 1099 // op: imm16 1100 op = getImmOpValueAsr2(MI, 2, Fixups, STI); 1101 op &= UINT64_C(65535); 1102 op <<= 10; 1103 Value |= op; 1104 // op: rj 1105 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 1106 op &= UINT64_C(31); 1107 op <<= 5; 1108 Value |= op; 1109 // op: rd 1110 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1111 op &= UINT64_C(31); 1112 Value |= op; 1113 break; 1114 } 1115 case LoongArch::JIRL: { 1116 // op: imm16 1117 op = getImmOpValueAsr2(MI, 2, Fixups, STI); 1118 op &= UINT64_C(65535); 1119 op <<= 10; 1120 Value |= op; 1121 // op: rj 1122 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1123 op &= UINT64_C(31); 1124 op <<= 5; 1125 Value |= op; 1126 // op: rd 1127 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 1128 op &= UINT64_C(31); 1129 Value |= op; 1130 break; 1131 } 1132 case LoongArch::ADDU16I_D: { 1133 // op: imm16 1134 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 1135 op &= UINT64_C(65535); 1136 op <<= 10; 1137 Value |= op; 1138 // op: rj 1139 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1140 op &= UINT64_C(31); 1141 op <<= 5; 1142 Value |= op; 1143 // op: rd 1144 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 1145 op &= UINT64_C(31); 1146 Value |= op; 1147 break; 1148 } 1149 case LoongArch::ALSL_D: 1150 case LoongArch::ALSL_W: 1151 case LoongArch::ALSL_WU: { 1152 // op: imm2 1153 op = getImmOpValueSub1(MI, 3, Fixups, STI); 1154 op &= UINT64_C(3); 1155 op <<= 15; 1156 Value |= op; 1157 // op: rk 1158 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 1159 op &= UINT64_C(31); 1160 op <<= 10; 1161 Value |= op; 1162 // op: rj 1163 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1164 op &= UINT64_C(31); 1165 op <<= 5; 1166 Value |= op; 1167 // op: rd 1168 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 1169 op &= UINT64_C(31); 1170 Value |= op; 1171 break; 1172 } 1173 case LoongArch::BYTEPICK_W: { 1174 // op: imm2 1175 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 1176 op &= UINT64_C(3); 1177 op <<= 15; 1178 Value |= op; 1179 // op: rk 1180 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 1181 op &= UINT64_C(31); 1182 op <<= 10; 1183 Value |= op; 1184 // op: rj 1185 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1186 op &= UINT64_C(31); 1187 op <<= 5; 1188 Value |= op; 1189 // op: rd 1190 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 1191 op &= UINT64_C(31); 1192 Value |= op; 1193 break; 1194 } 1195 case LoongArch::LU12I_W: 1196 case LoongArch::PCADDI: 1197 case LoongArch::PCADDU12I: 1198 case LoongArch::PCADDU18I: 1199 case LoongArch::PCALAU12I: { 1200 // op: imm20 1201 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1202 op &= UINT64_C(1048575); 1203 op <<= 5; 1204 Value |= op; 1205 // op: rd 1206 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 1207 op &= UINT64_C(31); 1208 Value |= op; 1209 break; 1210 } 1211 case LoongArch::LU32I_D: { 1212 // op: imm20 1213 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 1214 op &= UINT64_C(1048575); 1215 op <<= 5; 1216 Value |= op; 1217 // op: rd 1218 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1219 op &= UINT64_C(31); 1220 Value |= op; 1221 break; 1222 } 1223 case LoongArch::BCEQZ: 1224 case LoongArch::BCNEZ: { 1225 // op: imm21 1226 op = getImmOpValueAsr2(MI, 1, Fixups, STI); 1227 Value |= (op & UINT64_C(65535)) << 10; 1228 Value |= (op & UINT64_C(2031616)) >> 16; 1229 // op: cj 1230 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 1231 op &= UINT64_C(7); 1232 op <<= 5; 1233 Value |= op; 1234 break; 1235 } 1236 case LoongArch::BEQZ: 1237 case LoongArch::BNEZ: { 1238 // op: imm21 1239 op = getImmOpValueAsr2(MI, 1, Fixups, STI); 1240 Value |= (op & UINT64_C(65535)) << 10; 1241 Value |= (op & UINT64_C(2031616)) >> 16; 1242 // op: rj 1243 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 1244 op &= UINT64_C(31); 1245 op <<= 5; 1246 Value |= op; 1247 break; 1248 } 1249 case LoongArch::B: 1250 case LoongArch::BL: { 1251 // op: imm26 1252 op = getImmOpValueAsr2(MI, 0, Fixups, STI); 1253 Value |= (op & UINT64_C(65535)) << 10; 1254 Value |= (op & UINT64_C(67043328)) >> 16; 1255 break; 1256 } 1257 case LoongArch::BYTEPICK_D: { 1258 // op: imm3 1259 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 1260 op &= UINT64_C(7); 1261 op <<= 15; 1262 Value |= op; 1263 // op: rk 1264 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 1265 op &= UINT64_C(31); 1266 op <<= 10; 1267 Value |= op; 1268 // op: rj 1269 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1270 op &= UINT64_C(31); 1271 op <<= 5; 1272 Value |= op; 1273 // op: rd 1274 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 1275 op &= UINT64_C(31); 1276 Value |= op; 1277 break; 1278 } 1279 case LoongArch::ROTRI_W: 1280 case LoongArch::SLLI_W: 1281 case LoongArch::SRAI_W: 1282 case LoongArch::SRLI_W: { 1283 // op: imm5 1284 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 1285 op &= UINT64_C(31); 1286 op <<= 10; 1287 Value |= op; 1288 // op: rj 1289 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1290 op &= UINT64_C(31); 1291 op <<= 5; 1292 Value |= op; 1293 // op: rd 1294 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 1295 op &= UINT64_C(31); 1296 Value |= op; 1297 break; 1298 } 1299 case LoongArch::ROTRI_D: 1300 case LoongArch::SLLI_D: 1301 case LoongArch::SRAI_D: 1302 case LoongArch::SRLI_D: { 1303 // op: imm6 1304 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 1305 op &= UINT64_C(63); 1306 op <<= 10; 1307 Value |= op; 1308 // op: rj 1309 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1310 op &= UINT64_C(31); 1311 op <<= 5; 1312 Value |= op; 1313 // op: rd 1314 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 1315 op &= UINT64_C(31); 1316 Value |= op; 1317 break; 1318 } 1319 case LoongArch::LDDIR: { 1320 // op: imm8 1321 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 1322 op &= UINT64_C(255); 1323 op <<= 10; 1324 Value |= op; 1325 // op: rj 1326 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1327 op &= UINT64_C(31); 1328 op <<= 5; 1329 Value |= op; 1330 // op: rd 1331 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 1332 op &= UINT64_C(31); 1333 Value |= op; 1334 break; 1335 } 1336 case LoongArch::BSTRPICK_D: { 1337 // op: msbd 1338 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 1339 op &= UINT64_C(63); 1340 op <<= 16; 1341 Value |= op; 1342 // op: lsbd 1343 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 1344 op &= UINT64_C(63); 1345 op <<= 10; 1346 Value |= op; 1347 // op: rj 1348 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1349 op &= UINT64_C(31); 1350 op <<= 5; 1351 Value |= op; 1352 // op: rd 1353 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 1354 op &= UINT64_C(31); 1355 Value |= op; 1356 break; 1357 } 1358 case LoongArch::BSTRINS_D: { 1359 // op: msbd 1360 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 1361 op &= UINT64_C(63); 1362 op <<= 16; 1363 Value |= op; 1364 // op: lsbd 1365 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 1366 op &= UINT64_C(63); 1367 op <<= 10; 1368 Value |= op; 1369 // op: rj 1370 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 1371 op &= UINT64_C(31); 1372 op <<= 5; 1373 Value |= op; 1374 // op: rd 1375 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1376 op &= UINT64_C(31); 1377 Value |= op; 1378 break; 1379 } 1380 case LoongArch::BSTRPICK_W: { 1381 // op: msbw 1382 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 1383 op &= UINT64_C(31); 1384 op <<= 16; 1385 Value |= op; 1386 // op: lsbw 1387 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 1388 op &= UINT64_C(31); 1389 op <<= 10; 1390 Value |= op; 1391 // op: rj 1392 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1393 op &= UINT64_C(31); 1394 op <<= 5; 1395 Value |= op; 1396 // op: rd 1397 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 1398 op &= UINT64_C(31); 1399 Value |= op; 1400 break; 1401 } 1402 case LoongArch::BSTRINS_W: { 1403 // op: msbw 1404 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 1405 op &= UINT64_C(31); 1406 op <<= 16; 1407 Value |= op; 1408 // op: lsbw 1409 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); 1410 op &= UINT64_C(31); 1411 op <<= 10; 1412 Value |= op; 1413 // op: rj 1414 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 1415 op &= UINT64_C(31); 1416 op <<= 5; 1417 Value |= op; 1418 // op: rd 1419 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1420 op &= UINT64_C(31); 1421 Value |= op; 1422 break; 1423 } 1424 case LoongArch::BITREV_4B: 1425 case LoongArch::BITREV_8B: 1426 case LoongArch::BITREV_D: 1427 case LoongArch::BITREV_W: 1428 case LoongArch::CLO_D: 1429 case LoongArch::CLO_W: 1430 case LoongArch::CLZ_D: 1431 case LoongArch::CLZ_W: 1432 case LoongArch::CPUCFG: 1433 case LoongArch::CTO_D: 1434 case LoongArch::CTO_W: 1435 case LoongArch::CTZ_D: 1436 case LoongArch::CTZ_W: 1437 case LoongArch::EXT_W_B: 1438 case LoongArch::EXT_W_H: 1439 case LoongArch::IOCSRRD_B: 1440 case LoongArch::IOCSRRD_D: 1441 case LoongArch::IOCSRRD_H: 1442 case LoongArch::IOCSRRD_W: 1443 case LoongArch::IOCSRWR_B: 1444 case LoongArch::IOCSRWR_D: 1445 case LoongArch::IOCSRWR_H: 1446 case LoongArch::IOCSRWR_W: 1447 case LoongArch::RDTIMEH_W: 1448 case LoongArch::RDTIMEL_W: 1449 case LoongArch::RDTIME_D: 1450 case LoongArch::REVB_2H: 1451 case LoongArch::REVB_2W: 1452 case LoongArch::REVB_4H: 1453 case LoongArch::REVB_D: 1454 case LoongArch::REVH_2W: 1455 case LoongArch::REVH_D: { 1456 // op: rj 1457 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1458 op &= UINT64_C(31); 1459 op <<= 5; 1460 Value |= op; 1461 // op: rd 1462 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 1463 op &= UINT64_C(31); 1464 Value |= op; 1465 break; 1466 } 1467 case LoongArch::INVTLB: { 1468 // op: rk 1469 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 1470 op &= UINT64_C(31); 1471 op <<= 10; 1472 Value |= op; 1473 // op: rj 1474 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1475 op &= UINT64_C(31); 1476 op <<= 5; 1477 Value |= op; 1478 // op: op 1479 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 1480 op &= UINT64_C(31); 1481 Value |= op; 1482 break; 1483 } 1484 case LoongArch::ASRTGT_D: 1485 case LoongArch::ASRTLE_D: { 1486 // op: rk 1487 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1488 op &= UINT64_C(31); 1489 op <<= 10; 1490 Value |= op; 1491 // op: rj 1492 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 1493 op &= UINT64_C(31); 1494 op <<= 5; 1495 Value |= op; 1496 break; 1497 } 1498 case LoongArch::AMADD_D: 1499 case LoongArch::AMADD_DB_D: 1500 case LoongArch::AMADD_DB_W: 1501 case LoongArch::AMADD_W: 1502 case LoongArch::AMAND_D: 1503 case LoongArch::AMAND_DB_D: 1504 case LoongArch::AMAND_DB_W: 1505 case LoongArch::AMAND_W: 1506 case LoongArch::AMMAX_D: 1507 case LoongArch::AMMAX_DB_D: 1508 case LoongArch::AMMAX_DB_DU: 1509 case LoongArch::AMMAX_DB_W: 1510 case LoongArch::AMMAX_DB_WU: 1511 case LoongArch::AMMAX_DU: 1512 case LoongArch::AMMAX_W: 1513 case LoongArch::AMMAX_WU: 1514 case LoongArch::AMMIN_D: 1515 case LoongArch::AMMIN_DB_D: 1516 case LoongArch::AMMIN_DB_DU: 1517 case LoongArch::AMMIN_DB_W: 1518 case LoongArch::AMMIN_DB_WU: 1519 case LoongArch::AMMIN_DU: 1520 case LoongArch::AMMIN_W: 1521 case LoongArch::AMMIN_WU: 1522 case LoongArch::AMOR_D: 1523 case LoongArch::AMOR_DB_D: 1524 case LoongArch::AMOR_DB_W: 1525 case LoongArch::AMOR_W: 1526 case LoongArch::AMSWAP_D: 1527 case LoongArch::AMSWAP_DB_D: 1528 case LoongArch::AMSWAP_DB_W: 1529 case LoongArch::AMSWAP_W: 1530 case LoongArch::AMXOR_D: 1531 case LoongArch::AMXOR_DB_D: 1532 case LoongArch::AMXOR_DB_W: 1533 case LoongArch::AMXOR_W: { 1534 // op: rk 1535 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1536 op &= UINT64_C(31); 1537 op <<= 10; 1538 Value |= op; 1539 // op: rj 1540 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 1541 op &= UINT64_C(31); 1542 op <<= 5; 1543 Value |= op; 1544 // op: rd 1545 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 1546 op &= UINT64_C(31); 1547 Value |= op; 1548 break; 1549 } 1550 case LoongArch::FLDGT_D: 1551 case LoongArch::FLDGT_S: 1552 case LoongArch::FLDLE_D: 1553 case LoongArch::FLDLE_S: 1554 case LoongArch::FLDX_D: 1555 case LoongArch::FLDX_S: 1556 case LoongArch::FSTGT_D: 1557 case LoongArch::FSTGT_S: 1558 case LoongArch::FSTLE_D: 1559 case LoongArch::FSTLE_S: 1560 case LoongArch::FSTX_D: 1561 case LoongArch::FSTX_S: { 1562 // op: rk 1563 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 1564 op &= UINT64_C(31); 1565 op <<= 10; 1566 Value |= op; 1567 // op: rj 1568 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1569 op &= UINT64_C(31); 1570 op <<= 5; 1571 Value |= op; 1572 // op: fd 1573 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 1574 op &= UINT64_C(31); 1575 Value |= op; 1576 break; 1577 } 1578 case LoongArch::PRELDX: { 1579 // op: rk 1580 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 1581 op &= UINT64_C(31); 1582 op <<= 10; 1583 Value |= op; 1584 // op: rj 1585 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1586 op &= UINT64_C(31); 1587 op <<= 5; 1588 Value |= op; 1589 // op: imm5 1590 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 1591 op &= UINT64_C(31); 1592 Value |= op; 1593 break; 1594 } 1595 case LoongArch::ADD_D: 1596 case LoongArch::ADD_W: 1597 case LoongArch::AND: 1598 case LoongArch::ANDN: 1599 case LoongArch::CRCC_W_B_W: 1600 case LoongArch::CRCC_W_D_W: 1601 case LoongArch::CRCC_W_H_W: 1602 case LoongArch::CRCC_W_W_W: 1603 case LoongArch::CRC_W_B_W: 1604 case LoongArch::CRC_W_D_W: 1605 case LoongArch::CRC_W_H_W: 1606 case LoongArch::CRC_W_W_W: 1607 case LoongArch::DIV_D: 1608 case LoongArch::DIV_DU: 1609 case LoongArch::DIV_W: 1610 case LoongArch::DIV_WU: 1611 case LoongArch::LDGT_B: 1612 case LoongArch::LDGT_D: 1613 case LoongArch::LDGT_H: 1614 case LoongArch::LDGT_W: 1615 case LoongArch::LDLE_B: 1616 case LoongArch::LDLE_D: 1617 case LoongArch::LDLE_H: 1618 case LoongArch::LDLE_W: 1619 case LoongArch::LDX_B: 1620 case LoongArch::LDX_BU: 1621 case LoongArch::LDX_D: 1622 case LoongArch::LDX_H: 1623 case LoongArch::LDX_HU: 1624 case LoongArch::LDX_W: 1625 case LoongArch::LDX_WU: 1626 case LoongArch::MASKEQZ: 1627 case LoongArch::MASKNEZ: 1628 case LoongArch::MOD_D: 1629 case LoongArch::MOD_DU: 1630 case LoongArch::MOD_W: 1631 case LoongArch::MOD_WU: 1632 case LoongArch::MULH_D: 1633 case LoongArch::MULH_DU: 1634 case LoongArch::MULH_W: 1635 case LoongArch::MULH_WU: 1636 case LoongArch::MULW_D_W: 1637 case LoongArch::MULW_D_WU: 1638 case LoongArch::MUL_D: 1639 case LoongArch::MUL_W: 1640 case LoongArch::NOR: 1641 case LoongArch::OR: 1642 case LoongArch::ORN: 1643 case LoongArch::ROTR_D: 1644 case LoongArch::ROTR_W: 1645 case LoongArch::SLL_D: 1646 case LoongArch::SLL_W: 1647 case LoongArch::SLT: 1648 case LoongArch::SLTU: 1649 case LoongArch::SRA_D: 1650 case LoongArch::SRA_W: 1651 case LoongArch::SRL_D: 1652 case LoongArch::SRL_W: 1653 case LoongArch::STGT_B: 1654 case LoongArch::STGT_D: 1655 case LoongArch::STGT_H: 1656 case LoongArch::STGT_W: 1657 case LoongArch::STLE_B: 1658 case LoongArch::STLE_D: 1659 case LoongArch::STLE_H: 1660 case LoongArch::STLE_W: 1661 case LoongArch::STX_B: 1662 case LoongArch::STX_D: 1663 case LoongArch::STX_H: 1664 case LoongArch::STX_W: 1665 case LoongArch::SUB_D: 1666 case LoongArch::SUB_W: 1667 case LoongArch::XOR: { 1668 // op: rk 1669 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 1670 op &= UINT64_C(31); 1671 op <<= 10; 1672 Value |= op; 1673 // op: rj 1674 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1675 op &= UINT64_C(31); 1676 op <<= 5; 1677 Value |= op; 1678 // op: rd 1679 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 1680 op &= UINT64_C(31); 1681 Value |= op; 1682 break; 1683 } 1684 case LoongArch::LDPTE: { 1685 // op: seq 1686 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1687 op &= UINT64_C(255); 1688 op <<= 10; 1689 Value |= op; 1690 // op: rj 1691 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 1692 op &= UINT64_C(31); 1693 op <<= 5; 1694 Value |= op; 1695 break; 1696 } 1697 case LoongArch::FMOV_D: 1698 case LoongArch::FMOV_S: 1699 case LoongArch::MOVCF2FR_S: 1700 case LoongArch::MOVCF2GR: 1701 case LoongArch::MOVFCSR2GR: 1702 case LoongArch::MOVFR2CF_S: 1703 case LoongArch::MOVFR2GR_D: 1704 case LoongArch::MOVFR2GR_S: 1705 case LoongArch::MOVFR2GR_S_64: 1706 case LoongArch::MOVFRH2GR_S: 1707 case LoongArch::MOVGR2CF: 1708 case LoongArch::MOVGR2FCSR: 1709 case LoongArch::MOVGR2FR_D: 1710 case LoongArch::MOVGR2FR_W: 1711 case LoongArch::MOVGR2FR_W_64: { 1712 // op: src 1713 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1714 op &= UINT64_C(31); 1715 op <<= 5; 1716 Value |= op; 1717 // op: dst 1718 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 1719 op &= UINT64_C(31); 1720 Value |= op; 1721 break; 1722 } 1723 case LoongArch::MOVGR2FRH_W: { 1724 // op: src 1725 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 1726 op &= UINT64_C(31); 1727 op <<= 5; 1728 Value |= op; 1729 // op: dst 1730 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 1731 op &= UINT64_C(31); 1732 Value |= op; 1733 break; 1734 } 1735 default: 1736 std::string msg; 1737 raw_string_ostream Msg(msg); 1738 Msg << "Not supported instr: " << MI; 1739 report_fatal_error(Msg.str().c_str()); 1740 } 1741 return Value; 1742} 1743 1744