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1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|*                                                                            *|
3|* Target Instruction Enum Values and Descriptors                             *|
4|*                                                                            *|
5|* Automatically generated file, do not edit!                                 *|
6|*                                                                            *|
7\*===----------------------------------------------------------------------===*/
8
9#ifdef GET_INSTRINFO_ENUM
10#undef GET_INSTRINFO_ENUM
11namespace llvm {
12
13namespace PPC {
14  enum {
15    PHI	= 0,
16    INLINEASM	= 1,
17    INLINEASM_BR	= 2,
18    CFI_INSTRUCTION	= 3,
19    EH_LABEL	= 4,
20    GC_LABEL	= 5,
21    ANNOTATION_LABEL	= 6,
22    KILL	= 7,
23    EXTRACT_SUBREG	= 8,
24    INSERT_SUBREG	= 9,
25    IMPLICIT_DEF	= 10,
26    SUBREG_TO_REG	= 11,
27    COPY_TO_REGCLASS	= 12,
28    DBG_VALUE	= 13,
29    DBG_VALUE_LIST	= 14,
30    DBG_INSTR_REF	= 15,
31    DBG_PHI	= 16,
32    DBG_LABEL	= 17,
33    REG_SEQUENCE	= 18,
34    COPY	= 19,
35    BUNDLE	= 20,
36    LIFETIME_START	= 21,
37    LIFETIME_END	= 22,
38    PSEUDO_PROBE	= 23,
39    ARITH_FENCE	= 24,
40    STACKMAP	= 25,
41    FENTRY_CALL	= 26,
42    PATCHPOINT	= 27,
43    LOAD_STACK_GUARD	= 28,
44    PREALLOCATED_SETUP	= 29,
45    PREALLOCATED_ARG	= 30,
46    STATEPOINT	= 31,
47    LOCAL_ESCAPE	= 32,
48    FAULTING_OP	= 33,
49    PATCHABLE_OP	= 34,
50    PATCHABLE_FUNCTION_ENTER	= 35,
51    PATCHABLE_RET	= 36,
52    PATCHABLE_FUNCTION_EXIT	= 37,
53    PATCHABLE_TAIL_CALL	= 38,
54    PATCHABLE_EVENT_CALL	= 39,
55    PATCHABLE_TYPED_EVENT_CALL	= 40,
56    ICALL_BRANCH_FUNNEL	= 41,
57    MEMBARRIER	= 42,
58    G_ASSERT_SEXT	= 43,
59    G_ASSERT_ZEXT	= 44,
60    G_ASSERT_ALIGN	= 45,
61    G_ADD	= 46,
62    G_SUB	= 47,
63    G_MUL	= 48,
64    G_SDIV	= 49,
65    G_UDIV	= 50,
66    G_SREM	= 51,
67    G_UREM	= 52,
68    G_SDIVREM	= 53,
69    G_UDIVREM	= 54,
70    G_AND	= 55,
71    G_OR	= 56,
72    G_XOR	= 57,
73    G_IMPLICIT_DEF	= 58,
74    G_PHI	= 59,
75    G_FRAME_INDEX	= 60,
76    G_GLOBAL_VALUE	= 61,
77    G_EXTRACT	= 62,
78    G_UNMERGE_VALUES	= 63,
79    G_INSERT	= 64,
80    G_MERGE_VALUES	= 65,
81    G_BUILD_VECTOR	= 66,
82    G_BUILD_VECTOR_TRUNC	= 67,
83    G_CONCAT_VECTORS	= 68,
84    G_PTRTOINT	= 69,
85    G_INTTOPTR	= 70,
86    G_BITCAST	= 71,
87    G_FREEZE	= 72,
88    G_INTRINSIC_FPTRUNC_ROUND	= 73,
89    G_INTRINSIC_TRUNC	= 74,
90    G_INTRINSIC_ROUND	= 75,
91    G_INTRINSIC_LRINT	= 76,
92    G_INTRINSIC_ROUNDEVEN	= 77,
93    G_READCYCLECOUNTER	= 78,
94    G_LOAD	= 79,
95    G_SEXTLOAD	= 80,
96    G_ZEXTLOAD	= 81,
97    G_INDEXED_LOAD	= 82,
98    G_INDEXED_SEXTLOAD	= 83,
99    G_INDEXED_ZEXTLOAD	= 84,
100    G_STORE	= 85,
101    G_INDEXED_STORE	= 86,
102    G_ATOMIC_CMPXCHG_WITH_SUCCESS	= 87,
103    G_ATOMIC_CMPXCHG	= 88,
104    G_ATOMICRMW_XCHG	= 89,
105    G_ATOMICRMW_ADD	= 90,
106    G_ATOMICRMW_SUB	= 91,
107    G_ATOMICRMW_AND	= 92,
108    G_ATOMICRMW_NAND	= 93,
109    G_ATOMICRMW_OR	= 94,
110    G_ATOMICRMW_XOR	= 95,
111    G_ATOMICRMW_MAX	= 96,
112    G_ATOMICRMW_MIN	= 97,
113    G_ATOMICRMW_UMAX	= 98,
114    G_ATOMICRMW_UMIN	= 99,
115    G_ATOMICRMW_FADD	= 100,
116    G_ATOMICRMW_FSUB	= 101,
117    G_ATOMICRMW_FMAX	= 102,
118    G_ATOMICRMW_FMIN	= 103,
119    G_ATOMICRMW_UINC_WRAP	= 104,
120    G_ATOMICRMW_UDEC_WRAP	= 105,
121    G_FENCE	= 106,
122    G_BRCOND	= 107,
123    G_BRINDIRECT	= 108,
124    G_INVOKE_REGION_START	= 109,
125    G_INTRINSIC	= 110,
126    G_INTRINSIC_W_SIDE_EFFECTS	= 111,
127    G_ANYEXT	= 112,
128    G_TRUNC	= 113,
129    G_CONSTANT	= 114,
130    G_FCONSTANT	= 115,
131    G_VASTART	= 116,
132    G_VAARG	= 117,
133    G_SEXT	= 118,
134    G_SEXT_INREG	= 119,
135    G_ZEXT	= 120,
136    G_SHL	= 121,
137    G_LSHR	= 122,
138    G_ASHR	= 123,
139    G_FSHL	= 124,
140    G_FSHR	= 125,
141    G_ROTR	= 126,
142    G_ROTL	= 127,
143    G_ICMP	= 128,
144    G_FCMP	= 129,
145    G_SELECT	= 130,
146    G_UADDO	= 131,
147    G_UADDE	= 132,
148    G_USUBO	= 133,
149    G_USUBE	= 134,
150    G_SADDO	= 135,
151    G_SADDE	= 136,
152    G_SSUBO	= 137,
153    G_SSUBE	= 138,
154    G_UMULO	= 139,
155    G_SMULO	= 140,
156    G_UMULH	= 141,
157    G_SMULH	= 142,
158    G_UADDSAT	= 143,
159    G_SADDSAT	= 144,
160    G_USUBSAT	= 145,
161    G_SSUBSAT	= 146,
162    G_USHLSAT	= 147,
163    G_SSHLSAT	= 148,
164    G_SMULFIX	= 149,
165    G_UMULFIX	= 150,
166    G_SMULFIXSAT	= 151,
167    G_UMULFIXSAT	= 152,
168    G_SDIVFIX	= 153,
169    G_UDIVFIX	= 154,
170    G_SDIVFIXSAT	= 155,
171    G_UDIVFIXSAT	= 156,
172    G_FADD	= 157,
173    G_FSUB	= 158,
174    G_FMUL	= 159,
175    G_FMA	= 160,
176    G_FMAD	= 161,
177    G_FDIV	= 162,
178    G_FREM	= 163,
179    G_FPOW	= 164,
180    G_FPOWI	= 165,
181    G_FEXP	= 166,
182    G_FEXP2	= 167,
183    G_FLOG	= 168,
184    G_FLOG2	= 169,
185    G_FLOG10	= 170,
186    G_FNEG	= 171,
187    G_FPEXT	= 172,
188    G_FPTRUNC	= 173,
189    G_FPTOSI	= 174,
190    G_FPTOUI	= 175,
191    G_SITOFP	= 176,
192    G_UITOFP	= 177,
193    G_FABS	= 178,
194    G_FCOPYSIGN	= 179,
195    G_IS_FPCLASS	= 180,
196    G_FCANONICALIZE	= 181,
197    G_FMINNUM	= 182,
198    G_FMAXNUM	= 183,
199    G_FMINNUM_IEEE	= 184,
200    G_FMAXNUM_IEEE	= 185,
201    G_FMINIMUM	= 186,
202    G_FMAXIMUM	= 187,
203    G_PTR_ADD	= 188,
204    G_PTRMASK	= 189,
205    G_SMIN	= 190,
206    G_SMAX	= 191,
207    G_UMIN	= 192,
208    G_UMAX	= 193,
209    G_ABS	= 194,
210    G_LROUND	= 195,
211    G_LLROUND	= 196,
212    G_BR	= 197,
213    G_BRJT	= 198,
214    G_INSERT_VECTOR_ELT	= 199,
215    G_EXTRACT_VECTOR_ELT	= 200,
216    G_SHUFFLE_VECTOR	= 201,
217    G_CTTZ	= 202,
218    G_CTTZ_ZERO_UNDEF	= 203,
219    G_CTLZ	= 204,
220    G_CTLZ_ZERO_UNDEF	= 205,
221    G_CTPOP	= 206,
222    G_BSWAP	= 207,
223    G_BITREVERSE	= 208,
224    G_FCEIL	= 209,
225    G_FCOS	= 210,
226    G_FSIN	= 211,
227    G_FSQRT	= 212,
228    G_FFLOOR	= 213,
229    G_FRINT	= 214,
230    G_FNEARBYINT	= 215,
231    G_ADDRSPACE_CAST	= 216,
232    G_BLOCK_ADDR	= 217,
233    G_JUMP_TABLE	= 218,
234    G_DYN_STACKALLOC	= 219,
235    G_STRICT_FADD	= 220,
236    G_STRICT_FSUB	= 221,
237    G_STRICT_FMUL	= 222,
238    G_STRICT_FDIV	= 223,
239    G_STRICT_FREM	= 224,
240    G_STRICT_FMA	= 225,
241    G_STRICT_FSQRT	= 226,
242    G_READ_REGISTER	= 227,
243    G_WRITE_REGISTER	= 228,
244    G_MEMCPY	= 229,
245    G_MEMCPY_INLINE	= 230,
246    G_MEMMOVE	= 231,
247    G_MEMSET	= 232,
248    G_BZERO	= 233,
249    G_VECREDUCE_SEQ_FADD	= 234,
250    G_VECREDUCE_SEQ_FMUL	= 235,
251    G_VECREDUCE_FADD	= 236,
252    G_VECREDUCE_FMUL	= 237,
253    G_VECREDUCE_FMAX	= 238,
254    G_VECREDUCE_FMIN	= 239,
255    G_VECREDUCE_ADD	= 240,
256    G_VECREDUCE_MUL	= 241,
257    G_VECREDUCE_AND	= 242,
258    G_VECREDUCE_OR	= 243,
259    G_VECREDUCE_XOR	= 244,
260    G_VECREDUCE_SMAX	= 245,
261    G_VECREDUCE_SMIN	= 246,
262    G_VECREDUCE_UMAX	= 247,
263    G_VECREDUCE_UMIN	= 248,
264    G_SBFX	= 249,
265    G_UBFX	= 250,
266    ATOMIC_CMP_SWAP_I128	= 251,
267    ATOMIC_LOAD_ADD_I128	= 252,
268    ATOMIC_LOAD_AND_I128	= 253,
269    ATOMIC_LOAD_NAND_I128	= 254,
270    ATOMIC_LOAD_OR_I128	= 255,
271    ATOMIC_LOAD_SUB_I128	= 256,
272    ATOMIC_LOAD_XOR_I128	= 257,
273    ATOMIC_SWAP_I128	= 258,
274    BUILD_QUADWORD	= 259,
275    BUILD_UACC	= 260,
276    CFENCE8	= 261,
277    CLRLSLDI	= 262,
278    CLRLSLDI_rec	= 263,
279    CLRLSLWI	= 264,
280    CLRLSLWI_rec	= 265,
281    CLRRDI	= 266,
282    CLRRDI_rec	= 267,
283    CLRRWI	= 268,
284    CLRRWI_rec	= 269,
285    DCBFL	= 270,
286    DCBFLP	= 271,
287    DCBFPS	= 272,
288    DCBFx	= 273,
289    DCBSTPS	= 274,
290    DCBTCT	= 275,
291    DCBTDS	= 276,
292    DCBTSTCT	= 277,
293    DCBTSTDS	= 278,
294    DCBTSTT	= 279,
295    DCBTSTx	= 280,
296    DCBTT	= 281,
297    DCBTx	= 282,
298    DFLOADf32	= 283,
299    DFLOADf64	= 284,
300    DFSTOREf32	= 285,
301    DFSTOREf64	= 286,
302    EXTLDI	= 287,
303    EXTLDI_rec	= 288,
304    EXTLWI	= 289,
305    EXTLWI_rec	= 290,
306    EXTRDI	= 291,
307    EXTRDI_rec	= 292,
308    EXTRWI	= 293,
309    EXTRWI_rec	= 294,
310    INSLWI	= 295,
311    INSLWI_rec	= 296,
312    INSRDI	= 297,
313    INSRDI_rec	= 298,
314    INSRWI	= 299,
315    INSRWI_rec	= 300,
316    KILL_PAIR	= 301,
317    LAx	= 302,
318    LIWAX	= 303,
319    LIWZX	= 304,
320    RLWIMIbm	= 305,
321    RLWIMIbm_rec	= 306,
322    RLWINMbm	= 307,
323    RLWINMbm_rec	= 308,
324    RLWNMbm	= 309,
325    RLWNMbm_rec	= 310,
326    ROTRDI	= 311,
327    ROTRDI_rec	= 312,
328    ROTRWI	= 313,
329    ROTRWI_rec	= 314,
330    SLDI	= 315,
331    SLDI_rec	= 316,
332    SLWI	= 317,
333    SLWI_rec	= 318,
334    SPILLTOVSR_LD	= 319,
335    SPILLTOVSR_LDX	= 320,
336    SPILLTOVSR_ST	= 321,
337    SPILLTOVSR_STX	= 322,
338    SRDI	= 323,
339    SRDI_rec	= 324,
340    SRWI	= 325,
341    SRWI_rec	= 326,
342    STIWX	= 327,
343    SUBI	= 328,
344    SUBIC	= 329,
345    SUBIC_rec	= 330,
346    SUBIS	= 331,
347    SUBPCIS	= 332,
348    XFLOADf32	= 333,
349    XFLOADf64	= 334,
350    XFSTOREf32	= 335,
351    XFSTOREf64	= 336,
352    ADD4	= 337,
353    ADD4O	= 338,
354    ADD4O_rec	= 339,
355    ADD4TLS	= 340,
356    ADD4_rec	= 341,
357    ADD8	= 342,
358    ADD8O	= 343,
359    ADD8O_rec	= 344,
360    ADD8TLS	= 345,
361    ADD8TLS_	= 346,
362    ADD8_rec	= 347,
363    ADDC	= 348,
364    ADDC8	= 349,
365    ADDC8O	= 350,
366    ADDC8O_rec	= 351,
367    ADDC8_rec	= 352,
368    ADDCO	= 353,
369    ADDCO_rec	= 354,
370    ADDC_rec	= 355,
371    ADDE	= 356,
372    ADDE8	= 357,
373    ADDE8O	= 358,
374    ADDE8O_rec	= 359,
375    ADDE8_rec	= 360,
376    ADDEO	= 361,
377    ADDEO_rec	= 362,
378    ADDEX	= 363,
379    ADDEX8	= 364,
380    ADDE_rec	= 365,
381    ADDI	= 366,
382    ADDI8	= 367,
383    ADDIC	= 368,
384    ADDIC8	= 369,
385    ADDIC_rec	= 370,
386    ADDIS	= 371,
387    ADDIS8	= 372,
388    ADDISdtprelHA	= 373,
389    ADDISdtprelHA32	= 374,
390    ADDISgotTprelHA	= 375,
391    ADDIStlsgdHA	= 376,
392    ADDIStlsldHA	= 377,
393    ADDIStocHA	= 378,
394    ADDIStocHA8	= 379,
395    ADDIdtprelL	= 380,
396    ADDIdtprelL32	= 381,
397    ADDItlsgdL	= 382,
398    ADDItlsgdL32	= 383,
399    ADDItlsgdLADDR	= 384,
400    ADDItlsgdLADDR32	= 385,
401    ADDItlsldL	= 386,
402    ADDItlsldL32	= 387,
403    ADDItlsldLADDR	= 388,
404    ADDItlsldLADDR32	= 389,
405    ADDItoc	= 390,
406    ADDItoc8	= 391,
407    ADDItocL	= 392,
408    ADDME	= 393,
409    ADDME8	= 394,
410    ADDME8O	= 395,
411    ADDME8O_rec	= 396,
412    ADDME8_rec	= 397,
413    ADDMEO	= 398,
414    ADDMEO_rec	= 399,
415    ADDME_rec	= 400,
416    ADDPCIS	= 401,
417    ADDZE	= 402,
418    ADDZE8	= 403,
419    ADDZE8O	= 404,
420    ADDZE8O_rec	= 405,
421    ADDZE8_rec	= 406,
422    ADDZEO	= 407,
423    ADDZEO_rec	= 408,
424    ADDZE_rec	= 409,
425    ADJCALLSTACKDOWN	= 410,
426    ADJCALLSTACKUP	= 411,
427    AND	= 412,
428    AND8	= 413,
429    AND8_rec	= 414,
430    ANDC	= 415,
431    ANDC8	= 416,
432    ANDC8_rec	= 417,
433    ANDC_rec	= 418,
434    ANDI8_rec	= 419,
435    ANDIS8_rec	= 420,
436    ANDIS_rec	= 421,
437    ANDI_rec	= 422,
438    ANDI_rec_1_EQ_BIT	= 423,
439    ANDI_rec_1_EQ_BIT8	= 424,
440    ANDI_rec_1_GT_BIT	= 425,
441    ANDI_rec_1_GT_BIT8	= 426,
442    AND_rec	= 427,
443    ATOMIC_CMP_SWAP_I16	= 428,
444    ATOMIC_CMP_SWAP_I32	= 429,
445    ATOMIC_CMP_SWAP_I64	= 430,
446    ATOMIC_CMP_SWAP_I8	= 431,
447    ATOMIC_LOAD_ADD_I16	= 432,
448    ATOMIC_LOAD_ADD_I32	= 433,
449    ATOMIC_LOAD_ADD_I64	= 434,
450    ATOMIC_LOAD_ADD_I8	= 435,
451    ATOMIC_LOAD_AND_I16	= 436,
452    ATOMIC_LOAD_AND_I32	= 437,
453    ATOMIC_LOAD_AND_I64	= 438,
454    ATOMIC_LOAD_AND_I8	= 439,
455    ATOMIC_LOAD_MAX_I16	= 440,
456    ATOMIC_LOAD_MAX_I32	= 441,
457    ATOMIC_LOAD_MAX_I64	= 442,
458    ATOMIC_LOAD_MAX_I8	= 443,
459    ATOMIC_LOAD_MIN_I16	= 444,
460    ATOMIC_LOAD_MIN_I32	= 445,
461    ATOMIC_LOAD_MIN_I64	= 446,
462    ATOMIC_LOAD_MIN_I8	= 447,
463    ATOMIC_LOAD_NAND_I16	= 448,
464    ATOMIC_LOAD_NAND_I32	= 449,
465    ATOMIC_LOAD_NAND_I64	= 450,
466    ATOMIC_LOAD_NAND_I8	= 451,
467    ATOMIC_LOAD_OR_I16	= 452,
468    ATOMIC_LOAD_OR_I32	= 453,
469    ATOMIC_LOAD_OR_I64	= 454,
470    ATOMIC_LOAD_OR_I8	= 455,
471    ATOMIC_LOAD_SUB_I16	= 456,
472    ATOMIC_LOAD_SUB_I32	= 457,
473    ATOMIC_LOAD_SUB_I64	= 458,
474    ATOMIC_LOAD_SUB_I8	= 459,
475    ATOMIC_LOAD_UMAX_I16	= 460,
476    ATOMIC_LOAD_UMAX_I32	= 461,
477    ATOMIC_LOAD_UMAX_I64	= 462,
478    ATOMIC_LOAD_UMAX_I8	= 463,
479    ATOMIC_LOAD_UMIN_I16	= 464,
480    ATOMIC_LOAD_UMIN_I32	= 465,
481    ATOMIC_LOAD_UMIN_I64	= 466,
482    ATOMIC_LOAD_UMIN_I8	= 467,
483    ATOMIC_LOAD_XOR_I16	= 468,
484    ATOMIC_LOAD_XOR_I32	= 469,
485    ATOMIC_LOAD_XOR_I64	= 470,
486    ATOMIC_LOAD_XOR_I8	= 471,
487    ATOMIC_SWAP_I16	= 472,
488    ATOMIC_SWAP_I32	= 473,
489    ATOMIC_SWAP_I64	= 474,
490    ATOMIC_SWAP_I8	= 475,
491    ATTN	= 476,
492    B	= 477,
493    BA	= 478,
494    BC	= 479,
495    BCC	= 480,
496    BCCA	= 481,
497    BCCCTR	= 482,
498    BCCCTR8	= 483,
499    BCCCTRL	= 484,
500    BCCCTRL8	= 485,
501    BCCL	= 486,
502    BCCLA	= 487,
503    BCCLR	= 488,
504    BCCLRL	= 489,
505    BCCTR	= 490,
506    BCCTR8	= 491,
507    BCCTR8n	= 492,
508    BCCTRL	= 493,
509    BCCTRL8	= 494,
510    BCCTRL8n	= 495,
511    BCCTRLn	= 496,
512    BCCTRn	= 497,
513    BCDADD_rec	= 498,
514    BCDCFN_rec	= 499,
515    BCDCFSQ_rec	= 500,
516    BCDCFZ_rec	= 501,
517    BCDCPSGN_rec	= 502,
518    BCDCTN_rec	= 503,
519    BCDCTSQ_rec	= 504,
520    BCDCTZ_rec	= 505,
521    BCDSETSGN_rec	= 506,
522    BCDSR_rec	= 507,
523    BCDSUB_rec	= 508,
524    BCDS_rec	= 509,
525    BCDTRUNC_rec	= 510,
526    BCDUS_rec	= 511,
527    BCDUTRUNC_rec	= 512,
528    BCL	= 513,
529    BCLR	= 514,
530    BCLRL	= 515,
531    BCLRLn	= 516,
532    BCLRn	= 517,
533    BCLalways	= 518,
534    BCLn	= 519,
535    BCTR	= 520,
536    BCTR8	= 521,
537    BCTRL	= 522,
538    BCTRL8	= 523,
539    BCTRL8_LDinto_toc	= 524,
540    BCTRL8_LDinto_toc_RM	= 525,
541    BCTRL8_RM	= 526,
542    BCTRL_LWZinto_toc	= 527,
543    BCTRL_LWZinto_toc_RM	= 528,
544    BCTRL_RM	= 529,
545    BCn	= 530,
546    BDNZ	= 531,
547    BDNZ8	= 532,
548    BDNZA	= 533,
549    BDNZAm	= 534,
550    BDNZAp	= 535,
551    BDNZL	= 536,
552    BDNZLA	= 537,
553    BDNZLAm	= 538,
554    BDNZLAp	= 539,
555    BDNZLR	= 540,
556    BDNZLR8	= 541,
557    BDNZLRL	= 542,
558    BDNZLRLm	= 543,
559    BDNZLRLp	= 544,
560    BDNZLRm	= 545,
561    BDNZLRp	= 546,
562    BDNZLm	= 547,
563    BDNZLp	= 548,
564    BDNZm	= 549,
565    BDNZp	= 550,
566    BDZ	= 551,
567    BDZ8	= 552,
568    BDZA	= 553,
569    BDZAm	= 554,
570    BDZAp	= 555,
571    BDZL	= 556,
572    BDZLA	= 557,
573    BDZLAm	= 558,
574    BDZLAp	= 559,
575    BDZLR	= 560,
576    BDZLR8	= 561,
577    BDZLRL	= 562,
578    BDZLRLm	= 563,
579    BDZLRLp	= 564,
580    BDZLRm	= 565,
581    BDZLRp	= 566,
582    BDZLm	= 567,
583    BDZLp	= 568,
584    BDZm	= 569,
585    BDZp	= 570,
586    BL	= 571,
587    BL8	= 572,
588    BL8_NOP	= 573,
589    BL8_NOP_RM	= 574,
590    BL8_NOP_TLS	= 575,
591    BL8_NOTOC	= 576,
592    BL8_NOTOC_RM	= 577,
593    BL8_NOTOC_TLS	= 578,
594    BL8_RM	= 579,
595    BL8_TLS	= 580,
596    BL8_TLS_	= 581,
597    BLA	= 582,
598    BLA8	= 583,
599    BLA8_NOP	= 584,
600    BLA8_NOP_RM	= 585,
601    BLA8_RM	= 586,
602    BLA_RM	= 587,
603    BLR	= 588,
604    BLR8	= 589,
605    BLRL	= 590,
606    BL_NOP	= 591,
607    BL_NOP_RM	= 592,
608    BL_RM	= 593,
609    BL_TLS	= 594,
610    BPERMD	= 595,
611    BRD	= 596,
612    BRH	= 597,
613    BRH8	= 598,
614    BRINC	= 599,
615    BRW	= 600,
616    BRW8	= 601,
617    CFUGED	= 602,
618    CLRBHRB	= 603,
619    CMPB	= 604,
620    CMPB8	= 605,
621    CMPD	= 606,
622    CMPDI	= 607,
623    CMPEQB	= 608,
624    CMPLD	= 609,
625    CMPLDI	= 610,
626    CMPLW	= 611,
627    CMPLWI	= 612,
628    CMPRB	= 613,
629    CMPRB8	= 614,
630    CMPW	= 615,
631    CMPWI	= 616,
632    CNTLZD	= 617,
633    CNTLZDM	= 618,
634    CNTLZD_rec	= 619,
635    CNTLZW	= 620,
636    CNTLZW8	= 621,
637    CNTLZW8_rec	= 622,
638    CNTLZW_rec	= 623,
639    CNTTZD	= 624,
640    CNTTZDM	= 625,
641    CNTTZD_rec	= 626,
642    CNTTZW	= 627,
643    CNTTZW8	= 628,
644    CNTTZW8_rec	= 629,
645    CNTTZW_rec	= 630,
646    CP_ABORT	= 631,
647    CP_COPY	= 632,
648    CP_COPY8	= 633,
649    CP_PASTE8_rec	= 634,
650    CP_PASTE_rec	= 635,
651    CR6SET	= 636,
652    CR6UNSET	= 637,
653    CRAND	= 638,
654    CRANDC	= 639,
655    CREQV	= 640,
656    CRNAND	= 641,
657    CRNOR	= 642,
658    CRNOT	= 643,
659    CROR	= 644,
660    CRORC	= 645,
661    CRSET	= 646,
662    CRUNSET	= 647,
663    CRXOR	= 648,
664    CTRL_DEP	= 649,
665    DARN	= 650,
666    DCBA	= 651,
667    DCBF	= 652,
668    DCBFEP	= 653,
669    DCBI	= 654,
670    DCBST	= 655,
671    DCBSTEP	= 656,
672    DCBT	= 657,
673    DCBTEP	= 658,
674    DCBTST	= 659,
675    DCBTSTEP	= 660,
676    DCBZ	= 661,
677    DCBZEP	= 662,
678    DCBZL	= 663,
679    DCBZLEP	= 664,
680    DCCCI	= 665,
681    DIVD	= 666,
682    DIVDE	= 667,
683    DIVDEO	= 668,
684    DIVDEO_rec	= 669,
685    DIVDEU	= 670,
686    DIVDEUO	= 671,
687    DIVDEUO_rec	= 672,
688    DIVDEU_rec	= 673,
689    DIVDE_rec	= 674,
690    DIVDO	= 675,
691    DIVDO_rec	= 676,
692    DIVDU	= 677,
693    DIVDUO	= 678,
694    DIVDUO_rec	= 679,
695    DIVDU_rec	= 680,
696    DIVD_rec	= 681,
697    DIVW	= 682,
698    DIVWE	= 683,
699    DIVWEO	= 684,
700    DIVWEO_rec	= 685,
701    DIVWEU	= 686,
702    DIVWEUO	= 687,
703    DIVWEUO_rec	= 688,
704    DIVWEU_rec	= 689,
705    DIVWE_rec	= 690,
706    DIVWO	= 691,
707    DIVWO_rec	= 692,
708    DIVWU	= 693,
709    DIVWUO	= 694,
710    DIVWUO_rec	= 695,
711    DIVWU_rec	= 696,
712    DIVW_rec	= 697,
713    DMMR	= 698,
714    DMSETDMRZ	= 699,
715    DMXOR	= 700,
716    DMXXEXTFDMR256	= 701,
717    DMXXEXTFDMR512	= 702,
718    DMXXEXTFDMR512_HI	= 703,
719    DMXXINSTFDMR256	= 704,
720    DMXXINSTFDMR512	= 705,
721    DMXXINSTFDMR512_HI	= 706,
722    DSS	= 707,
723    DSSALL	= 708,
724    DST	= 709,
725    DST64	= 710,
726    DSTST	= 711,
727    DSTST64	= 712,
728    DSTSTT	= 713,
729    DSTSTT64	= 714,
730    DSTT	= 715,
731    DSTT64	= 716,
732    DYNALLOC	= 717,
733    DYNALLOC8	= 718,
734    DYNAREAOFFSET	= 719,
735    DYNAREAOFFSET8	= 720,
736    DecreaseCTR8loop	= 721,
737    DecreaseCTRloop	= 722,
738    EFDABS	= 723,
739    EFDADD	= 724,
740    EFDCFS	= 725,
741    EFDCFSF	= 726,
742    EFDCFSI	= 727,
743    EFDCFSID	= 728,
744    EFDCFUF	= 729,
745    EFDCFUI	= 730,
746    EFDCFUID	= 731,
747    EFDCMPEQ	= 732,
748    EFDCMPGT	= 733,
749    EFDCMPLT	= 734,
750    EFDCTSF	= 735,
751    EFDCTSI	= 736,
752    EFDCTSIDZ	= 737,
753    EFDCTSIZ	= 738,
754    EFDCTUF	= 739,
755    EFDCTUI	= 740,
756    EFDCTUIDZ	= 741,
757    EFDCTUIZ	= 742,
758    EFDDIV	= 743,
759    EFDMUL	= 744,
760    EFDNABS	= 745,
761    EFDNEG	= 746,
762    EFDSUB	= 747,
763    EFDTSTEQ	= 748,
764    EFDTSTGT	= 749,
765    EFDTSTLT	= 750,
766    EFSABS	= 751,
767    EFSADD	= 752,
768    EFSCFD	= 753,
769    EFSCFSF	= 754,
770    EFSCFSI	= 755,
771    EFSCFUF	= 756,
772    EFSCFUI	= 757,
773    EFSCMPEQ	= 758,
774    EFSCMPGT	= 759,
775    EFSCMPLT	= 760,
776    EFSCTSF	= 761,
777    EFSCTSI	= 762,
778    EFSCTSIZ	= 763,
779    EFSCTUF	= 764,
780    EFSCTUI	= 765,
781    EFSCTUIZ	= 766,
782    EFSDIV	= 767,
783    EFSMUL	= 768,
784    EFSNABS	= 769,
785    EFSNEG	= 770,
786    EFSSUB	= 771,
787    EFSTSTEQ	= 772,
788    EFSTSTGT	= 773,
789    EFSTSTLT	= 774,
790    EH_SjLj_LongJmp32	= 775,
791    EH_SjLj_LongJmp64	= 776,
792    EH_SjLj_SetJmp32	= 777,
793    EH_SjLj_SetJmp64	= 778,
794    EH_SjLj_Setup	= 779,
795    EQV	= 780,
796    EQV8	= 781,
797    EQV8_rec	= 782,
798    EQV_rec	= 783,
799    EVABS	= 784,
800    EVADDIW	= 785,
801    EVADDSMIAAW	= 786,
802    EVADDSSIAAW	= 787,
803    EVADDUMIAAW	= 788,
804    EVADDUSIAAW	= 789,
805    EVADDW	= 790,
806    EVAND	= 791,
807    EVANDC	= 792,
808    EVCMPEQ	= 793,
809    EVCMPGTS	= 794,
810    EVCMPGTU	= 795,
811    EVCMPLTS	= 796,
812    EVCMPLTU	= 797,
813    EVCNTLSW	= 798,
814    EVCNTLZW	= 799,
815    EVDIVWS	= 800,
816    EVDIVWU	= 801,
817    EVEQV	= 802,
818    EVEXTSB	= 803,
819    EVEXTSH	= 804,
820    EVFSABS	= 805,
821    EVFSADD	= 806,
822    EVFSCFSF	= 807,
823    EVFSCFSI	= 808,
824    EVFSCFUF	= 809,
825    EVFSCFUI	= 810,
826    EVFSCMPEQ	= 811,
827    EVFSCMPGT	= 812,
828    EVFSCMPLT	= 813,
829    EVFSCTSF	= 814,
830    EVFSCTSI	= 815,
831    EVFSCTSIZ	= 816,
832    EVFSCTUF	= 817,
833    EVFSCTUI	= 818,
834    EVFSCTUIZ	= 819,
835    EVFSDIV	= 820,
836    EVFSMUL	= 821,
837    EVFSNABS	= 822,
838    EVFSNEG	= 823,
839    EVFSSUB	= 824,
840    EVFSTSTEQ	= 825,
841    EVFSTSTGT	= 826,
842    EVFSTSTLT	= 827,
843    EVLDD	= 828,
844    EVLDDX	= 829,
845    EVLDH	= 830,
846    EVLDHX	= 831,
847    EVLDW	= 832,
848    EVLDWX	= 833,
849    EVLHHESPLAT	= 834,
850    EVLHHESPLATX	= 835,
851    EVLHHOSSPLAT	= 836,
852    EVLHHOSSPLATX	= 837,
853    EVLHHOUSPLAT	= 838,
854    EVLHHOUSPLATX	= 839,
855    EVLWHE	= 840,
856    EVLWHEX	= 841,
857    EVLWHOS	= 842,
858    EVLWHOSX	= 843,
859    EVLWHOU	= 844,
860    EVLWHOUX	= 845,
861    EVLWHSPLAT	= 846,
862    EVLWHSPLATX	= 847,
863    EVLWWSPLAT	= 848,
864    EVLWWSPLATX	= 849,
865    EVMERGEHI	= 850,
866    EVMERGEHILO	= 851,
867    EVMERGELO	= 852,
868    EVMERGELOHI	= 853,
869    EVMHEGSMFAA	= 854,
870    EVMHEGSMFAN	= 855,
871    EVMHEGSMIAA	= 856,
872    EVMHEGSMIAN	= 857,
873    EVMHEGUMIAA	= 858,
874    EVMHEGUMIAN	= 859,
875    EVMHESMF	= 860,
876    EVMHESMFA	= 861,
877    EVMHESMFAAW	= 862,
878    EVMHESMFANW	= 863,
879    EVMHESMI	= 864,
880    EVMHESMIA	= 865,
881    EVMHESMIAAW	= 866,
882    EVMHESMIANW	= 867,
883    EVMHESSF	= 868,
884    EVMHESSFA	= 869,
885    EVMHESSFAAW	= 870,
886    EVMHESSFANW	= 871,
887    EVMHESSIAAW	= 872,
888    EVMHESSIANW	= 873,
889    EVMHEUMI	= 874,
890    EVMHEUMIA	= 875,
891    EVMHEUMIAAW	= 876,
892    EVMHEUMIANW	= 877,
893    EVMHEUSIAAW	= 878,
894    EVMHEUSIANW	= 879,
895    EVMHOGSMFAA	= 880,
896    EVMHOGSMFAN	= 881,
897    EVMHOGSMIAA	= 882,
898    EVMHOGSMIAN	= 883,
899    EVMHOGUMIAA	= 884,
900    EVMHOGUMIAN	= 885,
901    EVMHOSMF	= 886,
902    EVMHOSMFA	= 887,
903    EVMHOSMFAAW	= 888,
904    EVMHOSMFANW	= 889,
905    EVMHOSMI	= 890,
906    EVMHOSMIA	= 891,
907    EVMHOSMIAAW	= 892,
908    EVMHOSMIANW	= 893,
909    EVMHOSSF	= 894,
910    EVMHOSSFA	= 895,
911    EVMHOSSFAAW	= 896,
912    EVMHOSSFANW	= 897,
913    EVMHOSSIAAW	= 898,
914    EVMHOSSIANW	= 899,
915    EVMHOUMI	= 900,
916    EVMHOUMIA	= 901,
917    EVMHOUMIAAW	= 902,
918    EVMHOUMIANW	= 903,
919    EVMHOUSIAAW	= 904,
920    EVMHOUSIANW	= 905,
921    EVMRA	= 906,
922    EVMWHSMF	= 907,
923    EVMWHSMFA	= 908,
924    EVMWHSMI	= 909,
925    EVMWHSMIA	= 910,
926    EVMWHSSF	= 911,
927    EVMWHSSFA	= 912,
928    EVMWHUMI	= 913,
929    EVMWHUMIA	= 914,
930    EVMWLSMIAAW	= 915,
931    EVMWLSMIANW	= 916,
932    EVMWLSSIAAW	= 917,
933    EVMWLSSIANW	= 918,
934    EVMWLUMI	= 919,
935    EVMWLUMIA	= 920,
936    EVMWLUMIAAW	= 921,
937    EVMWLUMIANW	= 922,
938    EVMWLUSIAAW	= 923,
939    EVMWLUSIANW	= 924,
940    EVMWSMF	= 925,
941    EVMWSMFA	= 926,
942    EVMWSMFAA	= 927,
943    EVMWSMFAN	= 928,
944    EVMWSMI	= 929,
945    EVMWSMIA	= 930,
946    EVMWSMIAA	= 931,
947    EVMWSMIAN	= 932,
948    EVMWSSF	= 933,
949    EVMWSSFA	= 934,
950    EVMWSSFAA	= 935,
951    EVMWSSFAN	= 936,
952    EVMWUMI	= 937,
953    EVMWUMIA	= 938,
954    EVMWUMIAA	= 939,
955    EVMWUMIAN	= 940,
956    EVNAND	= 941,
957    EVNEG	= 942,
958    EVNOR	= 943,
959    EVOR	= 944,
960    EVORC	= 945,
961    EVRLW	= 946,
962    EVRLWI	= 947,
963    EVRNDW	= 948,
964    EVSEL	= 949,
965    EVSLW	= 950,
966    EVSLWI	= 951,
967    EVSPLATFI	= 952,
968    EVSPLATI	= 953,
969    EVSRWIS	= 954,
970    EVSRWIU	= 955,
971    EVSRWS	= 956,
972    EVSRWU	= 957,
973    EVSTDD	= 958,
974    EVSTDDX	= 959,
975    EVSTDH	= 960,
976    EVSTDHX	= 961,
977    EVSTDW	= 962,
978    EVSTDWX	= 963,
979    EVSTWHE	= 964,
980    EVSTWHEX	= 965,
981    EVSTWHO	= 966,
982    EVSTWHOX	= 967,
983    EVSTWWE	= 968,
984    EVSTWWEX	= 969,
985    EVSTWWO	= 970,
986    EVSTWWOX	= 971,
987    EVSUBFSMIAAW	= 972,
988    EVSUBFSSIAAW	= 973,
989    EVSUBFUMIAAW	= 974,
990    EVSUBFUSIAAW	= 975,
991    EVSUBFW	= 976,
992    EVSUBIFW	= 977,
993    EVXOR	= 978,
994    EXTSB	= 979,
995    EXTSB8	= 980,
996    EXTSB8_32_64	= 981,
997    EXTSB8_rec	= 982,
998    EXTSB_rec	= 983,
999    EXTSH	= 984,
1000    EXTSH8	= 985,
1001    EXTSH8_32_64	= 986,
1002    EXTSH8_rec	= 987,
1003    EXTSH_rec	= 988,
1004    EXTSW	= 989,
1005    EXTSWSLI	= 990,
1006    EXTSWSLI_32_64	= 991,
1007    EXTSWSLI_32_64_rec	= 992,
1008    EXTSWSLI_rec	= 993,
1009    EXTSW_32	= 994,
1010    EXTSW_32_64	= 995,
1011    EXTSW_32_64_rec	= 996,
1012    EXTSW_rec	= 997,
1013    EnforceIEIO	= 998,
1014    FABSD	= 999,
1015    FABSD_rec	= 1000,
1016    FABSS	= 1001,
1017    FABSS_rec	= 1002,
1018    FADD	= 1003,
1019    FADDS	= 1004,
1020    FADDS_rec	= 1005,
1021    FADD_rec	= 1006,
1022    FADDrtz	= 1007,
1023    FCFID	= 1008,
1024    FCFIDS	= 1009,
1025    FCFIDS_rec	= 1010,
1026    FCFIDU	= 1011,
1027    FCFIDUS	= 1012,
1028    FCFIDUS_rec	= 1013,
1029    FCFIDU_rec	= 1014,
1030    FCFID_rec	= 1015,
1031    FCMPOD	= 1016,
1032    FCMPOS	= 1017,
1033    FCMPUD	= 1018,
1034    FCMPUS	= 1019,
1035    FCPSGND	= 1020,
1036    FCPSGND_rec	= 1021,
1037    FCPSGNS	= 1022,
1038    FCPSGNS_rec	= 1023,
1039    FCTID	= 1024,
1040    FCTIDU	= 1025,
1041    FCTIDUZ	= 1026,
1042    FCTIDUZ_rec	= 1027,
1043    FCTIDU_rec	= 1028,
1044    FCTIDZ	= 1029,
1045    FCTIDZ_rec	= 1030,
1046    FCTID_rec	= 1031,
1047    FCTIW	= 1032,
1048    FCTIWU	= 1033,
1049    FCTIWUZ	= 1034,
1050    FCTIWUZ_rec	= 1035,
1051    FCTIWU_rec	= 1036,
1052    FCTIWZ	= 1037,
1053    FCTIWZ_rec	= 1038,
1054    FCTIW_rec	= 1039,
1055    FDIV	= 1040,
1056    FDIVS	= 1041,
1057    FDIVS_rec	= 1042,
1058    FDIV_rec	= 1043,
1059    FMADD	= 1044,
1060    FMADDS	= 1045,
1061    FMADDS_rec	= 1046,
1062    FMADD_rec	= 1047,
1063    FMR	= 1048,
1064    FMR_rec	= 1049,
1065    FMSUB	= 1050,
1066    FMSUBS	= 1051,
1067    FMSUBS_rec	= 1052,
1068    FMSUB_rec	= 1053,
1069    FMUL	= 1054,
1070    FMULS	= 1055,
1071    FMULS_rec	= 1056,
1072    FMUL_rec	= 1057,
1073    FNABSD	= 1058,
1074    FNABSD_rec	= 1059,
1075    FNABSS	= 1060,
1076    FNABSS_rec	= 1061,
1077    FNEGD	= 1062,
1078    FNEGD_rec	= 1063,
1079    FNEGS	= 1064,
1080    FNEGS_rec	= 1065,
1081    FNMADD	= 1066,
1082    FNMADDS	= 1067,
1083    FNMADDS_rec	= 1068,
1084    FNMADD_rec	= 1069,
1085    FNMSUB	= 1070,
1086    FNMSUBS	= 1071,
1087    FNMSUBS_rec	= 1072,
1088    FNMSUB_rec	= 1073,
1089    FRE	= 1074,
1090    FRES	= 1075,
1091    FRES_rec	= 1076,
1092    FRE_rec	= 1077,
1093    FRIMD	= 1078,
1094    FRIMD_rec	= 1079,
1095    FRIMS	= 1080,
1096    FRIMS_rec	= 1081,
1097    FRIND	= 1082,
1098    FRIND_rec	= 1083,
1099    FRINS	= 1084,
1100    FRINS_rec	= 1085,
1101    FRIPD	= 1086,
1102    FRIPD_rec	= 1087,
1103    FRIPS	= 1088,
1104    FRIPS_rec	= 1089,
1105    FRIZD	= 1090,
1106    FRIZD_rec	= 1091,
1107    FRIZS	= 1092,
1108    FRIZS_rec	= 1093,
1109    FRSP	= 1094,
1110    FRSP_rec	= 1095,
1111    FRSQRTE	= 1096,
1112    FRSQRTES	= 1097,
1113    FRSQRTES_rec	= 1098,
1114    FRSQRTE_rec	= 1099,
1115    FSELD	= 1100,
1116    FSELD_rec	= 1101,
1117    FSELS	= 1102,
1118    FSELS_rec	= 1103,
1119    FSQRT	= 1104,
1120    FSQRTS	= 1105,
1121    FSQRTS_rec	= 1106,
1122    FSQRT_rec	= 1107,
1123    FSUB	= 1108,
1124    FSUBS	= 1109,
1125    FSUBS_rec	= 1110,
1126    FSUB_rec	= 1111,
1127    FTDIV	= 1112,
1128    FTSQRT	= 1113,
1129    GETtlsADDR	= 1114,
1130    GETtlsADDR32	= 1115,
1131    GETtlsADDR32AIX	= 1116,
1132    GETtlsADDR64AIX	= 1117,
1133    GETtlsADDRPCREL	= 1118,
1134    GETtlsldADDR	= 1119,
1135    GETtlsldADDR32	= 1120,
1136    GETtlsldADDRPCREL	= 1121,
1137    HASHCHK	= 1122,
1138    HASHCHK8	= 1123,
1139    HASHCHKP	= 1124,
1140    HASHCHKP8	= 1125,
1141    HASHST	= 1126,
1142    HASHST8	= 1127,
1143    HASHSTP	= 1128,
1144    HASHSTP8	= 1129,
1145    HRFID	= 1130,
1146    ICBI	= 1131,
1147    ICBIEP	= 1132,
1148    ICBLC	= 1133,
1149    ICBLQ	= 1134,
1150    ICBT	= 1135,
1151    ICBTLS	= 1136,
1152    ICCCI	= 1137,
1153    ISEL	= 1138,
1154    ISEL8	= 1139,
1155    ISYNC	= 1140,
1156    LA	= 1141,
1157    LA8	= 1142,
1158    LBARX	= 1143,
1159    LBARXL	= 1144,
1160    LBEPX	= 1145,
1161    LBZ	= 1146,
1162    LBZ8	= 1147,
1163    LBZCIX	= 1148,
1164    LBZU	= 1149,
1165    LBZU8	= 1150,
1166    LBZUX	= 1151,
1167    LBZUX8	= 1152,
1168    LBZX	= 1153,
1169    LBZX8	= 1154,
1170    LBZXTLS	= 1155,
1171    LBZXTLS_	= 1156,
1172    LBZXTLS_32	= 1157,
1173    LD	= 1158,
1174    LDARX	= 1159,
1175    LDARXL	= 1160,
1176    LDAT	= 1161,
1177    LDBRX	= 1162,
1178    LDCIX	= 1163,
1179    LDU	= 1164,
1180    LDUX	= 1165,
1181    LDX	= 1166,
1182    LDXTLS	= 1167,
1183    LDXTLS_	= 1168,
1184    LDgotTprelL	= 1169,
1185    LDgotTprelL32	= 1170,
1186    LDtoc	= 1171,
1187    LDtocBA	= 1172,
1188    LDtocCPT	= 1173,
1189    LDtocJTI	= 1174,
1190    LDtocL	= 1175,
1191    LFD	= 1176,
1192    LFDEPX	= 1177,
1193    LFDU	= 1178,
1194    LFDUX	= 1179,
1195    LFDX	= 1180,
1196    LFIWAX	= 1181,
1197    LFIWZX	= 1182,
1198    LFS	= 1183,
1199    LFSU	= 1184,
1200    LFSUX	= 1185,
1201    LFSX	= 1186,
1202    LHA	= 1187,
1203    LHA8	= 1188,
1204    LHARX	= 1189,
1205    LHARXL	= 1190,
1206    LHAU	= 1191,
1207    LHAU8	= 1192,
1208    LHAUX	= 1193,
1209    LHAUX8	= 1194,
1210    LHAX	= 1195,
1211    LHAX8	= 1196,
1212    LHBRX	= 1197,
1213    LHBRX8	= 1198,
1214    LHEPX	= 1199,
1215    LHZ	= 1200,
1216    LHZ8	= 1201,
1217    LHZCIX	= 1202,
1218    LHZU	= 1203,
1219    LHZU8	= 1204,
1220    LHZUX	= 1205,
1221    LHZUX8	= 1206,
1222    LHZX	= 1207,
1223    LHZX8	= 1208,
1224    LHZXTLS	= 1209,
1225    LHZXTLS_	= 1210,
1226    LHZXTLS_32	= 1211,
1227    LI	= 1212,
1228    LI8	= 1213,
1229    LIS	= 1214,
1230    LIS8	= 1215,
1231    LMW	= 1216,
1232    LQ	= 1217,
1233    LQARX	= 1218,
1234    LQARXL	= 1219,
1235    LQX_PSEUDO	= 1220,
1236    LSWI	= 1221,
1237    LVEBX	= 1222,
1238    LVEHX	= 1223,
1239    LVEWX	= 1224,
1240    LVSL	= 1225,
1241    LVSR	= 1226,
1242    LVX	= 1227,
1243    LVXL	= 1228,
1244    LWA	= 1229,
1245    LWARX	= 1230,
1246    LWARXL	= 1231,
1247    LWAT	= 1232,
1248    LWAUX	= 1233,
1249    LWAX	= 1234,
1250    LWAX_32	= 1235,
1251    LWA_32	= 1236,
1252    LWBRX	= 1237,
1253    LWBRX8	= 1238,
1254    LWEPX	= 1239,
1255    LWZ	= 1240,
1256    LWZ8	= 1241,
1257    LWZCIX	= 1242,
1258    LWZU	= 1243,
1259    LWZU8	= 1244,
1260    LWZUX	= 1245,
1261    LWZUX8	= 1246,
1262    LWZX	= 1247,
1263    LWZX8	= 1248,
1264    LWZXTLS	= 1249,
1265    LWZXTLS_	= 1250,
1266    LWZXTLS_32	= 1251,
1267    LWZtoc	= 1252,
1268    LWZtocL	= 1253,
1269    LXSD	= 1254,
1270    LXSDX	= 1255,
1271    LXSIBZX	= 1256,
1272    LXSIHZX	= 1257,
1273    LXSIWAX	= 1258,
1274    LXSIWZX	= 1259,
1275    LXSSP	= 1260,
1276    LXSSPX	= 1261,
1277    LXV	= 1262,
1278    LXVB16X	= 1263,
1279    LXVD2X	= 1264,
1280    LXVDSX	= 1265,
1281    LXVH8X	= 1266,
1282    LXVKQ	= 1267,
1283    LXVL	= 1268,
1284    LXVLL	= 1269,
1285    LXVP	= 1270,
1286    LXVPRL	= 1271,
1287    LXVPRLL	= 1272,
1288    LXVPX	= 1273,
1289    LXVRBX	= 1274,
1290    LXVRDX	= 1275,
1291    LXVRHX	= 1276,
1292    LXVRL	= 1277,
1293    LXVRLL	= 1278,
1294    LXVRWX	= 1279,
1295    LXVW4X	= 1280,
1296    LXVWSX	= 1281,
1297    LXVX	= 1282,
1298    MADDHD	= 1283,
1299    MADDHDU	= 1284,
1300    MADDLD	= 1285,
1301    MADDLD8	= 1286,
1302    MBAR	= 1287,
1303    MCRF	= 1288,
1304    MCRFS	= 1289,
1305    MCRXRX	= 1290,
1306    MFBHRBE	= 1291,
1307    MFCR	= 1292,
1308    MFCR8	= 1293,
1309    MFCTR	= 1294,
1310    MFCTR8	= 1295,
1311    MFDCR	= 1296,
1312    MFFS	= 1297,
1313    MFFSCDRN	= 1298,
1314    MFFSCDRNI	= 1299,
1315    MFFSCE	= 1300,
1316    MFFSCRN	= 1301,
1317    MFFSCRNI	= 1302,
1318    MFFSL	= 1303,
1319    MFFS_rec	= 1304,
1320    MFLR	= 1305,
1321    MFLR8	= 1306,
1322    MFMSR	= 1307,
1323    MFOCRF	= 1308,
1324    MFOCRF8	= 1309,
1325    MFPMR	= 1310,
1326    MFSPR	= 1311,
1327    MFSPR8	= 1312,
1328    MFSR	= 1313,
1329    MFSRIN	= 1314,
1330    MFTB	= 1315,
1331    MFTB8	= 1316,
1332    MFUDSCR	= 1317,
1333    MFVRD	= 1318,
1334    MFVRSAVE	= 1319,
1335    MFVRSAVEv	= 1320,
1336    MFVRWZ	= 1321,
1337    MFVSCR	= 1322,
1338    MFVSRD	= 1323,
1339    MFVSRLD	= 1324,
1340    MFVSRWZ	= 1325,
1341    MODSD	= 1326,
1342    MODSW	= 1327,
1343    MODUD	= 1328,
1344    MODUW	= 1329,
1345    MSGSYNC	= 1330,
1346    MSYNC	= 1331,
1347    MTCRF	= 1332,
1348    MTCRF8	= 1333,
1349    MTCTR	= 1334,
1350    MTCTR8	= 1335,
1351    MTCTR8loop	= 1336,
1352    MTCTRloop	= 1337,
1353    MTDCR	= 1338,
1354    MTFSB0	= 1339,
1355    MTFSB1	= 1340,
1356    MTFSF	= 1341,
1357    MTFSFI	= 1342,
1358    MTFSFI_rec	= 1343,
1359    MTFSFIb	= 1344,
1360    MTFSF_rec	= 1345,
1361    MTFSFb	= 1346,
1362    MTLR	= 1347,
1363    MTLR8	= 1348,
1364    MTMSR	= 1349,
1365    MTMSRD	= 1350,
1366    MTOCRF	= 1351,
1367    MTOCRF8	= 1352,
1368    MTPMR	= 1353,
1369    MTSPR	= 1354,
1370    MTSPR8	= 1355,
1371    MTSR	= 1356,
1372    MTSRIN	= 1357,
1373    MTUDSCR	= 1358,
1374    MTVRD	= 1359,
1375    MTVRSAVE	= 1360,
1376    MTVRSAVEv	= 1361,
1377    MTVRWA	= 1362,
1378    MTVRWZ	= 1363,
1379    MTVSCR	= 1364,
1380    MTVSRBM	= 1365,
1381    MTVSRBMI	= 1366,
1382    MTVSRD	= 1367,
1383    MTVSRDD	= 1368,
1384    MTVSRDM	= 1369,
1385    MTVSRHM	= 1370,
1386    MTVSRQM	= 1371,
1387    MTVSRWA	= 1372,
1388    MTVSRWM	= 1373,
1389    MTVSRWS	= 1374,
1390    MTVSRWZ	= 1375,
1391    MULHD	= 1376,
1392    MULHDU	= 1377,
1393    MULHDU_rec	= 1378,
1394    MULHD_rec	= 1379,
1395    MULHW	= 1380,
1396    MULHWU	= 1381,
1397    MULHWU_rec	= 1382,
1398    MULHW_rec	= 1383,
1399    MULLD	= 1384,
1400    MULLDO	= 1385,
1401    MULLDO_rec	= 1386,
1402    MULLD_rec	= 1387,
1403    MULLI	= 1388,
1404    MULLI8	= 1389,
1405    MULLW	= 1390,
1406    MULLWO	= 1391,
1407    MULLWO_rec	= 1392,
1408    MULLW_rec	= 1393,
1409    MoveGOTtoLR	= 1394,
1410    MovePCtoLR	= 1395,
1411    MovePCtoLR8	= 1396,
1412    NAND	= 1397,
1413    NAND8	= 1398,
1414    NAND8_rec	= 1399,
1415    NAND_rec	= 1400,
1416    NAP	= 1401,
1417    NEG	= 1402,
1418    NEG8	= 1403,
1419    NEG8O	= 1404,
1420    NEG8O_rec	= 1405,
1421    NEG8_rec	= 1406,
1422    NEGO	= 1407,
1423    NEGO_rec	= 1408,
1424    NEG_rec	= 1409,
1425    NOP	= 1410,
1426    NOP_GT_PWR6	= 1411,
1427    NOP_GT_PWR7	= 1412,
1428    NOR	= 1413,
1429    NOR8	= 1414,
1430    NOR8_rec	= 1415,
1431    NOR_rec	= 1416,
1432    OR	= 1417,
1433    OR8	= 1418,
1434    OR8_rec	= 1419,
1435    ORC	= 1420,
1436    ORC8	= 1421,
1437    ORC8_rec	= 1422,
1438    ORC_rec	= 1423,
1439    ORI	= 1424,
1440    ORI8	= 1425,
1441    ORIS	= 1426,
1442    ORIS8	= 1427,
1443    OR_rec	= 1428,
1444    PADDI	= 1429,
1445    PADDI8	= 1430,
1446    PADDI8pc	= 1431,
1447    PADDIdtprel	= 1432,
1448    PADDIpc	= 1433,
1449    PDEPD	= 1434,
1450    PEXTD	= 1435,
1451    PLBZ	= 1436,
1452    PLBZ8	= 1437,
1453    PLBZ8pc	= 1438,
1454    PLBZpc	= 1439,
1455    PLD	= 1440,
1456    PLDpc	= 1441,
1457    PLFD	= 1442,
1458    PLFDpc	= 1443,
1459    PLFS	= 1444,
1460    PLFSpc	= 1445,
1461    PLHA	= 1446,
1462    PLHA8	= 1447,
1463    PLHA8pc	= 1448,
1464    PLHApc	= 1449,
1465    PLHZ	= 1450,
1466    PLHZ8	= 1451,
1467    PLHZ8pc	= 1452,
1468    PLHZpc	= 1453,
1469    PLI	= 1454,
1470    PLI8	= 1455,
1471    PLWA	= 1456,
1472    PLWA8	= 1457,
1473    PLWA8pc	= 1458,
1474    PLWApc	= 1459,
1475    PLWZ	= 1460,
1476    PLWZ8	= 1461,
1477    PLWZ8pc	= 1462,
1478    PLWZpc	= 1463,
1479    PLXSD	= 1464,
1480    PLXSDpc	= 1465,
1481    PLXSSP	= 1466,
1482    PLXSSPpc	= 1467,
1483    PLXV	= 1468,
1484    PLXVP	= 1469,
1485    PLXVPpc	= 1470,
1486    PLXVpc	= 1471,
1487    PMXVBF16GER2	= 1472,
1488    PMXVBF16GER2NN	= 1473,
1489    PMXVBF16GER2NP	= 1474,
1490    PMXVBF16GER2PN	= 1475,
1491    PMXVBF16GER2PP	= 1476,
1492    PMXVBF16GER2W	= 1477,
1493    PMXVBF16GER2WNN	= 1478,
1494    PMXVBF16GER2WNP	= 1479,
1495    PMXVBF16GER2WPN	= 1480,
1496    PMXVBF16GER2WPP	= 1481,
1497    PMXVF16GER2	= 1482,
1498    PMXVF16GER2NN	= 1483,
1499    PMXVF16GER2NP	= 1484,
1500    PMXVF16GER2PN	= 1485,
1501    PMXVF16GER2PP	= 1486,
1502    PMXVF16GER2W	= 1487,
1503    PMXVF16GER2WNN	= 1488,
1504    PMXVF16GER2WNP	= 1489,
1505    PMXVF16GER2WPN	= 1490,
1506    PMXVF16GER2WPP	= 1491,
1507    PMXVF32GER	= 1492,
1508    PMXVF32GERNN	= 1493,
1509    PMXVF32GERNP	= 1494,
1510    PMXVF32GERPN	= 1495,
1511    PMXVF32GERPP	= 1496,
1512    PMXVF32GERW	= 1497,
1513    PMXVF32GERWNN	= 1498,
1514    PMXVF32GERWNP	= 1499,
1515    PMXVF32GERWPN	= 1500,
1516    PMXVF32GERWPP	= 1501,
1517    PMXVF64GER	= 1502,
1518    PMXVF64GERNN	= 1503,
1519    PMXVF64GERNP	= 1504,
1520    PMXVF64GERPN	= 1505,
1521    PMXVF64GERPP	= 1506,
1522    PMXVF64GERW	= 1507,
1523    PMXVF64GERWNN	= 1508,
1524    PMXVF64GERWNP	= 1509,
1525    PMXVF64GERWPN	= 1510,
1526    PMXVF64GERWPP	= 1511,
1527    PMXVI16GER2	= 1512,
1528    PMXVI16GER2PP	= 1513,
1529    PMXVI16GER2S	= 1514,
1530    PMXVI16GER2SPP	= 1515,
1531    PMXVI16GER2SW	= 1516,
1532    PMXVI16GER2SWPP	= 1517,
1533    PMXVI16GER2W	= 1518,
1534    PMXVI16GER2WPP	= 1519,
1535    PMXVI4GER8	= 1520,
1536    PMXVI4GER8PP	= 1521,
1537    PMXVI4GER8W	= 1522,
1538    PMXVI4GER8WPP	= 1523,
1539    PMXVI8GER4	= 1524,
1540    PMXVI8GER4PP	= 1525,
1541    PMXVI8GER4SPP	= 1526,
1542    PMXVI8GER4W	= 1527,
1543    PMXVI8GER4WPP	= 1528,
1544    PMXVI8GER4WSPP	= 1529,
1545    POPCNTB	= 1530,
1546    POPCNTB8	= 1531,
1547    POPCNTD	= 1532,
1548    POPCNTW	= 1533,
1549    PPC32GOT	= 1534,
1550    PPC32PICGOT	= 1535,
1551    PREPARE_PROBED_ALLOCA_32	= 1536,
1552    PREPARE_PROBED_ALLOCA_64	= 1537,
1553    PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32	= 1538,
1554    PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64	= 1539,
1555    PROBED_ALLOCA_32	= 1540,
1556    PROBED_ALLOCA_64	= 1541,
1557    PROBED_STACKALLOC_32	= 1542,
1558    PROBED_STACKALLOC_64	= 1543,
1559    PSTB	= 1544,
1560    PSTB8	= 1545,
1561    PSTB8pc	= 1546,
1562    PSTBpc	= 1547,
1563    PSTD	= 1548,
1564    PSTDpc	= 1549,
1565    PSTFD	= 1550,
1566    PSTFDpc	= 1551,
1567    PSTFS	= 1552,
1568    PSTFSpc	= 1553,
1569    PSTH	= 1554,
1570    PSTH8	= 1555,
1571    PSTH8pc	= 1556,
1572    PSTHpc	= 1557,
1573    PSTW	= 1558,
1574    PSTW8	= 1559,
1575    PSTW8pc	= 1560,
1576    PSTWpc	= 1561,
1577    PSTXSD	= 1562,
1578    PSTXSDpc	= 1563,
1579    PSTXSSP	= 1564,
1580    PSTXSSPpc	= 1565,
1581    PSTXV	= 1566,
1582    PSTXVP	= 1567,
1583    PSTXVPpc	= 1568,
1584    PSTXVpc	= 1569,
1585    PseudoEIEIO	= 1570,
1586    RESTORE_ACC	= 1571,
1587    RESTORE_CR	= 1572,
1588    RESTORE_CRBIT	= 1573,
1589    RESTORE_QUADWORD	= 1574,
1590    RESTORE_UACC	= 1575,
1591    RESTORE_WACC	= 1576,
1592    RFCI	= 1577,
1593    RFDI	= 1578,
1594    RFEBB	= 1579,
1595    RFI	= 1580,
1596    RFID	= 1581,
1597    RFMCI	= 1582,
1598    RLDCL	= 1583,
1599    RLDCL_rec	= 1584,
1600    RLDCR	= 1585,
1601    RLDCR_rec	= 1586,
1602    RLDIC	= 1587,
1603    RLDICL	= 1588,
1604    RLDICL_32	= 1589,
1605    RLDICL_32_64	= 1590,
1606    RLDICL_32_rec	= 1591,
1607    RLDICL_rec	= 1592,
1608    RLDICR	= 1593,
1609    RLDICR_32	= 1594,
1610    RLDICR_rec	= 1595,
1611    RLDIC_rec	= 1596,
1612    RLDIMI	= 1597,
1613    RLDIMI_rec	= 1598,
1614    RLWIMI	= 1599,
1615    RLWIMI8	= 1600,
1616    RLWIMI8_rec	= 1601,
1617    RLWIMI_rec	= 1602,
1618    RLWINM	= 1603,
1619    RLWINM8	= 1604,
1620    RLWINM8_rec	= 1605,
1621    RLWINM_rec	= 1606,
1622    RLWNM	= 1607,
1623    RLWNM8	= 1608,
1624    RLWNM8_rec	= 1609,
1625    RLWNM_rec	= 1610,
1626    ReadTB	= 1611,
1627    SC	= 1612,
1628    SELECT_CC_F16	= 1613,
1629    SELECT_CC_F4	= 1614,
1630    SELECT_CC_F8	= 1615,
1631    SELECT_CC_I4	= 1616,
1632    SELECT_CC_I8	= 1617,
1633    SELECT_CC_SPE	= 1618,
1634    SELECT_CC_SPE4	= 1619,
1635    SELECT_CC_VRRC	= 1620,
1636    SELECT_CC_VSFRC	= 1621,
1637    SELECT_CC_VSRC	= 1622,
1638    SELECT_CC_VSSRC	= 1623,
1639    SELECT_F16	= 1624,
1640    SELECT_F4	= 1625,
1641    SELECT_F8	= 1626,
1642    SELECT_I4	= 1627,
1643    SELECT_I8	= 1628,
1644    SELECT_SPE	= 1629,
1645    SELECT_SPE4	= 1630,
1646    SELECT_VRRC	= 1631,
1647    SELECT_VSFRC	= 1632,
1648    SELECT_VSRC	= 1633,
1649    SELECT_VSSRC	= 1634,
1650    SETB	= 1635,
1651    SETB8	= 1636,
1652    SETBC	= 1637,
1653    SETBC8	= 1638,
1654    SETBCR	= 1639,
1655    SETBCR8	= 1640,
1656    SETFLM	= 1641,
1657    SETNBC	= 1642,
1658    SETNBC8	= 1643,
1659    SETNBCR	= 1644,
1660    SETNBCR8	= 1645,
1661    SETRND	= 1646,
1662    SETRNDi	= 1647,
1663    SLBFEE_rec	= 1648,
1664    SLBIA	= 1649,
1665    SLBIE	= 1650,
1666    SLBIEG	= 1651,
1667    SLBMFEE	= 1652,
1668    SLBMFEV	= 1653,
1669    SLBMTE	= 1654,
1670    SLBSYNC	= 1655,
1671    SLD	= 1656,
1672    SLD_rec	= 1657,
1673    SLW	= 1658,
1674    SLW8	= 1659,
1675    SLW8_rec	= 1660,
1676    SLW_rec	= 1661,
1677    SPELWZ	= 1662,
1678    SPELWZX	= 1663,
1679    SPESTW	= 1664,
1680    SPESTWX	= 1665,
1681    SPILL_ACC	= 1666,
1682    SPILL_CR	= 1667,
1683    SPILL_CRBIT	= 1668,
1684    SPILL_QUADWORD	= 1669,
1685    SPILL_UACC	= 1670,
1686    SPILL_WACC	= 1671,
1687    SPLIT_QUADWORD	= 1672,
1688    SRAD	= 1673,
1689    SRADI	= 1674,
1690    SRADI_32	= 1675,
1691    SRADI_rec	= 1676,
1692    SRAD_rec	= 1677,
1693    SRAW	= 1678,
1694    SRAWI	= 1679,
1695    SRAWI_rec	= 1680,
1696    SRAW_rec	= 1681,
1697    SRD	= 1682,
1698    SRD_rec	= 1683,
1699    SRW	= 1684,
1700    SRW8	= 1685,
1701    SRW8_rec	= 1686,
1702    SRW_rec	= 1687,
1703    STB	= 1688,
1704    STB8	= 1689,
1705    STBCIX	= 1690,
1706    STBCX	= 1691,
1707    STBEPX	= 1692,
1708    STBU	= 1693,
1709    STBU8	= 1694,
1710    STBUX	= 1695,
1711    STBUX8	= 1696,
1712    STBX	= 1697,
1713    STBX8	= 1698,
1714    STBXTLS	= 1699,
1715    STBXTLS_	= 1700,
1716    STBXTLS_32	= 1701,
1717    STD	= 1702,
1718    STDAT	= 1703,
1719    STDBRX	= 1704,
1720    STDCIX	= 1705,
1721    STDCX	= 1706,
1722    STDU	= 1707,
1723    STDUX	= 1708,
1724    STDX	= 1709,
1725    STDXTLS	= 1710,
1726    STDXTLS_	= 1711,
1727    STFD	= 1712,
1728    STFDEPX	= 1713,
1729    STFDU	= 1714,
1730    STFDUX	= 1715,
1731    STFDX	= 1716,
1732    STFIWX	= 1717,
1733    STFS	= 1718,
1734    STFSU	= 1719,
1735    STFSUX	= 1720,
1736    STFSX	= 1721,
1737    STH	= 1722,
1738    STH8	= 1723,
1739    STHBRX	= 1724,
1740    STHCIX	= 1725,
1741    STHCX	= 1726,
1742    STHEPX	= 1727,
1743    STHU	= 1728,
1744    STHU8	= 1729,
1745    STHUX	= 1730,
1746    STHUX8	= 1731,
1747    STHX	= 1732,
1748    STHX8	= 1733,
1749    STHXTLS	= 1734,
1750    STHXTLS_	= 1735,
1751    STHXTLS_32	= 1736,
1752    STMW	= 1737,
1753    STOP	= 1738,
1754    STQ	= 1739,
1755    STQCX	= 1740,
1756    STQX_PSEUDO	= 1741,
1757    STSWI	= 1742,
1758    STVEBX	= 1743,
1759    STVEHX	= 1744,
1760    STVEWX	= 1745,
1761    STVX	= 1746,
1762    STVXL	= 1747,
1763    STW	= 1748,
1764    STW8	= 1749,
1765    STWAT	= 1750,
1766    STWBRX	= 1751,
1767    STWCIX	= 1752,
1768    STWCX	= 1753,
1769    STWEPX	= 1754,
1770    STWU	= 1755,
1771    STWU8	= 1756,
1772    STWUX	= 1757,
1773    STWUX8	= 1758,
1774    STWX	= 1759,
1775    STWX8	= 1760,
1776    STWXTLS	= 1761,
1777    STWXTLS_	= 1762,
1778    STWXTLS_32	= 1763,
1779    STXSD	= 1764,
1780    STXSDX	= 1765,
1781    STXSIBX	= 1766,
1782    STXSIBXv	= 1767,
1783    STXSIHX	= 1768,
1784    STXSIHXv	= 1769,
1785    STXSIWX	= 1770,
1786    STXSSP	= 1771,
1787    STXSSPX	= 1772,
1788    STXV	= 1773,
1789    STXVB16X	= 1774,
1790    STXVD2X	= 1775,
1791    STXVH8X	= 1776,
1792    STXVL	= 1777,
1793    STXVLL	= 1778,
1794    STXVP	= 1779,
1795    STXVPRL	= 1780,
1796    STXVPRLL	= 1781,
1797    STXVPX	= 1782,
1798    STXVRBX	= 1783,
1799    STXVRDX	= 1784,
1800    STXVRHX	= 1785,
1801    STXVRL	= 1786,
1802    STXVRLL	= 1787,
1803    STXVRWX	= 1788,
1804    STXVW4X	= 1789,
1805    STXVX	= 1790,
1806    SUBF	= 1791,
1807    SUBF8	= 1792,
1808    SUBF8O	= 1793,
1809    SUBF8O_rec	= 1794,
1810    SUBF8_rec	= 1795,
1811    SUBFC	= 1796,
1812    SUBFC8	= 1797,
1813    SUBFC8O	= 1798,
1814    SUBFC8O_rec	= 1799,
1815    SUBFC8_rec	= 1800,
1816    SUBFCO	= 1801,
1817    SUBFCO_rec	= 1802,
1818    SUBFC_rec	= 1803,
1819    SUBFE	= 1804,
1820    SUBFE8	= 1805,
1821    SUBFE8O	= 1806,
1822    SUBFE8O_rec	= 1807,
1823    SUBFE8_rec	= 1808,
1824    SUBFEO	= 1809,
1825    SUBFEO_rec	= 1810,
1826    SUBFE_rec	= 1811,
1827    SUBFIC	= 1812,
1828    SUBFIC8	= 1813,
1829    SUBFME	= 1814,
1830    SUBFME8	= 1815,
1831    SUBFME8O	= 1816,
1832    SUBFME8O_rec	= 1817,
1833    SUBFME8_rec	= 1818,
1834    SUBFMEO	= 1819,
1835    SUBFMEO_rec	= 1820,
1836    SUBFME_rec	= 1821,
1837    SUBFO	= 1822,
1838    SUBFO_rec	= 1823,
1839    SUBFUS	= 1824,
1840    SUBFUS_rec	= 1825,
1841    SUBFZE	= 1826,
1842    SUBFZE8	= 1827,
1843    SUBFZE8O	= 1828,
1844    SUBFZE8O_rec	= 1829,
1845    SUBFZE8_rec	= 1830,
1846    SUBFZEO	= 1831,
1847    SUBFZEO_rec	= 1832,
1848    SUBFZE_rec	= 1833,
1849    SUBF_rec	= 1834,
1850    SYNC	= 1835,
1851    TABORT	= 1836,
1852    TABORTDC	= 1837,
1853    TABORTDCI	= 1838,
1854    TABORTWC	= 1839,
1855    TABORTWCI	= 1840,
1856    TAILB	= 1841,
1857    TAILB8	= 1842,
1858    TAILBA	= 1843,
1859    TAILBA8	= 1844,
1860    TAILBCTR	= 1845,
1861    TAILBCTR8	= 1846,
1862    TBEGIN	= 1847,
1863    TBEGIN_RET	= 1848,
1864    TCHECK	= 1849,
1865    TCHECK_RET	= 1850,
1866    TCRETURNai	= 1851,
1867    TCRETURNai8	= 1852,
1868    TCRETURNdi	= 1853,
1869    TCRETURNdi8	= 1854,
1870    TCRETURNri	= 1855,
1871    TCRETURNri8	= 1856,
1872    TD	= 1857,
1873    TDI	= 1858,
1874    TEND	= 1859,
1875    TLBIA	= 1860,
1876    TLBIE	= 1861,
1877    TLBIEL	= 1862,
1878    TLBIVAX	= 1863,
1879    TLBLD	= 1864,
1880    TLBLI	= 1865,
1881    TLBRE	= 1866,
1882    TLBRE2	= 1867,
1883    TLBSX	= 1868,
1884    TLBSX2	= 1869,
1885    TLBSX2D	= 1870,
1886    TLBSYNC	= 1871,
1887    TLBWE	= 1872,
1888    TLBWE2	= 1873,
1889    TLSGDAIX	= 1874,
1890    TLSGDAIX8	= 1875,
1891    TRAP	= 1876,
1892    TRECHKPT	= 1877,
1893    TRECLAIM	= 1878,
1894    TSR	= 1879,
1895    TW	= 1880,
1896    TWI	= 1881,
1897    UNENCODED_NOP	= 1882,
1898    UpdateGBR	= 1883,
1899    VABSDUB	= 1884,
1900    VABSDUH	= 1885,
1901    VABSDUW	= 1886,
1902    VADDCUQ	= 1887,
1903    VADDCUW	= 1888,
1904    VADDECUQ	= 1889,
1905    VADDEUQM	= 1890,
1906    VADDFP	= 1891,
1907    VADDSBS	= 1892,
1908    VADDSHS	= 1893,
1909    VADDSWS	= 1894,
1910    VADDUBM	= 1895,
1911    VADDUBS	= 1896,
1912    VADDUDM	= 1897,
1913    VADDUHM	= 1898,
1914    VADDUHS	= 1899,
1915    VADDUQM	= 1900,
1916    VADDUWM	= 1901,
1917    VADDUWS	= 1902,
1918    VAND	= 1903,
1919    VANDC	= 1904,
1920    VAVGSB	= 1905,
1921    VAVGSH	= 1906,
1922    VAVGSW	= 1907,
1923    VAVGUB	= 1908,
1924    VAVGUH	= 1909,
1925    VAVGUW	= 1910,
1926    VBPERMD	= 1911,
1927    VBPERMQ	= 1912,
1928    VCFSX	= 1913,
1929    VCFSX_0	= 1914,
1930    VCFUGED	= 1915,
1931    VCFUX	= 1916,
1932    VCFUX_0	= 1917,
1933    VCIPHER	= 1918,
1934    VCIPHERLAST	= 1919,
1935    VCLRLB	= 1920,
1936    VCLRRB	= 1921,
1937    VCLZB	= 1922,
1938    VCLZD	= 1923,
1939    VCLZDM	= 1924,
1940    VCLZH	= 1925,
1941    VCLZLSBB	= 1926,
1942    VCLZW	= 1927,
1943    VCMPBFP	= 1928,
1944    VCMPBFP_rec	= 1929,
1945    VCMPEQFP	= 1930,
1946    VCMPEQFP_rec	= 1931,
1947    VCMPEQUB	= 1932,
1948    VCMPEQUB_rec	= 1933,
1949    VCMPEQUD	= 1934,
1950    VCMPEQUD_rec	= 1935,
1951    VCMPEQUH	= 1936,
1952    VCMPEQUH_rec	= 1937,
1953    VCMPEQUQ	= 1938,
1954    VCMPEQUQ_rec	= 1939,
1955    VCMPEQUW	= 1940,
1956    VCMPEQUW_rec	= 1941,
1957    VCMPGEFP	= 1942,
1958    VCMPGEFP_rec	= 1943,
1959    VCMPGTFP	= 1944,
1960    VCMPGTFP_rec	= 1945,
1961    VCMPGTSB	= 1946,
1962    VCMPGTSB_rec	= 1947,
1963    VCMPGTSD	= 1948,
1964    VCMPGTSD_rec	= 1949,
1965    VCMPGTSH	= 1950,
1966    VCMPGTSH_rec	= 1951,
1967    VCMPGTSQ	= 1952,
1968    VCMPGTSQ_rec	= 1953,
1969    VCMPGTSW	= 1954,
1970    VCMPGTSW_rec	= 1955,
1971    VCMPGTUB	= 1956,
1972    VCMPGTUB_rec	= 1957,
1973    VCMPGTUD	= 1958,
1974    VCMPGTUD_rec	= 1959,
1975    VCMPGTUH	= 1960,
1976    VCMPGTUH_rec	= 1961,
1977    VCMPGTUQ	= 1962,
1978    VCMPGTUQ_rec	= 1963,
1979    VCMPGTUW	= 1964,
1980    VCMPGTUW_rec	= 1965,
1981    VCMPNEB	= 1966,
1982    VCMPNEB_rec	= 1967,
1983    VCMPNEH	= 1968,
1984    VCMPNEH_rec	= 1969,
1985    VCMPNEW	= 1970,
1986    VCMPNEW_rec	= 1971,
1987    VCMPNEZB	= 1972,
1988    VCMPNEZB_rec	= 1973,
1989    VCMPNEZH	= 1974,
1990    VCMPNEZH_rec	= 1975,
1991    VCMPNEZW	= 1976,
1992    VCMPNEZW_rec	= 1977,
1993    VCMPSQ	= 1978,
1994    VCMPUQ	= 1979,
1995    VCNTMBB	= 1980,
1996    VCNTMBD	= 1981,
1997    VCNTMBH	= 1982,
1998    VCNTMBW	= 1983,
1999    VCTSXS	= 1984,
2000    VCTSXS_0	= 1985,
2001    VCTUXS	= 1986,
2002    VCTUXS_0	= 1987,
2003    VCTZB	= 1988,
2004    VCTZD	= 1989,
2005    VCTZDM	= 1990,
2006    VCTZH	= 1991,
2007    VCTZLSBB	= 1992,
2008    VCTZW	= 1993,
2009    VDIVESD	= 1994,
2010    VDIVESQ	= 1995,
2011    VDIVESW	= 1996,
2012    VDIVEUD	= 1997,
2013    VDIVEUQ	= 1998,
2014    VDIVEUW	= 1999,
2015    VDIVSD	= 2000,
2016    VDIVSQ	= 2001,
2017    VDIVSW	= 2002,
2018    VDIVUD	= 2003,
2019    VDIVUQ	= 2004,
2020    VDIVUW	= 2005,
2021    VEQV	= 2006,
2022    VEXPANDBM	= 2007,
2023    VEXPANDDM	= 2008,
2024    VEXPANDHM	= 2009,
2025    VEXPANDQM	= 2010,
2026    VEXPANDWM	= 2011,
2027    VEXPTEFP	= 2012,
2028    VEXTDDVLX	= 2013,
2029    VEXTDDVRX	= 2014,
2030    VEXTDUBVLX	= 2015,
2031    VEXTDUBVRX	= 2016,
2032    VEXTDUHVLX	= 2017,
2033    VEXTDUHVRX	= 2018,
2034    VEXTDUWVLX	= 2019,
2035    VEXTDUWVRX	= 2020,
2036    VEXTRACTBM	= 2021,
2037    VEXTRACTD	= 2022,
2038    VEXTRACTDM	= 2023,
2039    VEXTRACTHM	= 2024,
2040    VEXTRACTQM	= 2025,
2041    VEXTRACTUB	= 2026,
2042    VEXTRACTUH	= 2027,
2043    VEXTRACTUW	= 2028,
2044    VEXTRACTWM	= 2029,
2045    VEXTSB2D	= 2030,
2046    VEXTSB2Ds	= 2031,
2047    VEXTSB2W	= 2032,
2048    VEXTSB2Ws	= 2033,
2049    VEXTSD2Q	= 2034,
2050    VEXTSH2D	= 2035,
2051    VEXTSH2Ds	= 2036,
2052    VEXTSH2W	= 2037,
2053    VEXTSH2Ws	= 2038,
2054    VEXTSW2D	= 2039,
2055    VEXTSW2Ds	= 2040,
2056    VEXTUBLX	= 2041,
2057    VEXTUBRX	= 2042,
2058    VEXTUHLX	= 2043,
2059    VEXTUHRX	= 2044,
2060    VEXTUWLX	= 2045,
2061    VEXTUWRX	= 2046,
2062    VGBBD	= 2047,
2063    VGNB	= 2048,
2064    VINSBLX	= 2049,
2065    VINSBRX	= 2050,
2066    VINSBVLX	= 2051,
2067    VINSBVRX	= 2052,
2068    VINSD	= 2053,
2069    VINSDLX	= 2054,
2070    VINSDRX	= 2055,
2071    VINSERTB	= 2056,
2072    VINSERTD	= 2057,
2073    VINSERTH	= 2058,
2074    VINSERTW	= 2059,
2075    VINSHLX	= 2060,
2076    VINSHRX	= 2061,
2077    VINSHVLX	= 2062,
2078    VINSHVRX	= 2063,
2079    VINSW	= 2064,
2080    VINSWLX	= 2065,
2081    VINSWRX	= 2066,
2082    VINSWVLX	= 2067,
2083    VINSWVRX	= 2068,
2084    VLOGEFP	= 2069,
2085    VMADDFP	= 2070,
2086    VMAXFP	= 2071,
2087    VMAXSB	= 2072,
2088    VMAXSD	= 2073,
2089    VMAXSH	= 2074,
2090    VMAXSW	= 2075,
2091    VMAXUB	= 2076,
2092    VMAXUD	= 2077,
2093    VMAXUH	= 2078,
2094    VMAXUW	= 2079,
2095    VMHADDSHS	= 2080,
2096    VMHRADDSHS	= 2081,
2097    VMINFP	= 2082,
2098    VMINSB	= 2083,
2099    VMINSD	= 2084,
2100    VMINSH	= 2085,
2101    VMINSW	= 2086,
2102    VMINUB	= 2087,
2103    VMINUD	= 2088,
2104    VMINUH	= 2089,
2105    VMINUW	= 2090,
2106    VMLADDUHM	= 2091,
2107    VMODSD	= 2092,
2108    VMODSQ	= 2093,
2109    VMODSW	= 2094,
2110    VMODUD	= 2095,
2111    VMODUQ	= 2096,
2112    VMODUW	= 2097,
2113    VMRGEW	= 2098,
2114    VMRGHB	= 2099,
2115    VMRGHH	= 2100,
2116    VMRGHW	= 2101,
2117    VMRGLB	= 2102,
2118    VMRGLH	= 2103,
2119    VMRGLW	= 2104,
2120    VMRGOW	= 2105,
2121    VMSUMCUD	= 2106,
2122    VMSUMMBM	= 2107,
2123    VMSUMSHM	= 2108,
2124    VMSUMSHS	= 2109,
2125    VMSUMUBM	= 2110,
2126    VMSUMUDM	= 2111,
2127    VMSUMUHM	= 2112,
2128    VMSUMUHS	= 2113,
2129    VMUL10CUQ	= 2114,
2130    VMUL10ECUQ	= 2115,
2131    VMUL10EUQ	= 2116,
2132    VMUL10UQ	= 2117,
2133    VMULESB	= 2118,
2134    VMULESD	= 2119,
2135    VMULESH	= 2120,
2136    VMULESW	= 2121,
2137    VMULEUB	= 2122,
2138    VMULEUD	= 2123,
2139    VMULEUH	= 2124,
2140    VMULEUW	= 2125,
2141    VMULHSD	= 2126,
2142    VMULHSW	= 2127,
2143    VMULHUD	= 2128,
2144    VMULHUW	= 2129,
2145    VMULLD	= 2130,
2146    VMULOSB	= 2131,
2147    VMULOSD	= 2132,
2148    VMULOSH	= 2133,
2149    VMULOSW	= 2134,
2150    VMULOUB	= 2135,
2151    VMULOUD	= 2136,
2152    VMULOUH	= 2137,
2153    VMULOUW	= 2138,
2154    VMULUWM	= 2139,
2155    VNAND	= 2140,
2156    VNCIPHER	= 2141,
2157    VNCIPHERLAST	= 2142,
2158    VNEGD	= 2143,
2159    VNEGW	= 2144,
2160    VNMSUBFP	= 2145,
2161    VNOR	= 2146,
2162    VOR	= 2147,
2163    VORC	= 2148,
2164    VPDEPD	= 2149,
2165    VPERM	= 2150,
2166    VPERMR	= 2151,
2167    VPERMXOR	= 2152,
2168    VPEXTD	= 2153,
2169    VPKPX	= 2154,
2170    VPKSDSS	= 2155,
2171    VPKSDUS	= 2156,
2172    VPKSHSS	= 2157,
2173    VPKSHUS	= 2158,
2174    VPKSWSS	= 2159,
2175    VPKSWUS	= 2160,
2176    VPKUDUM	= 2161,
2177    VPKUDUS	= 2162,
2178    VPKUHUM	= 2163,
2179    VPKUHUS	= 2164,
2180    VPKUWUM	= 2165,
2181    VPKUWUS	= 2166,
2182    VPMSUMB	= 2167,
2183    VPMSUMD	= 2168,
2184    VPMSUMH	= 2169,
2185    VPMSUMW	= 2170,
2186    VPOPCNTB	= 2171,
2187    VPOPCNTD	= 2172,
2188    VPOPCNTH	= 2173,
2189    VPOPCNTW	= 2174,
2190    VPRTYBD	= 2175,
2191    VPRTYBQ	= 2176,
2192    VPRTYBW	= 2177,
2193    VREFP	= 2178,
2194    VRFIM	= 2179,
2195    VRFIN	= 2180,
2196    VRFIP	= 2181,
2197    VRFIZ	= 2182,
2198    VRLB	= 2183,
2199    VRLD	= 2184,
2200    VRLDMI	= 2185,
2201    VRLDNM	= 2186,
2202    VRLH	= 2187,
2203    VRLQ	= 2188,
2204    VRLQMI	= 2189,
2205    VRLQNM	= 2190,
2206    VRLW	= 2191,
2207    VRLWMI	= 2192,
2208    VRLWNM	= 2193,
2209    VRSQRTEFP	= 2194,
2210    VSBOX	= 2195,
2211    VSEL	= 2196,
2212    VSHASIGMAD	= 2197,
2213    VSHASIGMAW	= 2198,
2214    VSL	= 2199,
2215    VSLB	= 2200,
2216    VSLD	= 2201,
2217    VSLDBI	= 2202,
2218    VSLDOI	= 2203,
2219    VSLH	= 2204,
2220    VSLO	= 2205,
2221    VSLQ	= 2206,
2222    VSLV	= 2207,
2223    VSLW	= 2208,
2224    VSPLTB	= 2209,
2225    VSPLTBs	= 2210,
2226    VSPLTH	= 2211,
2227    VSPLTHs	= 2212,
2228    VSPLTISB	= 2213,
2229    VSPLTISH	= 2214,
2230    VSPLTISW	= 2215,
2231    VSPLTW	= 2216,
2232    VSR	= 2217,
2233    VSRAB	= 2218,
2234    VSRAD	= 2219,
2235    VSRAH	= 2220,
2236    VSRAQ	= 2221,
2237    VSRAW	= 2222,
2238    VSRB	= 2223,
2239    VSRD	= 2224,
2240    VSRDBI	= 2225,
2241    VSRH	= 2226,
2242    VSRO	= 2227,
2243    VSRQ	= 2228,
2244    VSRV	= 2229,
2245    VSRW	= 2230,
2246    VSTRIBL	= 2231,
2247    VSTRIBL_rec	= 2232,
2248    VSTRIBR	= 2233,
2249    VSTRIBR_rec	= 2234,
2250    VSTRIHL	= 2235,
2251    VSTRIHL_rec	= 2236,
2252    VSTRIHR	= 2237,
2253    VSTRIHR_rec	= 2238,
2254    VSUBCUQ	= 2239,
2255    VSUBCUW	= 2240,
2256    VSUBECUQ	= 2241,
2257    VSUBEUQM	= 2242,
2258    VSUBFP	= 2243,
2259    VSUBSBS	= 2244,
2260    VSUBSHS	= 2245,
2261    VSUBSWS	= 2246,
2262    VSUBUBM	= 2247,
2263    VSUBUBS	= 2248,
2264    VSUBUDM	= 2249,
2265    VSUBUHM	= 2250,
2266    VSUBUHS	= 2251,
2267    VSUBUQM	= 2252,
2268    VSUBUWM	= 2253,
2269    VSUBUWS	= 2254,
2270    VSUM2SWS	= 2255,
2271    VSUM4SBS	= 2256,
2272    VSUM4SHS	= 2257,
2273    VSUM4UBS	= 2258,
2274    VSUMSWS	= 2259,
2275    VUPKHPX	= 2260,
2276    VUPKHSB	= 2261,
2277    VUPKHSH	= 2262,
2278    VUPKHSW	= 2263,
2279    VUPKLPX	= 2264,
2280    VUPKLSB	= 2265,
2281    VUPKLSH	= 2266,
2282    VUPKLSW	= 2267,
2283    VXOR	= 2268,
2284    V_SET0	= 2269,
2285    V_SET0B	= 2270,
2286    V_SET0H	= 2271,
2287    V_SETALLONES	= 2272,
2288    V_SETALLONESB	= 2273,
2289    V_SETALLONESH	= 2274,
2290    WAIT	= 2275,
2291    WRTEE	= 2276,
2292    WRTEEI	= 2277,
2293    XOR	= 2278,
2294    XOR8	= 2279,
2295    XOR8_rec	= 2280,
2296    XORI	= 2281,
2297    XORI8	= 2282,
2298    XORIS	= 2283,
2299    XORIS8	= 2284,
2300    XOR_rec	= 2285,
2301    XSABSDP	= 2286,
2302    XSABSQP	= 2287,
2303    XSADDDP	= 2288,
2304    XSADDQP	= 2289,
2305    XSADDQPO	= 2290,
2306    XSADDSP	= 2291,
2307    XSCMPEQDP	= 2292,
2308    XSCMPEQQP	= 2293,
2309    XSCMPEXPDP	= 2294,
2310    XSCMPEXPQP	= 2295,
2311    XSCMPGEDP	= 2296,
2312    XSCMPGEQP	= 2297,
2313    XSCMPGTDP	= 2298,
2314    XSCMPGTQP	= 2299,
2315    XSCMPODP	= 2300,
2316    XSCMPOQP	= 2301,
2317    XSCMPUDP	= 2302,
2318    XSCMPUQP	= 2303,
2319    XSCPSGNDP	= 2304,
2320    XSCPSGNQP	= 2305,
2321    XSCVDPHP	= 2306,
2322    XSCVDPQP	= 2307,
2323    XSCVDPSP	= 2308,
2324    XSCVDPSPN	= 2309,
2325    XSCVDPSXDS	= 2310,
2326    XSCVDPSXDSs	= 2311,
2327    XSCVDPSXWS	= 2312,
2328    XSCVDPSXWSs	= 2313,
2329    XSCVDPUXDS	= 2314,
2330    XSCVDPUXDSs	= 2315,
2331    XSCVDPUXWS	= 2316,
2332    XSCVDPUXWSs	= 2317,
2333    XSCVHPDP	= 2318,
2334    XSCVQPDP	= 2319,
2335    XSCVQPDPO	= 2320,
2336    XSCVQPSDZ	= 2321,
2337    XSCVQPSQZ	= 2322,
2338    XSCVQPSWZ	= 2323,
2339    XSCVQPUDZ	= 2324,
2340    XSCVQPUQZ	= 2325,
2341    XSCVQPUWZ	= 2326,
2342    XSCVSDQP	= 2327,
2343    XSCVSPDP	= 2328,
2344    XSCVSPDPN	= 2329,
2345    XSCVSQQP	= 2330,
2346    XSCVSXDDP	= 2331,
2347    XSCVSXDSP	= 2332,
2348    XSCVUDQP	= 2333,
2349    XSCVUQQP	= 2334,
2350    XSCVUXDDP	= 2335,
2351    XSCVUXDSP	= 2336,
2352    XSDIVDP	= 2337,
2353    XSDIVQP	= 2338,
2354    XSDIVQPO	= 2339,
2355    XSDIVSP	= 2340,
2356    XSIEXPDP	= 2341,
2357    XSIEXPQP	= 2342,
2358    XSMADDADP	= 2343,
2359    XSMADDASP	= 2344,
2360    XSMADDMDP	= 2345,
2361    XSMADDMSP	= 2346,
2362    XSMADDQP	= 2347,
2363    XSMADDQPO	= 2348,
2364    XSMAXCDP	= 2349,
2365    XSMAXCQP	= 2350,
2366    XSMAXDP	= 2351,
2367    XSMAXJDP	= 2352,
2368    XSMINCDP	= 2353,
2369    XSMINCQP	= 2354,
2370    XSMINDP	= 2355,
2371    XSMINJDP	= 2356,
2372    XSMSUBADP	= 2357,
2373    XSMSUBASP	= 2358,
2374    XSMSUBMDP	= 2359,
2375    XSMSUBMSP	= 2360,
2376    XSMSUBQP	= 2361,
2377    XSMSUBQPO	= 2362,
2378    XSMULDP	= 2363,
2379    XSMULQP	= 2364,
2380    XSMULQPO	= 2365,
2381    XSMULSP	= 2366,
2382    XSNABSDP	= 2367,
2383    XSNABSDPs	= 2368,
2384    XSNABSQP	= 2369,
2385    XSNEGDP	= 2370,
2386    XSNEGQP	= 2371,
2387    XSNMADDADP	= 2372,
2388    XSNMADDASP	= 2373,
2389    XSNMADDMDP	= 2374,
2390    XSNMADDMSP	= 2375,
2391    XSNMADDQP	= 2376,
2392    XSNMADDQPO	= 2377,
2393    XSNMSUBADP	= 2378,
2394    XSNMSUBASP	= 2379,
2395    XSNMSUBMDP	= 2380,
2396    XSNMSUBMSP	= 2381,
2397    XSNMSUBQP	= 2382,
2398    XSNMSUBQPO	= 2383,
2399    XSRDPI	= 2384,
2400    XSRDPIC	= 2385,
2401    XSRDPIM	= 2386,
2402    XSRDPIP	= 2387,
2403    XSRDPIZ	= 2388,
2404    XSREDP	= 2389,
2405    XSRESP	= 2390,
2406    XSRQPI	= 2391,
2407    XSRQPIX	= 2392,
2408    XSRQPXP	= 2393,
2409    XSRSP	= 2394,
2410    XSRSQRTEDP	= 2395,
2411    XSRSQRTESP	= 2396,
2412    XSSQRTDP	= 2397,
2413    XSSQRTQP	= 2398,
2414    XSSQRTQPO	= 2399,
2415    XSSQRTSP	= 2400,
2416    XSSUBDP	= 2401,
2417    XSSUBQP	= 2402,
2418    XSSUBQPO	= 2403,
2419    XSSUBSP	= 2404,
2420    XSTDIVDP	= 2405,
2421    XSTSQRTDP	= 2406,
2422    XSTSTDCDP	= 2407,
2423    XSTSTDCQP	= 2408,
2424    XSTSTDCSP	= 2409,
2425    XSXEXPDP	= 2410,
2426    XSXEXPQP	= 2411,
2427    XSXSIGDP	= 2412,
2428    XSXSIGQP	= 2413,
2429    XVABSDP	= 2414,
2430    XVABSSP	= 2415,
2431    XVADDDP	= 2416,
2432    XVADDSP	= 2417,
2433    XVBF16GER2	= 2418,
2434    XVBF16GER2NN	= 2419,
2435    XVBF16GER2NP	= 2420,
2436    XVBF16GER2PN	= 2421,
2437    XVBF16GER2PP	= 2422,
2438    XVBF16GER2W	= 2423,
2439    XVBF16GER2WNN	= 2424,
2440    XVBF16GER2WNP	= 2425,
2441    XVBF16GER2WPN	= 2426,
2442    XVBF16GER2WPP	= 2427,
2443    XVCMPEQDP	= 2428,
2444    XVCMPEQDP_rec	= 2429,
2445    XVCMPEQSP	= 2430,
2446    XVCMPEQSP_rec	= 2431,
2447    XVCMPGEDP	= 2432,
2448    XVCMPGEDP_rec	= 2433,
2449    XVCMPGESP	= 2434,
2450    XVCMPGESP_rec	= 2435,
2451    XVCMPGTDP	= 2436,
2452    XVCMPGTDP_rec	= 2437,
2453    XVCMPGTSP	= 2438,
2454    XVCMPGTSP_rec	= 2439,
2455    XVCPSGNDP	= 2440,
2456    XVCPSGNSP	= 2441,
2457    XVCVBF16SPN	= 2442,
2458    XVCVDPSP	= 2443,
2459    XVCVDPSXDS	= 2444,
2460    XVCVDPSXWS	= 2445,
2461    XVCVDPUXDS	= 2446,
2462    XVCVDPUXWS	= 2447,
2463    XVCVHPSP	= 2448,
2464    XVCVSPBF16	= 2449,
2465    XVCVSPDP	= 2450,
2466    XVCVSPHP	= 2451,
2467    XVCVSPSXDS	= 2452,
2468    XVCVSPSXWS	= 2453,
2469    XVCVSPUXDS	= 2454,
2470    XVCVSPUXWS	= 2455,
2471    XVCVSXDDP	= 2456,
2472    XVCVSXDSP	= 2457,
2473    XVCVSXWDP	= 2458,
2474    XVCVSXWSP	= 2459,
2475    XVCVUXDDP	= 2460,
2476    XVCVUXDSP	= 2461,
2477    XVCVUXWDP	= 2462,
2478    XVCVUXWSP	= 2463,
2479    XVDIVDP	= 2464,
2480    XVDIVSP	= 2465,
2481    XVF16GER2	= 2466,
2482    XVF16GER2NN	= 2467,
2483    XVF16GER2NP	= 2468,
2484    XVF16GER2PN	= 2469,
2485    XVF16GER2PP	= 2470,
2486    XVF16GER2W	= 2471,
2487    XVF16GER2WNN	= 2472,
2488    XVF16GER2WNP	= 2473,
2489    XVF16GER2WPN	= 2474,
2490    XVF16GER2WPP	= 2475,
2491    XVF32GER	= 2476,
2492    XVF32GERNN	= 2477,
2493    XVF32GERNP	= 2478,
2494    XVF32GERPN	= 2479,
2495    XVF32GERPP	= 2480,
2496    XVF32GERW	= 2481,
2497    XVF32GERWNN	= 2482,
2498    XVF32GERWNP	= 2483,
2499    XVF32GERWPN	= 2484,
2500    XVF32GERWPP	= 2485,
2501    XVF64GER	= 2486,
2502    XVF64GERNN	= 2487,
2503    XVF64GERNP	= 2488,
2504    XVF64GERPN	= 2489,
2505    XVF64GERPP	= 2490,
2506    XVF64GERW	= 2491,
2507    XVF64GERWNN	= 2492,
2508    XVF64GERWNP	= 2493,
2509    XVF64GERWPN	= 2494,
2510    XVF64GERWPP	= 2495,
2511    XVI16GER2	= 2496,
2512    XVI16GER2PP	= 2497,
2513    XVI16GER2S	= 2498,
2514    XVI16GER2SPP	= 2499,
2515    XVI16GER2SW	= 2500,
2516    XVI16GER2SWPP	= 2501,
2517    XVI16GER2W	= 2502,
2518    XVI16GER2WPP	= 2503,
2519    XVI4GER8	= 2504,
2520    XVI4GER8PP	= 2505,
2521    XVI4GER8W	= 2506,
2522    XVI4GER8WPP	= 2507,
2523    XVI8GER4	= 2508,
2524    XVI8GER4PP	= 2509,
2525    XVI8GER4SPP	= 2510,
2526    XVI8GER4W	= 2511,
2527    XVI8GER4WPP	= 2512,
2528    XVI8GER4WSPP	= 2513,
2529    XVIEXPDP	= 2514,
2530    XVIEXPSP	= 2515,
2531    XVMADDADP	= 2516,
2532    XVMADDASP	= 2517,
2533    XVMADDMDP	= 2518,
2534    XVMADDMSP	= 2519,
2535    XVMAXDP	= 2520,
2536    XVMAXSP	= 2521,
2537    XVMINDP	= 2522,
2538    XVMINSP	= 2523,
2539    XVMSUBADP	= 2524,
2540    XVMSUBASP	= 2525,
2541    XVMSUBMDP	= 2526,
2542    XVMSUBMSP	= 2527,
2543    XVMULDP	= 2528,
2544    XVMULSP	= 2529,
2545    XVNABSDP	= 2530,
2546    XVNABSSP	= 2531,
2547    XVNEGDP	= 2532,
2548    XVNEGSP	= 2533,
2549    XVNMADDADP	= 2534,
2550    XVNMADDASP	= 2535,
2551    XVNMADDMDP	= 2536,
2552    XVNMADDMSP	= 2537,
2553    XVNMSUBADP	= 2538,
2554    XVNMSUBASP	= 2539,
2555    XVNMSUBMDP	= 2540,
2556    XVNMSUBMSP	= 2541,
2557    XVRDPI	= 2542,
2558    XVRDPIC	= 2543,
2559    XVRDPIM	= 2544,
2560    XVRDPIP	= 2545,
2561    XVRDPIZ	= 2546,
2562    XVREDP	= 2547,
2563    XVRESP	= 2548,
2564    XVRSPI	= 2549,
2565    XVRSPIC	= 2550,
2566    XVRSPIM	= 2551,
2567    XVRSPIP	= 2552,
2568    XVRSPIZ	= 2553,
2569    XVRSQRTEDP	= 2554,
2570    XVRSQRTESP	= 2555,
2571    XVSQRTDP	= 2556,
2572    XVSQRTSP	= 2557,
2573    XVSUBDP	= 2558,
2574    XVSUBSP	= 2559,
2575    XVTDIVDP	= 2560,
2576    XVTDIVSP	= 2561,
2577    XVTLSBB	= 2562,
2578    XVTSQRTDP	= 2563,
2579    XVTSQRTSP	= 2564,
2580    XVTSTDCDP	= 2565,
2581    XVTSTDCSP	= 2566,
2582    XVXEXPDP	= 2567,
2583    XVXEXPSP	= 2568,
2584    XVXSIGDP	= 2569,
2585    XVXSIGSP	= 2570,
2586    XXBLENDVB	= 2571,
2587    XXBLENDVD	= 2572,
2588    XXBLENDVH	= 2573,
2589    XXBLENDVW	= 2574,
2590    XXBRD	= 2575,
2591    XXBRH	= 2576,
2592    XXBRQ	= 2577,
2593    XXBRW	= 2578,
2594    XXEVAL	= 2579,
2595    XXEXTRACTUW	= 2580,
2596    XXGENPCVBM	= 2581,
2597    XXGENPCVDM	= 2582,
2598    XXGENPCVHM	= 2583,
2599    XXGENPCVWM	= 2584,
2600    XXINSERTW	= 2585,
2601    XXLAND	= 2586,
2602    XXLANDC	= 2587,
2603    XXLEQV	= 2588,
2604    XXLEQVOnes	= 2589,
2605    XXLNAND	= 2590,
2606    XXLNOR	= 2591,
2607    XXLOR	= 2592,
2608    XXLORC	= 2593,
2609    XXLORf	= 2594,
2610    XXLXOR	= 2595,
2611    XXLXORdpz	= 2596,
2612    XXLXORspz	= 2597,
2613    XXLXORz	= 2598,
2614    XXMFACC	= 2599,
2615    XXMFACCW	= 2600,
2616    XXMRGHW	= 2601,
2617    XXMRGLW	= 2602,
2618    XXMTACC	= 2603,
2619    XXMTACCW	= 2604,
2620    XXPERM	= 2605,
2621    XXPERMDI	= 2606,
2622    XXPERMDIs	= 2607,
2623    XXPERMR	= 2608,
2624    XXPERMX	= 2609,
2625    XXSEL	= 2610,
2626    XXSETACCZ	= 2611,
2627    XXSETACCZW	= 2612,
2628    XXSLDWI	= 2613,
2629    XXSLDWIs	= 2614,
2630    XXSPLTI32DX	= 2615,
2631    XXSPLTIB	= 2616,
2632    XXSPLTIDP	= 2617,
2633    XXSPLTIW	= 2618,
2634    XXSPLTW	= 2619,
2635    XXSPLTWs	= 2620,
2636    gBC	= 2621,
2637    gBCA	= 2622,
2638    gBCAat	= 2623,
2639    gBCCTR	= 2624,
2640    gBCCTRL	= 2625,
2641    gBCL	= 2626,
2642    gBCLA	= 2627,
2643    gBCLAat	= 2628,
2644    gBCLR	= 2629,
2645    gBCLRL	= 2630,
2646    gBCLat	= 2631,
2647    gBCat	= 2632,
2648    INSTRUCTION_LIST_END = 2633
2649  };
2650
2651} // end namespace PPC
2652} // end namespace llvm
2653#endif // GET_INSTRINFO_ENUM
2654
2655#ifdef GET_INSTRINFO_SCHED_ENUM
2656#undef GET_INSTRINFO_SCHED_ENUM
2657namespace llvm {
2658
2659namespace PPC {
2660namespace Sched {
2661  enum {
2662    NoInstrModel	= 0,
2663    IIC_LdStSync	= 1,
2664    IIC_IntSimple	= 2,
2665    IIC_IntGeneral	= 3,
2666    IIC_BrB	= 4,
2667    IIC_VecFP	= 5,
2668    IIC_IntRotate	= 6,
2669    IIC_IntCompare	= 7,
2670    IIC_SprABORT	= 8,
2671    IIC_LdStCOPY	= 9,
2672    IIC_LdStPASTE	= 10,
2673    IIC_BrCR	= 11,
2674    IIC_LdStLD	= 12,
2675    IIC_LdStDCBF	= 13,
2676    IIC_LdStLoad	= 14,
2677    IIC_IntDivD	= 15,
2678    IIC_IntDivW	= 16,
2679    IIC_FPDGeneral	= 17,
2680    IIC_FPAddSub	= 18,
2681    IIC_FPDivD	= 19,
2682    IIC_FPSGeneral	= 20,
2683    IIC_FPCompare	= 21,
2684    IIC_FPGeneral	= 22,
2685    IIC_VecGeneral	= 23,
2686    IIC_VecComplex	= 24,
2687    IIC_LdStStore	= 25,
2688    IIC_IntRotateDI	= 26,
2689    IIC_FPDivS	= 27,
2690    IIC_FPFused	= 28,
2691    IIC_FPSqrtD	= 29,
2692    IIC_FPSqrtS	= 30,
2693    IIC_LdStICBI	= 31,
2694    IIC_IntISEL	= 32,
2695    IIC_SprISYNC	= 33,
2696    IIC_LdStLWARX	= 34,
2697    IIC_LdStLoadUpd	= 35,
2698    IIC_LdStLoadUpdX	= 36,
2699    IIC_LdStLDARX	= 37,
2700    IIC_LdStLDU	= 38,
2701    IIC_LdStLDUX	= 39,
2702    IIC_LdStLFD	= 40,
2703    IIC_LdStLFDU	= 41,
2704    IIC_LdStLFDUX	= 42,
2705    IIC_LdStLHA	= 43,
2706    IIC_LdStLHAU	= 44,
2707    IIC_LdStLHAUX	= 45,
2708    IIC_LdStLMW	= 46,
2709    IIC_LdStLQ	= 47,
2710    IIC_LdStLQARX	= 48,
2711    IIC_LdStLWA	= 49,
2712    IIC_IntMulHD	= 50,
2713    IIC_BrMCR	= 51,
2714    IIC_BrMCRX	= 52,
2715    IIC_SprMFCR	= 53,
2716    IIC_SprMFSPR	= 54,
2717    IIC_IntMFFS	= 55,
2718    IIC_SprMFMSR	= 56,
2719    IIC_SprMFCRF	= 57,
2720    IIC_SprMFPMR	= 58,
2721    IIC_SprMFSR	= 59,
2722    IIC_SprMFTB	= 60,
2723    IIC_SprMSGSYNC	= 61,
2724    IIC_SprMTSPR	= 62,
2725    IIC_IntMTFSB0	= 63,
2726    IIC_SprMTMSR	= 64,
2727    IIC_SprMTMSRD	= 65,
2728    IIC_SprMTPMR	= 66,
2729    IIC_SprMTSR	= 67,
2730    IIC_IntMulHW	= 68,
2731    IIC_IntMulHWU	= 69,
2732    IIC_IntMulLI	= 70,
2733    IIC_SprRFI	= 71,
2734    IIC_IntRFID	= 72,
2735    IIC_IntRotateD	= 73,
2736    IIC_SprSLBFEE	= 74,
2737    IIC_SprSLBIA	= 75,
2738    IIC_SprSLBIE	= 76,
2739    IIC_SprSLBIEG	= 77,
2740    IIC_SprSLBMFEE	= 78,
2741    IIC_SprSLBMFEV	= 79,
2742    IIC_SprSLBMTE	= 80,
2743    IIC_SprSLBSYNC	= 81,
2744    IIC_IntShift	= 82,
2745    IIC_LdStSTWCX	= 83,
2746    IIC_LdStSTU	= 84,
2747    IIC_LdStSTUX	= 85,
2748    IIC_LdStSTD	= 86,
2749    IIC_LdStSTDCX	= 87,
2750    IIC_LdStSTFD	= 88,
2751    IIC_LdStSTFDU	= 89,
2752    IIC_SprSTOP	= 90,
2753    IIC_LdStSTQ	= 91,
2754    IIC_LdStSTQCX	= 92,
2755    IIC_IntTrapD	= 93,
2756    IIC_SprTLBIA	= 94,
2757    IIC_SprTLBIE	= 95,
2758    IIC_SprTLBIEL	= 96,
2759    IIC_SprTLBSYNC	= 97,
2760    IIC_IntTrapW	= 98,
2761    IIC_VecFPCompare	= 99,
2762    IIC_VecPerm	= 100,
2763    VADDUBM_VADDUDM_VADDUHM_VADDUWM_VEXTSB2D_VEXTSB2Ds_VEXTSB2W_VEXTSB2Ws_VEXTSH2D_VEXTSH2Ds_VEXTSH2W_VEXTSH2Ws_VEXTSW2D_VEXTSW2Ds_VSLD_VSRD_VSUBUBM_VSUBUDM_VSUBUHM_VSUBUWM_VPOPCNTB_VPOPCNTH_VSRAD_MTVSRDD_VEQV_VNAND_VNEGD_VNEGW_VORC_XXLAND_XXLANDC_XXLEQV_XXLEQVOnes_XXLNAND_XXLNOR_XXLOR_XXLORf_XXLORC_XXLXOR_XXLXORdpz_XXLXORspz_XXLXORz	= 101,
2764    VAND_VANDC_V_SET0_V_SET0B_V_SET0H_VSLB_VSLH_VSLW_VSRB_VSRH_VSRW_VRLB_VRLD_VRLH_VRLW_VSRAB_VSRAH_VSRAW_XVABSDP_XVABSSP_XVNABSDP_XVNABSSP_XVCPSGNDP_XVCPSGNSP_XVIEXPDP_XVIEXPSP_XVXEXPDP_XVXEXPSP_VRLDMI_VRLDNM_VRLWMI_VRLWNM_VMRGEW_VMRGOW_VNOR_VOR_VSEL_VXOR_XVNEGDP_XVNEGSP_XSABSQP_XSCPSGNQP_XSIEXPQP_XSNABSQP_XSNEGQP_XSXEXPQP	= 102,
2765    XXSEL	= 103,
2766    TABORTDC_TABORTDCI_TABORTWC_TABORTWCI	= 104,
2767    MTFSB0_MTFSB1	= 105,
2768    MFFSCDRN_MFFSCDRNI_MFFSCRN_MFFSCRNI	= 106,
2769    CMPRB_CMPRB8_CMPEQB	= 107,
2770    TD_TDI	= 108,
2771    TW_TWI	= 109,
2772    FCMPOD_FCMPOS_FCMPUD_FCMPUS_FTDIV_FTSQRT	= 110,
2773    XSTSTDCDP_XSTSTDCSP	= 111,
2774    XSMAXCDP_XSMAXDP_XSMAXJDP_XSMINCDP_XSMINDP_XSMINJDP_XSXSIGDP_XSCVSPDPN	= 112,
2775    XSCMPEQDP_XSCMPEXPDP_XSCMPGEDP_XSCMPGTDP_XSCMPODP_XSCMPUDP_XSTDIVDP_XSTSQRTDP	= 113,
2776    CNTLZD_CNTLZD_rec_CNTLZW_CNTLZW8_CNTLZW8_rec_CNTLZW_rec_CNTTZD_CNTTZD_rec_CNTTZW_CNTTZW8_CNTTZW8_rec_CNTTZW_rec_POPCNTD_POPCNTW_CMPB_CMPB8_SETB_SETB8_BPERMD	= 114,
2777    SLD_SRD_SRAD	= 115,
2778    SRADI_EXTSWSLI_32_64_EXTSWSLI_SRADI_32_RLDIC	= 116,
2779    MFVRD_MFVSRD_MTVRD_MTVSRD_MTVRWA_MTVRWZ_MTVSRWA_MTVSRWZ_MFVSRWZ_MFVRWZ	= 117,
2780    CMPLW_CMPLWI_CMPW_CMPWI_CMPD_CMPDI_CMPLD_CMPLDI	= 118,
2781    SUBFC_SUBFC8_SUBFC8O_SUBFCO_SUBFIC_SUBFIC8_ANDI8_rec_ANDIS8_rec_ANDIS_rec_ANDI_rec_ADDC_ADDC8_ADDC8O_ADDCO_ADDIC_ADDIC8_ADDIC_rec_ADDE_ADDE8_ADDE8O_ADDE8O_rec_ADDE8_rec_ADDEO_ADDEO_rec_ADDE_rec_ADDME_ADDME8_ADDME8O_ADDME8O_rec_ADDME8_rec_ADDMEO_ADDMEO_rec_ADDME_rec_ADDZE_ADDZE8_ADDZE8O_ADDZE8O_rec_ADDZE8_rec_ADDZEO_ADDZEO_rec_ADDZE_rec_SUBF_SUBF8_SUBF8O_SUBF8O_rec_SUBF8_rec_SUBFE_SUBFE8_SUBFE8O_SUBFE8O_rec_SUBFE8_rec_SUBFEO_SUBFEO_rec_SUBFE_rec_SUBFME_SUBFME8_SUBFME8O_SUBFME8O_rec_SUBFME8_rec_SUBFMEO_SUBFMEO_rec_SUBFME_rec_SUBFO_SUBFO_rec_SUBFZE_SUBFZE8_SUBFZE8O_SUBFZE8O_rec_SUBFZE8_rec_SUBFZEO_SUBFZEO_rec_SUBFZE_rec_SUBF_rec_POPCNTB_POPCNTB8_LA_LA8	= 119,
2782    ADD4_ADD4O_ADD4O_rec_ADD4_rec_ADD8_ADD8O_ADD8O_rec_ADD8_rec_NEG_NEG8_NEG8O_NEG8O_rec_NEG8_rec_NEGO_NEGO_rec_NEG_rec_ADDI_ADDI8_ADDIS_ADDIS8_LI_LI8_LIS_LIS8_OR_OR8_OR8_rec_ORI_ORI8_ORIS_ORIS8_OR_rec_XOR_XOR8_XOR8_rec_XORI_XORI8_XORIS_XORIS8_XOR_rec_NAND_NAND8_NAND8_rec_NAND_rec_AND_AND8_AND8_rec_ANDC_ANDC8_ANDC8_rec_ANDC_rec_AND_rec_NOR_NOR8_NOR8_rec_NOR_rec_ORC_ORC8_ORC8_rec_ORC_rec_EQV_EQV8_EQV8_rec_EQV_rec_EXTSB_EXTSB8_EXTSB8_32_64_EXTSB8_rec_EXTSB_rec_EXTSH_EXTSH8_EXTSH8_32_64_EXTSH8_rec_EXTSH_rec_EXTSW_EXTSW_32_EXTSW_32_64_EXTSW_32_64_rec_EXTSW_rec_ADD4TLS_ADD8TLS_ADD8TLS__NOP	= 120,
2783    ADDIStocHA_ADDIStocHA8_ADDItocL_COPY	= 121,
2784    MCRF	= 122,
2785    MCRXRX	= 123,
2786    XSNABSDP_XSNABSDPs_XSXEXPDP_XSABSDP_XSNEGDP_XSCPSGNDP	= 124,
2787    RFEBB	= 125,
2788    TBEGIN_TRECHKPT	= 126,
2789    WAIT	= 127,
2790    RLDCL_RLDCR	= 128,
2791    RLWIMI_RLWIMI8	= 129,
2792    RLDICL_RLDICL_32_RLDICL_32_64_RLDICR_RLDICR_32_RLDIMI	= 130,
2793    MFOCRF_MFOCRF8	= 131,
2794    MTOCRF_MTOCRF8	= 132,
2795    CR6SET_CR6UNSET_CRSET_CRUNSET_CRAND_CRANDC_CRNAND_CRNOR_CROR_CRORC_CREQV_CRNOT_CRXOR	= 133,
2796    SLW_SLW8_SRW_SRW8_RLWINM_RLWINM8_RLWNM_RLWNM8	= 134,
2797    FABSD_FABSS_FNABSD_FNABSS_FNEGD_FNEGS_FCPSGND_FCPSGNS_FMR	= 135,
2798    SRAW_SRAWI	= 136,
2799    ISEL_ISEL8	= 137,
2800    XSIEXPDP	= 138,
2801    TRECLAIM_TSR_TABORT	= 139,
2802    MFVSCR	= 140,
2803    MTVSCR	= 141,
2804    VCMPNEZB_VCMPNEZH_VCMPNEZW_VCMPEQUB_VCMPEQUD_VCMPEQUH_VCMPEQUW_VCMPNEB_VCMPNEH_VCMPNEW_VCMPEQFP_VCMPEQFP_rec_VCMPGEFP_VCMPGEFP_rec_VCMPGTFP_VCMPGTFP_rec_VCMPBFP_VCMPBFP_rec_VCMPGTSB_VCMPGTSB_rec_VCMPGTSD_VCMPGTSD_rec_VCMPGTSH_VCMPGTSH_rec_VCMPGTSW_VCMPGTSW_rec_VCMPGTUB_VCMPGTUB_rec_VCMPGTUD_VCMPGTUD_rec_VCMPGTUH_VCMPGTUH_rec_VCMPGTUW_VCMPGTUW_rec_VCMPNEB_rec_VCMPNEH_rec_VCMPNEW_rec_VCMPNEZB_rec_VCMPNEZH_rec_VCMPNEZW_rec_VCMPEQUB_rec_VCMPEQUD_rec_VCMPEQUH_rec_VCMPEQUW_rec_XVCMPEQDP_XVCMPEQDP_rec_XVCMPEQSP_XVCMPEQSP_rec_XVCMPGEDP_XVCMPGEDP_rec_XVCMPGESP_XVCMPGESP_rec_XVCMPGTDP_XVCMPGTDP_rec_XVCMPGTSP_XVCMPGTSP_rec	= 142,
2805    VABSDUB_VABSDUH_VABSDUW_VCLZB_VCLZD_VCLZH_VCLZW_VCTZB_VCTZD_VCTZH_VCTZW_VPOPCNTW_VPOPCNTD_VPRTYBD_VPRTYBW	= 143,
2806    VADDUBS_VADDUHS_VADDUWS_VAVGSB_VAVGSH_VAVGSW_VAVGUB_VAVGUH_VAVGUW_VADDSBS_VADDSHS_VADDSWS_VMAXFP_VMINFP_VMAXSB_VMAXSD_VMAXSH_VMAXSW_VMAXUB_VMAXUD_VMAXUH_VMAXUW_VMINSB_VMINSD_VMINSH_VMINSW_VMINUB_VMINUD_VMINUH_VMINUW_VBPERMD_VADDCUW_VSHASIGMAD_VSHASIGMAW_VSUBSBS_VSUBSHS_VSUBSWS_VSUBUBS_VSUBUHS_VSUBUWS_VSUBCUW_XVMAXDP_XVMAXSP_XVMINDP_XVMINSP_XVTSTDCDP_XVTSTDCSP_XVXSIGDP_XVXSIGSP	= 144,
2807    XVTDIVDP_XVTDIVSP_XVTSQRTDP_XVTSQRTSP	= 145,
2808    VADDFP_VCTSXS_VCTSXS_0_VCTUXS_VCTUXS_0_VEXPTEFP_VLOGEFP_VMADDFP_VMHADDSHS_VNMSUBFP_VREFP_VRFIM_VRFIN_VRFIP_VRFIZ_VRSQRTEFP_XVADDDP_XVADDSP_XVCVDPSP_XVCVDPSXDS_XVCVDPSXWS_XVCVDPUXDS_XVCVDPUXWS_XVCVHPSP_XVCVSPDP_XVCVSPHP_XVCVSPSXDS_XVCVSPSXWS_XVCVSPUXDS_XVCVSPUXWS_XVCVSXDDP_XVCVSXDSP_XVCVSXWDP_XVCVSXWSP_XVCVUXDDP_XVCVUXDSP_XVCVUXWDP_XVCVUXWSP_XVMADDADP_XVMADDASP_XVMADDMDP_XVMADDMSP_XVMSUBADP_XVMSUBASP_XVMSUBMDP_XVMSUBMSP_XVMULDP_XVMULSP_XVNMADDADP_XVNMADDASP_XVNMADDMDP_XVNMADDMSP_XVNMSUBADP_XVNMSUBASP_XVNMSUBMDP_XVNMSUBMSP_XVRDPI_XVRDPIC_XVRDPIM_XVRDPIP_XVRDPIZ_XVREDP_XVRESP_XVRSPI_XVRSPIC_XVRSPIM_XVRSPIP_XVRSPIZ_XVRSQRTEDP_XVRSQRTESP_XVSUBDP_XVSUBSP_VCFSX_VCFSX_0_VCFUX_VCFUX_0_VMHRADDSHS_VMLADDUHM_VMSUMMBM_VMSUMSHM_VMSUMSHS_VMSUMUBM_VMSUMUHM_VMSUMUDM_VMSUMUHS_VMULESB_VMULESH_VMULESW_VMULEUB_VMULEUH_VMULEUW_VMULOSB_VMULOSH_VMULOSW_VMULOUB_VMULOUH_VMULOUW_VSUM2SWS_VSUM4SBS_VSUM4SHS_VSUM4UBS_VSUMSWS	= 146,
2809    VSUBFP_VMULUWM	= 147,
2810    MADDHD_MADDHDU_MADDLD_MADDLD8_MULLD_MULLDO	= 148,
2811    MULHD_MULHW_MULLW_MULLWO	= 149,
2812    MULHDU_MULHWU	= 150,
2813    MULLI_MULLI8	= 151,
2814    FRSP_FRIMD_FRIMS_FRIND_FRINS_FRIPD_FRIPS_FRIZD_FRIZS_FRE_FRES_FADDS_FMSUBS_FMADDS_FSUBS_FCFID_FCFIDS_FCFIDU_FCFIDUS_FCTID_FCTIDU_FCTIDUZ_FCTIDZ_FCTIW_FCTIWU_FCTIWUZ_FCTIWZ_FRSQRTE_FRSQRTES_FNMADDS_FNMSUBS_FSELD_FSELS_FMULS	= 152,
2815    FADD_FSUB	= 153,
2816    FMSUB_FMADD_FNMADD_FNMSUB_FMUL	= 154,
2817    XSMADDADP_XSMADDASP_XSMADDMDP_XSMADDMSP_XSMSUBADP_XSMSUBASP_XSMSUBMDP_XSMSUBMSP_XSMULDP_XSMULSP_XSNMADDADP_XSNMADDASP_XSNMADDMDP_XSNMADDMSP_XSNMSUBADP_XSNMSUBASP_XSNMSUBMDP_XSNMSUBMSP	= 155,
2818    FSELD_rec_FSELS_rec	= 156,
2819    MULHDU_rec_MULHWU_rec	= 157,
2820    MULHD_rec_MULHW_rec_MULLWO_rec_MULLW_rec	= 158,
2821    MULLDO_rec_MULLD_rec	= 159,
2822    FRIMD_rec_FRIMS_rec_FRIND_rec_FRINS_rec_FRIPD_rec_FRIPS_rec_FRIZD_rec_FRIZS_rec_FRES_rec_FRE_rec_FADDS_rec_FSUBS_rec_FMSUBS_rec_FNMSUBS_rec_FMADDS_rec_FNMADDS_rec_FCFIDS_rec_FCFIDUS_rec_FCFIDU_rec_FCFID_rec_FCTIDUZ_rec_FCTIDU_rec_FCTIDZ_rec_FCTID_rec_FCTIWUZ_rec_FCTIWU_rec_FCTIWZ_rec_FCTIW_rec_FMULS_rec_FRSQRTES_rec_FRSQRTE_rec_FRSP_rec	= 160,
2823    FADD_rec_FSUB_rec	= 161,
2824    FMSUB_rec_FNMSUB_rec_FMADD_rec_FNMADD_rec_FMUL_rec	= 162,
2825    XSADDDP_XSADDSP_XSCVDPHP_XSCVDPSP_XSCVDPSXDS_XSCVDPSXDSs_XSCVDPSXWS_XSCVDPUXDS_XSCVDPUXDSs_XSCVDPUXWS_XSCVDPSXWSs_XSCVDPUXWSs_XSCVHPDP_XSCVSPDP_XSCVSXDDP_XSCVSXDSP_XSCVUXDDP_XSCVUXDSP_XSRDPI_XSRDPIC_XSRDPIM_XSRDPIP_XSRDPIZ_XSREDP_XSRESP_XSRSQRTEDP_XSRSQRTESP_XSSUBDP_XSSUBSP_XSCVDPSPN_XSRSP	= 163,
2826    LVSL_LVSR	= 164,
2827    VSPLTISB_VSPLTISH_VSPLTISW_VSPLTB_VSPLTBs_VSPLTH_VSPLTHs_VSPLTW_XXMRGHW_XXMRGLW_XXPERM_XXPERMR_XXSLDWI_XXSLDWIs_XXSPLTIB_XXSPLTW_XXSPLTWs_XXPERMDI_XXPERMDIs	= 165,
2828    V_SETALLONES_V_SETALLONESB_V_SETALLONESH_VBPERMQ_VGBBD_VMRGHB_VMRGHH_VMRGHW_VMRGLB_VMRGLH_VMRGLW_VPERM_VPERMR_VPERMXOR_VPKPX_VPKSDSS_VPKSDUS_VPKSHSS_VPKSHUS_VPKSWSS_VPKSWUS_VPKUDUM_VPKUDUS_VPKUHUM_VPKUHUS_VPKUWUM_VPKUWUS_VSL_VSLDOI_VSLO_VSLV_VSR_VSRO_VSRV_VUPKHPX_VUPKHSB_VUPKHSH_VUPKHSW_VUPKLPX_VUPKLSB_VUPKLSH_VUPKLSW_XXBRD_XXBRH_XXBRQ_XXBRW_XXEXTRACTUW_XXINSERTW_VADDCUQ_VADDECUQ_VADDEUQM_VMUL10CUQ_VMUL10ECUQ_VMUL10EUQ_VMUL10UQ_VSUBCUQ_VSUBECUQ_VSUBEUQM_XSTSTDCQP_XSXSIGQP_BCDCFN_rec_BCDCFZ_rec_BCDCPSGN_rec_BCDCTN_rec_BCDCTZ_rec_BCDSETSGN_rec_BCDS_rec_BCDTRUNC_rec_BCDUS_rec_BCDUTRUNC_rec_BCDADD_rec_BCDSUB_rec	= 166,
2829    VEXTRACTUB_VEXTRACTUH_VEXTRACTUW_VINSERTB_VINSERTD_VINSERTH_VINSERTW_MFVSRLD_MTVSRWS_VCLZLSBB_VCTZLSBB_VEXTRACTD_VEXTUBLX_VEXTUBRX_VEXTUHLX_VEXTUHRX_VEXTUWLX_VEXTUWRX_VPRTYBQ_VADDUQM_VSUBUQM	= 167,
2830    XSCMPEXPQP_XSCMPOQP_XSCMPUQP	= 168,
2831    BCDSR_rec_XSADDQP_XSADDQPO_XSCVDPQP_XSCVQPDP_XSCVQPDPO_XSCVQPSDZ_XSCVQPSWZ_XSCVQPUDZ_XSCVQPUWZ_XSCVSDQP_XSCVUDQP_XSRQPI_XSRQPIX_XSRQPXP_XSSUBQP_XSSUBQPO	= 169,
2832    BCDCTSQ_rec	= 170,
2833    XSMADDQP_XSMADDQPO_XSMSUBQP_XSMSUBQPO_XSMULQP_XSMULQPO_XSNMADDQP_XSNMADDQPO_XSNMSUBQP_XSNMSUBQPO	= 171,
2834    BCDCFSQ_rec	= 172,
2835    XSDIVQP_XSDIVQPO	= 173,
2836    XSSQRTQP_XSSQRTQPO	= 174,
2837    LXVL_LXVLL	= 175,
2838    LVEBX_LVEHX_LVEWX_LVX_LVXL	= 176,
2839    LXSIBZX_LXSIHZX_LXSDX_LXVB16X_LXVD2X_LXVWSX_LXSIWZX_LXV_LXVX_LXSD	= 177,
2840    DFLOADf64_XFLOADf64_LIWZX	= 178,
2841    DCBF_DCBFEP_DCBST_DCBSTEP_DCBT_DCBTEP_DCBZ_DCBZEP_DCBZL_DCBZLEP_DCBTST_DCBTSTEP	= 179,
2842    CP_COPY_CP_COPY8	= 180,
2843    ICBI_ICBIEP	= 181,
2844    ICBT_ICBTLS_LBZ_LBZ8_LBZCIX_LBZX_LBZX8_LBZXTLS_LBZXTLS__LBZXTLS_32_LDBRX_LDCIX_LHBRX_LHBRX8_LHZ_LHZ8_LHZCIX_LHZX_LHZX8_LHZXTLS_LHZXTLS__LHZXTLS_32_LWBRX_LWBRX8_LWZ_LWZ8_LWZCIX_LWZX_LWZX8_LWZXTLS_LWZXTLS__LWZXTLS_32_EnforceIEIO_LSWI	= 182,
2845    LBARX_LBARXL_LHARX_LHARXL_LWARX_LWARXL	= 183,
2846    LD_LDX_LDXTLS_LDXTLS__DARN	= 184,
2847    LDARX_LDARXL	= 185,
2848    CP_ABORT	= 186,
2849    ISYNC	= 187,
2850    MSGSYNC	= 188,
2851    TLBSYNC	= 189,
2852    SYNC	= 190,
2853    LMW	= 191,
2854    LFIWZX_LFDX_LFD	= 192,
2855    SLBIA	= 193,
2856    SLBIE	= 194,
2857    SLBMFEE	= 195,
2858    SLBMFEV	= 196,
2859    SLBMTE	= 197,
2860    TLBIEL	= 198,
2861    LHZU_LHZU8_LWZU_LWZU8	= 199,
2862    LHZUX_LHZUX8_LWZUX_LWZUX8	= 200,
2863    TEND	= 201,
2864    STBCX_STHCX_STWCX	= 202,
2865    STDCX	= 203,
2866    LHA_LHA8_LHAX_LHAX8_LWAX_LWAX_32	= 204,
2867    CP_PASTE8_rec_CP_PASTE_rec	= 205,
2868    LWA_LWA_32	= 206,
2869    TCHECK	= 207,
2870    LFIWAX	= 208,
2871    LXSIWAX	= 209,
2872    LIWAX	= 210,
2873    LFSX_LFS	= 211,
2874    LXSSP_LXSSPX	= 212,
2875    XFLOADf32_DFLOADf32	= 213,
2876    LHAU_LHAU8	= 214,
2877    LHAUX_LHAUX8_LWAUX	= 215,
2878    LXVH8X_LXVDSX_LXVW4X	= 216,
2879    STFD_STFDX_STFIWX_STFS_STFSX_STXSD_STXSDX_STXSIBX_STXSIBXv_STXSIHX_STXSIHXv_STXSIWX_STXSSP_STXSSPX	= 217,
2880    STW_STW8_STDBRX_STHBRX_STWBRX_STB_STB8_STH_STH8_STBX_STBX8_STBXTLS_STBXTLS__STBXTLS_32_STHX_STHX8_STHXTLS_STHXTLS__STHXTLS_32_STWX_STWX8_STWXTLS_STWXTLS__STWXTLS_32	= 218,
2881    DFSTOREf32_DFSTOREf64_XFSTOREf32_XFSTOREf64_STIWX	= 219,
2882    STD_STDX_STDXTLS_STDXTLS_	= 220,
2883    STBCIX_STDCIX_STHCIX_STWCIX_STSWI	= 221,
2884    SLBIEG	= 222,
2885    STMW	= 223,
2886    TLBIE	= 224,
2887    STVEBX_STVEHX_STVEWX_STVX_STVXL	= 225,
2888    STXV_STXVB16X_STXVD2X_STXVH8X_STXVW4X_STXVX	= 226,
2889    STXVL_STXVLL	= 227,
2890    MTCTR_MTCTR8_MTCTR8loop_MTCTRloop_MTLR_MTLR8	= 228,
2891    MFVRSAVE_MFVRSAVEv_MTVRSAVE_MTVRSAVEv	= 229,
2892    MFPMR	= 230,
2893    MTPMR	= 231,
2894    MFTB_MFTB8	= 232,
2895    MFCTR_MFCTR8_MFLR_MFLR8_MFSPR_MFSPR8_MFUDSCR	= 233,
2896    MFMSR	= 234,
2897    MTMSR	= 235,
2898    MTMSRD	= 236,
2899    MTUDSCR_MTSPR_MTSPR8	= 237,
2900    DIVW_DIVWO_DIVWU_DIVWUO_MODSW	= 238,
2901    DIVWE_DIVWEO_DIVWEU_DIVWEUO_MODSD_MODUD_MODUW	= 239,
2902    DIVD_DIVDO_DIVDU_DIVDUO	= 240,
2903    DIVDE_DIVDEO_DIVDEU_DIVDEUO	= 241,
2904    DIVWO_rec_DIVWUO_rec_DIVWU_rec_DIVW_rec	= 242,
2905    DIVD_rec_DIVDO_rec_DIVDU_rec_DIVDUO_rec	= 243,
2906    DIVWE_rec_DIVWEO_rec_DIVWEU_rec_DIVWEUO_rec	= 244,
2907    DIVDE_rec_DIVDEO_rec_DIVDEU_rec_DIVDEUO_rec	= 245,
2908    MTCRF_MTCRF8	= 246,
2909    ADDC8O_rec_ADDC8_rec_ADDCO_rec_ADDC_rec_SUBFC8O_rec_SUBFC8_rec_SUBFCO_rec_SUBFC_rec	= 247,
2910    FABSD_rec_FABSS_rec_FNABSD_rec_FNABSS_rec_FCPSGND_rec_FCPSGNS_rec_FNEGD_rec_FNEGS_rec_FMR_rec	= 248,
2911    MCRFS	= 249,
2912    MTFSF_MTFSF_rec_MTFSFI_MTFSFI_rec_MTFSFIb	= 250,
2913    MTFSFb	= 251,
2914    RLDCL_rec_RLDCR_rec	= 252,
2915    RLDICL_rec_RLDICR_rec_RLDICL_32_rec_RLDIMI_rec	= 253,
2916    RLWIMI8_rec_RLWIMI_rec	= 254,
2917    RLWINM8_rec_RLWINM_rec_RLWNM8_rec_RLWNM_rec_SLW8_rec_SLW_rec_SRW8_rec_SRW_rec	= 255,
2918    SRAWI_rec_SRAW_rec	= 256,
2919    MFFS_MFFSCE_MFFSL_MFFS_rec	= 257,
2920    MFCR_MFCR8	= 258,
2921    EXTSWSLI_32_64_rec_SRADI_rec_EXTSWSLI_rec_RLDIC_rec	= 259,
2922    SRAD_rec_SLD_rec_SRD_rec	= 260,
2923    FDIV	= 261,
2924    FDIV_rec	= 262,
2925    XSSQRTDP	= 263,
2926    FSQRT	= 264,
2927    XVSQRTDP	= 265,
2928    XVSQRTSP	= 266,
2929    FSQRT_rec	= 267,
2930    XSSQRTSP	= 268,
2931    FSQRTS	= 269,
2932    FSQRTS_rec	= 270,
2933    XSDIVDP	= 271,
2934    FDIVS	= 272,
2935    FDIVS_rec	= 273,
2936    XSDIVSP	= 274,
2937    XVDIVSP	= 275,
2938    XVDIVDP	= 276,
2939    LFSU	= 277,
2940    LFSUX	= 278,
2941    STFDU_STFDUX_STFSU_STFSUX	= 279,
2942    STBU_STBU8_STDU_STHU_STHU8_STWU_STWU8	= 280,
2943    STBUX_STBUX8_STDUX_STHUX_STHUX8_STWUX_STWUX8	= 281,
2944    LBZU_LBZU8	= 282,
2945    LBZUX_LBZUX8	= 283,
2946    LDU	= 284,
2947    LDUX	= 285,
2948    LFDU	= 286,
2949    LFDUX	= 287,
2950    VPMSUMB_VPMSUMD_VPMSUMH_VPMSUMW_VCIPHER_VCIPHERLAST_VNCIPHER_VNCIPHERLAST_VSBOX	= 288,
2951    BCCCTR_BCCCTR8_BCCCTRL_BCCCTRL8_BCCL_BCCLA_BCCLR_BCCLRL_BCCTR_BCCTR8_BCCTR8n_BCCTRL_BCCTRL8_BCCTRL8n_BCCTRLn_BCCTRn_BDNZ_BDNZ8_BDNZA_BDNZAm_BDNZAp_BDNZm_BDNZp_BDZ_BDZ8_BDZA_BDZAm_BDZAp_BDZm_BDZp_BDNZL_BDNZLA_BDNZLAm_BDNZLAp_BDNZLR_BDNZLR8_BDNZLRL_BDNZLRLm_BDNZLRLp_BDNZLRm_BDNZLRp_BDNZLm_BDNZLp_BDZL_BDZLA_BDZLAm_BDZLAp_BDZLR_BDZLR8_BDZLRL_BDZLRLm_BDZLRLp_BDZLRm_BDZLRp_BDZLm_BDZLp_BL_BL_NOP_BL_NOP_RM_BL_RM_BL_TLS_BL8_BL8_NOP_BL8_NOP_RM_BL8_NOP_TLS_BL8_RM_BL8_TLS_BL8_TLS__BLA_BLA8_BLA8_NOP_BLA8_NOP_RM_BLA8_RM_BLA_RM_BLR_BLR8_BLRL_TAILB_TAILB8_TAILBA_TAILBA8_TAILBCTR_TAILBCTR8_gBC_gBCA_gBCAat_gBCCTR_gBCCTRL_gBCL_gBCLA_gBCLAat_gBCLR_gBCLRL_gBCLat_gBCat_BCLR_BCLRL_BCLRLn_BCLRn_BCTR_BCTR8_BCTRL_BCTRL8_BCTRL8_RM_BCTRL_RM_B_BA_BC_BCC_BCCA_BCL_BCLalways_BCLn_BCTRL8_LDinto_toc_BCTRL_LWZinto_toc_BCTRL8_LDinto_toc_RM_BCTRL_LWZinto_toc_RM_BCn_CTRL_DEP	= 289,
2952    ADDPCIS	= 290,
2953    LDAT_LWAT	= 291,
2954    STDAT_STWAT	= 292,
2955    BRINC	= 293,
2956    EVABS_EVEQV_EVNAND_EVNEG_EVADDIW_EVADDW_EVAND_EVANDC_EVCMPEQ_EVCMPGTS_EVCMPGTU_EVCMPLTS_EVCMPLTU_EVCNTLSW_EVCNTLZW_EVEXTSB_EVEXTSH_EVMERGEHI_EVMERGEHILO_EVMERGELO_EVMERGELOHI_EVNOR_EVOR_EVORC_EVXOR_EVRLW_EVRLWI_EVRNDW_EVSLW_EVSLWI_EVSPLATFI_EVSPLATI_EVSRWIS_EVSRWIU_EVSRWS_EVSRWU_EVSUBFW_EVSUBIFW	= 294,
2957    EVMRA_EVADDSMIAAW_EVADDSSIAAW_EVADDUMIAAW_EVADDUSIAAW_EVDIVWS_EVDIVWU_EVMHEGSMFAA_EVMHEGSMFAN_EVMHEGSMIAA_EVMHEGSMIAN_EVMHEGUMIAA_EVMHEGUMIAN_EVMHESMF_EVMHESMFA_EVMHESMFAAW_EVMHESMFANW_EVMHESMI_EVMHESMIA_EVMHESMIAAW_EVMHESMIANW_EVMHESSF_EVMHESSFA_EVMHESSFAAW_EVMHESSFANW_EVMHESSIAAW_EVMHESSIANW_EVMHEUMI_EVMHEUMIA_EVMHEUMIAAW_EVMHEUMIANW_EVMHEUSIAAW_EVMHEUSIANW_EVMHOGSMFAA_EVMHOGSMFAN_EVMHOGSMIAA_EVMHOGSMIAN_EVMHOGUMIAA_EVMHOGUMIAN_EVMHOSMF_EVMHOSMFA_EVMHOSMFAAW_EVMHOSMFANW_EVMHOSMI_EVMHOSMIA_EVMHOSMIAAW_EVMHOSMIANW_EVMHOSSF_EVMHOSSFA_EVMHOSSFAAW_EVMHOSSFANW_EVMHOSSIAAW_EVMHOSSIANW_EVMHOUMI_EVMHOUMIA_EVMHOUMIAAW_EVMHOUMIANW_EVMHOUSIAAW_EVMHOUSIANW_EVMWHSMF_EVMWHSMFA_EVMWHSMI_EVMWHSMIA_EVMWHSSF_EVMWHSSFA_EVMWHUMI_EVMWHUMIA_EVMWLSMIAAW_EVMWLSMIANW_EVMWLSSIAAW_EVMWLSSIANW_EVMWLUMI_EVMWLUMIA_EVMWLUMIAAW_EVMWLUMIANW_EVMWLUSIAAW_EVMWLUSIANW_EVMWSMF_EVMWSMFA_EVMWSMFAA_EVMWSMFAN_EVMWSMI_EVMWSMIA_EVMWSMIAA_EVMWSMIAN_EVMWSSF_EVMWSSFA_EVMWSSFAA_EVMWSSFAN_EVMWUMI_EVMWUMIA_EVMWUMIAA_EVMWUMIAN_EVSUBFSMIAAW_EVSUBFSSIAAW_EVSUBFUMIAAW_EVSUBFUSIAAW	= 295,
2958    EVLDD_EVLDDX_EVLDH_EVLDHX_EVLDW_EVLDWX_EVLHHESPLAT_EVLHHESPLATX_EVLHHOSSPLAT_EVLHHOSSPLATX_EVLHHOUSPLAT_EVLHHOUSPLATX_EVLWHE_EVLWHEX_EVLWHOS_EVLWHOSX_EVLWHOU_EVLWHOUX_EVLWHSPLAT_EVLWHSPLATX_EVLWWSPLAT_EVLWWSPLATX	= 296,
2959    EVSTDD_EVSTDDX_EVSTDH_EVSTDHX_EVSTDW_EVSTDWX_EVSTWHE_EVSTWHEX_EVSTWHO_EVSTWHOX_EVSTWWE_EVSTWWEX_EVSTWWO_EVSTWWOX	= 297,
2960    HRFID_ATTN_CLRBHRB_MFBHRBE_NAP_RFCI_RFDI_RFMCI_SC	= 298,
2961    RFI	= 299,
2962    RFID	= 300,
2963    DSS_DSSALL_DST_DST64_DSTST_DSTST64_DSTSTT_DSTSTT64_DSTT_DSTT64_ICBLQ_LBEPX_LHEPX_LWEPX_TLBIVAX_TLBLD_TLBLI_TLBRE_TLBRE2_TLBSX_TLBSX2_TLBSX2D_TLBWE_TLBWE2_MBAR_TRAP_DCCCI_ICCCI	= 301,
2964    ICBLC_STBEPX_STHEPX_STWEPX	= 302,
2965    LFDEPX	= 303,
2966    STFDEPX	= 304,
2967    MFSR_MFSRIN	= 305,
2968    MTSR_MTSRIN	= 306,
2969    MFDCR	= 307,
2970    MTDCR	= 308,
2971    NOP_GT_PWR6_NOP_GT_PWR7	= 309,
2972    TLBIA	= 310,
2973    WRTEE_WRTEEI	= 311,
2974    HASHCHK_HASHCHK8_HASHCHKP_HASHCHKP8_HASHST_HASHST8_HASHSTP_HASHSTP8_ADDEX_ADDEX8	= 312,
2975    MSYNC	= 313,
2976    SLBSYNC	= 314,
2977    SLBFEE_rec	= 315,
2978    STOP	= 316,
2979    DCBA_DCBI	= 317,
2980    FCFID_FCFIDS_FCFIDU_FCFIDUS_FCTID_FCTIDU_FCTIDUZ_FCTIDZ_FCTIW_FCTIWU_FCTIWUZ_FCTIWZ_FRE_FRES_FRIMD_FRIMS_FRIND_FRINS_FRIPD_FRIPS_FRIZD_FRIZS_FRSP_FRSQRTE_FRSQRTES	= 318,
2981    VCFSX_VCFSX_0_VCFUX_VCFUX_0_VCTSXS_VCTSXS_0_VCTUXS_VCTUXS_0_VLOGEFP_VREFP_VRFIM_VRFIN_VRFIP_VRFIZ_VRSQRTEFP_XVCVDPSP_XVCVDPSXDS_XVCVDPSXWS_XVCVDPUXDS_XVCVDPUXWS_XVCVSPDP_XVCVSPHP_XVCVSPSXDS_XVCVSPSXWS_XVCVSPUXDS_XVCVSPUXWS_XVCVSXDDP_XVCVSXDSP_XVCVSXWDP_XVCVSXWSP_XVCVUXDDP_XVCVUXDSP_XVCVUXWDP_XVCVUXWSP_XVRDPI_XVRDPIC_XVRDPIM_XVRDPIP_XVRDPIZ_XVREDP_XVRESP_XVRSPI_XVRSPIC_XVRSPIM_XVRSPIP_XVRSPIZ_XVRSQRTEDP_XVRSQRTESP	= 319,
2982    XSCVDPHP_XSCVDPSP_XSCVDPSPN_XSCVDPSXDS_XSCVDPSXDSs_XSCVDPSXWS_XSCVDPSXWSs_XSCVDPUXDS_XSCVDPUXDSs_XSCVDPUXWS_XSCVDPUXWSs_XSCVSPDP_XSCVSXDDP_XSCVSXDSP_XSCVUXDDP_XSCVUXDSP_XSRDPI_XSRDPIC_XSRDPIM_XSRDPIP_XSRDPIZ_XSREDP_XSRESP_XSRSP_XSRSQRTEDP_XSRSQRTESP	= 320,
2983    XVCVSPBF16	= 321,
2984    FADDS_FMULS_FSUBS	= 322,
2985    FMUL	= 323,
2986    VADDFP_XVADDDP_XVADDSP_XVMULDP_XVMULSP_XVSUBDP_XVSUBSP	= 324,
2987    VSUBFP	= 325,
2988    XSADDDP_XSADDSP_XSSUBDP_XSSUBSP	= 326,
2989    XSMULDP_XSMULSP	= 327,
2990    VMADDFP_VNMSUBFP_XVMADDADP_XVMADDASP_XVMADDMDP_XVMADDMSP_XVMSUBADP_XVMSUBASP_XVMSUBMDP_XVMSUBMSP_XVNMADDADP_XVNMADDASP_XVNMADDMDP_XVNMADDMSP_XVNMSUBADP_XVNMSUBASP_XVNMSUBMDP_XVNMSUBMSP	= 328,
2991    VEXPTEFP	= 329,
2992    FADDS_rec_FMULS_rec_FSUBS_rec	= 330,
2993    FMUL_rec	= 331,
2994    FCFID_rec_FCFIDS_rec_FCFIDU_rec_FCFIDUS_rec_FCTID_rec_FCTIDU_rec_FCTIDUZ_rec_FCTIDZ_rec_FCTIW_rec_FCTIWU_rec_FCTIWUZ_rec_FCTIWZ_rec_FRE_rec_FRES_rec_FRIMD_rec_FRIMS_rec_FRIND_rec_FRINS_rec_FRIPD_rec_FRIPS_rec_FRIZD_rec_FRIZS_rec_FRSP_rec_FRSQRTE_rec_FRSQRTES_rec	= 332,
2995    BCLR_BCLRn_BDNZLR_BDNZLR8_BDNZLRm_BDNZLRp_BDZLR_BDZLR8_BDZLRm_BDZLRp_gBCLR_BCLRL_BCLRLn_BDNZLRL_BDNZLRLm_BDNZLRLp_BDZLRL_BDZLRLm_BDZLRLp_gBCLRL_BL_BL8_BL8_NOP_BL8_NOP_RM_BL8_NOP_TLS_BL8_RM_BL8_TLS_BL8_TLS__BLR_BLR8_BLRL_BL_NOP_BL_NOP_RM_BL_RM_BL_TLS	= 333,
2996    BL8_NOTOC_BL8_NOTOC_RM_BL8_NOTOC_TLS	= 334,
2997    B_BCC_BCCA_BCCCTR_BCCCTR8_BCCCTRL_BCCCTRL8_BCCL_BCCLA_BCCLR_BCCLRL_CTRL_DEP_TAILB_TAILB8_BA_TAILBA_TAILBA8_BC_BCTR_BCTR8_BCTRL_BCTRL8_BCTRL8_LDinto_toc_BCTRL8_LDinto_toc_RM_BCTRL8_RM_BCTRL_LWZinto_toc_BCTRL_LWZinto_toc_RM_BCTRL_RM_BCn_BDNZ_BDNZ8_BDNZm_BDNZp_BDZ_BDZ8_BDZm_BDZp_TAILBCTR_TAILBCTR8_gBC_gBCat_BCL_BCLalways_BCLn_BDNZL_BDNZLm_BDNZLp_BDZL_BDZLm_BDZLp_gBCL_gBCLat_BLA_BLA8_BLA8_NOP_BLA8_NOP_RM_BLA8_RM_BLA_RM	= 335,
2998    BCCTR_BCCTR8_BCCTR8n_BCCTRn_gBCCTR_BCCTRL_BCCTRL8_BCCTRL8n_BCCTRLn_gBCCTRL	= 336,
2999    VSBOX	= 337,
3000    CFUGED_CNTLZDM_CNTTZDM_PDEPD_PEXTD	= 338,
3001    VCFUGED_VCLZDM_VCTZDM_VGNB_VPDEPD_VPEXTD	= 339,
3002    XSCVDPQP_XSCVQPDP_XSCVQPDPO_XSCVQPSDZ_XSCVQPSWZ_XSCVQPUDZ_XSCVQPUWZ_XSCVSDQP_XSCVUDQP	= 340,
3003    XSCVQPSQZ_XSCVQPUQZ_XSCVSQQP_XSCVUQQP	= 341,
3004    XSADDQP_XSADDQPO_XSSUBQP_XSSUBQPO	= 342,
3005    HASHST_HASHST8_HASHSTP_HASHSTP8	= 343,
3006    XSMULQP_XSMULQPO	= 344,
3007    VDIVESQ_VDIVEUQ_VDIVSQ_VDIVUQ	= 345,
3008    VMODSQ_VMODUQ	= 346,
3009    DIVWE_DIVWEO_DIVWEU_DIVWEUO	= 347,
3010    VDIVSD_VDIVUD	= 348,
3011    VMODSD_VMODUD	= 349,
3012    VDIVSW_VDIVUW	= 350,
3013    VMODSW_VMODUW	= 351,
3014    VDIVESD_VDIVEUD	= 352,
3015    VDIVESW_VDIVEUW	= 353,
3016    BCDCTN_rec_VMUL10CUQ_VMUL10UQ_XSXSIGQP	= 354,
3017    BCDCFN_rec_BCDCFZ_rec_BCDCPSGN_rec_BCDCTZ_rec_BCDSETSGN_rec_BCDUS_rec_BCDUTRUNC_rec_VADDCUQ_VMUL10ECUQ_VMUL10EUQ_VSUBCUQ_XSTSTDCQP	= 355,
3018    VADDUQM_VSUBUQM	= 356,
3019    XSCMPEQQP_XSCMPGEQP_XSCMPGTQP_XSMAXCQP_XSMINCQP	= 357,
3020    XXGENPCVBM	= 358,
3021    BCDADD_rec_BCDS_rec_BCDSUB_rec_BCDTRUNC_rec_VADDECUQ_VADDEUQM_VSUBECUQ_VSUBEUQM	= 359,
3022    TRAP	= 360,
3023    TW	= 361,
3024    CNTLZD_CNTLZD_rec_CNTLZW_CNTLZW8_CNTLZW8_rec_CNTLZW_rec_CNTTZD_CNTTZD_rec_CNTTZW_CNTTZW8_CNTTZW8_rec_CNTTZW_rec_POPCNTD_POPCNTW	= 362,
3025    FTSQRT	= 363,
3026    MTVSRBM_MTVSRBMI_MTVSRDM_MTVSRHM_MTVSRQM_MTVSRWM_VEXPANDBM_VEXPANDDM_VEXPANDHM_VEXPANDQM_VEXPANDWM_VEXTRACTBM_VEXTRACTDM_VEXTRACTHM_VEXTRACTQM_VEXTRACTWM_XVTLSBB	= 364,
3027    POPCNTB_POPCNTB8	= 365,
3028    VCLZB_VCLZD_VCLZH_VCLZW_VCTZB_VCTZD_VCTZH_VCTZW_VPOPCNTD_VPOPCNTW_VPRTYBD_VPRTYBW	= 366,
3029    VPOPCNTB_VPOPCNTH	= 367,
3030    XSCVSPDPN	= 368,
3031    XSTSQRTDP	= 369,
3032    XVCVHPSP	= 370,
3033    XVTSQRTDP_XVTSQRTSP	= 371,
3034    CMPEQB	= 372,
3035    EXTSWSLI_32_64_rec_EXTSWSLI_rec	= 373,
3036    SLD_rec_SRD_rec	= 374,
3037    SLW8_rec_SLW_rec_SRW8_rec_SRW_rec	= 375,
3038    VADDCUW_VADDSBS_VADDSHS_VADDSWS_VADDUBS_VADDUHS_VADDUWS_VAVGSB_VAVGSH_VAVGSW_VAVGUB_VAVGUH_VAVGUW_VMAXFP_VMINFP_VSUBCUW_VSUBSBS_VSUBSHS_VSUBSWS_VSUBUBS_VSUBUHS_VSUBUWS_XVMAXDP_XVMAXSP_XVMINDP_XVMINSP_XVTSTDCDP_XVTSTDCSP	= 376,
3039    VCMPBFP_VCMPBFP_rec_VCMPEQFP_VCMPEQFP_rec_VCMPEQUB_rec_VCMPEQUD_rec_VCMPEQUH_rec_VCMPEQUW_rec_VCMPGEFP_VCMPGEFP_rec_VCMPGTFP_VCMPGTFP_rec_VCMPGTSB_rec_VCMPGTSD_rec_VCMPGTSH_rec_VCMPGTSW_rec_VCMPGTUB_rec_VCMPGTUD_rec_VCMPGTUH_rec_VCMPGTUW_rec_VCMPNEB_rec_VCMPNEH_rec_VCMPNEW_rec_VCMPNEZB_rec_VCMPNEZH_rec_VCMPNEZW_rec_XVCMPEQDP_XVCMPEQDP_rec_XVCMPEQSP_XVCMPEQSP_rec_XVCMPGEDP_XVCMPGEDP_rec_XVCMPGESP_XVCMPGESP_rec_XVCMPGTDP_XVCMPGTDP_rec_XVCMPGTSP_XVCMPGTSP_rec	= 377,
3040    VCMPEQUQ_VCMPEQUQ_rec_VCMPGTSQ_VCMPGTSQ_rec_VCMPGTUQ_VCMPGTUQ_rec	= 378,
3041    VCMPSQ_VCMPUQ_VCNTMBB_VCNTMBD_VCNTMBH_VCNTMBW	= 379,
3042    XSMAXCDP_XSMAXDP_XSMAXJDP_XSMINCDP_XSMINDP_XSMINJDP	= 380,
3043    RLDIC_rec	= 381,
3044    RLDICL_32_rec_RLDICL_rec_RLDICR_rec	= 382,
3045    VSHASIGMAD_VSHASIGMAW	= 383,
3046    VRLQ_VRLQNM_VSLQ_VSRAQ_VSRQ	= 384,
3047    VRLQMI	= 385,
3048    CR6SET_CREQV_CRSET	= 386,
3049    DSS_DSSALL	= 387,
3050    MFCTR_MFCTR8_MFLR_MFLR8	= 388,
3051    NOP_ORI_ORI8	= 389,
3052    VXOR_V_SET0_V_SET0B_V_SET0H	= 390,
3053    XXLEQV_XXLEQVOnes_XXLXOR_XXLXORdpz_XXLXORspz_XXLXORz	= 391,
3054    ADDI_ADDI8_LI_LI8_ADDIS_ADDIS8_LIS_LIS8_EXTSB_EXTSB8_EXTSB8_32_64_EXTSB8_rec_EXTSB_rec_EXTSH_EXTSH8_EXTSH8_32_64_EXTSH8_rec_EXTSH_rec_EXTSW_EXTSW_32_EXTSW_32_64_EXTSW_32_64_rec_EXTSW_rec_NEG_NEG8_NEG8_rec_NEG_rec_NEG8O_NEGO	= 392,
3055    ADDIdtprelL32_ADDItlsldLADDR32_ADDISdtprelHA32	= 393,
3056    ADDItocL_ADDIStocHA_ADDIStocHA8	= 394,
3057    ADDME_ADDME8_ADDME8O_ADDMEO_ADDZE_ADDZE8_ADDZE8O_ADDZEO_SUBFME_SUBFME8_SUBFME8O_SUBFMEO_SUBFZE_SUBFZE8_SUBFZE8O_SUBFZEO	= 395,
3058    FABSD_FABSS_FMR_FNABSD_FNABSS_FNEGD_FNEGS	= 396,
3059    SETB_SETB8	= 397,
3060    SETBC_SETBC8_SETBCR_SETBCR8_SETNBC_SETNBC8_SETNBCR_SETNBCR8	= 398,
3061    VEXTSB2D_VEXTSB2Ds_VEXTSB2W_VEXTSB2Ws_VEXTSH2D_VEXTSH2Ds_VEXTSH2W_VEXTSH2Ws_VEXTSW2D_VEXTSW2Ds_VNEGD_VNEGW	= 399,
3062    VEXTSD2Q	= 400,
3063    XSABSDP_XSNABSDP_XSNABSDPs_XSNEGDP_XSXEXPDP	= 401,
3064    XSABSQP_XSNABSQP_XSNEGQP_XSXEXPQP_XVABSDP_XVABSSP_XVNABSDP_XVNABSSP_XVNEGDP_XVNEGSP_XVXEXPDP_XVXEXPSP	= 402,
3065    XVXSIGDP_XVXSIGSP	= 403,
3066    ADD4_ADD4TLS_ADD8_ADD8TLS_ADD8TLS__ADD4_rec_ADD8_rec_ADD4O_ADD8O_AND_AND8_AND8_rec_AND_rec_ANDC_ANDC8_ANDC8_rec_ANDC_rec_EQV_EQV8_EQV8_rec_EQV_rec_NAND_NAND8_NAND8_rec_NAND_rec_NOR_NOR8_NOR8_rec_NOR_rec_OR_OR8_OR8_rec_OR_rec_ORC_ORC8_ORC8_rec_ORC_rec_ORIS_ORIS8_XOR_XOR8_XOR8_rec_XOR_rec_XORI_XORI8_XORIS_XORIS8	= 404,
3067    ADDE_ADDE8_ADDE8O_ADDEO_ADDIC_ADDIC8_ANDI8_rec_ANDI_rec_ANDIS8_rec_ANDIS_rec_SUBF_SUBF8_SUBF8_rec_SUBF_rec_SUBFE_SUBFE8_SUBFE8O_SUBFEO_SUBFIC_SUBFIC8_SUBF8O_SUBFO	= 405,
3068    CMPB_CMPB8	= 406,
3069    CRAND_CRANDC_CRNAND_CRNOR_CROR_CRORC_CR6UNSET_CRUNSET_CRXOR	= 407,
3070    EXTSWSLI_EXTSWSLI_32_64_SRADI_SRADI_32	= 408,
3071    SLW_SLW8_SRW_SRW8	= 409,
3072    VADDUBM_VADDUDM_VADDUHM_VADDUWM_VEQV_VNAND_VORC_VSLD_VSRAD_VSRD_VSUBUBM_VSUBUDM_VSUBUHM_VSUBUWM_XXLAND_XXLANDC_XXLNAND_XXLNOR_XXLOR_XXLORf_XXLORC	= 410,
3073    VAND_VANDC_VMRGEW_VMRGOW_VNOR_VOR_VRLB_VRLD_VRLDNM_VRLH_VRLW_VRLWNM_VSLB_VSLH_VSLW_VSRAB_VSRAH_VSRAW_VSRB_VSRH_VSRW_XSCPSGNQP_XSIEXPQP_XVCPSGNDP_XVCPSGNSP_XVIEXPDP_XVIEXPSP	= 411,
3074    VMAXSB_VMAXSD_VMAXSH_VMAXSW_VMAXUB_VMAXUD_VMAXUH_VMAXUW_VMINSB_VMINSD_VMINSH_VMINSW_VMINUB_VMINUD_VMINUH_VMINUW	= 412,
3075    ADDEX_ADDEX8	= 413,
3076    DST_DST64_DSTT_DSTT64_DSTST_DSTST64_DSTSTT_DSTSTT64	= 414,
3077    RLDICL_RLDICL_32_RLDICL_32_64_RLDICR_RLDICR_32	= 415,
3078    MFFS_MFFS_rec_MFFSL	= 416,
3079    TRECHKPT	= 417,
3080    ADDME8_rec_ADDME_rec_ADDME8O_rec_ADDMEO_rec_ADDZE8_rec_ADDZE_rec_ADDZE8O_rec_ADDZEO_rec_SUBFME8_rec_SUBFME_rec_SUBFME8O_rec_SUBFMEO_rec_SUBFZE8_rec_SUBFZE_rec_SUBFZE8O_rec_SUBFZEO_rec	= 418,
3081    MTFSB0	= 419,
3082    NEG8O_rec_NEGO_rec	= 420,
3083    ADDE8_rec_ADDE_rec_ADDE8O_rec_ADDEO_rec_ADDIC_rec_SUBFE8_rec_SUBFE_rec_SUBFE8O_rec_SUBFEO_rec_SUBF8O_rec_SUBFO_rec	= 421,
3084    HRFID	= 422,
3085    FABSD_rec_FABSS_rec_FMR_rec_FNABSD_rec_FNABSS_rec_FNEGD_rec_FNEGS_rec	= 423,
3086    SC	= 424,
3087    ADDC_ADDC8_ADDC8O_ADDCO_SUBFC_SUBFC8_SUBFC8O_SUBFCO	= 425,
3088    ADDC8_rec_ADDC_rec_SUBFC8_rec_SUBFC_rec	= 426,
3089    MTFSF_MTFSFI_MTFSFIb	= 427,
3090    MTFSFI_rec	= 428,
3091    VSTRIBL_rec_VSTRIBR_rec_VSTRIHL_rec_VSTRIHR_rec	= 429,
3092    LBZ_LBZ8_LDBRX_LHBRX_LHBRX8_LHZ_LHZ8_LWBRX_LWBRX8_LWZ_LWZ8	= 430,
3093    LD	= 431,
3094    LDtoc_LDtocBA_LDtocCPT_LDtocJTI_LDtocL_SPILLTOVSR_LD_LWZtoc_LWZtocL	= 432,
3095    LXVRBX_LXVRDX_LXVRHX_LXVRWX	= 433,
3096    DCBT_DCBTST	= 434,
3097    ICBT_LBZX_LBZX8_LBZXTLS_LBZXTLS__LBZXTLS_32_LHZX_LHZX8_LHZXTLS_LHZXTLS__LHZXTLS_32_LWZX_LWZX8_LWZXTLS_LWZXTLS__LWZXTLS_32	= 435,
3098    LDX_LDXTLS_LDXTLS_	= 436,
3099    SPILLTOVSR_LDX	= 437,
3100    LBZCIX_LDCIX_LHZCIX_LWZCIX	= 438,
3101    MTSR	= 439,
3102    MTVRSAVE_MTVRSAVEv	= 440,
3103    LSWI	= 441,
3104    PLBZ_PLBZ8_PLBZ8pc_PLBZpc_PLD_PLDpc_PLFD_PLFDpc_PLFS_PLFSpc_PLHA_PLHA8_PLHA8pc_PLHApc_PLHZ_PLHZ8_PLHZ8pc_PLHZpc_PLWA_PLWA8_PLWA8pc_PLWApc_PLWZ_PLWZ8_PLWZ8pc_PLWZpc_PLXSD_PLXSDpc_PLXSSP_PLXSSPpc_PLXV_PLXVpc_PLXVP_PLXVPpc	= 442,
3105    LXVP_LXVPX	= 443,
3106    MFSR	= 444,
3107    MFTB8	= 445,
3108    XXSETACCZ	= 446,
3109    XVBF16GER2_XVF16GER2_XVF32GER_XVF64GER_XVI16GER2_XVI16GER2S_XVI4GER8_XVI8GER4	= 447,
3110    XVBF16GER2NN_XVBF16GER2NP_XVBF16GER2PN_XVBF16GER2PP_XVF16GER2NN_XVF16GER2NP_XVF16GER2PN_XVF16GER2PP_XVF32GERNN_XVF32GERNP_XVF32GERPN_XVF32GERPP_XVF64GERNN_XVF64GERNP_XVF64GERPN_XVF64GERPP_XVI16GER2PP_XVI16GER2SPP_XVI4GER8PP_XVI8GER4PP	= 448,
3111    XVI8GER4SPP	= 449,
3112    PMXVF32GER_PMXVF64GER	= 450,
3113    PMXVBF16GER2_PMXVF16GER2_PMXVF32GERNN_PMXVF32GERNP_PMXVF32GERPN_PMXVF32GERPP_PMXVF64GERNN_PMXVF64GERNP_PMXVF64GERPN_PMXVF64GERPP_PMXVI16GER2_PMXVI16GER2S_PMXVI4GER8_PMXVI8GER4	= 451,
3114    PMXVBF16GER2NN_PMXVBF16GER2NP_PMXVBF16GER2PN_PMXVBF16GER2PP_PMXVF16GER2NN_PMXVF16GER2NP_PMXVF16GER2PN_PMXVF16GER2PP_PMXVI16GER2PP_PMXVI16GER2SPP_PMXVI4GER8PP_PMXVI8GER4PP	= 452,
3115    PMXVI8GER4SPP	= 453,
3116    XXMTACC	= 454,
3117    XXMFACC	= 455,
3118    MULLD_MULLDO	= 456,
3119    VMULHSD_VMULHUD_VMULLD	= 457,
3120    VSPLTISW	= 458,
3121    V_SETALLONES_V_SETALLONESB_V_SETALLONESH	= 459,
3122    BRD_BRH_BRH8_BRW_BRW8	= 460,
3123    LXVKQ_VSTRIBL_VSTRIBR_VSTRIHL_VSTRIHR	= 461,
3124    MFVSRLD_MTVSRWS_VCLZLSBB_VCTZLSBB_VPRTYBQ	= 462,
3125    VGBBD_VUPKHPX_VUPKHSB_VUPKHSH_VUPKHSW_VUPKLPX_VUPKLSB_VUPKLSH_VUPKLSW_XXBRD_XXBRH_XXBRQ_XXBRW	= 463,
3126    VSPLTISB_VSPLTISH_XXSPLTIB	= 464,
3127    XVCVBF16SPN	= 465,
3128    VBPERMQ_VMRGHB_VMRGHH_VMRGHW_VMRGLB_VMRGLH_VMRGLW_VPKPX_VPKSDSS_VPKSDUS_VPKSHSS_VPKSHUS_VPKSWSS_VPKSWUS_VPKUDUM_VPKUDUS_VPKUHUM_VPKUHUS_VPKUWUM_VPKUWUS_VSL_VSLO_VSLV_VSR_VSRO_VSRV_XXEXTRACTUW	= 466,
3129    VCLRLB_VCLRRB_XXGENPCVDM_XXGENPCVHM_XXGENPCVWM	= 467,
3130    VEXTRACTD_VEXTRACTUB_VEXTRACTUH_VEXTRACTUW_VEXTUBLX_VEXTUBRX_VEXTUHLX_VEXTUHRX_VEXTUWLX_VEXTUWRX_VINSERTD_VINSERTW	= 468,
3131    VSPLTB_VSPLTBs_VSPLTH_VSPLTHs_VSPLTW_XXMRGHW_XXMRGLW_XXPERMDI_XXPERMDIs_XXSLDWI_XXSLDWIs_XXSPLTW_XXSPLTWs	= 469,
3132    VEXTDDVLX_VEXTDDVRX_VEXTDUBVLX_VEXTDUBVRX_VEXTDUHVLX_VEXTDUHVRX_VEXTDUWVLX_VEXTDUWVRX_VINSBLX_VINSBRX_VINSBVLX_VINSBVRX_VINSD_VINSDLX_VINSDRX_VINSHLX_VINSHRX_VINSHVLX_VINSHVRX_VINSW_VINSWLX_VINSWRX_VINSWVLX_VINSWVRX_VSLDBI_VSRDBI	= 470,
3133    VSUMSWS	= 471,
3134    XXSPLTIDP_XXSPLTIW	= 472,
3135    XXBLENDVB_XXBLENDVD_XXBLENDVH_XXBLENDVW_XXSPLTI32DX	= 473,
3136    XXEVAL	= 474,
3137    XXPERMX	= 475,
3138    DCBST_DCBZ	= 476,
3139    ICBI	= 477,
3140    DCBF	= 478,
3141    PSTXVP_PSTXVPpc	= 479,
3142    STB_STB8_STDBRX_STH_STH8_STHBRX_STW_STW8_STWBRX	= 480,
3143    SPILLTOVSR_ST	= 481,
3144    STD	= 482,
3145    DFSTOREf32_DFSTOREf64_STIWX	= 483,
3146    STXVRBX_STXVRDX_STXVRHX_STXVRWX	= 484,
3147    SPILLTOVSR_STX	= 485,
3148    EnforceIEIO	= 486,
3149    STBCIX_STDCIX_STHCIX_STWCIX	= 487,
3150    PSTB_PSTB8_PSTB8pc_PSTBpc_PSTD_PSTDpc_PSTFD_PSTFDpc_PSTFS_PSTFSpc_PSTH_PSTH8_PSTH8pc_PSTHpc_PSTW_PSTW8_PSTW8pc_PSTWpc_PSTXSD_PSTXSDpc_PSTXSSP_PSTXSSPpc_PSTXV_PSTXVpc	= 488,
3151    STXVP_STXVPX	= 489,
3152    ATTN_NAP	= 490,
3153    DCBZL	= 491,
3154    DCCCI_ICBLQ_ICCCI_TLBLD_TLBLI_TLBRE2_TLBSX2_TLBSX2D_TLBWE2	= 492,
3155    ICBLC	= 493,
3156    CLRBHRB	= 494,
3157    MFBHRBE	= 495,
3158    PADDI_PADDI8_PADDI8pc_PADDIpc	= 496,
3159    PLI_PLI8	= 497,
3160    VMULESB_VMULESH_VMULESW_VMULEUB_VMULEUH_VMULEUW_VMULOSB_VMULOSH_VMULOSW_VMULOUB_VMULOUH_VMULOUW_VSUM2SWS_VSUM4SBS_VSUM4SHS_VSUM4UBS	= 498,
3161    VMULESD_VMULEUD_VMULHSW_VMULHUW_VMULOSD_VMULOUD	= 499,
3162    VMSUMCUD	= 500,
3163    SCHED_LIST_END = 501
3164  };
3165} // end namespace Sched
3166} // end namespace PPC
3167} // end namespace llvm
3168#endif // GET_INSTRINFO_SCHED_ENUM
3169
3170#ifdef GET_INSTRINFO_MC_DESC
3171#undef GET_INSTRINFO_MC_DESC
3172namespace llvm {
3173
3174static const MCPhysReg ImplicitList1[] = { PPC::CR0 };
3175static const MCPhysReg ImplicitList2[] = { PPC::CR7 };
3176static const MCPhysReg ImplicitList3[] = { PPC::XER };
3177static const MCPhysReg ImplicitList4[] = { PPC::XER, PPC::CR0 };
3178static const MCPhysReg ImplicitList5[] = { PPC::CARRY };
3179static const MCPhysReg ImplicitList6[] = { PPC::CARRY, PPC::XER };
3180static const MCPhysReg ImplicitList7[] = { PPC::CARRY, PPC::XER, PPC::CR0 };
3181static const MCPhysReg ImplicitList8[] = { PPC::CARRY, PPC::CR0 };
3182static const MCPhysReg ImplicitList9[] = { PPC::CARRY, PPC::CARRY };
3183static const MCPhysReg ImplicitList10[] = { PPC::CARRY, PPC::CARRY, PPC::XER };
3184static const MCPhysReg ImplicitList11[] = { PPC::CARRY, PPC::CARRY, PPC::XER, PPC::CR0 };
3185static const MCPhysReg ImplicitList12[] = { PPC::CARRY, PPC::CARRY, PPC::CR0 };
3186static const MCPhysReg ImplicitList13[] = { PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::LR8, PPC::CTR8, PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7 };
3187static const MCPhysReg ImplicitList14[] = { PPC::R0, PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::LR, PPC::CTR, PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7 };
3188static const MCPhysReg ImplicitList15[] = { PPC::R1, PPC::R1 };
3189static const MCPhysReg ImplicitList16[] = { PPC::CTR };
3190static const MCPhysReg ImplicitList17[] = { PPC::CTR8 };
3191static const MCPhysReg ImplicitList18[] = { PPC::CTR, PPC::RM, PPC::LR };
3192static const MCPhysReg ImplicitList19[] = { PPC::CTR8, PPC::RM, PPC::LR8 };
3193static const MCPhysReg ImplicitList20[] = { PPC::RM, PPC::LR };
3194static const MCPhysReg ImplicitList21[] = { PPC::LR, PPC::RM };
3195static const MCPhysReg ImplicitList22[] = { PPC::LR, PPC::RM, PPC::LR };
3196static const MCPhysReg ImplicitList23[] = { PPC::CR6 };
3197static const MCPhysReg ImplicitList24[] = { PPC::CTR8, PPC::RM, PPC::LR8, PPC::X2 };
3198static const MCPhysReg ImplicitList25[] = { PPC::CTR8, PPC::RM, PPC::LR8, PPC::X2, PPC::RM };
3199static const MCPhysReg ImplicitList26[] = { PPC::CTR8, PPC::RM, PPC::LR8, PPC::RM };
3200static const MCPhysReg ImplicitList27[] = { PPC::CTR, PPC::RM, PPC::LR, PPC::R2 };
3201static const MCPhysReg ImplicitList28[] = { PPC::CTR, PPC::RM, PPC::LR, PPC::R2, PPC::RM };
3202static const MCPhysReg ImplicitList29[] = { PPC::CTR, PPC::RM, PPC::LR, PPC::RM };
3203static const MCPhysReg ImplicitList30[] = { PPC::CTR, PPC::CTR };
3204static const MCPhysReg ImplicitList31[] = { PPC::CTR8, PPC::CTR8 };
3205static const MCPhysReg ImplicitList32[] = { PPC::CTR, PPC::RM, PPC::CTR };
3206static const MCPhysReg ImplicitList33[] = { PPC::CTR, PPC::LR, PPC::RM, PPC::CTR };
3207static const MCPhysReg ImplicitList34[] = { PPC::CTR8, PPC::LR8, PPC::RM, PPC::CTR8 };
3208static const MCPhysReg ImplicitList35[] = { PPC::RM, PPC::LR8 };
3209static const MCPhysReg ImplicitList36[] = { PPC::RM, PPC::LR8, PPC::RM };
3210static const MCPhysReg ImplicitList37[] = { PPC::RM, PPC::LR, PPC::RM };
3211static const MCPhysReg ImplicitList38[] = { PPC::LR8, PPC::RM };
3212static const MCPhysReg ImplicitList39[] = { PPC::CR1EQ };
3213static const MCPhysReg ImplicitList40[] = { PPC::X1, PPC::X1 };
3214static const MCPhysReg ImplicitList41[] = { PPC::CR1 };
3215static const MCPhysReg ImplicitList42[] = { PPC::RM };
3216static const MCPhysReg ImplicitList43[] = { PPC::RM, PPC::CR1 };
3217static const MCPhysReg ImplicitList44[] = { PPC::X0, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::LR8, PPC::CTR8, PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7 };
3218static const MCPhysReg ImplicitList45[] = { PPC::R0, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::LR, PPC::CTR, PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7 };
3219static const MCPhysReg ImplicitList46[] = { PPC::R0, PPC::R4, PPC::R5, PPC::R11, PPC::LR, PPC::CR0 };
3220static const MCPhysReg ImplicitList47[] = { PPC::X0, PPC::X4, PPC::X5, PPC::X11, PPC::LR8, PPC::CR0 };
3221static const MCPhysReg ImplicitList48[] = { PPC::X0, PPC::X2, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::LR8, PPC::CTR8, PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7 };
3222static const MCPhysReg ImplicitList49[] = { PPC::LR };
3223static const MCPhysReg ImplicitList50[] = { PPC::LR8 };
3224static const MCPhysReg ImplicitList51[] = { PPC::RM, PPC::RM };
3225static const MCPhysReg ImplicitList52[] = { PPC::CTR, PPC::RM };
3226static const MCPhysReg ImplicitList53[] = { PPC::CTR8, PPC::RM };
3227static const MCPhysReg ImplicitList54[] = { PPC::RM, PPC::CR6 };
3228static const MCPhysReg ImplicitList55[] = { PPC::CTR, PPC::LR, PPC::RM, PPC::LR, PPC::CTR };
3229static const MCPhysReg ImplicitList56[] = { PPC::CTR, PPC::RM, PPC::LR, PPC::CTR };
3230
3231static const MCOperandInfo OperandInfo2[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3232static const MCOperandInfo OperandInfo3[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3233static const MCOperandInfo OperandInfo4[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3234static const MCOperandInfo OperandInfo5[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3235static const MCOperandInfo OperandInfo6[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3236static const MCOperandInfo OperandInfo7[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3237static const MCOperandInfo OperandInfo8[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3238static const MCOperandInfo OperandInfo9[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) }, };
3239static const MCOperandInfo OperandInfo10[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3240static const MCOperandInfo OperandInfo11[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3241static const MCOperandInfo OperandInfo12[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
3242static const MCOperandInfo OperandInfo13[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3243static const MCOperandInfo OperandInfo14[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3244static const MCOperandInfo OperandInfo15[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3245static const MCOperandInfo OperandInfo16[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3246static const MCOperandInfo OperandInfo17[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, };
3247static const MCOperandInfo OperandInfo18[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
3248static const MCOperandInfo OperandInfo19[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
3249static const MCOperandInfo OperandInfo20[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
3250static const MCOperandInfo OperandInfo21[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3251static const MCOperandInfo OperandInfo22[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, };
3252static const MCOperandInfo OperandInfo23[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
3253static const MCOperandInfo OperandInfo24[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, };
3254static const MCOperandInfo OperandInfo25[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
3255static const MCOperandInfo OperandInfo26[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3256static const MCOperandInfo OperandInfo27[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3257static const MCOperandInfo OperandInfo28[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3258static const MCOperandInfo OperandInfo29[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
3259static const MCOperandInfo OperandInfo30[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
3260static const MCOperandInfo OperandInfo31[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
3261static const MCOperandInfo OperandInfo32[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3262static const MCOperandInfo OperandInfo33[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
3263static const MCOperandInfo OperandInfo34[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
3264static const MCOperandInfo OperandInfo35[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
3265static const MCOperandInfo OperandInfo36[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
3266static const MCOperandInfo OperandInfo37[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, };
3267static const MCOperandInfo OperandInfo38[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
3268static const MCOperandInfo OperandInfo39[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, };
3269static const MCOperandInfo OperandInfo40[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, };
3270static const MCOperandInfo OperandInfo41[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3271static const MCOperandInfo OperandInfo42[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
3272static const MCOperandInfo OperandInfo43[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, };
3273static const MCOperandInfo OperandInfo44[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
3274static const MCOperandInfo OperandInfo45[] = { { PPC::G8pRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::G8pRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3275static const MCOperandInfo OperandInfo46[] = { { PPC::G8pRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::G8pRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3276static const MCOperandInfo OperandInfo47[] = { { PPC::G8pRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3277static const MCOperandInfo OperandInfo48[] = { { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::UACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3278static const MCOperandInfo OperandInfo49[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3279static const MCOperandInfo OperandInfo50[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3280static const MCOperandInfo OperandInfo51[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3281static const MCOperandInfo OperandInfo52[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3282static const MCOperandInfo OperandInfo53[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3283static const MCOperandInfo OperandInfo54[] = { { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3284static const MCOperandInfo OperandInfo55[] = { { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3285static const MCOperandInfo OperandInfo56[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3286static const MCOperandInfo OperandInfo57[] = { { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3287static const MCOperandInfo OperandInfo58[] = { { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, };
3288static const MCOperandInfo OperandInfo59[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3289static const MCOperandInfo OperandInfo60[] = { { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3290static const MCOperandInfo OperandInfo61[] = { { PPC::SPILLTOVSRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3291static const MCOperandInfo OperandInfo62[] = { { PPC::SPILLTOVSRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3292static const MCOperandInfo OperandInfo63[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3293static const MCOperandInfo OperandInfo64[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3294static const MCOperandInfo OperandInfo65[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3295static const MCOperandInfo OperandInfo66[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3296static const MCOperandInfo OperandInfo67[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3297static const MCOperandInfo OperandInfo68[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3298static const MCOperandInfo OperandInfo69[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3299static const MCOperandInfo OperandInfo70[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3300static const MCOperandInfo OperandInfo71[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3301static const MCOperandInfo OperandInfo72[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3302static const MCOperandInfo OperandInfo73[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3303static const MCOperandInfo OperandInfo74[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3304static const MCOperandInfo OperandInfo75[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3305static const MCOperandInfo OperandInfo76[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3306static const MCOperandInfo OperandInfo77[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3307static const MCOperandInfo OperandInfo78[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3308static const MCOperandInfo OperandInfo79[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3309static const MCOperandInfo OperandInfo80[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3310static const MCOperandInfo OperandInfo81[] = { { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3311static const MCOperandInfo OperandInfo82[] = { { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3312static const MCOperandInfo OperandInfo83[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3313static const MCOperandInfo OperandInfo84[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3314static const MCOperandInfo OperandInfo85[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3315static const MCOperandInfo OperandInfo86[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3316static const MCOperandInfo OperandInfo87[] = { { -1, 0, MCOI::OPERAND_PCREL, 0 }, };
3317static const MCOperandInfo OperandInfo88[] = { { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, };
3318static const MCOperandInfo OperandInfo89[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, };
3319static const MCOperandInfo OperandInfo90[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3320static const MCOperandInfo OperandInfo91[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3321static const MCOperandInfo OperandInfo92[] = { { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3322static const MCOperandInfo OperandInfo93[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3323static const MCOperandInfo OperandInfo94[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3324static const MCOperandInfo OperandInfo95[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3325static const MCOperandInfo OperandInfo96[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3326static const MCOperandInfo OperandInfo97[] = { { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3327static const MCOperandInfo OperandInfo98[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3328static const MCOperandInfo OperandInfo99[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3329static const MCOperandInfo OperandInfo100[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3330static const MCOperandInfo OperandInfo101[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3331static const MCOperandInfo OperandInfo102[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3332static const MCOperandInfo OperandInfo103[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3333static const MCOperandInfo OperandInfo104[] = { { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3334static const MCOperandInfo OperandInfo105[] = { { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3335static const MCOperandInfo OperandInfo106[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3336static const MCOperandInfo OperandInfo107[] = { { PPC::DMRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::DMRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3337static const MCOperandInfo OperandInfo108[] = { { PPC::DMRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3338static const MCOperandInfo OperandInfo109[] = { { PPC::DMRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::DMRRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::DMRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3339static const MCOperandInfo OperandInfo110[] = { { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::DMRROWpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3340static const MCOperandInfo OperandInfo111[] = { { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3341static const MCOperandInfo OperandInfo112[] = { { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::WACC_HIRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3342static const MCOperandInfo OperandInfo113[] = { { PPC::DMRROWpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3343static const MCOperandInfo OperandInfo114[] = { { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3344static const MCOperandInfo OperandInfo115[] = { { PPC::WACC_HIRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3345static const MCOperandInfo OperandInfo116[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3346static const MCOperandInfo OperandInfo117[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3347static const MCOperandInfo OperandInfo118[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3348static const MCOperandInfo OperandInfo119[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3349static const MCOperandInfo OperandInfo120[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3350static const MCOperandInfo OperandInfo121[] = { { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3351static const MCOperandInfo OperandInfo122[] = { { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3352static const MCOperandInfo OperandInfo123[] = { { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3353static const MCOperandInfo OperandInfo124[] = { { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3354static const MCOperandInfo OperandInfo125[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3355static const MCOperandInfo OperandInfo126[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3356static const MCOperandInfo OperandInfo127[] = { { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3357static const MCOperandInfo OperandInfo128[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3358static const MCOperandInfo OperandInfo129[] = { { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3359static const MCOperandInfo OperandInfo130[] = { { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3360static const MCOperandInfo OperandInfo131[] = { { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3361static const MCOperandInfo OperandInfo132[] = { { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3362static const MCOperandInfo OperandInfo133[] = { { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3363static const MCOperandInfo OperandInfo134[] = { { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3364static const MCOperandInfo OperandInfo135[] = { { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3365static const MCOperandInfo OperandInfo136[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3366static const MCOperandInfo OperandInfo137[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3367static const MCOperandInfo OperandInfo138[] = { { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3368static const MCOperandInfo OperandInfo139[] = { { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3369static const MCOperandInfo OperandInfo140[] = { { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3370static const MCOperandInfo OperandInfo141[] = { { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3371static const MCOperandInfo OperandInfo142[] = { { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3372static const MCOperandInfo OperandInfo143[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3373static const MCOperandInfo OperandInfo144[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3374static const MCOperandInfo OperandInfo145[] = { { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3375static const MCOperandInfo OperandInfo146[] = { { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3376static const MCOperandInfo OperandInfo147[] = { { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3377static const MCOperandInfo OperandInfo148[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3378static const MCOperandInfo OperandInfo149[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3379static const MCOperandInfo OperandInfo150[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3380static const MCOperandInfo OperandInfo151[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3381static const MCOperandInfo OperandInfo152[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3382static const MCOperandInfo OperandInfo153[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(1) }, };
3383static const MCOperandInfo OperandInfo154[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(1) }, };
3384static const MCOperandInfo OperandInfo155[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3385static const MCOperandInfo OperandInfo156[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3386static const MCOperandInfo OperandInfo157[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3387static const MCOperandInfo OperandInfo158[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3388static const MCOperandInfo OperandInfo159[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3389static const MCOperandInfo OperandInfo160[] = { { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3390static const MCOperandInfo OperandInfo161[] = { { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3391static const MCOperandInfo OperandInfo162[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3392static const MCOperandInfo OperandInfo163[] = { { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3393static const MCOperandInfo OperandInfo164[] = { { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3394static const MCOperandInfo OperandInfo165[] = { { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(1) }, };
3395static const MCOperandInfo OperandInfo166[] = { { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3396static const MCOperandInfo OperandInfo167[] = { { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3397static const MCOperandInfo OperandInfo168[] = { { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(1) }, };
3398static const MCOperandInfo OperandInfo169[] = { { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3399static const MCOperandInfo OperandInfo170[] = { { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3400static const MCOperandInfo OperandInfo171[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3401static const MCOperandInfo OperandInfo172[] = { { PPC::G8pRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3402static const MCOperandInfo OperandInfo173[] = { { PPC::G8pRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3403static const MCOperandInfo OperandInfo174[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3404static const MCOperandInfo OperandInfo175[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3405static const MCOperandInfo OperandInfo176[] = { { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3406static const MCOperandInfo OperandInfo177[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3407static const MCOperandInfo OperandInfo178[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3408static const MCOperandInfo OperandInfo179[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3409static const MCOperandInfo OperandInfo180[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3410static const MCOperandInfo OperandInfo181[] = { { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3411static const MCOperandInfo OperandInfo182[] = { { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3412static const MCOperandInfo OperandInfo183[] = { { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3413static const MCOperandInfo OperandInfo184[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3414static const MCOperandInfo OperandInfo185[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3415static const MCOperandInfo OperandInfo186[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3416static const MCOperandInfo OperandInfo187[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3417static const MCOperandInfo OperandInfo188[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3418static const MCOperandInfo OperandInfo189[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3419static const MCOperandInfo OperandInfo190[] = { { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3420static const MCOperandInfo OperandInfo191[] = { { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3421static const MCOperandInfo OperandInfo192[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3422static const MCOperandInfo OperandInfo193[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3423static const MCOperandInfo OperandInfo194[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3424static const MCOperandInfo OperandInfo195[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRSAVERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3425static const MCOperandInfo OperandInfo196[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3426static const MCOperandInfo OperandInfo197[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3427static const MCOperandInfo OperandInfo198[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3428static const MCOperandInfo OperandInfo199[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3429static const MCOperandInfo OperandInfo200[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3430static const MCOperandInfo OperandInfo201[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3431static const MCOperandInfo OperandInfo202[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3432static const MCOperandInfo OperandInfo203[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3433static const MCOperandInfo OperandInfo204[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3434static const MCOperandInfo OperandInfo205[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3435static const MCOperandInfo OperandInfo206[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3436static const MCOperandInfo OperandInfo207[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3437static const MCOperandInfo OperandInfo208[] = { { PPC::VRSAVERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3438static const MCOperandInfo OperandInfo209[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3439static const MCOperandInfo OperandInfo210[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3440static const MCOperandInfo OperandInfo211[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3441static const MCOperandInfo OperandInfo212[] = { { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3442static const MCOperandInfo OperandInfo213[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3443static const MCOperandInfo OperandInfo214[] = { { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3444static const MCOperandInfo OperandInfo215[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3445static const MCOperandInfo OperandInfo216[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
3446static const MCOperandInfo OperandInfo217[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
3447static const MCOperandInfo OperandInfo218[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3448static const MCOperandInfo OperandInfo219[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3449static const MCOperandInfo OperandInfo220[] = { { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
3450static const MCOperandInfo OperandInfo221[] = { { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3451static const MCOperandInfo OperandInfo222[] = { { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
3452static const MCOperandInfo OperandInfo223[] = { { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3453static const MCOperandInfo OperandInfo224[] = { { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
3454static const MCOperandInfo OperandInfo225[] = { { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3455static const MCOperandInfo OperandInfo226[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
3456static const MCOperandInfo OperandInfo227[] = { { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
3457static const MCOperandInfo OperandInfo228[] = { { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3458static const MCOperandInfo OperandInfo229[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3459static const MCOperandInfo OperandInfo230[] = { { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3460static const MCOperandInfo OperandInfo231[] = { { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3461static const MCOperandInfo OperandInfo232[] = { { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3462static const MCOperandInfo OperandInfo233[] = { { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3463static const MCOperandInfo OperandInfo234[] = { { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3464static const MCOperandInfo OperandInfo235[] = { { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3465static const MCOperandInfo OperandInfo236[] = { { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3466static const MCOperandInfo OperandInfo237[] = { { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3467static const MCOperandInfo OperandInfo238[] = { { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3468static const MCOperandInfo OperandInfo239[] = { { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3469static const MCOperandInfo OperandInfo240[] = { { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3470static const MCOperandInfo OperandInfo241[] = { { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3471static const MCOperandInfo OperandInfo242[] = { { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3472static const MCOperandInfo OperandInfo243[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3473static const MCOperandInfo OperandInfo244[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3474static const MCOperandInfo OperandInfo245[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3475static const MCOperandInfo OperandInfo246[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3476static const MCOperandInfo OperandInfo247[] = { { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3477static const MCOperandInfo OperandInfo248[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3478static const MCOperandInfo OperandInfo249[] = { { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3479static const MCOperandInfo OperandInfo250[] = { { PPC::G8pRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3480static const MCOperandInfo OperandInfo251[] = { { PPC::UACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3481static const MCOperandInfo OperandInfo252[] = { { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3482static const MCOperandInfo OperandInfo253[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3483static const MCOperandInfo OperandInfo254[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3484static const MCOperandInfo OperandInfo255[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3485static const MCOperandInfo OperandInfo256[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3486static const MCOperandInfo OperandInfo257[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3487static const MCOperandInfo OperandInfo258[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3488static const MCOperandInfo OperandInfo259[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3489static const MCOperandInfo OperandInfo260[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3490static const MCOperandInfo OperandInfo261[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3491static const MCOperandInfo OperandInfo262[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3492static const MCOperandInfo OperandInfo263[] = { { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3493static const MCOperandInfo OperandInfo264[] = { { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3494static const MCOperandInfo OperandInfo265[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3495static const MCOperandInfo OperandInfo266[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3496static const MCOperandInfo OperandInfo267[] = { { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3497static const MCOperandInfo OperandInfo268[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3498static const MCOperandInfo OperandInfo269[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3499static const MCOperandInfo OperandInfo270[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3500static const MCOperandInfo OperandInfo271[] = { { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3501static const MCOperandInfo OperandInfo272[] = { { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3502static const MCOperandInfo OperandInfo273[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3503static const MCOperandInfo OperandInfo274[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3504static const MCOperandInfo OperandInfo275[] = { { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3505static const MCOperandInfo OperandInfo276[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3506static const MCOperandInfo OperandInfo277[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3507static const MCOperandInfo OperandInfo278[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3508static const MCOperandInfo OperandInfo279[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3509static const MCOperandInfo OperandInfo280[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3510static const MCOperandInfo OperandInfo281[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3511static const MCOperandInfo OperandInfo282[] = { { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3512static const MCOperandInfo OperandInfo283[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3513static const MCOperandInfo OperandInfo284[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8pRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3514static const MCOperandInfo OperandInfo285[] = { { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(0) }, };
3515static const MCOperandInfo OperandInfo286[] = { { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(0) }, };
3516static const MCOperandInfo OperandInfo287[] = { { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3517static const MCOperandInfo OperandInfo288[] = { { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3518static const MCOperandInfo OperandInfo289[] = { { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(0) }, };
3519static const MCOperandInfo OperandInfo290[] = { { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3520static const MCOperandInfo OperandInfo291[] = { { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(0) }, };
3521static const MCOperandInfo OperandInfo292[] = { { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
3522static const MCOperandInfo OperandInfo293[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3523static const MCOperandInfo OperandInfo294[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3524static const MCOperandInfo OperandInfo295[] = { { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3525static const MCOperandInfo OperandInfo296[] = { { PPC::CTRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3526static const MCOperandInfo OperandInfo297[] = { { PPC::CTRRC8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3527static const MCOperandInfo OperandInfo298[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3528static const MCOperandInfo OperandInfo299[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3529static const MCOperandInfo OperandInfo300[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3530static const MCOperandInfo OperandInfo301[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3531static const MCOperandInfo OperandInfo302[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3532static const MCOperandInfo OperandInfo303[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3533static const MCOperandInfo OperandInfo304[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3534static const MCOperandInfo OperandInfo305[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3535static const MCOperandInfo OperandInfo306[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3536static const MCOperandInfo OperandInfo307[] = { { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3537static const MCOperandInfo OperandInfo308[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3538static const MCOperandInfo OperandInfo309[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3539static const MCOperandInfo OperandInfo310[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3540static const MCOperandInfo OperandInfo311[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3541static const MCOperandInfo OperandInfo312[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3542static const MCOperandInfo OperandInfo313[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3543static const MCOperandInfo OperandInfo314[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3544static const MCOperandInfo OperandInfo315[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, };
3545static const MCOperandInfo OperandInfo316[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3546static const MCOperandInfo OperandInfo317[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3547static const MCOperandInfo OperandInfo318[] = { { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3548static const MCOperandInfo OperandInfo319[] = { { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3549static const MCOperandInfo OperandInfo320[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3550static const MCOperandInfo OperandInfo321[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3551static const MCOperandInfo OperandInfo322[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3552static const MCOperandInfo OperandInfo323[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3553static const MCOperandInfo OperandInfo324[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3554static const MCOperandInfo OperandInfo325[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3555static const MCOperandInfo OperandInfo326[] = { { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3556static const MCOperandInfo OperandInfo327[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3557static const MCOperandInfo OperandInfo328[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3558static const MCOperandInfo OperandInfo329[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3559static const MCOperandInfo OperandInfo330[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3560static const MCOperandInfo OperandInfo331[] = { { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3561static const MCOperandInfo OperandInfo332[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3562static const MCOperandInfo OperandInfo333[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3563static const MCOperandInfo OperandInfo334[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3564static const MCOperandInfo OperandInfo335[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3565static const MCOperandInfo OperandInfo336[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3566static const MCOperandInfo OperandInfo337[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3567static const MCOperandInfo OperandInfo338[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3568static const MCOperandInfo OperandInfo339[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3569static const MCOperandInfo OperandInfo340[] = { { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3570static const MCOperandInfo OperandInfo341[] = { { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3571static const MCOperandInfo OperandInfo342[] = { { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3572static const MCOperandInfo OperandInfo343[] = { { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3573static const MCOperandInfo OperandInfo344[] = { { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3574static const MCOperandInfo OperandInfo345[] = { { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3575static const MCOperandInfo OperandInfo346[] = { { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3576static const MCOperandInfo OperandInfo347[] = { { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3577static const MCOperandInfo OperandInfo348[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3578static const MCOperandInfo OperandInfo349[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3579static const MCOperandInfo OperandInfo350[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3580static const MCOperandInfo OperandInfo351[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3581static const MCOperandInfo OperandInfo352[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3582static const MCOperandInfo OperandInfo353[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3583static const MCOperandInfo OperandInfo354[] = { { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3584static const MCOperandInfo OperandInfo355[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3585static const MCOperandInfo OperandInfo356[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3586static const MCOperandInfo OperandInfo357[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3587static const MCOperandInfo OperandInfo358[] = { { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3588static const MCOperandInfo OperandInfo359[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3589static const MCOperandInfo OperandInfo360[] = { { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, };
3590static const MCOperandInfo OperandInfo361[] = { { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, };
3591static const MCOperandInfo OperandInfo362[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3592static const MCOperandInfo OperandInfo363[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3593static const MCOperandInfo OperandInfo364[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3594static const MCOperandInfo OperandInfo365[] = { { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3595static const MCOperandInfo OperandInfo366[] = { { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3596static const MCOperandInfo OperandInfo367[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3597static const MCOperandInfo OperandInfo368[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3598static const MCOperandInfo OperandInfo369[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, };
3599static const MCOperandInfo OperandInfo370[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3600static const MCOperandInfo OperandInfo371[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3601static const MCOperandInfo OperandInfo372[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3602static const MCOperandInfo OperandInfo373[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, };
3603
3604extern const MCInstrDesc PPCInsts[] = {
3605  { 2632,	4,	0,	4,	335,	2,	1,	0|(1ULL<<MCID::Branch), 0x38ULL, ImplicitList32, OperandInfo373 },  // Inst #2632 = gBCat
3606  { 2631,	4,	0,	4,	335,	2,	2,	0|(1ULL<<MCID::Branch), 0x38ULL, ImplicitList56, OperandInfo373 },  // Inst #2631 = gBCLat
3607  { 2630,	3,	0,	4,	333,	3,	2,	0|(1ULL<<MCID::Branch), 0x38ULL, ImplicitList55, OperandInfo372 },  // Inst #2630 = gBCLRL
3608  { 2629,	3,	0,	4,	333,	3,	1,	0|(1ULL<<MCID::Branch), 0x38ULL, ImplicitList33, OperandInfo372 },  // Inst #2629 = gBCLR
3609  { 2628,	4,	0,	4,	289,	2,	2,	0|(1ULL<<MCID::Branch), 0x38ULL, ImplicitList56, OperandInfo371 },  // Inst #2628 = gBCLAat
3610  { 2627,	3,	0,	4,	289,	2,	2,	0|(1ULL<<MCID::Branch), 0x38ULL, ImplicitList56, OperandInfo370 },  // Inst #2627 = gBCLA
3611  { 2626,	3,	0,	4,	335,	2,	2,	0|(1ULL<<MCID::Branch), 0x38ULL, ImplicitList56, OperandInfo369 },  // Inst #2626 = gBCL
3612  { 2625,	3,	0,	4,	336,	3,	2,	0|(1ULL<<MCID::Branch), 0x38ULL, ImplicitList55, OperandInfo372 },  // Inst #2625 = gBCCTRL
3613  { 2624,	3,	0,	4,	336,	3,	1,	0|(1ULL<<MCID::Branch), 0x38ULL, ImplicitList33, OperandInfo372 },  // Inst #2624 = gBCCTR
3614  { 2623,	4,	0,	4,	289,	2,	1,	0|(1ULL<<MCID::Branch), 0x38ULL, ImplicitList32, OperandInfo371 },  // Inst #2623 = gBCAat
3615  { 2622,	3,	0,	4,	289,	2,	1,	0|(1ULL<<MCID::Branch), 0x38ULL, ImplicitList32, OperandInfo370 },  // Inst #2622 = gBCA
3616  { 2621,	3,	0,	4,	335,	2,	1,	0|(1ULL<<MCID::Branch), 0x38ULL, ImplicitList32, OperandInfo369 },  // Inst #2621 = gBC
3617  { 2620,	3,	1,	4,	469,	0,	0,	0, 0x0ULL, nullptr, OperandInfo364 },  // Inst #2620 = XXSPLTWs
3618  { 2619,	3,	1,	4,	469,	0,	0,	0, 0x0ULL, nullptr, OperandInfo368 },  // Inst #2619 = XXSPLTW
3619  { 2618,	2,	1,	8,	472,	0,	0,	0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x80ULL, nullptr, OperandInfo179 },  // Inst #2618 = XXSPLTIW
3620  { 2617,	2,	1,	8,	472,	0,	0,	0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x80ULL, nullptr, OperandInfo179 },  // Inst #2617 = XXSPLTIDP
3621  { 2616,	2,	1,	4,	464,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo179 },  // Inst #2616 = XXSPLTIB
3622  { 2615,	4,	1,	8,	473,	0,	0,	0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x80ULL, nullptr, OperandInfo367 },  // Inst #2615 = XXSPLTI32DX
3623  { 2614,	3,	1,	4,	469,	0,	0,	0, 0x0ULL, nullptr, OperandInfo364 },  // Inst #2614 = XXSLDWIs
3624  { 2613,	4,	1,	4,	469,	0,	0,	0, 0x0ULL, nullptr, OperandInfo363 },  // Inst #2613 = XXSLDWI
3625  { 2612,	1,	1,	4,	23,	0,	0,	0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, OperandInfo366 },  // Inst #2612 = XXSETACCZW
3626  { 2611,	1,	1,	4,	446,	0,	0,	0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, OperandInfo365 },  // Inst #2611 = XXSETACCZ
3627  { 2610,	4,	1,	4,	103,	0,	0,	0, 0x0ULL, nullptr, OperandInfo352 },  // Inst #2610 = XXSEL
3628  { 2609,	5,	1,	8,	475,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo353 },  // Inst #2609 = XXPERMX
3629  { 2608,	4,	1,	4,	165,	0,	0,	0, 0x0ULL, nullptr, OperandInfo362 },  // Inst #2608 = XXPERMR
3630  { 2607,	3,	1,	4,	469,	0,	0,	0, 0x0ULL, nullptr, OperandInfo364 },  // Inst #2607 = XXPERMDIs
3631  { 2606,	4,	1,	4,	469,	0,	0,	0, 0x0ULL, nullptr, OperandInfo363 },  // Inst #2606 = XXPERMDI
3632  { 2605,	4,	1,	4,	165,	0,	0,	0, 0x0ULL, nullptr, OperandInfo362 },  // Inst #2605 = XXPERM
3633  { 2604,	2,	1,	4,	23,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo361 },  // Inst #2604 = XXMTACCW
3634  { 2603,	2,	1,	4,	454,	0,	0,	0, 0x0ULL, nullptr, OperandInfo360 },  // Inst #2603 = XXMTACC
3635  { 2602,	3,	1,	4,	469,	0,	0,	0, 0x0ULL, nullptr, OperandInfo339 },  // Inst #2602 = XXMRGLW
3636  { 2601,	3,	1,	4,	469,	0,	0,	0, 0x0ULL, nullptr, OperandInfo339 },  // Inst #2601 = XXMRGHW
3637  { 2600,	2,	1,	4,	23,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo361 },  // Inst #2600 = XXMFACCW
3638  { 2599,	2,	1,	4,	455,	0,	0,	0, 0x0ULL, nullptr, OperandInfo360 },  // Inst #2599 = XXMFACC
3639  { 2598,	1,	1,	4,	391,	0,	0,	0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, OperandInfo357 },  // Inst #2598 = XXLXORz
3640  { 2597,	1,	1,	4,	391,	0,	0,	0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, OperandInfo359 },  // Inst #2597 = XXLXORspz
3641  { 2596,	1,	1,	4,	391,	0,	0,	0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, OperandInfo358 },  // Inst #2596 = XXLXORdpz
3642  { 2595,	3,	1,	4,	391,	0,	0,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo339 },  // Inst #2595 = XXLXOR
3643  { 2594,	3,	1,	4,	410,	0,	0,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo319 },  // Inst #2594 = XXLORf
3644  { 2593,	3,	1,	4,	410,	0,	0,	0, 0x0ULL, nullptr, OperandInfo339 },  // Inst #2593 = XXLORC
3645  { 2592,	3,	1,	4,	410,	0,	0,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo339 },  // Inst #2592 = XXLOR
3646  { 2591,	3,	1,	4,	410,	0,	0,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo339 },  // Inst #2591 = XXLNOR
3647  { 2590,	3,	1,	4,	410,	0,	0,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo339 },  // Inst #2590 = XXLNAND
3648  { 2589,	1,	1,	4,	391,	0,	0,	0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Bitcast)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, OperandInfo357 },  // Inst #2589 = XXLEQVOnes
3649  { 2588,	3,	1,	4,	391,	0,	0,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo339 },  // Inst #2588 = XXLEQV
3650  { 2587,	3,	1,	4,	410,	0,	0,	0, 0x0ULL, nullptr, OperandInfo339 },  // Inst #2587 = XXLANDC
3651  { 2586,	3,	1,	4,	410,	0,	0,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo339 },  // Inst #2586 = XXLAND
3652  { 2585,	4,	1,	4,	166,	0,	0,	0, 0x0ULL, nullptr, OperandInfo356 },  // Inst #2585 = XXINSERTW
3653  { 2584,	3,	1,	4,	467,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo355 },  // Inst #2584 = XXGENPCVWM
3654  { 2583,	3,	1,	4,	467,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo355 },  // Inst #2583 = XXGENPCVHM
3655  { 2582,	3,	1,	4,	467,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo355 },  // Inst #2582 = XXGENPCVDM
3656  { 2581,	3,	1,	4,	358,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo355 },  // Inst #2581 = XXGENPCVBM
3657  { 2580,	3,	1,	4,	466,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo354 },  // Inst #2580 = XXEXTRACTUW
3658  { 2579,	5,	1,	8,	474,	0,	0,	0, 0x80ULL, nullptr, OperandInfo353 },  // Inst #2579 = XXEVAL
3659  { 2578,	2,	1,	4,	463,	0,	0,	0, 0x0ULL, nullptr, OperandInfo338 },  // Inst #2578 = XXBRW
3660  { 2577,	2,	1,	4,	463,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo338 },  // Inst #2577 = XXBRQ
3661  { 2576,	2,	1,	4,	463,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo338 },  // Inst #2576 = XXBRH
3662  { 2575,	2,	1,	4,	463,	0,	0,	0, 0x0ULL, nullptr, OperandInfo338 },  // Inst #2575 = XXBRD
3663  { 2574,	4,	1,	8,	473,	0,	0,	0, 0x80ULL, nullptr, OperandInfo352 },  // Inst #2574 = XXBLENDVW
3664  { 2573,	4,	1,	8,	473,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo352 },  // Inst #2573 = XXBLENDVH
3665  { 2572,	4,	1,	8,	473,	0,	0,	0, 0x80ULL, nullptr, OperandInfo352 },  // Inst #2572 = XXBLENDVD
3666  { 2571,	4,	1,	8,	473,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo352 },  // Inst #2571 = XXBLENDVB
3667  { 2570,	2,	1,	4,	403,	0,	0,	0, 0x0ULL, nullptr, OperandInfo338 },  // Inst #2570 = XVXSIGSP
3668  { 2569,	2,	1,	4,	403,	0,	0,	0, 0x0ULL, nullptr, OperandInfo338 },  // Inst #2569 = XVXSIGDP
3669  { 2568,	2,	1,	4,	402,	0,	0,	0, 0x0ULL, nullptr, OperandInfo338 },  // Inst #2568 = XVXEXPSP
3670  { 2567,	2,	1,	4,	402,	0,	0,	0, 0x0ULL, nullptr, OperandInfo338 },  // Inst #2567 = XVXEXPDP
3671  { 2566,	3,	1,	4,	376,	0,	0,	0, 0x0ULL, nullptr, OperandInfo351 },  // Inst #2566 = XVTSTDCSP
3672  { 2565,	3,	1,	4,	376,	0,	0,	0, 0x0ULL, nullptr, OperandInfo351 },  // Inst #2565 = XVTSTDCDP
3673  { 2564,	2,	1,	4,	371,	1,	0,	0, 0x0ULL, ImplicitList42, OperandInfo350 },  // Inst #2564 = XVTSQRTSP
3674  { 2563,	2,	1,	4,	371,	1,	0,	0, 0x0ULL, ImplicitList42, OperandInfo350 },  // Inst #2563 = XVTSQRTDP
3675  { 2562,	2,	1,	4,	364,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo350 },  // Inst #2562 = XVTLSBB
3676  { 2561,	3,	1,	4,	145,	1,	0,	0, 0x0ULL, ImplicitList42, OperandInfo349 },  // Inst #2561 = XVTDIVSP
3677  { 2560,	3,	1,	4,	145,	1,	0,	0, 0x0ULL, ImplicitList42, OperandInfo349 },  // Inst #2560 = XVTDIVDP
3678  { 2559,	3,	1,	4,	324,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo339 },  // Inst #2559 = XVSUBSP
3679  { 2558,	3,	1,	4,	324,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo339 },  // Inst #2558 = XVSUBDP
3680  { 2557,	2,	1,	4,	266,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2557 = XVSQRTSP
3681  { 2556,	2,	1,	4,	265,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2556 = XVSQRTDP
3682  { 2555,	2,	1,	4,	319,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2555 = XVRSQRTESP
3683  { 2554,	2,	1,	4,	319,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2554 = XVRSQRTEDP
3684  { 2553,	2,	1,	4,	319,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo338 },  // Inst #2553 = XVRSPIZ
3685  { 2552,	2,	1,	4,	319,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo338 },  // Inst #2552 = XVRSPIP
3686  { 2551,	2,	1,	4,	319,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo338 },  // Inst #2551 = XVRSPIM
3687  { 2550,	2,	1,	4,	319,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2550 = XVRSPIC
3688  { 2549,	2,	1,	4,	319,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo338 },  // Inst #2549 = XVRSPI
3689  { 2548,	2,	1,	4,	319,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2548 = XVRESP
3690  { 2547,	2,	1,	4,	319,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2547 = XVREDP
3691  { 2546,	2,	1,	4,	319,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo338 },  // Inst #2546 = XVRDPIZ
3692  { 2545,	2,	1,	4,	319,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo338 },  // Inst #2545 = XVRDPIP
3693  { 2544,	2,	1,	4,	319,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo338 },  // Inst #2544 = XVRDPIM
3694  { 2543,	2,	1,	4,	319,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2543 = XVRDPIC
3695  { 2542,	2,	1,	4,	319,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo338 },  // Inst #2542 = XVRDPI
3696  { 2541,	4,	1,	4,	328,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo348 },  // Inst #2541 = XVNMSUBMSP
3697  { 2540,	4,	1,	4,	328,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo348 },  // Inst #2540 = XVNMSUBMDP
3698  { 2539,	4,	1,	4,	328,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList42, OperandInfo348 },  // Inst #2539 = XVNMSUBASP
3699  { 2538,	4,	1,	4,	328,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList42, OperandInfo348 },  // Inst #2538 = XVNMSUBADP
3700  { 2537,	4,	1,	4,	328,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo348 },  // Inst #2537 = XVNMADDMSP
3701  { 2536,	4,	1,	4,	328,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo348 },  // Inst #2536 = XVNMADDMDP
3702  { 2535,	4,	1,	4,	328,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList42, OperandInfo348 },  // Inst #2535 = XVNMADDASP
3703  { 2534,	4,	1,	4,	328,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList42, OperandInfo348 },  // Inst #2534 = XVNMADDADP
3704  { 2533,	2,	1,	4,	402,	1,	0,	0, 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2533 = XVNEGSP
3705  { 2532,	2,	1,	4,	402,	1,	0,	0, 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2532 = XVNEGDP
3706  { 2531,	2,	1,	4,	402,	1,	0,	0, 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2531 = XVNABSSP
3707  { 2530,	2,	1,	4,	402,	1,	0,	0, 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2530 = XVNABSDP
3708  { 2529,	3,	1,	4,	324,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList42, OperandInfo339 },  // Inst #2529 = XVMULSP
3709  { 2528,	3,	1,	4,	324,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList42, OperandInfo339 },  // Inst #2528 = XVMULDP
3710  { 2527,	4,	1,	4,	328,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo348 },  // Inst #2527 = XVMSUBMSP
3711  { 2526,	4,	1,	4,	328,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo348 },  // Inst #2526 = XVMSUBMDP
3712  { 2525,	4,	1,	4,	328,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList42, OperandInfo348 },  // Inst #2525 = XVMSUBASP
3713  { 2524,	4,	1,	4,	328,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList42, OperandInfo348 },  // Inst #2524 = XVMSUBADP
3714  { 2523,	3,	1,	4,	376,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList42, OperandInfo339 },  // Inst #2523 = XVMINSP
3715  { 2522,	3,	1,	4,	376,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList42, OperandInfo339 },  // Inst #2522 = XVMINDP
3716  { 2521,	3,	1,	4,	376,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList42, OperandInfo339 },  // Inst #2521 = XVMAXSP
3717  { 2520,	3,	1,	4,	376,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList42, OperandInfo339 },  // Inst #2520 = XVMAXDP
3718  { 2519,	4,	1,	4,	328,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo348 },  // Inst #2519 = XVMADDMSP
3719  { 2518,	4,	1,	4,	328,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo348 },  // Inst #2518 = XVMADDMDP
3720  { 2517,	4,	1,	4,	328,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList42, OperandInfo348 },  // Inst #2517 = XVMADDASP
3721  { 2516,	4,	1,	4,	328,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList42, OperandInfo348 },  // Inst #2516 = XVMADDADP
3722  { 2515,	3,	1,	4,	411,	0,	0,	0, 0x0ULL, nullptr, OperandInfo339 },  // Inst #2515 = XVIEXPSP
3723  { 2514,	3,	1,	4,	411,	0,	0,	0, 0x0ULL, nullptr, OperandInfo339 },  // Inst #2514 = XVIEXPDP
3724  { 2513,	4,	1,	4,	23,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo343 },  // Inst #2513 = XVI8GER4WSPP
3725  { 2512,	4,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo343 },  // Inst #2512 = XVI8GER4WPP
3726  { 2511,	3,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo342 },  // Inst #2511 = XVI8GER4W
3727  { 2510,	4,	1,	4,	449,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo341 },  // Inst #2510 = XVI8GER4SPP
3728  { 2509,	4,	1,	4,	448,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo341 },  // Inst #2509 = XVI8GER4PP
3729  { 2508,	3,	1,	4,	447,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo340 },  // Inst #2508 = XVI8GER4
3730  { 2507,	4,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo343 },  // Inst #2507 = XVI4GER8WPP
3731  { 2506,	3,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo342 },  // Inst #2506 = XVI4GER8W
3732  { 2505,	4,	1,	4,	448,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo341 },  // Inst #2505 = XVI4GER8PP
3733  { 2504,	3,	1,	4,	447,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo340 },  // Inst #2504 = XVI4GER8
3734  { 2503,	4,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo343 },  // Inst #2503 = XVI16GER2WPP
3735  { 2502,	3,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo342 },  // Inst #2502 = XVI16GER2W
3736  { 2501,	4,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo343 },  // Inst #2501 = XVI16GER2SWPP
3737  { 2500,	3,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo342 },  // Inst #2500 = XVI16GER2SW
3738  { 2499,	4,	1,	4,	448,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo341 },  // Inst #2499 = XVI16GER2SPP
3739  { 2498,	3,	1,	4,	447,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo340 },  // Inst #2498 = XVI16GER2S
3740  { 2497,	4,	1,	4,	448,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo341 },  // Inst #2497 = XVI16GER2PP
3741  { 2496,	3,	1,	4,	447,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo340 },  // Inst #2496 = XVI16GER2
3742  { 2495,	4,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo347 },  // Inst #2495 = XVF64GERWPP
3743  { 2494,	4,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo347 },  // Inst #2494 = XVF64GERWPN
3744  { 2493,	4,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo347 },  // Inst #2493 = XVF64GERWNP
3745  { 2492,	4,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo347 },  // Inst #2492 = XVF64GERWNN
3746  { 2491,	3,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo346 },  // Inst #2491 = XVF64GERW
3747  { 2490,	4,	1,	4,	448,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo345 },  // Inst #2490 = XVF64GERPP
3748  { 2489,	4,	1,	4,	448,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo345 },  // Inst #2489 = XVF64GERPN
3749  { 2488,	4,	1,	4,	448,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo345 },  // Inst #2488 = XVF64GERNP
3750  { 2487,	4,	1,	4,	448,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo345 },  // Inst #2487 = XVF64GERNN
3751  { 2486,	3,	1,	4,	447,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo344 },  // Inst #2486 = XVF64GER
3752  { 2485,	4,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo343 },  // Inst #2485 = XVF32GERWPP
3753  { 2484,	4,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo343 },  // Inst #2484 = XVF32GERWPN
3754  { 2483,	4,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo343 },  // Inst #2483 = XVF32GERWNP
3755  { 2482,	4,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo343 },  // Inst #2482 = XVF32GERWNN
3756  { 2481,	3,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo342 },  // Inst #2481 = XVF32GERW
3757  { 2480,	4,	1,	4,	448,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo341 },  // Inst #2480 = XVF32GERPP
3758  { 2479,	4,	1,	4,	448,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo341 },  // Inst #2479 = XVF32GERPN
3759  { 2478,	4,	1,	4,	448,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo341 },  // Inst #2478 = XVF32GERNP
3760  { 2477,	4,	1,	4,	448,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo341 },  // Inst #2477 = XVF32GERNN
3761  { 2476,	3,	1,	4,	447,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo340 },  // Inst #2476 = XVF32GER
3762  { 2475,	4,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo343 },  // Inst #2475 = XVF16GER2WPP
3763  { 2474,	4,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo343 },  // Inst #2474 = XVF16GER2WPN
3764  { 2473,	4,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo343 },  // Inst #2473 = XVF16GER2WNP
3765  { 2472,	4,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo343 },  // Inst #2472 = XVF16GER2WNN
3766  { 2471,	3,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo342 },  // Inst #2471 = XVF16GER2W
3767  { 2470,	4,	1,	4,	448,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo341 },  // Inst #2470 = XVF16GER2PP
3768  { 2469,	4,	1,	4,	448,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo341 },  // Inst #2469 = XVF16GER2PN
3769  { 2468,	4,	1,	4,	448,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo341 },  // Inst #2468 = XVF16GER2NP
3770  { 2467,	4,	1,	4,	448,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo341 },  // Inst #2467 = XVF16GER2NN
3771  { 2466,	3,	1,	4,	447,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo340 },  // Inst #2466 = XVF16GER2
3772  { 2465,	3,	1,	4,	275,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo339 },  // Inst #2465 = XVDIVSP
3773  { 2464,	3,	1,	4,	276,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo339 },  // Inst #2464 = XVDIVDP
3774  { 2463,	2,	1,	4,	319,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2463 = XVCVUXWSP
3775  { 2462,	2,	1,	4,	319,	1,	0,	0, 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2462 = XVCVUXWDP
3776  { 2461,	2,	1,	4,	319,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2461 = XVCVUXDSP
3777  { 2460,	2,	1,	4,	319,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2460 = XVCVUXDDP
3778  { 2459,	2,	1,	4,	319,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2459 = XVCVSXWSP
3779  { 2458,	2,	1,	4,	319,	1,	0,	0, 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2458 = XVCVSXWDP
3780  { 2457,	2,	1,	4,	319,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2457 = XVCVSXDSP
3781  { 2456,	2,	1,	4,	319,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2456 = XVCVSXDDP
3782  { 2455,	2,	1,	4,	319,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2455 = XVCVSPUXWS
3783  { 2454,	2,	1,	4,	319,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2454 = XVCVSPUXDS
3784  { 2453,	2,	1,	4,	319,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2453 = XVCVSPSXWS
3785  { 2452,	2,	1,	4,	319,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2452 = XVCVSPSXDS
3786  { 2451,	2,	1,	4,	319,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo338 },  // Inst #2451 = XVCVSPHP
3787  { 2450,	2,	1,	4,	319,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2450 = XVCVSPDP
3788  { 2449,	2,	1,	4,	321,	0,	0,	0, 0x0ULL, nullptr, OperandInfo338 },  // Inst #2449 = XVCVSPBF16
3789  { 2448,	2,	1,	4,	370,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo338 },  // Inst #2448 = XVCVHPSP
3790  { 2447,	2,	1,	4,	319,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2447 = XVCVDPUXWS
3791  { 2446,	2,	1,	4,	319,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2446 = XVCVDPUXDS
3792  { 2445,	2,	1,	4,	319,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2445 = XVCVDPSXWS
3793  { 2444,	2,	1,	4,	319,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2444 = XVCVDPSXDS
3794  { 2443,	2,	1,	4,	319,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2443 = XVCVDPSP
3795  { 2442,	2,	1,	4,	465,	0,	0,	0, 0x0ULL, nullptr, OperandInfo338 },  // Inst #2442 = XVCVBF16SPN
3796  { 2441,	3,	1,	4,	411,	1,	0,	0, 0x0ULL, ImplicitList42, OperandInfo339 },  // Inst #2441 = XVCPSGNSP
3797  { 2440,	3,	1,	4,	411,	1,	0,	0, 0x0ULL, ImplicitList42, OperandInfo339 },  // Inst #2440 = XVCPSGNDP
3798  { 2439,	3,	1,	4,	377,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList54, OperandInfo339 },  // Inst #2439 = XVCMPGTSP_rec
3799  { 2438,	3,	1,	4,	377,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo339 },  // Inst #2438 = XVCMPGTSP
3800  { 2437,	3,	1,	4,	377,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList54, OperandInfo339 },  // Inst #2437 = XVCMPGTDP_rec
3801  { 2436,	3,	1,	4,	377,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo339 },  // Inst #2436 = XVCMPGTDP
3802  { 2435,	3,	1,	4,	377,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList54, OperandInfo339 },  // Inst #2435 = XVCMPGESP_rec
3803  { 2434,	3,	1,	4,	377,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo339 },  // Inst #2434 = XVCMPGESP
3804  { 2433,	3,	1,	4,	377,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList54, OperandInfo339 },  // Inst #2433 = XVCMPGEDP_rec
3805  { 2432,	3,	1,	4,	377,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo339 },  // Inst #2432 = XVCMPGEDP
3806  { 2431,	3,	1,	4,	377,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList54, OperandInfo339 },  // Inst #2431 = XVCMPEQSP_rec
3807  { 2430,	3,	1,	4,	377,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo339 },  // Inst #2430 = XVCMPEQSP
3808  { 2429,	3,	1,	4,	377,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList54, OperandInfo339 },  // Inst #2429 = XVCMPEQDP_rec
3809  { 2428,	3,	1,	4,	377,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo339 },  // Inst #2428 = XVCMPEQDP
3810  { 2427,	4,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo343 },  // Inst #2427 = XVBF16GER2WPP
3811  { 2426,	4,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo343 },  // Inst #2426 = XVBF16GER2WPN
3812  { 2425,	4,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo343 },  // Inst #2425 = XVBF16GER2WNP
3813  { 2424,	4,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo343 },  // Inst #2424 = XVBF16GER2WNN
3814  { 2423,	3,	1,	4,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo342 },  // Inst #2423 = XVBF16GER2W
3815  { 2422,	4,	1,	4,	448,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo341 },  // Inst #2422 = XVBF16GER2PP
3816  { 2421,	4,	1,	4,	448,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo341 },  // Inst #2421 = XVBF16GER2PN
3817  { 2420,	4,	1,	4,	448,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo341 },  // Inst #2420 = XVBF16GER2NP
3818  { 2419,	4,	1,	4,	448,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo341 },  // Inst #2419 = XVBF16GER2NN
3819  { 2418,	3,	1,	4,	447,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo340 },  // Inst #2418 = XVBF16GER2
3820  { 2417,	3,	1,	4,	324,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList42, OperandInfo339 },  // Inst #2417 = XVADDSP
3821  { 2416,	3,	1,	4,	324,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList42, OperandInfo339 },  // Inst #2416 = XVADDDP
3822  { 2415,	2,	1,	4,	402,	1,	0,	0, 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2415 = XVABSSP
3823  { 2414,	2,	1,	4,	402,	1,	0,	0, 0x0ULL, ImplicitList42, OperandInfo338 },  // Inst #2414 = XVABSDP
3824  { 2413,	2,	1,	4,	354,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo96 },  // Inst #2413 = XSXSIGQP
3825  { 2412,	2,	1,	4,	112,	0,	0,	0, 0x0ULL, nullptr, OperandInfo198 },  // Inst #2412 = XSXSIGDP
3826  { 2411,	2,	1,	4,	402,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo96 },  // Inst #2411 = XSXEXPQP
3827  { 2410,	2,	1,	4,	401,	0,	0,	0, 0x0ULL, nullptr, OperandInfo198 },  // Inst #2410 = XSXEXPDP
3828  { 2409,	3,	1,	4,	111,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo336 },  // Inst #2409 = XSTSTDCSP
3829  { 2408,	3,	1,	4,	355,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo337 },  // Inst #2408 = XSTSTDCQP
3830  { 2407,	3,	1,	4,	111,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo336 },  // Inst #2407 = XSTSTDCDP
3831  { 2406,	2,	1,	4,	369,	1,	0,	0, 0x0ULL, ImplicitList42, OperandInfo335 },  // Inst #2406 = XSTSQRTDP
3832  { 2405,	3,	1,	4,	113,	1,	0,	0, 0x0ULL, ImplicitList42, OperandInfo322 },  // Inst #2405 = XSTDIVDP
3833  { 2404,	3,	1,	4,	326,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo320 },  // Inst #2404 = XSSUBSP
3834  { 2403,	3,	1,	4,	342,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo95 },  // Inst #2403 = XSSUBQPO
3835  { 2402,	3,	1,	4,	342,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo95 },  // Inst #2402 = XSSUBQP
3836  { 2401,	3,	1,	4,	326,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo319 },  // Inst #2401 = XSSUBDP
3837  { 2400,	2,	1,	4,	268,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo325 },  // Inst #2400 = XSSQRTSP
3838  { 2399,	2,	1,	4,	174,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo96 },  // Inst #2399 = XSSQRTQPO
3839  { 2398,	2,	1,	4,	174,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo96 },  // Inst #2398 = XSSQRTQP
3840  { 2397,	2,	1,	4,	263,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo318 },  // Inst #2397 = XSSQRTDP
3841  { 2396,	2,	1,	4,	320,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo325 },  // Inst #2396 = XSRSQRTESP
3842  { 2395,	2,	1,	4,	320,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo318 },  // Inst #2395 = XSRSQRTEDP
3843  { 2394,	2,	1,	4,	320,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo328 },  // Inst #2394 = XSRSP
3844  { 2393,	4,	1,	4,	169,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo334 },  // Inst #2393 = XSRQPXP
3845  { 2392,	4,	1,	4,	169,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo334 },  // Inst #2392 = XSRQPIX
3846  { 2391,	4,	1,	4,	169,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo334 },  // Inst #2391 = XSRQPI
3847  { 2390,	2,	1,	4,	320,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo325 },  // Inst #2390 = XSRESP
3848  { 2389,	2,	1,	4,	320,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo318 },  // Inst #2389 = XSREDP
3849  { 2388,	2,	1,	4,	320,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo318 },  // Inst #2388 = XSRDPIZ
3850  { 2387,	2,	1,	4,	320,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo318 },  // Inst #2387 = XSRDPIP
3851  { 2386,	2,	1,	4,	320,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo318 },  // Inst #2386 = XSRDPIM
3852  { 2385,	2,	1,	4,	320,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo318 },  // Inst #2385 = XSRDPIC
3853  { 2384,	2,	1,	4,	320,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo318 },  // Inst #2384 = XSRDPI
3854  { 2383,	4,	1,	4,	171,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo333 },  // Inst #2383 = XSNMSUBQPO
3855  { 2382,	4,	1,	4,	171,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo333 },  // Inst #2382 = XSNMSUBQP
3856  { 2381,	4,	1,	4,	155,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo332 },  // Inst #2381 = XSNMSUBMSP
3857  { 2380,	4,	1,	4,	155,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo331 },  // Inst #2380 = XSNMSUBMDP
3858  { 2379,	4,	1,	4,	155,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo332 },  // Inst #2379 = XSNMSUBASP
3859  { 2378,	4,	1,	4,	155,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList42, OperandInfo331 },  // Inst #2378 = XSNMSUBADP
3860  { 2377,	4,	1,	4,	171,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo333 },  // Inst #2377 = XSNMADDQPO
3861  { 2376,	4,	1,	4,	171,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo333 },  // Inst #2376 = XSNMADDQP
3862  { 2375,	4,	1,	4,	155,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo332 },  // Inst #2375 = XSNMADDMSP
3863  { 2374,	4,	1,	4,	155,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo331 },  // Inst #2374 = XSNMADDMDP
3864  { 2373,	4,	1,	4,	155,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo332 },  // Inst #2373 = XSNMADDASP
3865  { 2372,	4,	1,	4,	155,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList42, OperandInfo331 },  // Inst #2372 = XSNMADDADP
3866  { 2371,	2,	1,	4,	402,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2371 = XSNEGQP
3867  { 2370,	2,	1,	4,	401,	1,	0,	0, 0x0ULL, ImplicitList42, OperandInfo318 },  // Inst #2370 = XSNEGDP
3868  { 2369,	2,	1,	4,	402,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2369 = XSNABSQP
3869  { 2368,	2,	1,	4,	401,	1,	0,	0, 0x0ULL, ImplicitList42, OperandInfo325 },  // Inst #2368 = XSNABSDPs
3870  { 2367,	2,	1,	4,	401,	1,	0,	0, 0x0ULL, ImplicitList42, OperandInfo318 },  // Inst #2367 = XSNABSDP
3871  { 2366,	3,	1,	4,	327,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo320 },  // Inst #2366 = XSMULSP
3872  { 2365,	3,	1,	4,	344,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo95 },  // Inst #2365 = XSMULQPO
3873  { 2364,	3,	1,	4,	344,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo95 },  // Inst #2364 = XSMULQP
3874  { 2363,	3,	1,	4,	327,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList42, OperandInfo319 },  // Inst #2363 = XSMULDP
3875  { 2362,	4,	1,	4,	171,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo333 },  // Inst #2362 = XSMSUBQPO
3876  { 2361,	4,	1,	4,	171,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo333 },  // Inst #2361 = XSMSUBQP
3877  { 2360,	4,	1,	4,	155,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo332 },  // Inst #2360 = XSMSUBMSP
3878  { 2359,	4,	1,	4,	155,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo331 },  // Inst #2359 = XSMSUBMDP
3879  { 2358,	4,	1,	4,	155,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo332 },  // Inst #2358 = XSMSUBASP
3880  { 2357,	4,	1,	4,	155,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList42, OperandInfo331 },  // Inst #2357 = XSMSUBADP
3881  { 2356,	3,	1,	4,	380,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo321 },  // Inst #2356 = XSMINJDP
3882  { 2355,	3,	1,	4,	380,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList42, OperandInfo319 },  // Inst #2355 = XSMINDP
3883  { 2354,	3,	1,	4,	357,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2354 = XSMINCQP
3884  { 2353,	3,	1,	4,	380,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo319 },  // Inst #2353 = XSMINCDP
3885  { 2352,	3,	1,	4,	380,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo321 },  // Inst #2352 = XSMAXJDP
3886  { 2351,	3,	1,	4,	380,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList42, OperandInfo319 },  // Inst #2351 = XSMAXDP
3887  { 2350,	3,	1,	4,	357,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2350 = XSMAXCQP
3888  { 2349,	3,	1,	4,	380,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo319 },  // Inst #2349 = XSMAXCDP
3889  { 2348,	4,	1,	4,	171,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo333 },  // Inst #2348 = XSMADDQPO
3890  { 2347,	4,	1,	4,	171,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo333 },  // Inst #2347 = XSMADDQP
3891  { 2346,	4,	1,	4,	155,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo332 },  // Inst #2346 = XSMADDMSP
3892  { 2345,	4,	1,	4,	155,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo331 },  // Inst #2345 = XSMADDMDP
3893  { 2344,	4,	1,	4,	155,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo332 },  // Inst #2344 = XSMADDASP
3894  { 2343,	4,	1,	4,	155,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList42, OperandInfo331 },  // Inst #2343 = XSMADDADP
3895  { 2342,	3,	1,	4,	411,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo330 },  // Inst #2342 = XSIEXPQP
3896  { 2341,	3,	1,	4,	138,	0,	0,	0, 0x0ULL, nullptr, OperandInfo329 },  // Inst #2341 = XSIEXPDP
3897  { 2340,	3,	1,	4,	274,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo320 },  // Inst #2340 = XSDIVSP
3898  { 2339,	3,	1,	4,	173,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo95 },  // Inst #2339 = XSDIVQPO
3899  { 2338,	3,	1,	4,	173,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo95 },  // Inst #2338 = XSDIVQP
3900  { 2337,	3,	1,	4,	271,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo319 },  // Inst #2337 = XSDIVDP
3901  { 2336,	2,	1,	4,	320,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo328 },  // Inst #2336 = XSCVUXDSP
3902  { 2335,	2,	1,	4,	320,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo318 },  // Inst #2335 = XSCVUXDDP
3903  { 2334,	2,	1,	4,	341,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2334 = XSCVUQQP
3904  { 2333,	2,	1,	4,	340,	0,	0,	0, 0x0ULL, nullptr, OperandInfo323 },  // Inst #2333 = XSCVUDQP
3905  { 2332,	2,	1,	4,	320,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo328 },  // Inst #2332 = XSCVSXDSP
3906  { 2331,	2,	1,	4,	320,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo318 },  // Inst #2331 = XSCVSXDDP
3907  { 2330,	2,	1,	4,	341,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2330 = XSCVSQQP
3908  { 2329,	2,	1,	4,	368,	0,	0,	0, 0x0ULL, nullptr, OperandInfo327 },  // Inst #2329 = XSCVSPDPN
3909  { 2328,	2,	1,	4,	320,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo318 },  // Inst #2328 = XSCVSPDP
3910  { 2327,	2,	1,	4,	340,	0,	0,	0, 0x0ULL, nullptr, OperandInfo323 },  // Inst #2327 = XSCVSDQP
3911  { 2326,	2,	1,	4,	340,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo96 },  // Inst #2326 = XSCVQPUWZ
3912  { 2325,	2,	1,	4,	341,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2325 = XSCVQPUQZ
3913  { 2324,	2,	1,	4,	340,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo96 },  // Inst #2324 = XSCVQPUDZ
3914  { 2323,	2,	1,	4,	340,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo96 },  // Inst #2323 = XSCVQPSWZ
3915  { 2322,	2,	1,	4,	341,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2322 = XSCVQPSQZ
3916  { 2321,	2,	1,	4,	340,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo96 },  // Inst #2321 = XSCVQPSDZ
3917  { 2320,	2,	1,	4,	340,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo326 },  // Inst #2320 = XSCVQPDPO
3918  { 2319,	2,	1,	4,	340,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo326 },  // Inst #2319 = XSCVQPDP
3919  { 2318,	2,	1,	4,	163,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo318 },  // Inst #2318 = XSCVHPDP
3920  { 2317,	2,	1,	4,	320,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo325 },  // Inst #2317 = XSCVDPUXWSs
3921  { 2316,	2,	1,	4,	320,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo318 },  // Inst #2316 = XSCVDPUXWS
3922  { 2315,	2,	1,	4,	320,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo325 },  // Inst #2315 = XSCVDPUXDSs
3923  { 2314,	2,	1,	4,	320,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo318 },  // Inst #2314 = XSCVDPUXDS
3924  { 2313,	2,	1,	4,	320,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo325 },  // Inst #2313 = XSCVDPSXWSs
3925  { 2312,	2,	1,	4,	320,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo318 },  // Inst #2312 = XSCVDPSXWS
3926  { 2311,	2,	1,	4,	320,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo325 },  // Inst #2311 = XSCVDPSXDSs
3927  { 2310,	2,	1,	4,	320,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo318 },  // Inst #2310 = XSCVDPSXDS
3928  { 2309,	2,	1,	4,	320,	0,	0,	0, 0x0ULL, nullptr, OperandInfo324 },  // Inst #2309 = XSCVDPSPN
3929  { 2308,	2,	1,	4,	320,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo318 },  // Inst #2308 = XSCVDPSP
3930  { 2307,	2,	1,	4,	340,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, nullptr, OperandInfo323 },  // Inst #2307 = XSCVDPQP
3931  { 2306,	2,	1,	4,	320,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo318 },  // Inst #2306 = XSCVDPHP
3932  { 2305,	3,	1,	4,	411,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2305 = XSCPSGNQP
3933  { 2304,	3,	1,	4,	124,	1,	0,	0, 0x0ULL, ImplicitList42, OperandInfo319 },  // Inst #2304 = XSCPSGNDP
3934  { 2303,	3,	1,	4,	168,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo304 },  // Inst #2303 = XSCMPUQP
3935  { 2302,	3,	1,	4,	113,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo322 },  // Inst #2302 = XSCMPUDP
3936  { 2301,	3,	1,	4,	168,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo304 },  // Inst #2301 = XSCMPOQP
3937  { 2300,	3,	1,	4,	113,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL, ImplicitList42, OperandInfo322 },  // Inst #2300 = XSCMPODP
3938  { 2299,	3,	1,	4,	357,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2299 = XSCMPGTQP
3939  { 2298,	3,	1,	4,	113,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo321 },  // Inst #2298 = XSCMPGTDP
3940  { 2297,	3,	1,	4,	357,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2297 = XSCMPGEQP
3941  { 2296,	3,	1,	4,	113,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo321 },  // Inst #2296 = XSCMPGEDP
3942  { 2295,	3,	1,	4,	168,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo304 },  // Inst #2295 = XSCMPEXPQP
3943  { 2294,	3,	1,	4,	113,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo322 },  // Inst #2294 = XSCMPEXPDP
3944  { 2293,	3,	1,	4,	357,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2293 = XSCMPEQQP
3945  { 2292,	3,	1,	4,	113,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo321 },  // Inst #2292 = XSCMPEQDP
3946  { 2291,	3,	1,	4,	326,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo320 },  // Inst #2291 = XSADDSP
3947  { 2290,	3,	1,	4,	342,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo95 },  // Inst #2290 = XSADDQPO
3948  { 2289,	3,	1,	4,	342,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo95 },  // Inst #2289 = XSADDQP
3949  { 2288,	3,	1,	4,	326,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList42, OperandInfo319 },  // Inst #2288 = XSADDDP
3950  { 2287,	2,	1,	4,	402,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2287 = XSABSQP
3951  { 2286,	2,	1,	4,	401,	1,	0,	0, 0x0ULL, ImplicitList42, OperandInfo318 },  // Inst #2286 = XSABSDP
3952  { 2285,	3,	1,	4,	404,	0,	1,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList1, OperandInfo65 },  // Inst #2285 = XOR_rec
3953  { 2284,	3,	1,	4,	404,	0,	0,	0, 0x8ULL, nullptr, OperandInfo52 },  // Inst #2284 = XORIS8
3954  { 2283,	3,	1,	4,	404,	0,	0,	0, 0x8ULL, nullptr, OperandInfo53 },  // Inst #2283 = XORIS
3955  { 2282,	3,	1,	4,	404,	0,	0,	0, 0x8ULL, nullptr, OperandInfo52 },  // Inst #2282 = XORI8
3956  { 2281,	3,	1,	4,	404,	0,	0,	0, 0x8ULL, nullptr, OperandInfo53 },  // Inst #2281 = XORI
3957  { 2280,	3,	1,	4,	404,	0,	1,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList1, OperandInfo67 },  // Inst #2280 = XOR8_rec
3958  { 2279,	3,	1,	4,	404,	0,	0,	0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, OperandInfo67 },  // Inst #2279 = XOR8
3959  { 2278,	3,	1,	4,	404,	0,	0,	0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, OperandInfo65 },  // Inst #2278 = XOR
3960  { 2277,	1,	0,	4,	311,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo3 },  // Inst #2277 = WRTEEI
3961  { 2276,	1,	0,	4,	311,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo189 },  // Inst #2276 = WRTEE
3962  { 2275,	1,	0,	4,	127,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo3 },  // Inst #2275 = WAIT
3963  { 2274,	1,	1,	4,	459,	0,	0,	0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x28ULL, nullptr, OperandInfo197 },  // Inst #2274 = V_SETALLONESH
3964  { 2273,	1,	1,	4,	459,	0,	0,	0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x28ULL, nullptr, OperandInfo197 },  // Inst #2273 = V_SETALLONESB
3965  { 2272,	1,	1,	4,	459,	0,	0,	0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x28ULL, nullptr, OperandInfo197 },  // Inst #2272 = V_SETALLONES
3966  { 2271,	1,	1,	4,	390,	0,	0,	0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x28ULL, nullptr, OperandInfo197 },  // Inst #2271 = V_SET0H
3967  { 2270,	1,	1,	4,	390,	0,	0,	0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x28ULL, nullptr, OperandInfo197 },  // Inst #2270 = V_SET0B
3968  { 2269,	1,	1,	4,	390,	0,	0,	0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x28ULL, nullptr, OperandInfo197 },  // Inst #2269 = V_SET0
3969  { 2268,	3,	1,	4,	390,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2268 = VXOR
3970  { 2267,	2,	1,	4,	463,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2267 = VUPKLSW
3971  { 2266,	2,	1,	4,	463,	0,	0,	0, 0x28ULL, nullptr, OperandInfo96 },  // Inst #2266 = VUPKLSH
3972  { 2265,	2,	1,	4,	463,	0,	0,	0, 0x28ULL, nullptr, OperandInfo96 },  // Inst #2265 = VUPKLSB
3973  { 2264,	2,	1,	4,	463,	0,	0,	0, 0x28ULL, nullptr, OperandInfo96 },  // Inst #2264 = VUPKLPX
3974  { 2263,	2,	1,	4,	463,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2263 = VUPKHSW
3975  { 2262,	2,	1,	4,	463,	0,	0,	0, 0x28ULL, nullptr, OperandInfo96 },  // Inst #2262 = VUPKHSH
3976  { 2261,	2,	1,	4,	463,	0,	0,	0, 0x28ULL, nullptr, OperandInfo96 },  // Inst #2261 = VUPKHSB
3977  { 2260,	2,	1,	4,	463,	0,	0,	0, 0x28ULL, nullptr, OperandInfo96 },  // Inst #2260 = VUPKHPX
3978  { 2259,	3,	1,	4,	471,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2259 = VSUMSWS
3979  { 2258,	3,	1,	4,	498,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2258 = VSUM4UBS
3980  { 2257,	3,	1,	4,	498,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2257 = VSUM4SHS
3981  { 2256,	3,	1,	4,	498,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2256 = VSUM4SBS
3982  { 2255,	3,	1,	4,	498,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2255 = VSUM2SWS
3983  { 2254,	3,	1,	4,	376,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2254 = VSUBUWS
3984  { 2253,	3,	1,	4,	410,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2253 = VSUBUWM
3985  { 2252,	3,	1,	4,	356,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2252 = VSUBUQM
3986  { 2251,	3,	1,	4,	376,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2251 = VSUBUHS
3987  { 2250,	3,	1,	4,	410,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2250 = VSUBUHM
3988  { 2249,	3,	1,	4,	410,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2249 = VSUBUDM
3989  { 2248,	3,	1,	4,	376,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2248 = VSUBUBS
3990  { 2247,	3,	1,	4,	410,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2247 = VSUBUBM
3991  { 2246,	3,	1,	4,	376,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2246 = VSUBSWS
3992  { 2245,	3,	1,	4,	376,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2245 = VSUBSHS
3993  { 2244,	3,	1,	4,	376,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2244 = VSUBSBS
3994  { 2243,	3,	1,	4,	325,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2243 = VSUBFP
3995  { 2242,	4,	1,	4,	359,	0,	0,	0, 0x0ULL, nullptr, OperandInfo300 },  // Inst #2242 = VSUBEUQM
3996  { 2241,	4,	1,	4,	359,	0,	0,	0, 0x0ULL, nullptr, OperandInfo300 },  // Inst #2241 = VSUBECUQ
3997  { 2240,	3,	1,	4,	376,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2240 = VSUBCUW
3998  { 2239,	3,	1,	4,	355,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2239 = VSUBCUQ
3999  { 2238,	2,	1,	4,	429,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList23, OperandInfo96 },  // Inst #2238 = VSTRIHR_rec
4000  { 2237,	2,	1,	4,	461,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2237 = VSTRIHR
4001  { 2236,	2,	1,	4,	429,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList23, OperandInfo96 },  // Inst #2236 = VSTRIHL_rec
4002  { 2235,	2,	1,	4,	461,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2235 = VSTRIHL
4003  { 2234,	2,	1,	4,	429,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList23, OperandInfo96 },  // Inst #2234 = VSTRIBR_rec
4004  { 2233,	2,	1,	4,	461,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2233 = VSTRIBR
4005  { 2232,	2,	1,	4,	429,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList23, OperandInfo96 },  // Inst #2232 = VSTRIBL_rec
4006  { 2231,	2,	1,	4,	461,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2231 = VSTRIBL
4007  { 2230,	3,	1,	4,	411,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2230 = VSRW
4008  { 2229,	3,	1,	4,	466,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2229 = VSRV
4009  { 2228,	3,	1,	4,	384,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo95 },  // Inst #2228 = VSRQ
4010  { 2227,	3,	1,	4,	466,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2227 = VSRO
4011  { 2226,	3,	1,	4,	411,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2226 = VSRH
4012  { 2225,	4,	1,	4,	470,	0,	0,	0, 0x0ULL, nullptr, OperandInfo93 },  // Inst #2225 = VSRDBI
4013  { 2224,	3,	1,	4,	410,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2224 = VSRD
4014  { 2223,	3,	1,	4,	411,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2223 = VSRB
4015  { 2222,	3,	1,	4,	411,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2222 = VSRAW
4016  { 2221,	3,	1,	4,	384,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo95 },  // Inst #2221 = VSRAQ
4017  { 2220,	3,	1,	4,	411,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2220 = VSRAH
4018  { 2219,	3,	1,	4,	410,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2219 = VSRAD
4019  { 2218,	3,	1,	4,	411,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2218 = VSRAB
4020  { 2217,	3,	1,	4,	466,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2217 = VSR
4021  { 2216,	3,	1,	4,	469,	0,	0,	0, 0x28ULL, nullptr, OperandInfo301 },  // Inst #2216 = VSPLTW
4022  { 2215,	2,	1,	4,	458,	0,	0,	0, 0x28ULL, nullptr, OperandInfo211 },  // Inst #2215 = VSPLTISW
4023  { 2214,	2,	1,	4,	464,	0,	0,	0, 0x28ULL, nullptr, OperandInfo211 },  // Inst #2214 = VSPLTISH
4024  { 2213,	2,	1,	4,	464,	0,	0,	0, 0x28ULL, nullptr, OperandInfo211 },  // Inst #2213 = VSPLTISB
4025  { 2212,	3,	1,	4,	469,	0,	0,	0, 0x28ULL, nullptr, OperandInfo317 },  // Inst #2212 = VSPLTHs
4026  { 2211,	3,	1,	4,	469,	0,	0,	0, 0x28ULL, nullptr, OperandInfo301 },  // Inst #2211 = VSPLTH
4027  { 2210,	3,	1,	4,	469,	0,	0,	0, 0x28ULL, nullptr, OperandInfo317 },  // Inst #2210 = VSPLTBs
4028  { 2209,	3,	1,	4,	469,	0,	0,	0, 0x28ULL, nullptr, OperandInfo301 },  // Inst #2209 = VSPLTB
4029  { 2208,	3,	1,	4,	411,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2208 = VSLW
4030  { 2207,	3,	1,	4,	466,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2207 = VSLV
4031  { 2206,	3,	1,	4,	384,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo95 },  // Inst #2206 = VSLQ
4032  { 2205,	3,	1,	4,	466,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2205 = VSLO
4033  { 2204,	3,	1,	4,	411,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2204 = VSLH
4034  { 2203,	4,	1,	4,	166,	0,	0,	0, 0x28ULL, nullptr, OperandInfo93 },  // Inst #2203 = VSLDOI
4035  { 2202,	4,	1,	4,	470,	0,	0,	0, 0x0ULL, nullptr, OperandInfo93 },  // Inst #2202 = VSLDBI
4036  { 2201,	3,	1,	4,	410,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2201 = VSLD
4037  { 2200,	3,	1,	4,	411,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2200 = VSLB
4038  { 2199,	3,	1,	4,	466,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2199 = VSL
4039  { 2198,	4,	1,	4,	383,	0,	0,	0, 0x0ULL, nullptr, OperandInfo316 },  // Inst #2198 = VSHASIGMAW
4040  { 2197,	4,	1,	4,	383,	0,	0,	0, 0x0ULL, nullptr, OperandInfo316 },  // Inst #2197 = VSHASIGMAD
4041  { 2196,	4,	1,	4,	102,	0,	0,	0, 0x28ULL, nullptr, OperandInfo300 },  // Inst #2196 = VSEL
4042  { 2195,	2,	1,	4,	337,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2195 = VSBOX
4043  { 2194,	2,	1,	4,	319,	0,	0,	0, 0x28ULL, nullptr, OperandInfo96 },  // Inst #2194 = VRSQRTEFP
4044  { 2193,	3,	1,	4,	411,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2193 = VRLWNM
4045  { 2192,	4,	1,	4,	102,	0,	0,	0, 0x0ULL, nullptr, OperandInfo315 },  // Inst #2192 = VRLWMI
4046  { 2191,	3,	1,	4,	411,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2191 = VRLW
4047  { 2190,	3,	1,	4,	384,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2190 = VRLQNM
4048  { 2189,	4,	1,	4,	385,	0,	0,	0, 0x0ULL, nullptr, OperandInfo315 },  // Inst #2189 = VRLQMI
4049  { 2188,	3,	1,	4,	384,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2188 = VRLQ
4050  { 2187,	3,	1,	4,	411,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2187 = VRLH
4051  { 2186,	3,	1,	4,	411,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2186 = VRLDNM
4052  { 2185,	4,	1,	4,	102,	0,	0,	0, 0x0ULL, nullptr, OperandInfo315 },  // Inst #2185 = VRLDMI
4053  { 2184,	3,	1,	4,	411,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2184 = VRLD
4054  { 2183,	3,	1,	4,	411,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2183 = VRLB
4055  { 2182,	2,	1,	4,	319,	0,	0,	0, 0x28ULL, nullptr, OperandInfo96 },  // Inst #2182 = VRFIZ
4056  { 2181,	2,	1,	4,	319,	0,	0,	0, 0x28ULL, nullptr, OperandInfo96 },  // Inst #2181 = VRFIP
4057  { 2180,	2,	1,	4,	319,	0,	0,	0, 0x28ULL, nullptr, OperandInfo96 },  // Inst #2180 = VRFIN
4058  { 2179,	2,	1,	4,	319,	0,	0,	0, 0x28ULL, nullptr, OperandInfo96 },  // Inst #2179 = VRFIM
4059  { 2178,	2,	1,	4,	319,	0,	0,	0, 0x28ULL, nullptr, OperandInfo96 },  // Inst #2178 = VREFP
4060  { 2177,	2,	1,	4,	366,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2177 = VPRTYBW
4061  { 2176,	2,	1,	4,	462,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2176 = VPRTYBQ
4062  { 2175,	2,	1,	4,	366,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2175 = VPRTYBD
4063  { 2174,	2,	1,	4,	366,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2174 = VPOPCNTW
4064  { 2173,	2,	1,	4,	367,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2173 = VPOPCNTH
4065  { 2172,	2,	1,	4,	366,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2172 = VPOPCNTD
4066  { 2171,	2,	1,	4,	367,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2171 = VPOPCNTB
4067  { 2170,	3,	1,	4,	288,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2170 = VPMSUMW
4068  { 2169,	3,	1,	4,	288,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2169 = VPMSUMH
4069  { 2168,	3,	1,	4,	288,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2168 = VPMSUMD
4070  { 2167,	3,	1,	4,	288,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2167 = VPMSUMB
4071  { 2166,	3,	1,	4,	466,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2166 = VPKUWUS
4072  { 2165,	3,	1,	4,	466,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2165 = VPKUWUM
4073  { 2164,	3,	1,	4,	466,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2164 = VPKUHUS
4074  { 2163,	3,	1,	4,	466,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2163 = VPKUHUM
4075  { 2162,	3,	1,	4,	466,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo95 },  // Inst #2162 = VPKUDUS
4076  { 2161,	3,	1,	4,	466,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2161 = VPKUDUM
4077  { 2160,	3,	1,	4,	466,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2160 = VPKSWUS
4078  { 2159,	3,	1,	4,	466,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2159 = VPKSWSS
4079  { 2158,	3,	1,	4,	466,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2158 = VPKSHUS
4080  { 2157,	3,	1,	4,	466,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2157 = VPKSHSS
4081  { 2156,	3,	1,	4,	466,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo95 },  // Inst #2156 = VPKSDUS
4082  { 2155,	3,	1,	4,	466,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo95 },  // Inst #2155 = VPKSDSS
4083  { 2154,	3,	1,	4,	466,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2154 = VPKPX
4084  { 2153,	3,	1,	4,	339,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2153 = VPEXTD
4085  { 2152,	4,	1,	4,	166,	0,	0,	0, 0x0ULL, nullptr, OperandInfo300 },  // Inst #2152 = VPERMXOR
4086  { 2151,	4,	1,	4,	166,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo300 },  // Inst #2151 = VPERMR
4087  { 2150,	4,	1,	4,	166,	0,	0,	0, 0x28ULL, nullptr, OperandInfo300 },  // Inst #2150 = VPERM
4088  { 2149,	3,	1,	4,	339,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2149 = VPDEPD
4089  { 2148,	3,	1,	4,	410,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2148 = VORC
4090  { 2147,	3,	1,	4,	411,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2147 = VOR
4091  { 2146,	3,	1,	4,	411,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2146 = VNOR
4092  { 2145,	4,	1,	4,	328,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo300 },  // Inst #2145 = VNMSUBFP
4093  { 2144,	2,	1,	4,	399,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2144 = VNEGW
4094  { 2143,	2,	1,	4,	399,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2143 = VNEGD
4095  { 2142,	3,	1,	4,	288,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2142 = VNCIPHERLAST
4096  { 2141,	3,	1,	4,	288,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2141 = VNCIPHER
4097  { 2140,	3,	1,	4,	410,	0,	0,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo95 },  // Inst #2140 = VNAND
4098  { 2139,	3,	1,	4,	147,	0,	0,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo95 },  // Inst #2139 = VMULUWM
4099  { 2138,	3,	1,	4,	498,	0,	0,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo95 },  // Inst #2138 = VMULOUW
4100  { 2137,	3,	1,	4,	498,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2137 = VMULOUH
4101  { 2136,	3,	1,	4,	499,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2136 = VMULOUD
4102  { 2135,	3,	1,	4,	498,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2135 = VMULOUB
4103  { 2134,	3,	1,	4,	498,	0,	0,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo95 },  // Inst #2134 = VMULOSW
4104  { 2133,	3,	1,	4,	498,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2133 = VMULOSH
4105  { 2132,	3,	1,	4,	499,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2132 = VMULOSD
4106  { 2131,	3,	1,	4,	498,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2131 = VMULOSB
4107  { 2130,	3,	1,	4,	457,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2130 = VMULLD
4108  { 2129,	3,	1,	4,	499,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2129 = VMULHUW
4109  { 2128,	3,	1,	4,	457,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2128 = VMULHUD
4110  { 2127,	3,	1,	4,	499,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2127 = VMULHSW
4111  { 2126,	3,	1,	4,	457,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2126 = VMULHSD
4112  { 2125,	3,	1,	4,	498,	0,	0,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo95 },  // Inst #2125 = VMULEUW
4113  { 2124,	3,	1,	4,	498,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2124 = VMULEUH
4114  { 2123,	3,	1,	4,	499,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2123 = VMULEUD
4115  { 2122,	3,	1,	4,	498,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2122 = VMULEUB
4116  { 2121,	3,	1,	4,	498,	0,	0,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo95 },  // Inst #2121 = VMULESW
4117  { 2120,	3,	1,	4,	498,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2120 = VMULESH
4118  { 2119,	3,	1,	4,	499,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2119 = VMULESD
4119  { 2118,	3,	1,	4,	498,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2118 = VMULESB
4120  { 2117,	2,	1,	4,	354,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo96 },  // Inst #2117 = VMUL10UQ
4121  { 2116,	3,	1,	4,	355,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo95 },  // Inst #2116 = VMUL10EUQ
4122  { 2115,	3,	1,	4,	355,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo95 },  // Inst #2115 = VMUL10ECUQ
4123  { 2114,	2,	1,	4,	354,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo96 },  // Inst #2114 = VMUL10CUQ
4124  { 2113,	4,	1,	4,	146,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL, nullptr, OperandInfo300 },  // Inst #2113 = VMSUMUHS
4125  { 2112,	4,	1,	4,	146,	0,	0,	0, 0x28ULL, nullptr, OperandInfo300 },  // Inst #2112 = VMSUMUHM
4126  { 2111,	4,	1,	4,	146,	0,	0,	0, 0x0ULL, nullptr, OperandInfo300 },  // Inst #2111 = VMSUMUDM
4127  { 2110,	4,	1,	4,	146,	0,	0,	0, 0x28ULL, nullptr, OperandInfo300 },  // Inst #2110 = VMSUMUBM
4128  { 2109,	4,	1,	4,	146,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL, nullptr, OperandInfo300 },  // Inst #2109 = VMSUMSHS
4129  { 2108,	4,	1,	4,	146,	0,	0,	0, 0x28ULL, nullptr, OperandInfo300 },  // Inst #2108 = VMSUMSHM
4130  { 2107,	4,	1,	4,	146,	0,	0,	0, 0x28ULL, nullptr, OperandInfo300 },  // Inst #2107 = VMSUMMBM
4131  { 2106,	4,	1,	4,	500,	0,	0,	0, 0x0ULL, nullptr, OperandInfo300 },  // Inst #2106 = VMSUMCUD
4132  { 2105,	3,	1,	4,	411,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2105 = VMRGOW
4133  { 2104,	3,	1,	4,	466,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2104 = VMRGLW
4134  { 2103,	3,	1,	4,	466,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2103 = VMRGLH
4135  { 2102,	3,	1,	4,	466,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2102 = VMRGLB
4136  { 2101,	3,	1,	4,	466,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2101 = VMRGHW
4137  { 2100,	3,	1,	4,	466,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2100 = VMRGHH
4138  { 2099,	3,	1,	4,	466,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #2099 = VMRGHB
4139  { 2098,	3,	1,	4,	411,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2098 = VMRGEW
4140  { 2097,	3,	1,	4,	351,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2097 = VMODUW
4141  { 2096,	3,	1,	4,	346,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2096 = VMODUQ
4142  { 2095,	3,	1,	4,	349,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2095 = VMODUD
4143  { 2094,	3,	1,	4,	351,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2094 = VMODSW
4144  { 2093,	3,	1,	4,	346,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2093 = VMODSQ
4145  { 2092,	3,	1,	4,	349,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2092 = VMODSD
4146  { 2091,	4,	1,	4,	146,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo300 },  // Inst #2091 = VMLADDUHM
4147  { 2090,	3,	1,	4,	412,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2090 = VMINUW
4148  { 2089,	3,	1,	4,	412,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2089 = VMINUH
4149  { 2088,	3,	1,	4,	412,	0,	0,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo95 },  // Inst #2088 = VMINUD
4150  { 2087,	3,	1,	4,	412,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2087 = VMINUB
4151  { 2086,	3,	1,	4,	412,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2086 = VMINSW
4152  { 2085,	3,	1,	4,	412,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2085 = VMINSH
4153  { 2084,	3,	1,	4,	412,	0,	0,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo95 },  // Inst #2084 = VMINSD
4154  { 2083,	3,	1,	4,	412,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2083 = VMINSB
4155  { 2082,	3,	1,	4,	376,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2082 = VMINFP
4156  { 2081,	4,	1,	4,	146,	0,	0,	0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL, nullptr, OperandInfo300 },  // Inst #2081 = VMHRADDSHS
4157  { 2080,	4,	1,	4,	146,	0,	0,	0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL, nullptr, OperandInfo300 },  // Inst #2080 = VMHADDSHS
4158  { 2079,	3,	1,	4,	412,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2079 = VMAXUW
4159  { 2078,	3,	1,	4,	412,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2078 = VMAXUH
4160  { 2077,	3,	1,	4,	412,	0,	0,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo95 },  // Inst #2077 = VMAXUD
4161  { 2076,	3,	1,	4,	412,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2076 = VMAXUB
4162  { 2075,	3,	1,	4,	412,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2075 = VMAXSW
4163  { 2074,	3,	1,	4,	412,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2074 = VMAXSH
4164  { 2073,	3,	1,	4,	412,	0,	0,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo95 },  // Inst #2073 = VMAXSD
4165  { 2072,	3,	1,	4,	412,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2072 = VMAXSB
4166  { 2071,	3,	1,	4,	376,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #2071 = VMAXFP
4167  { 2070,	4,	1,	4,	328,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo300 },  // Inst #2070 = VMADDFP
4168  { 2069,	2,	1,	4,	319,	0,	0,	0, 0x28ULL, nullptr, OperandInfo96 },  // Inst #2069 = VLOGEFP
4169  { 2068,	4,	1,	4,	470,	0,	0,	0, 0x0ULL, nullptr, OperandInfo310 },  // Inst #2068 = VINSWVRX
4170  { 2067,	4,	1,	4,	470,	0,	0,	0, 0x0ULL, nullptr, OperandInfo310 },  // Inst #2067 = VINSWVLX
4171  { 2066,	4,	1,	4,	470,	0,	0,	0, 0x0ULL, nullptr, OperandInfo309 },  // Inst #2066 = VINSWRX
4172  { 2065,	4,	1,	4,	470,	0,	0,	0, 0x0ULL, nullptr, OperandInfo309 },  // Inst #2065 = VINSWLX
4173  { 2064,	4,	1,	4,	470,	0,	0,	0, 0x0ULL, nullptr, OperandInfo314 },  // Inst #2064 = VINSW
4174  { 2063,	4,	1,	4,	470,	0,	0,	0, 0x0ULL, nullptr, OperandInfo310 },  // Inst #2063 = VINSHVRX
4175  { 2062,	4,	1,	4,	470,	0,	0,	0, 0x0ULL, nullptr, OperandInfo310 },  // Inst #2062 = VINSHVLX
4176  { 2061,	4,	1,	4,	470,	0,	0,	0, 0x0ULL, nullptr, OperandInfo309 },  // Inst #2061 = VINSHRX
4177  { 2060,	4,	1,	4,	470,	0,	0,	0, 0x0ULL, nullptr, OperandInfo309 },  // Inst #2060 = VINSHLX
4178  { 2059,	3,	1,	4,	468,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo301 },  // Inst #2059 = VINSERTW
4179  { 2058,	4,	1,	4,	167,	0,	0,	0, 0x0ULL, nullptr, OperandInfo313 },  // Inst #2058 = VINSERTH
4180  { 2057,	3,	1,	4,	468,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo301 },  // Inst #2057 = VINSERTD
4181  { 2056,	4,	1,	4,	167,	0,	0,	0, 0x0ULL, nullptr, OperandInfo313 },  // Inst #2056 = VINSERTB
4182  { 2055,	4,	1,	4,	470,	0,	0,	0, 0x0ULL, nullptr, OperandInfo312 },  // Inst #2055 = VINSDRX
4183  { 2054,	4,	1,	4,	470,	0,	0,	0, 0x0ULL, nullptr, OperandInfo312 },  // Inst #2054 = VINSDLX
4184  { 2053,	4,	1,	4,	470,	0,	0,	0, 0x0ULL, nullptr, OperandInfo311 },  // Inst #2053 = VINSD
4185  { 2052,	4,	1,	4,	470,	0,	0,	0, 0x0ULL, nullptr, OperandInfo310 },  // Inst #2052 = VINSBVRX
4186  { 2051,	4,	1,	4,	470,	0,	0,	0, 0x0ULL, nullptr, OperandInfo310 },  // Inst #2051 = VINSBVLX
4187  { 2050,	4,	1,	4,	470,	0,	0,	0, 0x0ULL, nullptr, OperandInfo309 },  // Inst #2050 = VINSBRX
4188  { 2049,	4,	1,	4,	470,	0,	0,	0, 0x0ULL, nullptr, OperandInfo309 },  // Inst #2049 = VINSBLX
4189  { 2048,	3,	1,	4,	339,	0,	0,	0, 0x0ULL, nullptr, OperandInfo305 },  // Inst #2048 = VGNB
4190  { 2047,	2,	1,	4,	463,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2047 = VGBBD
4191  { 2046,	3,	1,	4,	468,	0,	0,	0, 0x200ULL, nullptr, OperandInfo308 },  // Inst #2046 = VEXTUWRX
4192  { 2045,	3,	1,	4,	468,	0,	0,	0, 0x200ULL, nullptr, OperandInfo308 },  // Inst #2045 = VEXTUWLX
4193  { 2044,	3,	1,	4,	468,	0,	0,	0, 0x200ULL, nullptr, OperandInfo308 },  // Inst #2044 = VEXTUHRX
4194  { 2043,	3,	1,	4,	468,	0,	0,	0, 0x200ULL, nullptr, OperandInfo308 },  // Inst #2043 = VEXTUHLX
4195  { 2042,	3,	1,	4,	468,	0,	0,	0, 0x200ULL, nullptr, OperandInfo308 },  // Inst #2042 = VEXTUBRX
4196  { 2041,	3,	1,	4,	468,	0,	0,	0, 0x200ULL, nullptr, OperandInfo308 },  // Inst #2041 = VEXTUBLX
4197  { 2040,	2,	1,	4,	399,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo307 },  // Inst #2040 = VEXTSW2Ds
4198  { 2039,	2,	1,	4,	399,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2039 = VEXTSW2D
4199  { 2038,	2,	1,	4,	399,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo307 },  // Inst #2038 = VEXTSH2Ws
4200  { 2037,	2,	1,	4,	399,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2037 = VEXTSH2W
4201  { 2036,	2,	1,	4,	399,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo307 },  // Inst #2036 = VEXTSH2Ds
4202  { 2035,	2,	1,	4,	399,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2035 = VEXTSH2D
4203  { 2034,	2,	1,	4,	400,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2034 = VEXTSD2Q
4204  { 2033,	2,	1,	4,	399,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo307 },  // Inst #2033 = VEXTSB2Ws
4205  { 2032,	2,	1,	4,	399,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2032 = VEXTSB2W
4206  { 2031,	2,	1,	4,	399,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo307 },  // Inst #2031 = VEXTSB2Ds
4207  { 2030,	2,	1,	4,	399,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2030 = VEXTSB2D
4208  { 2029,	2,	1,	4,	364,	0,	0,	0, 0x200ULL, nullptr, OperandInfo303 },  // Inst #2029 = VEXTRACTWM
4209  { 2028,	3,	1,	4,	468,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo301 },  // Inst #2028 = VEXTRACTUW
4210  { 2027,	3,	1,	4,	468,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo301 },  // Inst #2027 = VEXTRACTUH
4211  { 2026,	3,	1,	4,	468,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo301 },  // Inst #2026 = VEXTRACTUB
4212  { 2025,	2,	1,	4,	364,	0,	0,	0, 0x0ULL, nullptr, OperandInfo303 },  // Inst #2025 = VEXTRACTQM
4213  { 2024,	2,	1,	4,	364,	0,	0,	0, 0x200ULL, nullptr, OperandInfo303 },  // Inst #2024 = VEXTRACTHM
4214  { 2023,	2,	1,	4,	364,	0,	0,	0, 0x200ULL, nullptr, OperandInfo303 },  // Inst #2023 = VEXTRACTDM
4215  { 2022,	3,	1,	4,	468,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo301 },  // Inst #2022 = VEXTRACTD
4216  { 2021,	2,	1,	4,	364,	0,	0,	0, 0x200ULL, nullptr, OperandInfo303 },  // Inst #2021 = VEXTRACTBM
4217  { 2020,	4,	1,	4,	470,	0,	0,	0, 0x0ULL, nullptr, OperandInfo306 },  // Inst #2020 = VEXTDUWVRX
4218  { 2019,	4,	1,	4,	470,	0,	0,	0, 0x0ULL, nullptr, OperandInfo306 },  // Inst #2019 = VEXTDUWVLX
4219  { 2018,	4,	1,	4,	470,	0,	0,	0, 0x0ULL, nullptr, OperandInfo306 },  // Inst #2018 = VEXTDUHVRX
4220  { 2017,	4,	1,	4,	470,	0,	0,	0, 0x0ULL, nullptr, OperandInfo306 },  // Inst #2017 = VEXTDUHVLX
4221  { 2016,	4,	1,	4,	470,	0,	0,	0, 0x0ULL, nullptr, OperandInfo306 },  // Inst #2016 = VEXTDUBVRX
4222  { 2015,	4,	1,	4,	470,	0,	0,	0, 0x0ULL, nullptr, OperandInfo306 },  // Inst #2015 = VEXTDUBVLX
4223  { 2014,	4,	1,	4,	470,	0,	0,	0, 0x0ULL, nullptr, OperandInfo306 },  // Inst #2014 = VEXTDDVRX
4224  { 2013,	4,	1,	4,	470,	0,	0,	0, 0x0ULL, nullptr, OperandInfo306 },  // Inst #2013 = VEXTDDVLX
4225  { 2012,	2,	1,	4,	329,	0,	0,	0, 0x28ULL, nullptr, OperandInfo96 },  // Inst #2012 = VEXPTEFP
4226  { 2011,	2,	1,	4,	364,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2011 = VEXPANDWM
4227  { 2010,	2,	1,	4,	364,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2010 = VEXPANDQM
4228  { 2009,	2,	1,	4,	364,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2009 = VEXPANDHM
4229  { 2008,	2,	1,	4,	364,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2008 = VEXPANDDM
4230  { 2007,	2,	1,	4,	364,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #2007 = VEXPANDBM
4231  { 2006,	3,	1,	4,	410,	0,	0,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo95 },  // Inst #2006 = VEQV
4232  { 2005,	3,	1,	4,	350,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2005 = VDIVUW
4233  { 2004,	3,	1,	4,	345,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2004 = VDIVUQ
4234  { 2003,	3,	1,	4,	348,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2003 = VDIVUD
4235  { 2002,	3,	1,	4,	350,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2002 = VDIVSW
4236  { 2001,	3,	1,	4,	345,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2001 = VDIVSQ
4237  { 2000,	3,	1,	4,	348,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #2000 = VDIVSD
4238  { 1999,	3,	1,	4,	353,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #1999 = VDIVEUW
4239  { 1998,	3,	1,	4,	345,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #1998 = VDIVEUQ
4240  { 1997,	3,	1,	4,	352,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #1997 = VDIVEUD
4241  { 1996,	3,	1,	4,	353,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #1996 = VDIVESW
4242  { 1995,	3,	1,	4,	345,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #1995 = VDIVESQ
4243  { 1994,	3,	1,	4,	352,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #1994 = VDIVESD
4244  { 1993,	2,	1,	4,	366,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #1993 = VCTZW
4245  { 1992,	2,	1,	4,	462,	0,	0,	0, 0x0ULL, nullptr, OperandInfo303 },  // Inst #1992 = VCTZLSBB
4246  { 1991,	2,	1,	4,	366,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #1991 = VCTZH
4247  { 1990,	3,	1,	4,	339,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #1990 = VCTZDM
4248  { 1989,	2,	1,	4,	366,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #1989 = VCTZD
4249  { 1988,	2,	1,	4,	366,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #1988 = VCTZB
4250  { 1987,	2,	1,	4,	319,	0,	0,	0, 0x28ULL, nullptr, OperandInfo96 },  // Inst #1987 = VCTUXS_0
4251  { 1986,	3,	1,	4,	319,	0,	0,	0, 0x28ULL, nullptr, OperandInfo301 },  // Inst #1986 = VCTUXS
4252  { 1985,	2,	1,	4,	319,	0,	0,	0, 0x28ULL, nullptr, OperandInfo96 },  // Inst #1985 = VCTSXS_0
4253  { 1984,	3,	1,	4,	319,	0,	0,	0, 0x28ULL, nullptr, OperandInfo301 },  // Inst #1984 = VCTSXS
4254  { 1983,	3,	1,	4,	379,	0,	0,	0, 0x0ULL, nullptr, OperandInfo305 },  // Inst #1983 = VCNTMBW
4255  { 1982,	3,	1,	4,	379,	0,	0,	0, 0x0ULL, nullptr, OperandInfo305 },  // Inst #1982 = VCNTMBH
4256  { 1981,	3,	1,	4,	379,	0,	0,	0, 0x0ULL, nullptr, OperandInfo305 },  // Inst #1981 = VCNTMBD
4257  { 1980,	3,	1,	4,	379,	0,	0,	0, 0x0ULL, nullptr, OperandInfo305 },  // Inst #1980 = VCNTMBB
4258  { 1979,	3,	1,	4,	379,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo304 },  // Inst #1979 = VCMPUQ
4259  { 1978,	3,	1,	4,	379,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo304 },  // Inst #1978 = VCMPSQ
4260  { 1977,	3,	1,	4,	377,	0,	1,	0, 0x28ULL, ImplicitList23, OperandInfo95 },  // Inst #1977 = VCMPNEZW_rec
4261  { 1976,	3,	1,	4,	142,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #1976 = VCMPNEZW
4262  { 1975,	3,	1,	4,	377,	0,	1,	0, 0x28ULL, ImplicitList23, OperandInfo95 },  // Inst #1975 = VCMPNEZH_rec
4263  { 1974,	3,	1,	4,	142,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #1974 = VCMPNEZH
4264  { 1973,	3,	1,	4,	377,	0,	1,	0, 0x28ULL, ImplicitList23, OperandInfo95 },  // Inst #1973 = VCMPNEZB_rec
4265  { 1972,	3,	1,	4,	142,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #1972 = VCMPNEZB
4266  { 1971,	3,	1,	4,	377,	0,	1,	0, 0x28ULL, ImplicitList23, OperandInfo95 },  // Inst #1971 = VCMPNEW_rec
4267  { 1970,	3,	1,	4,	142,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #1970 = VCMPNEW
4268  { 1969,	3,	1,	4,	377,	0,	1,	0, 0x28ULL, ImplicitList23, OperandInfo95 },  // Inst #1969 = VCMPNEH_rec
4269  { 1968,	3,	1,	4,	142,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #1968 = VCMPNEH
4270  { 1967,	3,	1,	4,	377,	0,	1,	0, 0x28ULL, ImplicitList23, OperandInfo95 },  // Inst #1967 = VCMPNEB_rec
4271  { 1966,	3,	1,	4,	142,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #1966 = VCMPNEB
4272  { 1965,	3,	1,	4,	377,	0,	1,	0, 0x28ULL, ImplicitList23, OperandInfo95 },  // Inst #1965 = VCMPGTUW_rec
4273  { 1964,	3,	1,	4,	142,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #1964 = VCMPGTUW
4274  { 1963,	3,	1,	4,	378,	0,	1,	0, 0x28ULL, ImplicitList23, OperandInfo95 },  // Inst #1963 = VCMPGTUQ_rec
4275  { 1962,	3,	1,	4,	378,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #1962 = VCMPGTUQ
4276  { 1961,	3,	1,	4,	377,	0,	1,	0, 0x28ULL, ImplicitList23, OperandInfo95 },  // Inst #1961 = VCMPGTUH_rec
4277  { 1960,	3,	1,	4,	142,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #1960 = VCMPGTUH
4278  { 1959,	3,	1,	4,	377,	0,	1,	0, 0x28ULL, ImplicitList23, OperandInfo95 },  // Inst #1959 = VCMPGTUD_rec
4279  { 1958,	3,	1,	4,	142,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #1958 = VCMPGTUD
4280  { 1957,	3,	1,	4,	377,	0,	1,	0, 0x28ULL, ImplicitList23, OperandInfo95 },  // Inst #1957 = VCMPGTUB_rec
4281  { 1956,	3,	1,	4,	142,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #1956 = VCMPGTUB
4282  { 1955,	3,	1,	4,	377,	0,	1,	0, 0x28ULL, ImplicitList23, OperandInfo95 },  // Inst #1955 = VCMPGTSW_rec
4283  { 1954,	3,	1,	4,	142,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #1954 = VCMPGTSW
4284  { 1953,	3,	1,	4,	378,	0,	1,	0, 0x28ULL, ImplicitList23, OperandInfo95 },  // Inst #1953 = VCMPGTSQ_rec
4285  { 1952,	3,	1,	4,	378,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #1952 = VCMPGTSQ
4286  { 1951,	3,	1,	4,	377,	0,	1,	0, 0x28ULL, ImplicitList23, OperandInfo95 },  // Inst #1951 = VCMPGTSH_rec
4287  { 1950,	3,	1,	4,	142,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #1950 = VCMPGTSH
4288  { 1949,	3,	1,	4,	377,	0,	1,	0, 0x28ULL, ImplicitList23, OperandInfo95 },  // Inst #1949 = VCMPGTSD_rec
4289  { 1948,	3,	1,	4,	142,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #1948 = VCMPGTSD
4290  { 1947,	3,	1,	4,	377,	0,	1,	0, 0x28ULL, ImplicitList23, OperandInfo95 },  // Inst #1947 = VCMPGTSB_rec
4291  { 1946,	3,	1,	4,	142,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #1946 = VCMPGTSB
4292  { 1945,	3,	1,	4,	377,	0,	1,	0, 0x28ULL, ImplicitList23, OperandInfo95 },  // Inst #1945 = VCMPGTFP_rec
4293  { 1944,	3,	1,	4,	377,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #1944 = VCMPGTFP
4294  { 1943,	3,	1,	4,	377,	0,	1,	0, 0x28ULL, ImplicitList23, OperandInfo95 },  // Inst #1943 = VCMPGEFP_rec
4295  { 1942,	3,	1,	4,	377,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #1942 = VCMPGEFP
4296  { 1941,	3,	1,	4,	377,	0,	1,	0, 0x28ULL, ImplicitList23, OperandInfo95 },  // Inst #1941 = VCMPEQUW_rec
4297  { 1940,	3,	1,	4,	142,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #1940 = VCMPEQUW
4298  { 1939,	3,	1,	4,	378,	0,	1,	0, 0x28ULL, ImplicitList23, OperandInfo95 },  // Inst #1939 = VCMPEQUQ_rec
4299  { 1938,	3,	1,	4,	378,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #1938 = VCMPEQUQ
4300  { 1937,	3,	1,	4,	377,	0,	1,	0, 0x28ULL, ImplicitList23, OperandInfo95 },  // Inst #1937 = VCMPEQUH_rec
4301  { 1936,	3,	1,	4,	142,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #1936 = VCMPEQUH
4302  { 1935,	3,	1,	4,	377,	0,	1,	0, 0x28ULL, ImplicitList23, OperandInfo95 },  // Inst #1935 = VCMPEQUD_rec
4303  { 1934,	3,	1,	4,	142,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #1934 = VCMPEQUD
4304  { 1933,	3,	1,	4,	377,	0,	1,	0, 0x28ULL, ImplicitList23, OperandInfo95 },  // Inst #1933 = VCMPEQUB_rec
4305  { 1932,	3,	1,	4,	142,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #1932 = VCMPEQUB
4306  { 1931,	3,	1,	4,	377,	0,	1,	0, 0x28ULL, ImplicitList23, OperandInfo95 },  // Inst #1931 = VCMPEQFP_rec
4307  { 1930,	3,	1,	4,	377,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #1930 = VCMPEQFP
4308  { 1929,	3,	1,	4,	377,	0,	1,	0, 0x28ULL, ImplicitList23, OperandInfo95 },  // Inst #1929 = VCMPBFP_rec
4309  { 1928,	3,	1,	4,	377,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #1928 = VCMPBFP
4310  { 1927,	2,	1,	4,	366,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #1927 = VCLZW
4311  { 1926,	2,	1,	4,	462,	0,	0,	0, 0x0ULL, nullptr, OperandInfo303 },  // Inst #1926 = VCLZLSBB
4312  { 1925,	2,	1,	4,	366,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #1925 = VCLZH
4313  { 1924,	3,	1,	4,	339,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #1924 = VCLZDM
4314  { 1923,	2,	1,	4,	366,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #1923 = VCLZD
4315  { 1922,	2,	1,	4,	366,	0,	0,	0, 0x0ULL, nullptr, OperandInfo96 },  // Inst #1922 = VCLZB
4316  { 1921,	3,	1,	4,	467,	0,	0,	0, 0x0ULL, nullptr, OperandInfo302 },  // Inst #1921 = VCLRRB
4317  { 1920,	3,	1,	4,	467,	0,	0,	0, 0x0ULL, nullptr, OperandInfo302 },  // Inst #1920 = VCLRLB
4318  { 1919,	3,	1,	4,	288,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #1919 = VCIPHERLAST
4319  { 1918,	3,	1,	4,	288,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #1918 = VCIPHER
4320  { 1917,	2,	1,	4,	319,	0,	0,	0, 0x28ULL, nullptr, OperandInfo96 },  // Inst #1917 = VCFUX_0
4321  { 1916,	3,	1,	4,	319,	0,	0,	0, 0x28ULL, nullptr, OperandInfo301 },  // Inst #1916 = VCFUX
4322  { 1915,	3,	1,	4,	339,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #1915 = VCFUGED
4323  { 1914,	2,	1,	4,	319,	0,	0,	0, 0x28ULL, nullptr, OperandInfo96 },  // Inst #1914 = VCFSX_0
4324  { 1913,	3,	1,	4,	319,	0,	0,	0, 0x28ULL, nullptr, OperandInfo301 },  // Inst #1913 = VCFSX
4325  { 1912,	3,	1,	4,	466,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #1912 = VBPERMQ
4326  { 1911,	3,	1,	4,	144,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #1911 = VBPERMD
4327  { 1910,	3,	1,	4,	376,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #1910 = VAVGUW
4328  { 1909,	3,	1,	4,	376,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #1909 = VAVGUH
4329  { 1908,	3,	1,	4,	376,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #1908 = VAVGUB
4330  { 1907,	3,	1,	4,	376,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #1907 = VAVGSW
4331  { 1906,	3,	1,	4,	376,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #1906 = VAVGSH
4332  { 1905,	3,	1,	4,	376,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #1905 = VAVGSB
4333  { 1904,	3,	1,	4,	411,	0,	0,	0, 0x28ULL, nullptr, OperandInfo95 },  // Inst #1904 = VANDC
4334  { 1903,	3,	1,	4,	411,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #1903 = VAND
4335  { 1902,	3,	1,	4,	376,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #1902 = VADDUWS
4336  { 1901,	3,	1,	4,	410,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #1901 = VADDUWM
4337  { 1900,	3,	1,	4,	356,	0,	0,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo95 },  // Inst #1900 = VADDUQM
4338  { 1899,	3,	1,	4,	376,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #1899 = VADDUHS
4339  { 1898,	3,	1,	4,	410,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #1898 = VADDUHM
4340  { 1897,	3,	1,	4,	410,	0,	0,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo95 },  // Inst #1897 = VADDUDM
4341  { 1896,	3,	1,	4,	376,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #1896 = VADDUBS
4342  { 1895,	3,	1,	4,	410,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #1895 = VADDUBM
4343  { 1894,	3,	1,	4,	376,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #1894 = VADDSWS
4344  { 1893,	3,	1,	4,	376,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #1893 = VADDSHS
4345  { 1892,	3,	1,	4,	376,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #1892 = VADDSBS
4346  { 1891,	3,	1,	4,	324,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #1891 = VADDFP
4347  { 1890,	4,	1,	4,	359,	0,	0,	0, 0x0ULL, nullptr, OperandInfo300 },  // Inst #1890 = VADDEUQM
4348  { 1889,	4,	1,	4,	359,	0,	0,	0, 0x0ULL, nullptr, OperandInfo300 },  // Inst #1889 = VADDECUQ
4349  { 1888,	3,	1,	4,	376,	0,	0,	0|(1ULL<<MCID::Commutable), 0x28ULL, nullptr, OperandInfo95 },  // Inst #1888 = VADDCUW
4350  { 1887,	3,	1,	4,	355,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #1887 = VADDCUQ
4351  { 1886,	3,	1,	4,	143,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #1886 = VABSDUW
4352  { 1885,	3,	1,	4,	143,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #1885 = VABSDUH
4353  { 1884,	3,	1,	4,	143,	0,	0,	0, 0x0ULL, nullptr, OperandInfo95 },  // Inst #1884 = VABSDUB
4354  { 1883,	3,	2,	4,	0,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo65 },  // Inst #1883 = UpdateGBR
4355  { 1882,	0,	0,	4,	0,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #1882 = UNENCODED_NOP
4356  { 1881,	3,	0,	4,	109,	0,	0,	0|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo293 },  // Inst #1881 = TWI
4357  { 1880,	3,	0,	4,	361,	0,	0,	0|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo116 },  // Inst #1880 = TW
4358  { 1879,	1,	0,	4,	139,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, OperandInfo3 },  // Inst #1879 = TSR
4359  { 1878,	1,	0,	4,	139,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, OperandInfo189 },  // Inst #1878 = TRECLAIM
4360  { 1877,	0,	0,	4,	417,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr },  // Inst #1877 = TRECHKPT
4361  { 1876,	0,	0,	4,	360,	0,	0,	0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #1876 = TRAP
4362  { 1875,	3,	1,	4,	0,	0,	0,	0, 0x0ULL, nullptr, OperandInfo67 },  // Inst #1875 = TLSGDAIX8
4363  { 1874,	3,	1,	4,	0,	0,	0,	0, 0x0ULL, nullptr, OperandInfo65 },  // Inst #1874 = TLSGDAIX
4364  { 1873,	3,	0,	4,	492,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo53 },  // Inst #1873 = TLBWE2
4365  { 1872,	0,	0,	4,	301,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #1872 = TLBWE
4366  { 1871,	0,	0,	4,	189,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #1871 = TLBSYNC
4367  { 1870,	3,	0,	4,	492,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo65 },  // Inst #1870 = TLBSX2D
4368  { 1869,	3,	0,	4,	492,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo65 },  // Inst #1869 = TLBSX2
4369  { 1868,	2,	0,	4,	301,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo79 },  // Inst #1868 = TLBSX
4370  { 1867,	3,	1,	4,	492,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo53 },  // Inst #1867 = TLBRE2
4371  { 1866,	0,	0,	4,	301,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #1866 = TLBRE
4372  { 1865,	1,	0,	4,	492,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo189 },  // Inst #1865 = TLBLI
4373  { 1864,	1,	0,	4,	492,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo189 },  // Inst #1864 = TLBLD
4374  { 1863,	2,	0,	4,	301,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo79 },  // Inst #1863 = TLBIVAX
4375  { 1862,	1,	0,	4,	198,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo189 },  // Inst #1862 = TLBIEL
4376  { 1861,	2,	0,	4,	224,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo79 },  // Inst #1861 = TLBIE
4377  { 1860,	0,	0,	4,	310,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #1860 = TLBIA
4378  { 1859,	1,	0,	4,	201,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, OperandInfo3 },  // Inst #1859 = TEND
4379  { 1858,	3,	0,	4,	108,	0,	0,	0|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo299 },  // Inst #1858 = TDI
4380  { 1857,	3,	0,	4,	108,	0,	0,	0|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo298 },  // Inst #1857 = TD
4381  { 1856,	2,	0,	4,	0,	1,	0,	0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList42, OperandInfo297 },  // Inst #1856 = TCRETURNri8
4382  { 1855,	2,	0,	4,	0,	1,	0,	0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList42, OperandInfo296 },  // Inst #1855 = TCRETURNri
4383  { 1854,	2,	0,	4,	0,	1,	0,	0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList42, OperandInfo295 },  // Inst #1854 = TCRETURNdi8
4384  { 1853,	2,	0,	4,	0,	1,	0,	0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList42, OperandInfo295 },  // Inst #1853 = TCRETURNdi
4385  { 1852,	2,	0,	4,	0,	1,	0,	0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList42, OperandInfo294 },  // Inst #1852 = TCRETURNai8
4386  { 1851,	2,	0,	4,	0,	1,	0,	0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList42, OperandInfo294 },  // Inst #1851 = TCRETURNai
4387  { 1850,	1,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo189 },  // Inst #1850 = TCHECK_RET
4388  { 1849,	1,	1,	4,	207,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo187 },  // Inst #1849 = TCHECK
4389  { 1848,	2,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo171 },  // Inst #1848 = TBEGIN_RET
4390  { 1847,	1,	0,	4,	126,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, OperandInfo3 },  // Inst #1847 = TBEGIN
4391  { 1846,	0,	0,	4,	335,	2,	0,	0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList53, nullptr },  // Inst #1846 = TAILBCTR8
4392  { 1845,	0,	0,	4,	335,	2,	0,	0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList52, nullptr },  // Inst #1845 = TAILBCTR
4393  { 1844,	1,	0,	4,	335,	1,	0,	0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList42, OperandInfo2 },  // Inst #1844 = TAILBA8
4394  { 1843,	1,	0,	4,	335,	1,	0,	0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList42, OperandInfo2 },  // Inst #1843 = TAILBA
4395  { 1842,	1,	0,	4,	335,	1,	0,	0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList42, OperandInfo87 },  // Inst #1842 = TAILB8
4396  { 1841,	1,	0,	4,	335,	1,	0,	0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList42, OperandInfo87 },  // Inst #1841 = TAILB
4397  { 1840,	3,	0,	4,	104,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, OperandInfo293 },  // Inst #1840 = TABORTWCI
4398  { 1839,	3,	0,	4,	104,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, OperandInfo116 },  // Inst #1839 = TABORTWC
4399  { 1838,	3,	0,	4,	104,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, OperandInfo293 },  // Inst #1838 = TABORTDCI
4400  { 1837,	3,	0,	4,	104,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, OperandInfo116 },  // Inst #1837 = TABORTDC
4401  { 1836,	1,	0,	4,	139,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, OperandInfo189 },  // Inst #1836 = TABORT
4402  { 1835,	1,	0,	4,	190,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo3 },  // Inst #1835 = SYNC
4403  { 1834,	3,	1,	4,	405,	0,	1,	0, 0x8ULL, ImplicitList1, OperandInfo65 },  // Inst #1834 = SUBF_rec
4404  { 1833,	2,	1,	4,	418,	1,	2,	0, 0x8ULL, ImplicitList12, OperandInfo79 },  // Inst #1833 = SUBFZE_rec
4405  { 1832,	2,	1,	4,	418,	1,	3,	0, 0x8ULL, ImplicitList11, OperandInfo79 },  // Inst #1832 = SUBFZEO_rec
4406  { 1831,	2,	1,	4,	395,	1,	2,	0, 0x8ULL, ImplicitList10, OperandInfo79 },  // Inst #1831 = SUBFZEO
4407  { 1830,	2,	1,	4,	418,	1,	2,	0, 0x8ULL, ImplicitList12, OperandInfo80 },  // Inst #1830 = SUBFZE8_rec
4408  { 1829,	2,	1,	4,	418,	1,	3,	0, 0x8ULL, ImplicitList11, OperandInfo80 },  // Inst #1829 = SUBFZE8O_rec
4409  { 1828,	2,	1,	4,	395,	1,	2,	0, 0x8ULL, ImplicitList10, OperandInfo80 },  // Inst #1828 = SUBFZE8O
4410  { 1827,	2,	1,	4,	395,	1,	1,	0, 0x8ULL, ImplicitList9, OperandInfo80 },  // Inst #1827 = SUBFZE8
4411  { 1826,	2,	1,	4,	395,	1,	1,	0, 0x8ULL, ImplicitList9, OperandInfo79 },  // Inst #1826 = SUBFZE
4412  { 1825,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, OperandInfo71 },  // Inst #1825 = SUBFUS_rec
4413  { 1824,	4,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo71 },  // Inst #1824 = SUBFUS
4414  { 1823,	3,	1,	4,	421,	0,	2,	0, 0x8ULL, ImplicitList4, OperandInfo65 },  // Inst #1823 = SUBFO_rec
4415  { 1822,	3,	1,	4,	405,	0,	1,	0, 0x8ULL, ImplicitList3, OperandInfo65 },  // Inst #1822 = SUBFO
4416  { 1821,	2,	1,	4,	418,	1,	2,	0, 0x8ULL, ImplicitList12, OperandInfo79 },  // Inst #1821 = SUBFME_rec
4417  { 1820,	2,	1,	4,	418,	1,	3,	0, 0x8ULL, ImplicitList11, OperandInfo79 },  // Inst #1820 = SUBFMEO_rec
4418  { 1819,	2,	1,	4,	395,	1,	2,	0, 0x8ULL, ImplicitList10, OperandInfo79 },  // Inst #1819 = SUBFMEO
4419  { 1818,	2,	1,	4,	418,	1,	2,	0, 0x8ULL, ImplicitList12, OperandInfo80 },  // Inst #1818 = SUBFME8_rec
4420  { 1817,	2,	1,	4,	418,	1,	3,	0, 0x8ULL, ImplicitList11, OperandInfo80 },  // Inst #1817 = SUBFME8O_rec
4421  { 1816,	2,	1,	4,	395,	1,	2,	0, 0x8ULL, ImplicitList10, OperandInfo80 },  // Inst #1816 = SUBFME8O
4422  { 1815,	2,	1,	4,	395,	1,	1,	0, 0x8ULL, ImplicitList9, OperandInfo80 },  // Inst #1815 = SUBFME8
4423  { 1814,	2,	1,	4,	395,	1,	1,	0, 0x8ULL, ImplicitList9, OperandInfo79 },  // Inst #1814 = SUBFME
4424  { 1813,	3,	1,	4,	405,	0,	1,	0, 0x8ULL, ImplicitList5, OperandInfo52 },  // Inst #1813 = SUBFIC8
4425  { 1812,	3,	1,	4,	405,	0,	1,	0, 0x8ULL, ImplicitList5, OperandInfo53 },  // Inst #1812 = SUBFIC
4426  { 1811,	3,	1,	4,	421,	1,	2,	0, 0x8ULL, ImplicitList12, OperandInfo65 },  // Inst #1811 = SUBFE_rec
4427  { 1810,	3,	1,	4,	421,	1,	3,	0, 0x8ULL, ImplicitList11, OperandInfo65 },  // Inst #1810 = SUBFEO_rec
4428  { 1809,	3,	1,	4,	405,	1,	2,	0, 0x8ULL, ImplicitList10, OperandInfo65 },  // Inst #1809 = SUBFEO
4429  { 1808,	3,	1,	4,	421,	1,	2,	0, 0x8ULL, ImplicitList12, OperandInfo67 },  // Inst #1808 = SUBFE8_rec
4430  { 1807,	3,	1,	4,	421,	1,	3,	0, 0x8ULL, ImplicitList11, OperandInfo67 },  // Inst #1807 = SUBFE8O_rec
4431  { 1806,	3,	1,	4,	405,	1,	2,	0, 0x8ULL, ImplicitList10, OperandInfo67 },  // Inst #1806 = SUBFE8O
4432  { 1805,	3,	1,	4,	405,	1,	1,	0, 0x8ULL, ImplicitList9, OperandInfo67 },  // Inst #1805 = SUBFE8
4433  { 1804,	3,	1,	4,	405,	1,	1,	0, 0x8ULL, ImplicitList9, OperandInfo65 },  // Inst #1804 = SUBFE
4434  { 1803,	3,	1,	4,	426,	0,	2,	0, 0xcULL, ImplicitList8, OperandInfo65 },  // Inst #1803 = SUBFC_rec
4435  { 1802,	3,	1,	4,	247,	0,	3,	0, 0xcULL, ImplicitList7, OperandInfo65 },  // Inst #1802 = SUBFCO_rec
4436  { 1801,	3,	1,	4,	425,	0,	2,	0, 0xcULL, ImplicitList6, OperandInfo65 },  // Inst #1801 = SUBFCO
4437  { 1800,	3,	1,	4,	426,	0,	2,	0, 0xcULL, ImplicitList8, OperandInfo67 },  // Inst #1800 = SUBFC8_rec
4438  { 1799,	3,	1,	4,	247,	0,	3,	0, 0xcULL, ImplicitList7, OperandInfo67 },  // Inst #1799 = SUBFC8O_rec
4439  { 1798,	3,	1,	4,	425,	0,	2,	0, 0xcULL, ImplicitList6, OperandInfo67 },  // Inst #1798 = SUBFC8O
4440  { 1797,	3,	1,	4,	425,	0,	1,	0, 0xcULL, ImplicitList5, OperandInfo67 },  // Inst #1797 = SUBFC8
4441  { 1796,	3,	1,	4,	425,	0,	1,	0, 0xcULL, ImplicitList5, OperandInfo65 },  // Inst #1796 = SUBFC
4442  { 1795,	3,	1,	4,	405,	0,	1,	0, 0x8ULL, ImplicitList1, OperandInfo67 },  // Inst #1795 = SUBF8_rec
4443  { 1794,	3,	1,	4,	421,	0,	2,	0, 0x8ULL, ImplicitList4, OperandInfo67 },  // Inst #1794 = SUBF8O_rec
4444  { 1793,	3,	1,	4,	405,	0,	1,	0, 0x8ULL, ImplicitList3, OperandInfo67 },  // Inst #1793 = SUBF8O
4445  { 1792,	3,	1,	4,	405,	0,	0,	0, 0x8ULL, nullptr, OperandInfo67 },  // Inst #1792 = SUBF8
4446  { 1791,	3,	1,	4,	405,	0,	0,	0, 0x8ULL, nullptr, OperandInfo65 },  // Inst #1791 = SUBF
4447  { 1790,	3,	0,	4,	226,	0,	0,	0|(1ULL<<MCID::MayStore), 0x40ULL, nullptr, OperandInfo178 },  // Inst #1790 = STXVX
4448  { 1789,	3,	0,	4,	226,	0,	0,	0|(1ULL<<MCID::MayStore), 0x40ULL, nullptr, OperandInfo178 },  // Inst #1789 = STXVW4X
4449  { 1788,	3,	0,	4,	484,	0,	0,	0|(1ULL<<MCID::MayStore), 0x40ULL, nullptr, OperandInfo178 },  // Inst #1788 = STXVRWX
4450  { 1787,	3,	0,	4,	14,	0,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL, nullptr, OperandInfo180 },  // Inst #1787 = STXVRLL
4451  { 1786,	3,	0,	4,	14,	0,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL, nullptr, OperandInfo180 },  // Inst #1786 = STXVRL
4452  { 1785,	3,	0,	4,	484,	0,	0,	0|(1ULL<<MCID::MayStore), 0x40ULL, nullptr, OperandInfo178 },  // Inst #1785 = STXVRHX
4453  { 1784,	3,	0,	4,	484,	0,	0,	0|(1ULL<<MCID::MayStore), 0x40ULL, nullptr, OperandInfo178 },  // Inst #1784 = STXVRDX
4454  { 1783,	3,	0,	4,	484,	0,	0,	0|(1ULL<<MCID::MayStore), 0x40ULL, nullptr, OperandInfo178 },  // Inst #1783 = STXVRBX
4455  { 1782,	3,	0,	4,	489,	0,	0,	0|(1ULL<<MCID::MayStore), 0x40ULL, nullptr, OperandInfo183 },  // Inst #1782 = STXVPX
4456  { 1781,	3,	0,	4,	40,	0,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL, nullptr, OperandInfo182 },  // Inst #1781 = STXVPRLL
4457  { 1780,	3,	0,	4,	40,	0,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL, nullptr, OperandInfo182 },  // Inst #1780 = STXVPRL
4458  { 1779,	3,	0,	4,	489,	0,	0,	0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo181 },  // Inst #1779 = STXVP
4459  { 1778,	3,	0,	4,	227,	0,	0,	0|(1ULL<<MCID::MayStore), 0x40ULL, nullptr, OperandInfo180 },  // Inst #1778 = STXVLL
4460  { 1777,	3,	0,	4,	227,	0,	0,	0|(1ULL<<MCID::MayStore), 0x40ULL, nullptr, OperandInfo180 },  // Inst #1777 = STXVL
4461  { 1776,	3,	0,	4,	226,	0,	0,	0|(1ULL<<MCID::MayStore), 0x40ULL, nullptr, OperandInfo178 },  // Inst #1776 = STXVH8X
4462  { 1775,	3,	0,	4,	226,	0,	0,	0|(1ULL<<MCID::MayStore), 0x40ULL, nullptr, OperandInfo178 },  // Inst #1775 = STXVD2X
4463  { 1774,	3,	0,	4,	226,	0,	0,	0|(1ULL<<MCID::MayStore), 0x40ULL, nullptr, OperandInfo178 },  // Inst #1774 = STXVB16X
4464  { 1773,	3,	0,	4,	226,	0,	0,	0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo177 },  // Inst #1773 = STXV
4465  { 1772,	3,	0,	4,	217,	0,	0,	0|(1ULL<<MCID::MayStore), 0x40ULL, nullptr, OperandInfo64 },  // Inst #1772 = STXSSPX
4466  { 1771,	3,	0,	4,	217,	0,	0,	0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo176 },  // Inst #1771 = STXSSP
4467  { 1770,	3,	0,	4,	217,	0,	0,	0|(1ULL<<MCID::MayStore), 0x40ULL, nullptr, OperandInfo60 },  // Inst #1770 = STXSIWX
4468  { 1769,	3,	0,	4,	217,	0,	0,	0|(1ULL<<MCID::MayStore), 0x40ULL, nullptr, OperandInfo178 },  // Inst #1769 = STXSIHXv
4469  { 1768,	3,	0,	4,	217,	0,	0,	0|(1ULL<<MCID::MayStore), 0x40ULL, nullptr, OperandInfo60 },  // Inst #1768 = STXSIHX
4470  { 1767,	3,	0,	4,	217,	0,	0,	0|(1ULL<<MCID::MayStore), 0x40ULL, nullptr, OperandInfo178 },  // Inst #1767 = STXSIBXv
4471  { 1766,	3,	0,	4,	217,	0,	0,	0|(1ULL<<MCID::MayStore), 0x40ULL, nullptr, OperandInfo60 },  // Inst #1766 = STXSIBX
4472  { 1765,	3,	0,	4,	217,	0,	0,	0|(1ULL<<MCID::MayStore), 0x40ULL, nullptr, OperandInfo60 },  // Inst #1765 = STXSDX
4473  { 1764,	3,	0,	4,	217,	0,	0,	0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo176 },  // Inst #1764 = STXSD
4474  { 1763,	3,	0,	4,	218,	0,	0,	0|(1ULL<<MCID::MayStore), 0xcULL, nullptr, OperandInfo159 },  // Inst #1763 = STWXTLS_32
4475  { 1762,	3,	0,	4,	218,	0,	0,	0|(1ULL<<MCID::MayStore), 0xcULL, nullptr, OperandInfo158 },  // Inst #1762 = STWXTLS_
4476  { 1761,	3,	0,	4,	218,	0,	0,	0|(1ULL<<MCID::MayStore), 0xcULL, nullptr, OperandInfo158 },  // Inst #1761 = STWXTLS
4477  { 1760,	3,	0,	4,	218,	0,	0,	0|(1ULL<<MCID::MayStore), 0x54ULL, nullptr, OperandInfo157 },  // Inst #1760 = STWX8
4478  { 1759,	3,	0,	4,	218,	0,	0,	0|(1ULL<<MCID::MayStore), 0x54ULL, nullptr, OperandInfo152 },  // Inst #1759 = STWX
4479  { 1758,	4,	1,	4,	281,	0,	0,	0|(1ULL<<MCID::MayStore), 0x54ULL, nullptr, OperandInfo288 },  // Inst #1758 = STWUX8
4480  { 1757,	4,	1,	4,	281,	0,	0,	0|(1ULL<<MCID::MayStore), 0x54ULL, nullptr, OperandInfo287 },  // Inst #1757 = STWUX
4481  { 1756,	4,	1,	4,	280,	0,	0,	0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, OperandInfo286 },  // Inst #1756 = STWU8
4482  { 1755,	4,	1,	4,	280,	0,	0,	0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, OperandInfo285 },  // Inst #1755 = STWU
4483  { 1754,	3,	0,	4,	302,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo152 },  // Inst #1754 = STWEPX
4484  { 1753,	3,	0,	4,	202,	0,	1,	0|(1ULL<<MCID::MayStore), 0x40ULL, ImplicitList1, OperandInfo152 },  // Inst #1753 = STWCX
4485  { 1752,	3,	0,	4,	487,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL, nullptr, OperandInfo65 },  // Inst #1752 = STWCIX
4486  { 1751,	3,	0,	4,	480,	0,	0,	0|(1ULL<<MCID::MayStore), 0x54ULL, nullptr, OperandInfo152 },  // Inst #1751 = STWBRX
4487  { 1750,	3,	0,	4,	292,	0,	0,	0|(1ULL<<MCID::MayStore), 0x40ULL, nullptr, OperandInfo53 },  // Inst #1750 = STWAT
4488  { 1749,	3,	0,	4,	480,	0,	0,	0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, OperandInfo149 },  // Inst #1749 = STW8
4489  { 1748,	3,	0,	4,	480,	0,	0,	0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, OperandInfo59 },  // Inst #1748 = STW
4490  { 1747,	3,	0,	4,	225,	0,	0,	0|(1ULL<<MCID::MayStore), 0x50ULL, nullptr, OperandInfo174 },  // Inst #1747 = STVXL
4491  { 1746,	3,	0,	4,	225,	0,	0,	0|(1ULL<<MCID::MayStore), 0x50ULL, nullptr, OperandInfo174 },  // Inst #1746 = STVX
4492  { 1745,	3,	0,	4,	225,	0,	0,	0|(1ULL<<MCID::MayStore), 0x50ULL, nullptr, OperandInfo174 },  // Inst #1745 = STVEWX
4493  { 1744,	3,	0,	4,	225,	0,	0,	0|(1ULL<<MCID::MayStore), 0x50ULL, nullptr, OperandInfo174 },  // Inst #1744 = STVEHX
4494  { 1743,	3,	0,	4,	225,	0,	0,	0|(1ULL<<MCID::MayStore), 0x50ULL, nullptr, OperandInfo174 },  // Inst #1743 = STVEBX
4495  { 1742,	3,	0,	4,	221,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL, nullptr, OperandInfo53 },  // Inst #1742 = STSWI
4496  { 1741,	3,	0,	4,	0,	0,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x10ULL, nullptr, OperandInfo173 },  // Inst #1741 = STQX_PSEUDO
4497  { 1740,	3,	0,	4,	92,	0,	1,	0|(1ULL<<MCID::MayStore), 0x40ULL, ImplicitList1, OperandInfo173 },  // Inst #1740 = STQCX
4498  { 1739,	3,	0,	4,	91,	0,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x10ULL, nullptr, OperandInfo250 },  // Inst #1739 = STQ
4499  { 1738,	0,	0,	4,	316,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #1738 = STOP
4500  { 1737,	3,	0,	4,	223,	0,	0,	0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo59 },  // Inst #1737 = STMW
4501  { 1736,	3,	0,	4,	218,	0,	0,	0|(1ULL<<MCID::MayStore), 0xcULL, nullptr, OperandInfo159 },  // Inst #1736 = STHXTLS_32
4502  { 1735,	3,	0,	4,	218,	0,	0,	0|(1ULL<<MCID::MayStore), 0xcULL, nullptr, OperandInfo158 },  // Inst #1735 = STHXTLS_
4503  { 1734,	3,	0,	4,	218,	0,	0,	0|(1ULL<<MCID::MayStore), 0xcULL, nullptr, OperandInfo158 },  // Inst #1734 = STHXTLS
4504  { 1733,	3,	0,	4,	218,	0,	0,	0|(1ULL<<MCID::MayStore), 0x54ULL, nullptr, OperandInfo157 },  // Inst #1733 = STHX8
4505  { 1732,	3,	0,	4,	218,	0,	0,	0|(1ULL<<MCID::MayStore), 0x54ULL, nullptr, OperandInfo152 },  // Inst #1732 = STHX
4506  { 1731,	4,	1,	4,	281,	0,	0,	0|(1ULL<<MCID::MayStore), 0x54ULL, nullptr, OperandInfo288 },  // Inst #1731 = STHUX8
4507  { 1730,	4,	1,	4,	281,	0,	0,	0|(1ULL<<MCID::MayStore), 0x54ULL, nullptr, OperandInfo287 },  // Inst #1730 = STHUX
4508  { 1729,	4,	1,	4,	280,	0,	0,	0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, OperandInfo286 },  // Inst #1729 = STHU8
4509  { 1728,	4,	1,	4,	280,	0,	0,	0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, OperandInfo285 },  // Inst #1728 = STHU
4510  { 1727,	3,	0,	4,	302,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo152 },  // Inst #1727 = STHEPX
4511  { 1726,	3,	0,	4,	202,	0,	1,	0|(1ULL<<MCID::MayStore), 0x40ULL, ImplicitList1, OperandInfo152 },  // Inst #1726 = STHCX
4512  { 1725,	3,	0,	4,	487,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL, nullptr, OperandInfo65 },  // Inst #1725 = STHCIX
4513  { 1724,	3,	0,	4,	480,	0,	0,	0|(1ULL<<MCID::MayStore), 0x54ULL, nullptr, OperandInfo152 },  // Inst #1724 = STHBRX
4514  { 1723,	3,	0,	4,	480,	0,	0,	0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, OperandInfo149 },  // Inst #1723 = STH8
4515  { 1722,	3,	0,	4,	480,	0,	0,	0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, OperandInfo59 },  // Inst #1722 = STH
4516  { 1721,	3,	0,	4,	217,	0,	0,	0|(1ULL<<MCID::MayStore), 0x50ULL, nullptr, OperandInfo170 },  // Inst #1721 = STFSX
4517  { 1720,	4,	1,	4,	279,	0,	0,	0|(1ULL<<MCID::MayStore), 0x54ULL, nullptr, OperandInfo292 },  // Inst #1720 = STFSUX
4518  { 1719,	4,	1,	4,	279,	0,	0,	0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, OperandInfo291 },  // Inst #1719 = STFSU
4519  { 1718,	3,	0,	4,	217,	0,	0,	0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, OperandInfo167 },  // Inst #1718 = STFS
4520  { 1717,	3,	0,	4,	217,	0,	0,	0|(1ULL<<MCID::MayStore), 0x50ULL, nullptr, OperandInfo164 },  // Inst #1717 = STFIWX
4521  { 1716,	3,	0,	4,	217,	0,	0,	0|(1ULL<<MCID::MayStore), 0x50ULL, nullptr, OperandInfo164 },  // Inst #1716 = STFDX
4522  { 1715,	4,	1,	4,	279,	0,	0,	0|(1ULL<<MCID::MayStore), 0x54ULL, nullptr, OperandInfo290 },  // Inst #1715 = STFDUX
4523  { 1714,	4,	1,	4,	279,	0,	0,	0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, OperandInfo289 },  // Inst #1714 = STFDU
4524  { 1713,	3,	0,	4,	304,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL, nullptr, OperandInfo164 },  // Inst #1713 = STFDEPX
4525  { 1712,	3,	0,	4,	217,	0,	0,	0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, OperandInfo163 },  // Inst #1712 = STFD
4526  { 1711,	3,	0,	4,	220,	0,	0,	0|(1ULL<<MCID::MayStore), 0xcULL, nullptr, OperandInfo158 },  // Inst #1711 = STDXTLS_
4527  { 1710,	3,	0,	4,	220,	0,	0,	0|(1ULL<<MCID::MayStore), 0xcULL, nullptr, OperandInfo158 },  // Inst #1710 = STDXTLS
4528  { 1709,	3,	0,	4,	220,	0,	0,	0|(1ULL<<MCID::MayStore), 0x54ULL, nullptr, OperandInfo157 },  // Inst #1709 = STDX
4529  { 1708,	4,	1,	4,	281,	0,	0,	0|(1ULL<<MCID::MayStore), 0x54ULL, nullptr, OperandInfo288 },  // Inst #1708 = STDUX
4530  { 1707,	4,	1,	4,	280,	0,	0,	0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, OperandInfo286 },  // Inst #1707 = STDU
4531  { 1706,	3,	0,	4,	203,	0,	1,	0|(1ULL<<MCID::MayStore), 0x40ULL, ImplicitList1, OperandInfo157 },  // Inst #1706 = STDCX
4532  { 1705,	3,	0,	4,	487,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL, nullptr, OperandInfo65 },  // Inst #1705 = STDCIX
4533  { 1704,	3,	0,	4,	480,	0,	0,	0|(1ULL<<MCID::MayStore), 0x54ULL, nullptr, OperandInfo157 },  // Inst #1704 = STDBRX
4534  { 1703,	3,	0,	4,	292,	0,	0,	0|(1ULL<<MCID::MayStore), 0x40ULL, nullptr, OperandInfo52 },  // Inst #1703 = STDAT
4535  { 1702,	3,	0,	4,	482,	0,	0,	0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, OperandInfo149 },  // Inst #1702 = STD
4536  { 1701,	3,	0,	4,	218,	0,	0,	0|(1ULL<<MCID::MayStore), 0xcULL, nullptr, OperandInfo159 },  // Inst #1701 = STBXTLS_32
4537  { 1700,	3,	0,	4,	218,	0,	0,	0|(1ULL<<MCID::MayStore), 0xcULL, nullptr, OperandInfo158 },  // Inst #1700 = STBXTLS_
4538  { 1699,	3,	0,	4,	218,	0,	0,	0|(1ULL<<MCID::MayStore), 0xcULL, nullptr, OperandInfo158 },  // Inst #1699 = STBXTLS
4539  { 1698,	3,	0,	4,	218,	0,	0,	0|(1ULL<<MCID::MayStore), 0x54ULL, nullptr, OperandInfo157 },  // Inst #1698 = STBX8
4540  { 1697,	3,	0,	4,	218,	0,	0,	0|(1ULL<<MCID::MayStore), 0x54ULL, nullptr, OperandInfo152 },  // Inst #1697 = STBX
4541  { 1696,	4,	1,	4,	281,	0,	0,	0|(1ULL<<MCID::MayStore), 0x54ULL, nullptr, OperandInfo288 },  // Inst #1696 = STBUX8
4542  { 1695,	4,	1,	4,	281,	0,	0,	0|(1ULL<<MCID::MayStore), 0x54ULL, nullptr, OperandInfo287 },  // Inst #1695 = STBUX
4543  { 1694,	4,	1,	4,	280,	0,	0,	0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, OperandInfo286 },  // Inst #1694 = STBU8
4544  { 1693,	4,	1,	4,	280,	0,	0,	0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, OperandInfo285 },  // Inst #1693 = STBU
4545  { 1692,	3,	0,	4,	302,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo152 },  // Inst #1692 = STBEPX
4546  { 1691,	3,	0,	4,	202,	0,	1,	0|(1ULL<<MCID::MayStore), 0x40ULL, ImplicitList1, OperandInfo152 },  // Inst #1691 = STBCX
4547  { 1690,	3,	0,	4,	487,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL, nullptr, OperandInfo65 },  // Inst #1690 = STBCIX
4548  { 1689,	3,	0,	4,	480,	0,	0,	0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, OperandInfo149 },  // Inst #1689 = STB8
4549  { 1688,	3,	0,	4,	480,	0,	0,	0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, OperandInfo59 },  // Inst #1688 = STB
4550  { 1687,	3,	1,	4,	375,	0,	1,	0, 0x208ULL, ImplicitList1, OperandInfo65 },  // Inst #1687 = SRW_rec
4551  { 1686,	3,	1,	4,	375,	0,	1,	0, 0x208ULL, ImplicitList1, OperandInfo67 },  // Inst #1686 = SRW8_rec
4552  { 1685,	3,	1,	4,	409,	0,	0,	0, 0x208ULL, nullptr, OperandInfo67 },  // Inst #1685 = SRW8
4553  { 1684,	3,	1,	4,	409,	0,	0,	0, 0x208ULL, nullptr, OperandInfo65 },  // Inst #1684 = SRW
4554  { 1683,	3,	1,	4,	374,	0,	1,	0, 0x8ULL, ImplicitList1, OperandInfo283 },  // Inst #1683 = SRD_rec
4555  { 1682,	3,	1,	4,	115,	0,	0,	0, 0x8ULL, nullptr, OperandInfo283 },  // Inst #1682 = SRD
4556  { 1681,	3,	1,	4,	256,	0,	2,	0, 0x108ULL, ImplicitList8, OperandInfo65 },  // Inst #1681 = SRAW_rec
4557  { 1680,	3,	1,	4,	256,	0,	2,	0, 0x108ULL, ImplicitList8, OperandInfo53 },  // Inst #1680 = SRAWI_rec
4558  { 1679,	3,	1,	4,	136,	0,	1,	0, 0x108ULL, ImplicitList5, OperandInfo53 },  // Inst #1679 = SRAWI
4559  { 1678,	3,	1,	4,	136,	0,	1,	0, 0x108ULL, ImplicitList5, OperandInfo65 },  // Inst #1678 = SRAW
4560  { 1677,	3,	1,	4,	260,	0,	2,	0, 0x8ULL, ImplicitList8, OperandInfo283 },  // Inst #1677 = SRAD_rec
4561  { 1676,	3,	1,	4,	259,	0,	2,	0, 0x8ULL, ImplicitList8, OperandInfo52 },  // Inst #1676 = SRADI_rec
4562  { 1675,	3,	1,	4,	408,	0,	1,	0, 0x8ULL, ImplicitList5, OperandInfo53 },  // Inst #1675 = SRADI_32
4563  { 1674,	3,	1,	4,	408,	0,	1,	0, 0x8ULL, ImplicitList5, OperandInfo52 },  // Inst #1674 = SRADI
4564  { 1673,	3,	1,	4,	115,	0,	1,	0, 0x8ULL, ImplicitList5, OperandInfo283 },  // Inst #1673 = SRAD
4565  { 1672,	3,	2,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo284 },  // Inst #1672 = SPLIT_QUADWORD
4566  { 1671,	3,	0,	4,	0,	0,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo252 },  // Inst #1671 = SPILL_WACC
4567  { 1670,	3,	0,	4,	0,	0,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo251 },  // Inst #1670 = SPILL_UACC
4568  { 1669,	3,	0,	4,	0,	0,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x10ULL, nullptr, OperandInfo250 },  // Inst #1669 = SPILL_QUADWORD
4569  { 1668,	3,	0,	4,	0,	0,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo249 },  // Inst #1668 = SPILL_CRBIT
4570  { 1667,	3,	0,	4,	0,	0,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo248 },  // Inst #1667 = SPILL_CR
4571  { 1666,	3,	0,	4,	0,	0,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo247 },  // Inst #1666 = SPILL_ACC
4572  { 1665,	3,	0,	4,	25,	0,	0,	0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo152 },  // Inst #1665 = SPESTWX
4573  { 1664,	3,	0,	4,	25,	0,	0,	0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo59 },  // Inst #1664 = SPESTW
4574  { 1663,	3,	1,	4,	14,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo152 },  // Inst #1663 = SPELWZX
4575  { 1662,	3,	1,	4,	14,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo59 },  // Inst #1662 = SPELWZ
4576  { 1661,	3,	1,	4,	375,	0,	1,	0, 0x208ULL, ImplicitList1, OperandInfo65 },  // Inst #1661 = SLW_rec
4577  { 1660,	3,	1,	4,	375,	0,	1,	0, 0x208ULL, ImplicitList1, OperandInfo67 },  // Inst #1660 = SLW8_rec
4578  { 1659,	3,	1,	4,	409,	0,	0,	0, 0x208ULL, nullptr, OperandInfo67 },  // Inst #1659 = SLW8
4579  { 1658,	3,	1,	4,	409,	0,	0,	0, 0x208ULL, nullptr, OperandInfo65 },  // Inst #1658 = SLW
4580  { 1657,	3,	1,	4,	374,	0,	1,	0, 0x8ULL, ImplicitList1, OperandInfo283 },  // Inst #1657 = SLD_rec
4581  { 1656,	3,	1,	4,	115,	0,	0,	0, 0x8ULL, nullptr, OperandInfo283 },  // Inst #1656 = SLD
4582  { 1655,	0,	0,	4,	314,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #1655 = SLBSYNC
4583  { 1654,	2,	0,	4,	197,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo79 },  // Inst #1654 = SLBMTE
4584  { 1653,	2,	1,	4,	196,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo79 },  // Inst #1653 = SLBMFEV
4585  { 1652,	2,	1,	4,	195,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo79 },  // Inst #1652 = SLBMFEE
4586  { 1651,	2,	0,	4,	222,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo79 },  // Inst #1651 = SLBIEG
4587  { 1650,	1,	0,	4,	194,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo189 },  // Inst #1650 = SLBIE
4588  { 1649,	0,	0,	4,	193,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #1649 = SLBIA
4589  { 1648,	2,	1,	4,	315,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, OperandInfo79 },  // Inst #1648 = SLBFEE_rec
4590  { 1647,	2,	1,	4,	0,	1,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList51, OperandInfo191 },  // Inst #1647 = SETRNDi
4591  { 1646,	2,	1,	4,	0,	1,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList51, OperandInfo282 },  // Inst #1646 = SETRND
4592  { 1645,	2,	1,	4,	398,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL, nullptr, OperandInfo281 },  // Inst #1645 = SETNBCR8
4593  { 1644,	2,	1,	4,	398,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL, nullptr, OperandInfo280 },  // Inst #1644 = SETNBCR
4594  { 1643,	2,	1,	4,	398,	0,	0,	0, 0x100ULL, nullptr, OperandInfo281 },  // Inst #1643 = SETNBC8
4595  { 1642,	2,	1,	4,	398,	0,	0,	0, 0x100ULL, nullptr, OperandInfo280 },  // Inst #1642 = SETNBC
4596  { 1641,	2,	1,	4,	0,	1,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList51, OperandInfo138 },  // Inst #1641 = SETFLM
4597  { 1640,	2,	1,	4,	398,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x300ULL, nullptr, OperandInfo281 },  // Inst #1640 = SETBCR8
4598  { 1639,	2,	1,	4,	398,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x300ULL, nullptr, OperandInfo280 },  // Inst #1639 = SETBCR
4599  { 1638,	2,	1,	4,	398,	0,	0,	0, 0x300ULL, nullptr, OperandInfo281 },  // Inst #1638 = SETBC8
4600  { 1637,	2,	1,	4,	398,	0,	0,	0, 0x300ULL, nullptr, OperandInfo280 },  // Inst #1637 = SETBC
4601  { 1636,	2,	1,	4,	397,	0,	0,	0, 0x108ULL, nullptr, OperandInfo279 },  // Inst #1636 = SETB8
4602  { 1635,	2,	1,	4,	397,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL, nullptr, OperandInfo278 },  // Inst #1635 = SETB
4603  { 1634,	4,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL, nullptr, OperandInfo271 },  // Inst #1634 = SELECT_VSSRC
4604  { 1633,	4,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL, nullptr, OperandInfo277 },  // Inst #1633 = SELECT_VSRC
4605  { 1632,	4,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL, nullptr, OperandInfo272 },  // Inst #1632 = SELECT_VSFRC
4606  { 1631,	4,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL, nullptr, OperandInfo270 },  // Inst #1631 = SELECT_VRRC
4607  { 1630,	4,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, OperandInfo276 },  // Inst #1630 = SELECT_SPE4
4608  { 1629,	4,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, OperandInfo275 },  // Inst #1629 = SELECT_SPE
4609  { 1628,	4,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL, nullptr, OperandInfo274 },  // Inst #1628 = SELECT_I8
4610  { 1627,	4,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL, nullptr, OperandInfo273 },  // Inst #1627 = SELECT_I4
4611  { 1626,	4,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL, nullptr, OperandInfo272 },  // Inst #1626 = SELECT_F8
4612  { 1625,	4,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL, nullptr, OperandInfo271 },  // Inst #1625 = SELECT_F4
4613  { 1624,	4,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL, nullptr, OperandInfo270 },  // Inst #1624 = SELECT_F16
4614  { 1623,	5,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, OperandInfo263 },  // Inst #1623 = SELECT_CC_VSSRC
4615  { 1622,	5,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, OperandInfo269 },  // Inst #1622 = SELECT_CC_VSRC
4616  { 1621,	5,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, OperandInfo264 },  // Inst #1621 = SELECT_CC_VSFRC
4617  { 1620,	5,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, OperandInfo262 },  // Inst #1620 = SELECT_CC_VRRC
4618  { 1619,	5,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo268 },  // Inst #1619 = SELECT_CC_SPE4
4619  { 1618,	5,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo267 },  // Inst #1618 = SELECT_CC_SPE
4620  { 1617,	5,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, OperandInfo266 },  // Inst #1617 = SELECT_CC_I8
4621  { 1616,	5,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, OperandInfo265 },  // Inst #1616 = SELECT_CC_I4
4622  { 1615,	5,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, OperandInfo264 },  // Inst #1615 = SELECT_CC_F8
4623  { 1614,	5,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, OperandInfo263 },  // Inst #1614 = SELECT_CC_F4
4624  { 1613,	5,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, OperandInfo262 },  // Inst #1613 = SELECT_CC_F16
4625  { 1612,	1,	0,	4,	424,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, nullptr, OperandInfo3 },  // Inst #1612 = SC
4626  { 1611,	2,	2,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo79 },  // Inst #1611 = ReadTB
4627  { 1610,	5,	1,	4,	255,	0,	1,	0, 0x8ULL, ImplicitList1, OperandInfo260 },  // Inst #1610 = RLWNM_rec
4628  { 1609,	5,	1,	4,	255,	0,	1,	0, 0x8ULL, ImplicitList1, OperandInfo261 },  // Inst #1609 = RLWNM8_rec
4629  { 1608,	5,	1,	4,	134,	0,	0,	0, 0x8ULL, nullptr, OperandInfo261 },  // Inst #1608 = RLWNM8
4630  { 1607,	5,	1,	4,	134,	0,	0,	0, 0x8ULL, nullptr, OperandInfo260 },  // Inst #1607 = RLWNM
4631  { 1606,	5,	1,	4,	255,	0,	1,	0, 0xcULL, ImplicitList1, OperandInfo258 },  // Inst #1606 = RLWINM_rec
4632  { 1605,	5,	1,	4,	255,	0,	1,	0, 0x8ULL, ImplicitList1, OperandInfo259 },  // Inst #1605 = RLWINM8_rec
4633  { 1604,	5,	1,	4,	134,	0,	0,	0, 0x8ULL, nullptr, OperandInfo259 },  // Inst #1604 = RLWINM8
4634  { 1603,	5,	1,	4,	134,	0,	0,	0, 0x8ULL, nullptr, OperandInfo258 },  // Inst #1603 = RLWINM
4635  { 1602,	6,	1,	4,	254,	0,	1,	0|(1ULL<<MCID::Commutable), 0xcULL, ImplicitList1, OperandInfo256 },  // Inst #1602 = RLWIMI_rec
4636  { 1601,	6,	1,	4,	254,	0,	1,	0, 0xcULL, ImplicitList1, OperandInfo257 },  // Inst #1601 = RLWIMI8_rec
4637  { 1600,	6,	1,	4,	129,	0,	0,	0, 0xcULL, nullptr, OperandInfo257 },  // Inst #1600 = RLWIMI8
4638  { 1599,	6,	1,	4,	129,	0,	0,	0|(1ULL<<MCID::Commutable), 0xcULL, nullptr, OperandInfo256 },  // Inst #1599 = RLWIMI
4639  { 1598,	5,	1,	4,	253,	0,	1,	0, 0x8ULL, ImplicitList1, OperandInfo255 },  // Inst #1598 = RLDIMI_rec
4640  { 1597,	5,	1,	4,	130,	0,	0,	0, 0x8ULL, nullptr, OperandInfo255 },  // Inst #1597 = RLDIMI
4641  { 1596,	4,	1,	4,	381,	0,	1,	0, 0x8ULL, ImplicitList1, OperandInfo50 },  // Inst #1596 = RLDIC_rec
4642  { 1595,	4,	1,	4,	382,	0,	1,	0, 0x8ULL, ImplicitList1, OperandInfo50 },  // Inst #1595 = RLDICR_rec
4643  { 1594,	4,	1,	4,	415,	0,	0,	0, 0x8ULL, nullptr, OperandInfo51 },  // Inst #1594 = RLDICR_32
4644  { 1593,	4,	1,	4,	415,	0,	0,	0, 0x8ULL, nullptr, OperandInfo50 },  // Inst #1593 = RLDICR
4645  { 1592,	4,	1,	4,	382,	0,	1,	0, 0x8ULL, ImplicitList1, OperandInfo50 },  // Inst #1592 = RLDICL_rec
4646  { 1591,	4,	1,	4,	382,	0,	1,	0, 0x8ULL, ImplicitList1, OperandInfo51 },  // Inst #1591 = RLDICL_32_rec
4647  { 1590,	4,	1,	4,	415,	0,	0,	0, 0x8ULL, nullptr, OperandInfo254 },  // Inst #1590 = RLDICL_32_64
4648  { 1589,	4,	1,	4,	415,	0,	0,	0, 0x8ULL, nullptr, OperandInfo51 },  // Inst #1589 = RLDICL_32
4649  { 1588,	4,	1,	4,	415,	0,	0,	0, 0x8ULL, nullptr, OperandInfo50 },  // Inst #1588 = RLDICL
4650  { 1587,	4,	1,	4,	116,	0,	0,	0, 0x8ULL, nullptr, OperandInfo50 },  // Inst #1587 = RLDIC
4651  { 1586,	4,	1,	4,	252,	0,	1,	0, 0x8ULL, ImplicitList1, OperandInfo253 },  // Inst #1586 = RLDCR_rec
4652  { 1585,	4,	1,	4,	128,	0,	0,	0, 0x8ULL, nullptr, OperandInfo253 },  // Inst #1585 = RLDCR
4653  { 1584,	4,	1,	4,	252,	0,	1,	0, 0x8ULL, ImplicitList1, OperandInfo253 },  // Inst #1584 = RLDCL_rec
4654  { 1583,	4,	1,	4,	128,	0,	0,	0, 0x8ULL, nullptr, OperandInfo253 },  // Inst #1583 = RLDCL
4655  { 1582,	0,	0,	4,	298,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #1582 = RFMCI
4656  { 1581,	0,	0,	4,	300,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #1581 = RFID
4657  { 1580,	0,	0,	4,	299,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #1580 = RFI
4658  { 1579,	1,	0,	4,	125,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, OperandInfo3 },  // Inst #1579 = RFEBB
4659  { 1578,	0,	0,	4,	298,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #1578 = RFDI
4660  { 1577,	0,	0,	4,	298,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #1577 = RFCI
4661  { 1576,	3,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo252 },  // Inst #1576 = RESTORE_WACC
4662  { 1575,	3,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo251 },  // Inst #1575 = RESTORE_UACC
4663  { 1574,	3,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10ULL, nullptr, OperandInfo250 },  // Inst #1574 = RESTORE_QUADWORD
4664  { 1573,	3,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo249 },  // Inst #1573 = RESTORE_CRBIT
4665  { 1572,	3,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo248 },  // Inst #1572 = RESTORE_CR
4666  { 1571,	3,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo247 },  // Inst #1571 = RESTORE_ACC
4667  { 1570,	0,	0,	4,	0,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #1570 = PseudoEIEIO
4668  { 1569,	3,	0,	8,	488,	0,	0,	0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, OperandInfo229 },  // Inst #1569 = PSTXVpc
4669  { 1568,	3,	0,	8,	479,	0,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo228 },  // Inst #1568 = PSTXVPpc
4670  { 1567,	3,	0,	8,	479,	0,	0,	0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, OperandInfo227 },  // Inst #1567 = PSTXVP
4671  { 1566,	3,	0,	8,	488,	0,	0,	0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, OperandInfo226 },  // Inst #1566 = PSTXV
4672  { 1565,	3,	0,	8,	488,	0,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo225 },  // Inst #1565 = PSTXSSPpc
4673  { 1564,	3,	0,	8,	488,	0,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo224 },  // Inst #1564 = PSTXSSP
4674  { 1563,	3,	0,	8,	488,	0,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo225 },  // Inst #1563 = PSTXSDpc
4675  { 1562,	3,	0,	8,	488,	0,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo224 },  // Inst #1562 = PSTXSD
4676  { 1561,	3,	0,	8,	488,	0,	0,	0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, OperandInfo219 },  // Inst #1561 = PSTWpc
4677  { 1560,	3,	0,	8,	488,	0,	0,	0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, OperandInfo218 },  // Inst #1560 = PSTW8pc
4678  { 1559,	3,	0,	8,	488,	0,	0,	0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, OperandInfo217 },  // Inst #1559 = PSTW8
4679  { 1558,	3,	0,	8,	488,	0,	0,	0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, OperandInfo216 },  // Inst #1558 = PSTW
4680  { 1557,	3,	0,	8,	488,	0,	0,	0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, OperandInfo219 },  // Inst #1557 = PSTHpc
4681  { 1556,	3,	0,	8,	488,	0,	0,	0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, OperandInfo218 },  // Inst #1556 = PSTH8pc
4682  { 1555,	3,	0,	8,	488,	0,	0,	0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, OperandInfo217 },  // Inst #1555 = PSTH8
4683  { 1554,	3,	0,	8,	488,	0,	0,	0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, OperandInfo216 },  // Inst #1554 = PSTH
4684  { 1553,	3,	0,	8,	488,	0,	0,	0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, OperandInfo223 },  // Inst #1553 = PSTFSpc
4685  { 1552,	3,	0,	8,	488,	0,	0,	0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, OperandInfo222 },  // Inst #1552 = PSTFS
4686  { 1551,	3,	0,	8,	488,	0,	0,	0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, OperandInfo221 },  // Inst #1551 = PSTFDpc
4687  { 1550,	3,	0,	8,	488,	0,	0,	0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, OperandInfo220 },  // Inst #1550 = PSTFD
4688  { 1549,	3,	0,	8,	488,	0,	0,	0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, OperandInfo218 },  // Inst #1549 = PSTDpc
4689  { 1548,	3,	0,	8,	488,	0,	0,	0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, OperandInfo217 },  // Inst #1548 = PSTD
4690  { 1547,	3,	0,	8,	488,	0,	0,	0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, OperandInfo219 },  // Inst #1547 = PSTBpc
4691  { 1546,	3,	0,	8,	488,	0,	0,	0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, OperandInfo218 },  // Inst #1546 = PSTB8pc
4692  { 1545,	3,	0,	8,	488,	0,	0,	0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, OperandInfo217 },  // Inst #1545 = PSTB8
4693  { 1544,	3,	0,	8,	488,	0,	0,	0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, OperandInfo216 },  // Inst #1544 = PSTB
4694  { 1543,	3,	2,	4,	0,	1,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList40, OperandInfo52 },  // Inst #1543 = PROBED_STACKALLOC_64
4695  { 1542,	3,	2,	4,	0,	1,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList15, OperandInfo53 },  // Inst #1542 = PROBED_STACKALLOC_32
4696  { 1541,	4,	1,	4,	0,	1,	1,	0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList40, OperandInfo119 },  // Inst #1541 = PROBED_ALLOCA_64
4697  { 1540,	4,	1,	4,	0,	1,	1,	0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList15, OperandInfo118 },  // Inst #1540 = PROBED_ALLOCA_32
4698  { 1539,	5,	2,	4,	0,	1,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList40, OperandInfo246 },  // Inst #1539 = PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64
4699  { 1538,	5,	2,	4,	0,	1,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList15, OperandInfo245 },  // Inst #1538 = PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32
4700  { 1537,	5,	2,	4,	0,	1,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList40, OperandInfo244 },  // Inst #1537 = PREPARE_PROBED_ALLOCA_64
4701  { 1536,	5,	2,	4,	0,	1,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList15, OperandInfo243 },  // Inst #1536 = PREPARE_PROBED_ALLOCA_32
4702  { 1535,	2,	2,	4,	0,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo79 },  // Inst #1535 = PPC32PICGOT
4703  { 1534,	1,	1,	4,	0,	0,	0,	0, 0x0ULL, nullptr, OperandInfo189 },  // Inst #1534 = PPC32GOT
4704  { 1533,	2,	1,	4,	362,	0,	0,	0, 0x8ULL, nullptr, OperandInfo79 },  // Inst #1533 = POPCNTW
4705  { 1532,	2,	1,	4,	362,	0,	0,	0, 0x308ULL, nullptr, OperandInfo80 },  // Inst #1532 = POPCNTD
4706  { 1531,	2,	1,	4,	365,	0,	0,	0, 0x8ULL, nullptr, OperandInfo80 },  // Inst #1531 = POPCNTB8
4707  { 1530,	2,	1,	4,	365,	0,	0,	0, 0x0ULL, nullptr, OperandInfo79 },  // Inst #1530 = POPCNTB
4708  { 1529,	7,	1,	8,	23,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo233 },  // Inst #1529 = PMXVI8GER4WSPP
4709  { 1528,	7,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo233 },  // Inst #1528 = PMXVI8GER4WPP
4710  { 1527,	6,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo232 },  // Inst #1527 = PMXVI8GER4W
4711  { 1526,	7,	1,	8,	453,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo231 },  // Inst #1526 = PMXVI8GER4SPP
4712  { 1525,	7,	1,	8,	452,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo231 },  // Inst #1525 = PMXVI8GER4PP
4713  { 1524,	6,	1,	8,	451,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo230 },  // Inst #1524 = PMXVI8GER4
4714  { 1523,	7,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo233 },  // Inst #1523 = PMXVI4GER8WPP
4715  { 1522,	6,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo232 },  // Inst #1522 = PMXVI4GER8W
4716  { 1521,	7,	1,	8,	452,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo231 },  // Inst #1521 = PMXVI4GER8PP
4717  { 1520,	6,	1,	8,	451,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo230 },  // Inst #1520 = PMXVI4GER8
4718  { 1519,	7,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo242 },  // Inst #1519 = PMXVI16GER2WPP
4719  { 1518,	6,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo232 },  // Inst #1518 = PMXVI16GER2W
4720  { 1517,	7,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo233 },  // Inst #1517 = PMXVI16GER2SWPP
4721  { 1516,	6,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo232 },  // Inst #1516 = PMXVI16GER2SW
4722  { 1515,	7,	1,	8,	452,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo231 },  // Inst #1515 = PMXVI16GER2SPP
4723  { 1514,	6,	1,	8,	451,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo230 },  // Inst #1514 = PMXVI16GER2S
4724  { 1513,	7,	1,	8,	452,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo231 },  // Inst #1513 = PMXVI16GER2PP
4725  { 1512,	6,	1,	8,	451,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo230 },  // Inst #1512 = PMXVI16GER2
4726  { 1511,	6,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo241 },  // Inst #1511 = PMXVF64GERWPP
4727  { 1510,	6,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo241 },  // Inst #1510 = PMXVF64GERWPN
4728  { 1509,	6,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo241 },  // Inst #1509 = PMXVF64GERWNP
4729  { 1508,	6,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo241 },  // Inst #1508 = PMXVF64GERWNN
4730  { 1507,	5,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo240 },  // Inst #1507 = PMXVF64GERW
4731  { 1506,	6,	1,	8,	451,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo239 },  // Inst #1506 = PMXVF64GERPP
4732  { 1505,	6,	1,	8,	451,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo239 },  // Inst #1505 = PMXVF64GERPN
4733  { 1504,	6,	1,	8,	451,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo239 },  // Inst #1504 = PMXVF64GERNP
4734  { 1503,	6,	1,	8,	451,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo239 },  // Inst #1503 = PMXVF64GERNN
4735  { 1502,	5,	1,	8,	450,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo238 },  // Inst #1502 = PMXVF64GER
4736  { 1501,	6,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo237 },  // Inst #1501 = PMXVF32GERWPP
4737  { 1500,	6,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo237 },  // Inst #1500 = PMXVF32GERWPN
4738  { 1499,	6,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo237 },  // Inst #1499 = PMXVF32GERWNP
4739  { 1498,	6,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo237 },  // Inst #1498 = PMXVF32GERWNN
4740  { 1497,	5,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo236 },  // Inst #1497 = PMXVF32GERW
4741  { 1496,	6,	1,	8,	451,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo235 },  // Inst #1496 = PMXVF32GERPP
4742  { 1495,	6,	1,	8,	451,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo235 },  // Inst #1495 = PMXVF32GERPN
4743  { 1494,	6,	1,	8,	451,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo235 },  // Inst #1494 = PMXVF32GERNP
4744  { 1493,	6,	1,	8,	451,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo235 },  // Inst #1493 = PMXVF32GERNN
4745  { 1492,	5,	1,	8,	450,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo234 },  // Inst #1492 = PMXVF32GER
4746  { 1491,	7,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo233 },  // Inst #1491 = PMXVF16GER2WPP
4747  { 1490,	7,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo233 },  // Inst #1490 = PMXVF16GER2WPN
4748  { 1489,	7,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo233 },  // Inst #1489 = PMXVF16GER2WNP
4749  { 1488,	7,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo233 },  // Inst #1488 = PMXVF16GER2WNN
4750  { 1487,	6,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo232 },  // Inst #1487 = PMXVF16GER2W
4751  { 1486,	7,	1,	8,	452,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo231 },  // Inst #1486 = PMXVF16GER2PP
4752  { 1485,	7,	1,	8,	452,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo231 },  // Inst #1485 = PMXVF16GER2PN
4753  { 1484,	7,	1,	8,	452,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo231 },  // Inst #1484 = PMXVF16GER2NP
4754  { 1483,	7,	1,	8,	452,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo231 },  // Inst #1483 = PMXVF16GER2NN
4755  { 1482,	6,	1,	8,	451,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo230 },  // Inst #1482 = PMXVF16GER2
4756  { 1481,	7,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo233 },  // Inst #1481 = PMXVBF16GER2WPP
4757  { 1480,	7,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo233 },  // Inst #1480 = PMXVBF16GER2WPN
4758  { 1479,	7,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo233 },  // Inst #1479 = PMXVBF16GER2WNP
4759  { 1478,	7,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo233 },  // Inst #1478 = PMXVBF16GER2WNN
4760  { 1477,	6,	1,	8,	5,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo232 },  // Inst #1477 = PMXVBF16GER2W
4761  { 1476,	7,	1,	8,	452,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo231 },  // Inst #1476 = PMXVBF16GER2PP
4762  { 1475,	7,	1,	8,	452,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo231 },  // Inst #1475 = PMXVBF16GER2PN
4763  { 1474,	7,	1,	8,	452,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo231 },  // Inst #1474 = PMXVBF16GER2NP
4764  { 1473,	7,	1,	8,	452,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo231 },  // Inst #1473 = PMXVBF16GER2NN
4765  { 1472,	6,	1,	8,	451,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo230 },  // Inst #1472 = PMXVBF16GER2
4766  { 1471,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, OperandInfo229 },  // Inst #1471 = PLXVpc
4767  { 1470,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo228 },  // Inst #1470 = PLXVPpc
4768  { 1469,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, OperandInfo227 },  // Inst #1469 = PLXVP
4769  { 1468,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, OperandInfo226 },  // Inst #1468 = PLXV
4770  { 1467,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo225 },  // Inst #1467 = PLXSSPpc
4771  { 1466,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo224 },  // Inst #1466 = PLXSSP
4772  { 1465,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo225 },  // Inst #1465 = PLXSDpc
4773  { 1464,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo224 },  // Inst #1464 = PLXSD
4774  { 1463,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, OperandInfo219 },  // Inst #1463 = PLWZpc
4775  { 1462,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, OperandInfo218 },  // Inst #1462 = PLWZ8pc
4776  { 1461,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, OperandInfo217 },  // Inst #1461 = PLWZ8
4777  { 1460,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, OperandInfo216 },  // Inst #1460 = PLWZ
4778  { 1459,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo219 },  // Inst #1459 = PLWApc
4779  { 1458,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, OperandInfo218 },  // Inst #1458 = PLWA8pc
4780  { 1457,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, OperandInfo217 },  // Inst #1457 = PLWA8
4781  { 1456,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo216 },  // Inst #1456 = PLWA
4782  { 1455,	2,	1,	8,	497,	0,	0,	0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x80ULL, nullptr, OperandInfo63 },  // Inst #1455 = PLI8
4783  { 1454,	2,	1,	8,	497,	0,	0,	0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x80ULL, nullptr, OperandInfo171 },  // Inst #1454 = PLI
4784  { 1453,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, OperandInfo219 },  // Inst #1453 = PLHZpc
4785  { 1452,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, OperandInfo218 },  // Inst #1452 = PLHZ8pc
4786  { 1451,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, OperandInfo217 },  // Inst #1451 = PLHZ8
4787  { 1450,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, OperandInfo216 },  // Inst #1450 = PLHZ
4788  { 1449,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, OperandInfo219 },  // Inst #1449 = PLHApc
4789  { 1448,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, OperandInfo218 },  // Inst #1448 = PLHA8pc
4790  { 1447,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, OperandInfo217 },  // Inst #1447 = PLHA8
4791  { 1446,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, OperandInfo216 },  // Inst #1446 = PLHA
4792  { 1445,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, OperandInfo223 },  // Inst #1445 = PLFSpc
4793  { 1444,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, OperandInfo222 },  // Inst #1444 = PLFS
4794  { 1443,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, OperandInfo221 },  // Inst #1443 = PLFDpc
4795  { 1442,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, OperandInfo220 },  // Inst #1442 = PLFD
4796  { 1441,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, OperandInfo218 },  // Inst #1441 = PLDpc
4797  { 1440,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, OperandInfo217 },  // Inst #1440 = PLD
4798  { 1439,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, OperandInfo219 },  // Inst #1439 = PLBZpc
4799  { 1438,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, OperandInfo218 },  // Inst #1438 = PLBZ8pc
4800  { 1437,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, OperandInfo217 },  // Inst #1437 = PLBZ8
4801  { 1436,	3,	1,	8,	442,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, OperandInfo216 },  // Inst #1436 = PLBZ
4802  { 1435,	3,	1,	4,	338,	0,	0,	0, 0x0ULL, nullptr, OperandInfo67 },  // Inst #1435 = PEXTD
4803  { 1434,	3,	1,	4,	338,	0,	0,	0, 0x0ULL, nullptr, OperandInfo67 },  // Inst #1434 = PDEPD
4804  { 1433,	3,	1,	8,	496,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo188 },  // Inst #1433 = PADDIpc
4805  { 1432,	3,	1,	4,	0,	0,	0,	0, 0x0ULL, nullptr, OperandInfo73 },  // Inst #1432 = PADDIdtprel
4806  { 1431,	3,	1,	8,	496,	0,	0,	0, 0x80ULL, nullptr, OperandInfo215 },  // Inst #1431 = PADDI8pc
4807  { 1430,	3,	1,	8,	496,	0,	0,	0, 0x80ULL, nullptr, OperandInfo52 },  // Inst #1430 = PADDI8
4808  { 1429,	3,	1,	8,	496,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, OperandInfo53 },  // Inst #1429 = PADDI
4809  { 1428,	3,	1,	4,	404,	0,	1,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList1, OperandInfo65 },  // Inst #1428 = OR_rec
4810  { 1427,	3,	1,	4,	404,	0,	0,	0, 0x8ULL, nullptr, OperandInfo52 },  // Inst #1427 = ORIS8
4811  { 1426,	3,	1,	4,	404,	0,	0,	0, 0x8ULL, nullptr, OperandInfo53 },  // Inst #1426 = ORIS
4812  { 1425,	3,	1,	4,	389,	0,	0,	0, 0x8ULL, nullptr, OperandInfo52 },  // Inst #1425 = ORI8
4813  { 1424,	3,	1,	4,	389,	0,	0,	0, 0x8ULL, nullptr, OperandInfo53 },  // Inst #1424 = ORI
4814  { 1423,	3,	1,	4,	404,	0,	1,	0, 0x8ULL, ImplicitList1, OperandInfo65 },  // Inst #1423 = ORC_rec
4815  { 1422,	3,	1,	4,	404,	0,	1,	0, 0x8ULL, ImplicitList1, OperandInfo67 },  // Inst #1422 = ORC8_rec
4816  { 1421,	3,	1,	4,	404,	0,	0,	0, 0x8ULL, nullptr, OperandInfo67 },  // Inst #1421 = ORC8
4817  { 1420,	3,	1,	4,	404,	0,	0,	0, 0x8ULL, nullptr, OperandInfo65 },  // Inst #1420 = ORC
4818  { 1419,	3,	1,	4,	404,	0,	1,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList1, OperandInfo67 },  // Inst #1419 = OR8_rec
4819  { 1418,	3,	1,	4,	404,	0,	0,	0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, OperandInfo67 },  // Inst #1418 = OR8
4820  { 1417,	3,	1,	4,	404,	0,	0,	0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, OperandInfo65 },  // Inst #1417 = OR
4821  { 1416,	3,	1,	4,	404,	0,	1,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList1, OperandInfo65 },  // Inst #1416 = NOR_rec
4822  { 1415,	3,	1,	4,	404,	0,	1,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList1, OperandInfo67 },  // Inst #1415 = NOR8_rec
4823  { 1414,	3,	1,	4,	404,	0,	0,	0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, OperandInfo67 },  // Inst #1414 = NOR8
4824  { 1413,	3,	1,	4,	404,	0,	0,	0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, OperandInfo65 },  // Inst #1413 = NOR
4825  { 1412,	0,	0,	4,	309,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr },  // Inst #1412 = NOP_GT_PWR7
4826  { 1411,	0,	0,	4,	309,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr },  // Inst #1411 = NOP_GT_PWR6
4827  { 1410,	0,	0,	4,	389,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr },  // Inst #1410 = NOP
4828  { 1409,	2,	1,	4,	392,	0,	1,	0, 0x8ULL, ImplicitList1, OperandInfo79 },  // Inst #1409 = NEG_rec
4829  { 1408,	2,	1,	4,	420,	0,	2,	0, 0x8ULL, ImplicitList4, OperandInfo79 },  // Inst #1408 = NEGO_rec
4830  { 1407,	2,	1,	4,	392,	0,	1,	0, 0x8ULL, ImplicitList3, OperandInfo79 },  // Inst #1407 = NEGO
4831  { 1406,	2,	1,	4,	392,	0,	1,	0, 0x8ULL, ImplicitList1, OperandInfo80 },  // Inst #1406 = NEG8_rec
4832  { 1405,	2,	1,	4,	420,	0,	2,	0, 0x8ULL, ImplicitList4, OperandInfo80 },  // Inst #1405 = NEG8O_rec
4833  { 1404,	2,	1,	4,	392,	0,	1,	0, 0x8ULL, ImplicitList3, OperandInfo80 },  // Inst #1404 = NEG8O
4834  { 1403,	2,	1,	4,	392,	0,	0,	0, 0x8ULL, nullptr, OperandInfo80 },  // Inst #1403 = NEG8
4835  { 1402,	2,	1,	4,	392,	0,	0,	0, 0x8ULL, nullptr, OperandInfo79 },  // Inst #1402 = NEG
4836  { 1401,	0,	0,	4,	490,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #1401 = NAP
4837  { 1400,	3,	1,	4,	404,	0,	1,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList1, OperandInfo65 },  // Inst #1400 = NAND_rec
4838  { 1399,	3,	1,	4,	404,	0,	1,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList1, OperandInfo67 },  // Inst #1399 = NAND8_rec
4839  { 1398,	3,	1,	4,	404,	0,	0,	0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, OperandInfo67 },  // Inst #1398 = NAND8
4840  { 1397,	3,	1,	4,	404,	0,	0,	0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, OperandInfo65 },  // Inst #1397 = NAND
4841  { 1396,	0,	0,	4,	0,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList50, nullptr },  // Inst #1396 = MovePCtoLR8
4842  { 1395,	0,	0,	4,	0,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList49, nullptr },  // Inst #1395 = MovePCtoLR
4843  { 1394,	0,	0,	4,	0,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList49, nullptr },  // Inst #1394 = MoveGOTtoLR
4844  { 1393,	3,	1,	4,	158,	0,	1,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList1, OperandInfo65 },  // Inst #1393 = MULLW_rec
4845  { 1392,	3,	1,	4,	158,	0,	2,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList4, OperandInfo65 },  // Inst #1392 = MULLWO_rec
4846  { 1391,	3,	1,	4,	149,	0,	1,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList3, OperandInfo65 },  // Inst #1391 = MULLWO
4847  { 1390,	3,	1,	4,	149,	0,	0,	0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, OperandInfo65 },  // Inst #1390 = MULLW
4848  { 1389,	3,	1,	4,	151,	0,	0,	0, 0x8ULL, nullptr, OperandInfo52 },  // Inst #1389 = MULLI8
4849  { 1388,	3,	1,	4,	151,	0,	0,	0, 0x8ULL, nullptr, OperandInfo53 },  // Inst #1388 = MULLI
4850  { 1387,	3,	1,	4,	159,	0,	1,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList1, OperandInfo67 },  // Inst #1387 = MULLD_rec
4851  { 1386,	3,	1,	4,	159,	0,	2,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList4, OperandInfo67 },  // Inst #1386 = MULLDO_rec
4852  { 1385,	3,	1,	4,	456,	0,	1,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList3, OperandInfo67 },  // Inst #1385 = MULLDO
4853  { 1384,	3,	1,	4,	456,	0,	0,	0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, OperandInfo67 },  // Inst #1384 = MULLD
4854  { 1383,	3,	1,	4,	158,	0,	1,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList1, OperandInfo65 },  // Inst #1383 = MULHW_rec
4855  { 1382,	3,	1,	4,	157,	0,	1,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList1, OperandInfo65 },  // Inst #1382 = MULHWU_rec
4856  { 1381,	3,	1,	4,	150,	0,	0,	0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, OperandInfo65 },  // Inst #1381 = MULHWU
4857  { 1380,	3,	1,	4,	149,	0,	0,	0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, OperandInfo65 },  // Inst #1380 = MULHW
4858  { 1379,	3,	1,	4,	158,	0,	1,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList1, OperandInfo67 },  // Inst #1379 = MULHD_rec
4859  { 1378,	3,	1,	4,	157,	0,	1,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList1, OperandInfo67 },  // Inst #1378 = MULHDU_rec
4860  { 1377,	3,	1,	4,	150,	0,	0,	0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, OperandInfo67 },  // Inst #1377 = MULHDU
4861  { 1376,	3,	1,	4,	149,	0,	0,	0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, OperandInfo67 },  // Inst #1376 = MULHD
4862  { 1375,	2,	1,	4,	117,	0,	0,	0, 0x0ULL, nullptr, OperandInfo214 },  // Inst #1375 = MTVSRWZ
4863  { 1374,	2,	1,	4,	462,	0,	0,	0, 0x0ULL, nullptr, OperandInfo209 },  // Inst #1374 = MTVSRWS
4864  { 1373,	2,	1,	4,	364,	0,	0,	0, 0x0ULL, nullptr, OperandInfo210 },  // Inst #1373 = MTVSRWM
4865  { 1372,	2,	1,	4,	117,	0,	0,	0, 0x0ULL, nullptr, OperandInfo214 },  // Inst #1372 = MTVSRWA
4866  { 1371,	2,	1,	4,	364,	0,	0,	0, 0x0ULL, nullptr, OperandInfo210 },  // Inst #1371 = MTVSRQM
4867  { 1370,	2,	1,	4,	364,	0,	0,	0, 0x0ULL, nullptr, OperandInfo210 },  // Inst #1370 = MTVSRHM
4868  { 1369,	2,	1,	4,	364,	0,	0,	0, 0x0ULL, nullptr, OperandInfo210 },  // Inst #1369 = MTVSRDM
4869  { 1368,	3,	1,	4,	101,	0,	0,	0, 0x0ULL, nullptr, OperandInfo213 },  // Inst #1368 = MTVSRDD
4870  { 1367,	2,	1,	4,	117,	0,	0,	0, 0x0ULL, nullptr, OperandInfo212 },  // Inst #1367 = MTVSRD
4871  { 1366,	2,	1,	4,	364,	0,	0,	0, 0x0ULL, nullptr, OperandInfo211 },  // Inst #1366 = MTVSRBMI
4872  { 1365,	2,	1,	4,	364,	0,	0,	0, 0x0ULL, nullptr, OperandInfo210 },  // Inst #1365 = MTVSRBM
4873  { 1364,	1,	0,	4,	141,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo197 },  // Inst #1364 = MTVSCR
4874  { 1363,	2,	1,	4,	117,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo209 },  // Inst #1363 = MTVRWZ
4875  { 1362,	2,	1,	4,	117,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo209 },  // Inst #1362 = MTVRWA
4876  { 1361,	2,	1,	4,	440,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xaULL, nullptr, OperandInfo208 },  // Inst #1361 = MTVRSAVEv
4877  { 1360,	1,	0,	4,	440,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xaULL, nullptr, OperandInfo189 },  // Inst #1360 = MTVRSAVE
4878  { 1359,	2,	1,	4,	117,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo207 },  // Inst #1359 = MTVRD
4879  { 1358,	1,	0,	4,	237,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0xaULL, nullptr, OperandInfo189 },  // Inst #1358 = MTUDSCR
4880  { 1357,	2,	0,	4,	306,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo79 },  // Inst #1357 = MTSRIN
4881  { 1356,	2,	0,	4,	439,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo171 },  // Inst #1356 = MTSR
4882  { 1355,	2,	0,	4,	237,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo201 },  // Inst #1355 = MTSPR8
4883  { 1354,	2,	0,	4,	237,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo200 },  // Inst #1354 = MTSPR
4884  { 1353,	2,	0,	4,	231,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo200 },  // Inst #1353 = MTPMR
4885  { 1352,	2,	1,	4,	132,	0,	0,	0|(1ULL<<MCID::ExtraDefRegAllocReq), 0x21ULL, nullptr, OperandInfo206 },  // Inst #1352 = MTOCRF8
4886  { 1351,	2,	1,	4,	132,	0,	0,	0|(1ULL<<MCID::ExtraDefRegAllocReq), 0x21ULL, nullptr, OperandInfo205 },  // Inst #1351 = MTOCRF
4887  { 1350,	2,	0,	4,	236,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo171 },  // Inst #1350 = MTMSRD
4888  { 1349,	2,	0,	4,	235,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo171 },  // Inst #1349 = MTMSR
4889  { 1348,	1,	0,	4,	228,	0,	1,	0, 0x9ULL, ImplicitList50, OperandInfo49 },  // Inst #1348 = MTLR8
4890  { 1347,	1,	0,	4,	228,	0,	1,	0, 0x9ULL, ImplicitList49, OperandInfo189 },  // Inst #1347 = MTLR
4891  { 1346,	2,	0,	4,	251,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL, ImplicitList42, OperandInfo204 },  // Inst #1346 = MTFSFb
4892  { 1345,	4,	0,	4,	250,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList41, OperandInfo202 },  // Inst #1345 = MTFSF_rec
4893  { 1344,	2,	0,	4,	427,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList42, OperandInfo10 },  // Inst #1344 = MTFSFIb
4894  { 1343,	3,	0,	4,	428,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList41, OperandInfo203 },  // Inst #1343 = MTFSFI_rec
4895  { 1342,	3,	0,	4,	427,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList42, OperandInfo203 },  // Inst #1342 = MTFSFI
4896  { 1341,	4,	0,	4,	427,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList42, OperandInfo202 },  // Inst #1341 = MTFSF
4897  { 1340,	1,	0,	4,	105,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL, ImplicitList42, OperandInfo3 },  // Inst #1340 = MTFSB1
4898  { 1339,	1,	0,	4,	419,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL, ImplicitList42, OperandInfo3 },  // Inst #1339 = MTFSB0
4899  { 1338,	2,	0,	4,	308,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo171 },  // Inst #1338 = MTDCR
4900  { 1337,	1,	0,	4,	228,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL, ImplicitList16, OperandInfo189 },  // Inst #1337 = MTCTRloop
4901  { 1336,	1,	0,	4,	228,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL, ImplicitList17, OperandInfo49 },  // Inst #1336 = MTCTR8loop
4902  { 1335,	1,	0,	4,	228,	0,	1,	0, 0x9ULL, ImplicitList17, OperandInfo49 },  // Inst #1335 = MTCTR8
4903  { 1334,	1,	0,	4,	228,	0,	1,	0, 0x9ULL, ImplicitList16, OperandInfo189 },  // Inst #1334 = MTCTR
4904  { 1333,	2,	0,	4,	246,	0,	0,	0|(1ULL<<MCID::ExtraDefRegAllocReq), 0x20ULL, nullptr, OperandInfo201 },  // Inst #1333 = MTCRF8
4905  { 1332,	2,	0,	4,	246,	0,	0,	0|(1ULL<<MCID::ExtraDefRegAllocReq), 0x20ULL, nullptr, OperandInfo200 },  // Inst #1332 = MTCRF
4906  { 1331,	0,	0,	4,	313,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #1331 = MSYNC
4907  { 1330,	0,	0,	4,	188,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #1330 = MSGSYNC
4908  { 1329,	3,	1,	4,	239,	0,	0,	0, 0x0ULL, nullptr, OperandInfo65 },  // Inst #1329 = MODUW
4909  { 1328,	3,	1,	4,	239,	0,	0,	0, 0x8ULL, nullptr, OperandInfo67 },  // Inst #1328 = MODUD
4910  { 1327,	3,	1,	4,	238,	0,	0,	0, 0x0ULL, nullptr, OperandInfo65 },  // Inst #1327 = MODSW
4911  { 1326,	3,	1,	4,	239,	0,	0,	0, 0x8ULL, nullptr, OperandInfo67 },  // Inst #1326 = MODSD
4912  { 1325,	2,	1,	4,	117,	0,	0,	0, 0x200ULL, nullptr, OperandInfo199 },  // Inst #1325 = MFVSRWZ
4913  { 1324,	2,	1,	4,	462,	0,	0,	0, 0x0ULL, nullptr, OperandInfo194 },  // Inst #1324 = MFVSRLD
4914  { 1323,	2,	1,	4,	117,	0,	0,	0, 0x0ULL, nullptr, OperandInfo198 },  // Inst #1323 = MFVSRD
4915  { 1322,	1,	1,	4,	140,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo197 },  // Inst #1322 = MFVSCR
4916  { 1321,	2,	1,	4,	117,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo196 },  // Inst #1321 = MFVRWZ
4917  { 1320,	2,	1,	4,	229,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL, nullptr, OperandInfo195 },  // Inst #1320 = MFVRSAVEv
4918  { 1319,	1,	1,	4,	229,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL, nullptr, OperandInfo189 },  // Inst #1319 = MFVRSAVE
4919  { 1318,	2,	1,	4,	117,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo194 },  // Inst #1318 = MFVRD
4920  { 1317,	1,	1,	4,	233,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL, nullptr, OperandInfo189 },  // Inst #1317 = MFUDSCR
4921  { 1316,	1,	1,	4,	445,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL, nullptr, OperandInfo49 },  // Inst #1316 = MFTB8
4922  { 1315,	2,	1,	4,	232,	0,	0,	0, 0x0ULL, nullptr, OperandInfo171 },  // Inst #1315 = MFTB
4923  { 1314,	2,	1,	4,	305,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo79 },  // Inst #1314 = MFSRIN
4924  { 1313,	2,	1,	4,	444,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo171 },  // Inst #1313 = MFSR
4925  { 1312,	2,	1,	4,	233,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo63 },  // Inst #1312 = MFSPR8
4926  { 1311,	2,	1,	4,	233,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo171 },  // Inst #1311 = MFSPR
4927  { 1310,	2,	1,	4,	230,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo171 },  // Inst #1310 = MFPMR
4928  { 1309,	2,	1,	4,	131,	0,	0,	0|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x21ULL, nullptr, OperandInfo193 },  // Inst #1309 = MFOCRF8
4929  { 1308,	2,	1,	4,	131,	0,	0,	0|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x21ULL, nullptr, OperandInfo192 },  // Inst #1308 = MFOCRF
4930  { 1307,	1,	1,	4,	234,	0,	0,	0, 0x0ULL, nullptr, OperandInfo189 },  // Inst #1307 = MFMSR
4931  { 1306,	1,	1,	4,	388,	1,	0,	0, 0x9ULL, ImplicitList50, OperandInfo49 },  // Inst #1306 = MFLR8
4932  { 1305,	1,	1,	4,	388,	1,	0,	0, 0x9ULL, ImplicitList49, OperandInfo189 },  // Inst #1305 = MFLR
4933  { 1304,	1,	1,	4,	416,	1,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList43, OperandInfo190 },  // Inst #1304 = MFFS_rec
4934  { 1303,	1,	1,	4,	416,	1,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL, ImplicitList42, OperandInfo190 },  // Inst #1303 = MFFSL
4935  { 1302,	2,	1,	4,	106,	1,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL, ImplicitList42, OperandInfo191 },  // Inst #1302 = MFFSCRNI
4936  { 1301,	2,	1,	4,	106,	1,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL, ImplicitList42, OperandInfo138 },  // Inst #1301 = MFFSCRN
4937  { 1300,	1,	1,	4,	257,	1,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL, ImplicitList42, OperandInfo190 },  // Inst #1300 = MFFSCE
4938  { 1299,	2,	1,	4,	106,	1,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL, ImplicitList42, OperandInfo191 },  // Inst #1299 = MFFSCDRNI
4939  { 1298,	2,	1,	4,	106,	1,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL, ImplicitList42, OperandInfo138 },  // Inst #1298 = MFFSCDRN
4940  { 1297,	1,	1,	4,	416,	1,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL, ImplicitList42, OperandInfo190 },  // Inst #1297 = MFFS
4941  { 1296,	2,	1,	4,	307,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo171 },  // Inst #1296 = MFDCR
4942  { 1295,	1,	1,	4,	388,	1,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL, ImplicitList17, OperandInfo49 },  // Inst #1295 = MFCTR8
4943  { 1294,	1,	1,	4,	388,	1,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL, ImplicitList16, OperandInfo189 },  // Inst #1294 = MFCTR
4944  { 1293,	1,	1,	4,	258,	0,	0,	0|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x20ULL, nullptr, OperandInfo49 },  // Inst #1293 = MFCR8
4945  { 1292,	1,	1,	4,	258,	0,	0,	0|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x20ULL, nullptr, OperandInfo189 },  // Inst #1292 = MFCR
4946  { 1291,	3,	1,	4,	495,	0,	0,	0, 0x1ULL, nullptr, OperandInfo188 },  // Inst #1291 = MFBHRBE
4947  { 1290,	1,	1,	4,	123,	0,	0,	0, 0x0ULL, nullptr, OperandInfo187 },  // Inst #1290 = MCRXRX
4948  { 1289,	2,	1,	4,	249,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo186 },  // Inst #1289 = MCRFS
4949  { 1288,	2,	1,	4,	122,	0,	0,	0, 0x21ULL, nullptr, OperandInfo186 },  // Inst #1288 = MCRF
4950  { 1287,	1,	0,	4,	301,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo3 },  // Inst #1287 = MBAR
4951  { 1286,	4,	1,	4,	148,	0,	0,	0, 0x8ULL, nullptr, OperandInfo184 },  // Inst #1286 = MADDLD8
4952  { 1285,	4,	1,	4,	148,	0,	0,	0, 0x8ULL, nullptr, OperandInfo185 },  // Inst #1285 = MADDLD
4953  { 1284,	4,	1,	4,	148,	0,	0,	0, 0x8ULL, nullptr, OperandInfo184 },  // Inst #1284 = MADDHDU
4954  { 1283,	4,	1,	4,	148,	0,	0,	0, 0x8ULL, nullptr, OperandInfo184 },  // Inst #1283 = MADDHD
4955  { 1282,	3,	1,	4,	177,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo178 },  // Inst #1282 = LXVX
4956  { 1281,	3,	1,	4,	177,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo178 },  // Inst #1281 = LXVWSX
4957  { 1280,	3,	1,	4,	216,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo178 },  // Inst #1280 = LXVW4X
4958  { 1279,	3,	1,	4,	433,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo178 },  // Inst #1279 = LXVRWX
4959  { 1278,	3,	1,	4,	14,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL, nullptr, OperandInfo180 },  // Inst #1278 = LXVRLL
4960  { 1277,	3,	1,	4,	14,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL, nullptr, OperandInfo180 },  // Inst #1277 = LXVRL
4961  { 1276,	3,	1,	4,	433,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo178 },  // Inst #1276 = LXVRHX
4962  { 1275,	3,	1,	4,	433,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo178 },  // Inst #1275 = LXVRDX
4963  { 1274,	3,	1,	4,	433,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo178 },  // Inst #1274 = LXVRBX
4964  { 1273,	3,	1,	4,	443,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo183 },  // Inst #1273 = LXVPX
4965  { 1272,	3,	1,	4,	40,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL, nullptr, OperandInfo182 },  // Inst #1272 = LXVPRLL
4966  { 1271,	3,	1,	4,	40,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL, nullptr, OperandInfo182 },  // Inst #1271 = LXVPRL
4967  { 1270,	3,	1,	4,	443,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo181 },  // Inst #1270 = LXVP
4968  { 1269,	3,	1,	4,	175,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo180 },  // Inst #1269 = LXVLL
4969  { 1268,	3,	1,	4,	175,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo180 },  // Inst #1268 = LXVL
4970  { 1267,	2,	1,	4,	461,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo179 },  // Inst #1267 = LXVKQ
4971  { 1266,	3,	1,	4,	216,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo178 },  // Inst #1266 = LXVH8X
4972  { 1265,	3,	1,	4,	216,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo178 },  // Inst #1265 = LXVDSX
4973  { 1264,	3,	1,	4,	177,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo178 },  // Inst #1264 = LXVD2X
4974  { 1263,	3,	1,	4,	177,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo178 },  // Inst #1263 = LXVB16X
4975  { 1262,	3,	1,	4,	177,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo177 },  // Inst #1262 = LXV
4976  { 1261,	3,	1,	4,	212,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo64 },  // Inst #1261 = LXSSPX
4977  { 1260,	3,	1,	4,	212,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo176 },  // Inst #1260 = LXSSP
4978  { 1259,	3,	1,	4,	177,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo60 },  // Inst #1259 = LXSIWZX
4979  { 1258,	3,	1,	4,	209,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo60 },  // Inst #1258 = LXSIWAX
4980  { 1257,	3,	1,	4,	177,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo60 },  // Inst #1257 = LXSIHZX
4981  { 1256,	3,	1,	4,	177,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo60 },  // Inst #1256 = LXSIBZX
4982  { 1255,	3,	1,	4,	177,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo60 },  // Inst #1255 = LXSDX
4983  { 1254,	3,	1,	4,	177,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo176 },  // Inst #1254 = LXSD
4984  { 1253,	3,	1,	4,	432,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo175 },  // Inst #1253 = LWZtocL
4985  { 1252,	3,	1,	4,	432,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo77 },  // Inst #1252 = LWZtoc
4986  { 1251,	3,	1,	4,	435,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x8ULL, nullptr, OperandInfo159 },  // Inst #1251 = LWZXTLS_32
4987  { 1250,	3,	1,	4,	435,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x8ULL, nullptr, OperandInfo158 },  // Inst #1250 = LWZXTLS_
4988  { 1249,	3,	1,	4,	435,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x8ULL, nullptr, OperandInfo158 },  // Inst #1249 = LWZXTLS
4989  { 1248,	3,	1,	4,	435,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x250ULL, nullptr, OperandInfo157 },  // Inst #1248 = LWZX8
4990  { 1247,	3,	1,	4,	435,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x250ULL, nullptr, OperandInfo152 },  // Inst #1247 = LWZX
4991  { 1246,	4,	2,	4,	200,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x50ULL, nullptr, OperandInfo156 },  // Inst #1246 = LWZUX8
4992  { 1245,	4,	2,	4,	200,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x50ULL, nullptr, OperandInfo155 },  // Inst #1245 = LWZUX
4993  { 1244,	4,	2,	4,	199,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, OperandInfo154 },  // Inst #1244 = LWZU8
4994  { 1243,	4,	2,	4,	199,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, OperandInfo153 },  // Inst #1243 = LWZU
4995  { 1242,	3,	1,	4,	438,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL, nullptr, OperandInfo65 },  // Inst #1242 = LWZCIX
4996  { 1241,	3,	1,	4,	430,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x210ULL, nullptr, OperandInfo149 },  // Inst #1241 = LWZ8
4997  { 1240,	3,	1,	4,	430,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x210ULL, nullptr, OperandInfo59 },  // Inst #1240 = LWZ
4998  { 1239,	3,	1,	4,	301,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo152 },  // Inst #1239 = LWEPX
4999  { 1238,	3,	1,	4,	430,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x250ULL, nullptr, OperandInfo157 },  // Inst #1238 = LWBRX8
5000  { 1237,	3,	1,	4,	430,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x250ULL, nullptr, OperandInfo152 },  // Inst #1237 = LWBRX
5001  { 1236,	3,	1,	4,	206,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x114ULL, nullptr, OperandInfo59 },  // Inst #1236 = LWA_32
5002  { 1235,	3,	1,	4,	204,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x154ULL, nullptr, OperandInfo152 },  // Inst #1235 = LWAX_32
5003  { 1234,	3,	1,	4,	204,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x154ULL, nullptr, OperandInfo157 },  // Inst #1234 = LWAX
5004  { 1233,	4,	2,	4,	215,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x50ULL, nullptr, OperandInfo156 },  // Inst #1233 = LWAUX
5005  { 1232,	3,	1,	4,	291,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x40ULL, nullptr, OperandInfo53 },  // Inst #1232 = LWAT
5006  { 1231,	3,	1,	4,	183,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo152 },  // Inst #1231 = LWARXL
5007  { 1230,	3,	1,	4,	183,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo152 },  // Inst #1230 = LWARX
5008  { 1229,	3,	1,	4,	206,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x114ULL, nullptr, OperandInfo149 },  // Inst #1229 = LWA
5009  { 1228,	3,	1,	4,	176,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x50ULL, nullptr, OperandInfo174 },  // Inst #1228 = LVXL
5010  { 1227,	3,	1,	4,	176,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x50ULL, nullptr, OperandInfo174 },  // Inst #1227 = LVX
5011  { 1226,	3,	1,	4,	164,	0,	0,	0, 0x50ULL, nullptr, OperandInfo174 },  // Inst #1226 = LVSR
5012  { 1225,	3,	1,	4,	164,	0,	0,	0, 0x50ULL, nullptr, OperandInfo174 },  // Inst #1225 = LVSL
5013  { 1224,	3,	1,	4,	176,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x50ULL, nullptr, OperandInfo174 },  // Inst #1224 = LVEWX
5014  { 1223,	3,	1,	4,	176,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x50ULL, nullptr, OperandInfo174 },  // Inst #1223 = LVEHX
5015  { 1222,	3,	1,	4,	176,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x50ULL, nullptr, OperandInfo174 },  // Inst #1222 = LVEBX
5016  { 1221,	3,	1,	4,	441,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL, nullptr, OperandInfo53 },  // Inst #1221 = LSWI
5017  { 1220,	3,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x10ULL, nullptr, OperandInfo173 },  // Inst #1220 = LQX_PSEUDO
5018  { 1219,	3,	1,	4,	48,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo173 },  // Inst #1219 = LQARXL
5019  { 1218,	3,	1,	4,	48,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo173 },  // Inst #1218 = LQARX
5020  { 1217,	3,	1,	4,	47,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10ULL, nullptr, OperandInfo172 },  // Inst #1217 = LQ
5021  { 1216,	3,	1,	4,	191,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo59 },  // Inst #1216 = LMW
5022  { 1215,	2,	1,	4,	392,	0,	0,	0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x108ULL, nullptr, OperandInfo63 },  // Inst #1215 = LIS8
5023  { 1214,	2,	1,	4,	392,	0,	0,	0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x108ULL, nullptr, OperandInfo171 },  // Inst #1214 = LIS
5024  { 1213,	2,	1,	4,	392,	0,	0,	0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x108ULL, nullptr, OperandInfo63 },  // Inst #1213 = LI8
5025  { 1212,	2,	1,	4,	392,	0,	0,	0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x108ULL, nullptr, OperandInfo171 },  // Inst #1212 = LI
5026  { 1211,	3,	1,	4,	435,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x8ULL, nullptr, OperandInfo159 },  // Inst #1211 = LHZXTLS_32
5027  { 1210,	3,	1,	4,	435,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x8ULL, nullptr, OperandInfo158 },  // Inst #1210 = LHZXTLS_
5028  { 1209,	3,	1,	4,	435,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x8ULL, nullptr, OperandInfo158 },  // Inst #1209 = LHZXTLS
5029  { 1208,	3,	1,	4,	435,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x350ULL, nullptr, OperandInfo157 },  // Inst #1208 = LHZX8
5030  { 1207,	3,	1,	4,	435,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x350ULL, nullptr, OperandInfo152 },  // Inst #1207 = LHZX
5031  { 1206,	4,	2,	4,	200,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x50ULL, nullptr, OperandInfo156 },  // Inst #1206 = LHZUX8
5032  { 1205,	4,	2,	4,	200,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x50ULL, nullptr, OperandInfo155 },  // Inst #1205 = LHZUX
5033  { 1204,	4,	2,	4,	199,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, OperandInfo154 },  // Inst #1204 = LHZU8
5034  { 1203,	4,	2,	4,	199,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, OperandInfo153 },  // Inst #1203 = LHZU
5035  { 1202,	3,	1,	4,	438,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL, nullptr, OperandInfo65 },  // Inst #1202 = LHZCIX
5036  { 1201,	3,	1,	4,	430,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x310ULL, nullptr, OperandInfo149 },  // Inst #1201 = LHZ8
5037  { 1200,	3,	1,	4,	430,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x310ULL, nullptr, OperandInfo59 },  // Inst #1200 = LHZ
5038  { 1199,	3,	1,	4,	301,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo152 },  // Inst #1199 = LHEPX
5039  { 1198,	3,	1,	4,	430,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x250ULL, nullptr, OperandInfo157 },  // Inst #1198 = LHBRX8
5040  { 1197,	3,	1,	4,	430,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x250ULL, nullptr, OperandInfo152 },  // Inst #1197 = LHBRX
5041  { 1196,	3,	1,	4,	204,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x154ULL, nullptr, OperandInfo157 },  // Inst #1196 = LHAX8
5042  { 1195,	3,	1,	4,	204,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x154ULL, nullptr, OperandInfo152 },  // Inst #1195 = LHAX
5043  { 1194,	4,	2,	4,	215,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x50ULL, nullptr, OperandInfo156 },  // Inst #1194 = LHAUX8
5044  { 1193,	4,	2,	4,	215,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x50ULL, nullptr, OperandInfo155 },  // Inst #1193 = LHAUX
5045  { 1192,	4,	2,	4,	214,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, OperandInfo154 },  // Inst #1192 = LHAU8
5046  { 1191,	4,	2,	4,	214,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, OperandInfo153 },  // Inst #1191 = LHAU
5047  { 1190,	3,	1,	4,	183,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo152 },  // Inst #1190 = LHARXL
5048  { 1189,	3,	1,	4,	183,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo152 },  // Inst #1189 = LHARX
5049  { 1188,	3,	1,	4,	204,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x114ULL, nullptr, OperandInfo149 },  // Inst #1188 = LHA8
5050  { 1187,	3,	1,	4,	204,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x114ULL, nullptr, OperandInfo59 },  // Inst #1187 = LHA
5051  { 1186,	3,	1,	4,	211,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x50ULL, nullptr, OperandInfo170 },  // Inst #1186 = LFSX
5052  { 1185,	4,	2,	4,	278,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x50ULL, nullptr, OperandInfo169 },  // Inst #1185 = LFSUX
5053  { 1184,	4,	2,	4,	277,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, OperandInfo168 },  // Inst #1184 = LFSU
5054  { 1183,	3,	1,	4,	211,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, OperandInfo167 },  // Inst #1183 = LFS
5055  { 1182,	3,	1,	4,	192,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x50ULL, nullptr, OperandInfo164 },  // Inst #1182 = LFIWZX
5056  { 1181,	3,	1,	4,	208,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x50ULL, nullptr, OperandInfo164 },  // Inst #1181 = LFIWAX
5057  { 1180,	3,	1,	4,	192,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x50ULL, nullptr, OperandInfo164 },  // Inst #1180 = LFDX
5058  { 1179,	4,	2,	4,	287,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x50ULL, nullptr, OperandInfo166 },  // Inst #1179 = LFDUX
5059  { 1178,	4,	2,	4,	286,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, OperandInfo165 },  // Inst #1178 = LFDU
5060  { 1177,	3,	1,	4,	303,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo164 },  // Inst #1177 = LFDEPX
5061  { 1176,	3,	1,	4,	192,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, OperandInfo163 },  // Inst #1176 = LFD
5062  { 1175,	3,	1,	4,	432,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo78 },  // Inst #1175 = LDtocL
5063  { 1174,	3,	1,	4,	432,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, OperandInfo162 },  // Inst #1174 = LDtocJTI
5064  { 1173,	3,	1,	4,	432,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, OperandInfo162 },  // Inst #1173 = LDtocCPT
5065  { 1172,	3,	1,	4,	432,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, OperandInfo162 },  // Inst #1172 = LDtocBA
5066  { 1171,	3,	1,	4,	432,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, OperandInfo162 },  // Inst #1171 = LDtoc
5067  { 1170,	3,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo161 },  // Inst #1170 = LDgotTprelL32
5068  { 1169,	3,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo160 },  // Inst #1169 = LDgotTprelL
5069  { 1168,	3,	1,	4,	436,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x8ULL, nullptr, OperandInfo158 },  // Inst #1168 = LDXTLS_
5070  { 1167,	3,	1,	4,	436,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x8ULL, nullptr, OperandInfo158 },  // Inst #1167 = LDXTLS
5071  { 1166,	3,	1,	4,	436,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x50ULL, nullptr, OperandInfo157 },  // Inst #1166 = LDX
5072  { 1165,	4,	2,	4,	285,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x50ULL, nullptr, OperandInfo156 },  // Inst #1165 = LDUX
5073  { 1164,	4,	2,	4,	284,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, OperandInfo154 },  // Inst #1164 = LDU
5074  { 1163,	3,	1,	4,	438,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL, nullptr, OperandInfo65 },  // Inst #1163 = LDCIX
5075  { 1162,	3,	1,	4,	430,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x50ULL, nullptr, OperandInfo157 },  // Inst #1162 = LDBRX
5076  { 1161,	3,	1,	4,	291,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x40ULL, nullptr, OperandInfo52 },  // Inst #1161 = LDAT
5077  { 1160,	3,	1,	4,	185,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo157 },  // Inst #1160 = LDARXL
5078  { 1159,	3,	1,	4,	185,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo157 },  // Inst #1159 = LDARX
5079  { 1158,	3,	1,	4,	431,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, OperandInfo149 },  // Inst #1158 = LD
5080  { 1157,	3,	1,	4,	435,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x8ULL, nullptr, OperandInfo159 },  // Inst #1157 = LBZXTLS_32
5081  { 1156,	3,	1,	4,	435,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x8ULL, nullptr, OperandInfo158 },  // Inst #1156 = LBZXTLS_
5082  { 1155,	3,	1,	4,	435,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x8ULL, nullptr, OperandInfo158 },  // Inst #1155 = LBZXTLS
5083  { 1154,	3,	1,	4,	435,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x350ULL, nullptr, OperandInfo157 },  // Inst #1154 = LBZX8
5084  { 1153,	3,	1,	4,	435,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x350ULL, nullptr, OperandInfo152 },  // Inst #1153 = LBZX
5085  { 1152,	4,	2,	4,	283,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x50ULL, nullptr, OperandInfo156 },  // Inst #1152 = LBZUX8
5086  { 1151,	4,	2,	4,	283,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x50ULL, nullptr, OperandInfo155 },  // Inst #1151 = LBZUX
5087  { 1150,	4,	2,	4,	282,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, OperandInfo154 },  // Inst #1150 = LBZU8
5088  { 1149,	4,	2,	4,	282,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, OperandInfo153 },  // Inst #1149 = LBZU
5089  { 1148,	3,	1,	4,	438,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL, nullptr, OperandInfo65 },  // Inst #1148 = LBZCIX
5090  { 1147,	3,	1,	4,	430,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x310ULL, nullptr, OperandInfo149 },  // Inst #1147 = LBZ8
5091  { 1146,	3,	1,	4,	430,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x310ULL, nullptr, OperandInfo59 },  // Inst #1146 = LBZ
5092  { 1145,	3,	1,	4,	301,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo152 },  // Inst #1145 = LBEPX
5093  { 1144,	3,	1,	4,	183,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo152 },  // Inst #1144 = LBARXL
5094  { 1143,	3,	1,	4,	183,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo152 },  // Inst #1143 = LBARX
5095  { 1142,	3,	1,	4,	119,	0,	0,	0, 0x8ULL, nullptr, OperandInfo73 },  // Inst #1142 = LA8
5096  { 1141,	3,	1,	4,	119,	0,	0,	0, 0x8ULL, nullptr, OperandInfo72 },  // Inst #1141 = LA
5097  { 1140,	0,	0,	4,	187,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #1140 = ISYNC
5098  { 1139,	4,	1,	4,	137,	0,	0,	0|(1ULL<<MCID::Select), 0x8ULL, nullptr, OperandInfo151 },  // Inst #1139 = ISEL8
5099  { 1138,	4,	1,	4,	137,	0,	0,	0|(1ULL<<MCID::Select), 0x8ULL, nullptr, OperandInfo150 },  // Inst #1138 = ISEL
5100  { 1137,	2,	0,	4,	492,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo79 },  // Inst #1137 = ICCCI
5101  { 1136,	3,	0,	4,	182,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo106 },  // Inst #1136 = ICBTLS
5102  { 1135,	3,	0,	4,	435,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo106 },  // Inst #1135 = ICBT
5103  { 1134,	3,	0,	4,	492,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo106 },  // Inst #1134 = ICBLQ
5104  { 1133,	3,	0,	4,	493,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo106 },  // Inst #1133 = ICBLC
5105  { 1132,	2,	0,	4,	181,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo54 },  // Inst #1132 = ICBIEP
5106  { 1131,	2,	0,	4,	477,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo54 },  // Inst #1131 = ICBI
5107  { 1130,	0,	0,	4,	422,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #1130 = HRFID
5108  { 1129,	3,	0,	4,	343,	0,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo149 },  // Inst #1129 = HASHSTP8
5109  { 1128,	3,	0,	4,	343,	0,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo59 },  // Inst #1128 = HASHSTP
5110  { 1127,	3,	0,	4,	343,	0,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo149 },  // Inst #1127 = HASHST8
5111  { 1126,	3,	0,	4,	343,	0,	0,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo59 },  // Inst #1126 = HASHST
5112  { 1125,	3,	0,	4,	312,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo149 },  // Inst #1125 = HASHCHKP8
5113  { 1124,	3,	0,	4,	312,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo59 },  // Inst #1124 = HASHCHKP
5114  { 1123,	3,	0,	4,	312,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo149 },  // Inst #1123 = HASHCHK8
5115  { 1122,	3,	0,	4,	312,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo59 },  // Inst #1122 = HASHCHK
5116  { 1121,	3,	1,	4,	0,	0,	18,	0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, ImplicitList48, OperandInfo69 },  // Inst #1121 = GETtlsldADDRPCREL
5117  { 1120,	3,	1,	4,	0,	0,	17,	0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, ImplicitList45, OperandInfo66 },  // Inst #1120 = GETtlsldADDR32
5118  { 1119,	3,	1,	4,	0,	0,	17,	0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, ImplicitList44, OperandInfo69 },  // Inst #1119 = GETtlsldADDR
5119  { 1118,	3,	1,	8,	0,	0,	18,	0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, ImplicitList48, OperandInfo69 },  // Inst #1118 = GETtlsADDRPCREL
5120  { 1117,	3,	1,	4,	0,	0,	6,	0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, ImplicitList47, OperandInfo67 },  // Inst #1117 = GETtlsADDR64AIX
5121  { 1116,	3,	1,	4,	0,	0,	6,	0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, ImplicitList46, OperandInfo65 },  // Inst #1116 = GETtlsADDR32AIX
5122  { 1115,	3,	1,	4,	0,	0,	17,	0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, ImplicitList45, OperandInfo66 },  // Inst #1115 = GETtlsADDR32
5123  { 1114,	3,	1,	8,	0,	0,	17,	0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, ImplicitList44, OperandInfo69 },  // Inst #1114 = GETtlsADDR
5124  { 1113,	2,	1,	4,	363,	0,	0,	0, 0x18ULL, nullptr, OperandInfo148 },  // Inst #1113 = FTSQRT
5125  { 1112,	3,	1,	4,	110,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x18ULL, nullptr, OperandInfo143 },  // Inst #1112 = FTDIV
5126  { 1111,	3,	1,	4,	161,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList43, OperandInfo140 },  // Inst #1111 = FSUB_rec
5127  { 1110,	3,	1,	4,	330,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList43, OperandInfo141 },  // Inst #1110 = FSUBS_rec
5128  { 1109,	3,	1,	4,	322,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList42, OperandInfo141 },  // Inst #1109 = FSUBS
5129  { 1108,	3,	1,	4,	153,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList42, OperandInfo140 },  // Inst #1108 = FSUB
5130  { 1107,	2,	1,	4,	267,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList43, OperandInfo138 },  // Inst #1107 = FSQRT_rec
5131  { 1106,	2,	1,	4,	270,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList43, OperandInfo139 },  // Inst #1106 = FSQRTS_rec
5132  { 1105,	2,	1,	4,	269,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList42, OperandInfo139 },  // Inst #1105 = FSQRTS
5133  { 1104,	2,	1,	4,	264,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList42, OperandInfo138 },  // Inst #1104 = FSQRT
5134  { 1103,	4,	1,	4,	156,	0,	1,	0, 0x18ULL, ImplicitList41, OperandInfo147 },  // Inst #1103 = FSELS_rec
5135  { 1102,	4,	1,	4,	152,	0,	0,	0, 0x18ULL, nullptr, OperandInfo147 },  // Inst #1102 = FSELS
5136  { 1101,	4,	1,	4,	156,	0,	1,	0, 0x18ULL, ImplicitList41, OperandInfo145 },  // Inst #1101 = FSELD_rec
5137  { 1100,	4,	1,	4,	152,	0,	0,	0, 0x18ULL, nullptr, OperandInfo145 },  // Inst #1100 = FSELD
5138  { 1099,	2,	1,	4,	332,	0,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList41, OperandInfo138 },  // Inst #1099 = FRSQRTE_rec
5139  { 1098,	2,	1,	4,	332,	0,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList41, OperandInfo139 },  // Inst #1098 = FRSQRTES_rec
5140  { 1097,	2,	1,	4,	318,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, nullptr, OperandInfo139 },  // Inst #1097 = FRSQRTES
5141  { 1096,	2,	1,	4,	318,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, nullptr, OperandInfo138 },  // Inst #1096 = FRSQRTE
5142  { 1095,	2,	1,	4,	332,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList43, OperandInfo142 },  // Inst #1095 = FRSP_rec
5143  { 1094,	2,	1,	4,	318,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList42, OperandInfo142 },  // Inst #1094 = FRSP
5144  { 1093,	2,	1,	4,	332,	0,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList41, OperandInfo139 },  // Inst #1093 = FRIZS_rec
5145  { 1092,	2,	1,	4,	318,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, nullptr, OperandInfo139 },  // Inst #1092 = FRIZS
5146  { 1091,	2,	1,	4,	332,	0,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList41, OperandInfo138 },  // Inst #1091 = FRIZD_rec
5147  { 1090,	2,	1,	4,	318,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, nullptr, OperandInfo138 },  // Inst #1090 = FRIZD
5148  { 1089,	2,	1,	4,	332,	0,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList41, OperandInfo139 },  // Inst #1089 = FRIPS_rec
5149  { 1088,	2,	1,	4,	318,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, nullptr, OperandInfo139 },  // Inst #1088 = FRIPS
5150  { 1087,	2,	1,	4,	332,	0,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList41, OperandInfo138 },  // Inst #1087 = FRIPD_rec
5151  { 1086,	2,	1,	4,	318,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, nullptr, OperandInfo138 },  // Inst #1086 = FRIPD
5152  { 1085,	2,	1,	4,	332,	0,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList41, OperandInfo139 },  // Inst #1085 = FRINS_rec
5153  { 1084,	2,	1,	4,	318,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, nullptr, OperandInfo139 },  // Inst #1084 = FRINS
5154  { 1083,	2,	1,	4,	332,	0,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList41, OperandInfo138 },  // Inst #1083 = FRIND_rec
5155  { 1082,	2,	1,	4,	318,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, nullptr, OperandInfo138 },  // Inst #1082 = FRIND
5156  { 1081,	2,	1,	4,	332,	0,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList41, OperandInfo139 },  // Inst #1081 = FRIMS_rec
5157  { 1080,	2,	1,	4,	318,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, nullptr, OperandInfo139 },  // Inst #1080 = FRIMS
5158  { 1079,	2,	1,	4,	332,	0,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList41, OperandInfo138 },  // Inst #1079 = FRIMD_rec
5159  { 1078,	2,	1,	4,	318,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, nullptr, OperandInfo138 },  // Inst #1078 = FRIMD
5160  { 1077,	2,	1,	4,	332,	0,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList41, OperandInfo138 },  // Inst #1077 = FRE_rec
5161  { 1076,	2,	1,	4,	332,	0,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList41, OperandInfo139 },  // Inst #1076 = FRES_rec
5162  { 1075,	2,	1,	4,	318,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, nullptr, OperandInfo139 },  // Inst #1075 = FRES
5163  { 1074,	2,	1,	4,	318,	0,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, nullptr, OperandInfo138 },  // Inst #1074 = FRE
5164  { 1073,	4,	1,	4,	162,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList43, OperandInfo145 },  // Inst #1073 = FNMSUB_rec
5165  { 1072,	4,	1,	4,	160,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList43, OperandInfo146 },  // Inst #1072 = FNMSUBS_rec
5166  { 1071,	4,	1,	4,	152,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList42, OperandInfo146 },  // Inst #1071 = FNMSUBS
5167  { 1070,	4,	1,	4,	154,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList42, OperandInfo145 },  // Inst #1070 = FNMSUB
5168  { 1069,	4,	1,	4,	162,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList43, OperandInfo145 },  // Inst #1069 = FNMADD_rec
5169  { 1068,	4,	1,	4,	160,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList43, OperandInfo146 },  // Inst #1068 = FNMADDS_rec
5170  { 1067,	4,	1,	4,	152,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList42, OperandInfo146 },  // Inst #1067 = FNMADDS
5171  { 1066,	4,	1,	4,	154,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList42, OperandInfo145 },  // Inst #1066 = FNMADD
5172  { 1065,	2,	1,	4,	423,	0,	1,	0, 0x18ULL, ImplicitList41, OperandInfo139 },  // Inst #1065 = FNEGS_rec
5173  { 1064,	2,	1,	4,	396,	0,	0,	0, 0x18ULL, nullptr, OperandInfo139 },  // Inst #1064 = FNEGS
5174  { 1063,	2,	1,	4,	423,	0,	1,	0, 0x18ULL, ImplicitList41, OperandInfo138 },  // Inst #1063 = FNEGD_rec
5175  { 1062,	2,	1,	4,	396,	0,	0,	0, 0x18ULL, nullptr, OperandInfo138 },  // Inst #1062 = FNEGD
5176  { 1061,	2,	1,	4,	423,	0,	1,	0, 0x18ULL, ImplicitList41, OperandInfo139 },  // Inst #1061 = FNABSS_rec
5177  { 1060,	2,	1,	4,	396,	0,	0,	0, 0x18ULL, nullptr, OperandInfo139 },  // Inst #1060 = FNABSS
5178  { 1059,	2,	1,	4,	423,	0,	1,	0, 0x18ULL, ImplicitList41, OperandInfo138 },  // Inst #1059 = FNABSD_rec
5179  { 1058,	2,	1,	4,	396,	0,	0,	0, 0x18ULL, nullptr, OperandInfo138 },  // Inst #1058 = FNABSD
5180  { 1057,	3,	1,	4,	331,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList43, OperandInfo140 },  // Inst #1057 = FMUL_rec
5181  { 1056,	3,	1,	4,	330,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList43, OperandInfo141 },  // Inst #1056 = FMULS_rec
5182  { 1055,	3,	1,	4,	322,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList42, OperandInfo141 },  // Inst #1055 = FMULS
5183  { 1054,	3,	1,	4,	323,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList42, OperandInfo140 },  // Inst #1054 = FMUL
5184  { 1053,	4,	1,	4,	162,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList43, OperandInfo145 },  // Inst #1053 = FMSUB_rec
5185  { 1052,	4,	1,	4,	160,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList43, OperandInfo146 },  // Inst #1052 = FMSUBS_rec
5186  { 1051,	4,	1,	4,	152,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList42, OperandInfo146 },  // Inst #1051 = FMSUBS
5187  { 1050,	4,	1,	4,	154,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList42, OperandInfo145 },  // Inst #1050 = FMSUB
5188  { 1049,	2,	1,	4,	423,	0,	1,	0, 0x0ULL, ImplicitList41, OperandInfo139 },  // Inst #1049 = FMR_rec
5189  { 1048,	2,	1,	4,	396,	0,	0,	0, 0x0ULL, nullptr, OperandInfo139 },  // Inst #1048 = FMR
5190  { 1047,	4,	1,	4,	162,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList43, OperandInfo145 },  // Inst #1047 = FMADD_rec
5191  { 1046,	4,	1,	4,	160,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList43, OperandInfo146 },  // Inst #1046 = FMADDS_rec
5192  { 1045,	4,	1,	4,	152,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList42, OperandInfo146 },  // Inst #1045 = FMADDS
5193  { 1044,	4,	1,	4,	154,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList42, OperandInfo145 },  // Inst #1044 = FMADD
5194  { 1043,	3,	1,	4,	262,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList43, OperandInfo140 },  // Inst #1043 = FDIV_rec
5195  { 1042,	3,	1,	4,	273,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList43, OperandInfo141 },  // Inst #1042 = FDIVS_rec
5196  { 1041,	3,	1,	4,	272,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList42, OperandInfo141 },  // Inst #1041 = FDIVS
5197  { 1040,	3,	1,	4,	261,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList42, OperandInfo140 },  // Inst #1040 = FDIV
5198  { 1039,	2,	1,	4,	332,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList43, OperandInfo138 },  // Inst #1039 = FCTIW_rec
5199  { 1038,	2,	1,	4,	332,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList43, OperandInfo138 },  // Inst #1038 = FCTIWZ_rec
5200  { 1037,	2,	1,	4,	318,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList42, OperandInfo138 },  // Inst #1037 = FCTIWZ
5201  { 1036,	2,	1,	4,	332,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList43, OperandInfo138 },  // Inst #1036 = FCTIWU_rec
5202  { 1035,	2,	1,	4,	332,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList43, OperandInfo138 },  // Inst #1035 = FCTIWUZ_rec
5203  { 1034,	2,	1,	4,	318,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList42, OperandInfo138 },  // Inst #1034 = FCTIWUZ
5204  { 1033,	2,	1,	4,	318,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList42, OperandInfo138 },  // Inst #1033 = FCTIWU
5205  { 1032,	2,	1,	4,	318,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList42, OperandInfo138 },  // Inst #1032 = FCTIW
5206  { 1031,	2,	1,	4,	332,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList43, OperandInfo138 },  // Inst #1031 = FCTID_rec
5207  { 1030,	2,	1,	4,	332,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList43, OperandInfo138 },  // Inst #1030 = FCTIDZ_rec
5208  { 1029,	2,	1,	4,	318,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList42, OperandInfo138 },  // Inst #1029 = FCTIDZ
5209  { 1028,	2,	1,	4,	332,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList43, OperandInfo138 },  // Inst #1028 = FCTIDU_rec
5210  { 1027,	2,	1,	4,	332,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList43, OperandInfo138 },  // Inst #1027 = FCTIDUZ_rec
5211  { 1026,	2,	1,	4,	318,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList42, OperandInfo138 },  // Inst #1026 = FCTIDUZ
5212  { 1025,	2,	1,	4,	318,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList42, OperandInfo138 },  // Inst #1025 = FCTIDU
5213  { 1024,	2,	1,	4,	318,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList42, OperandInfo138 },  // Inst #1024 = FCTID
5214  { 1023,	3,	1,	4,	248,	0,	1,	0, 0x18ULL, ImplicitList41, OperandInfo141 },  // Inst #1023 = FCPSGNS_rec
5215  { 1022,	3,	1,	4,	135,	0,	0,	0, 0x18ULL, nullptr, OperandInfo141 },  // Inst #1022 = FCPSGNS
5216  { 1021,	3,	1,	4,	248,	0,	1,	0, 0x18ULL, ImplicitList41, OperandInfo140 },  // Inst #1021 = FCPSGND_rec
5217  { 1020,	3,	1,	4,	135,	0,	0,	0, 0x18ULL, nullptr, OperandInfo140 },  // Inst #1020 = FCPSGND
5218  { 1019,	3,	1,	4,	110,	0,	0,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, nullptr, OperandInfo144 },  // Inst #1019 = FCMPUS
5219  { 1018,	3,	1,	4,	110,	0,	0,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, nullptr, OperandInfo143 },  // Inst #1018 = FCMPUD
5220  { 1017,	3,	1,	4,	110,	0,	0,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, nullptr, OperandInfo144 },  // Inst #1017 = FCMPOS
5221  { 1016,	3,	1,	4,	110,	0,	0,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, nullptr, OperandInfo143 },  // Inst #1016 = FCMPOD
5222  { 1015,	2,	1,	4,	332,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList43, OperandInfo138 },  // Inst #1015 = FCFID_rec
5223  { 1014,	2,	1,	4,	332,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList43, OperandInfo138 },  // Inst #1014 = FCFIDU_rec
5224  { 1013,	2,	1,	4,	332,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList43, OperandInfo142 },  // Inst #1013 = FCFIDUS_rec
5225  { 1012,	2,	1,	4,	318,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList42, OperandInfo142 },  // Inst #1012 = FCFIDUS
5226  { 1011,	2,	1,	4,	318,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList42, OperandInfo138 },  // Inst #1011 = FCFIDU
5227  { 1010,	2,	1,	4,	332,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList43, OperandInfo142 },  // Inst #1010 = FCFIDS_rec
5228  { 1009,	2,	1,	4,	318,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList42, OperandInfo142 },  // Inst #1009 = FCFIDS
5229  { 1008,	2,	1,	4,	318,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL, ImplicitList42, OperandInfo138 },  // Inst #1008 = FCFID
5230  { 1007,	3,	1,	4,	0,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList42, OperandInfo140 },  // Inst #1007 = FADDrtz
5231  { 1006,	3,	1,	4,	161,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList43, OperandInfo140 },  // Inst #1006 = FADD_rec
5232  { 1005,	3,	1,	4,	330,	1,	1,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList43, OperandInfo141 },  // Inst #1005 = FADDS_rec
5233  { 1004,	3,	1,	4,	322,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList42, OperandInfo141 },  // Inst #1004 = FADDS
5234  { 1003,	3,	1,	4,	153,	1,	0,	0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList42, OperandInfo140 },  // Inst #1003 = FADD
5235  { 1002,	2,	1,	4,	423,	0,	1,	0, 0x18ULL, ImplicitList41, OperandInfo139 },  // Inst #1002 = FABSS_rec
5236  { 1001,	2,	1,	4,	396,	0,	0,	0, 0x18ULL, nullptr, OperandInfo139 },  // Inst #1001 = FABSS
5237  { 1000,	2,	1,	4,	423,	0,	1,	0, 0x18ULL, ImplicitList41, OperandInfo138 },  // Inst #1000 = FABSD_rec
5238  { 999,	2,	1,	4,	396,	0,	0,	0, 0x18ULL, nullptr, OperandInfo138 },  // Inst #999 = FABSD
5239  { 998,	0,	0,	4,	486,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #998 = EnforceIEIO
5240  { 997,	2,	1,	4,	392,	0,	1,	0, 0x108ULL, ImplicitList1, OperandInfo80 },  // Inst #997 = EXTSW_rec
5241  { 996,	2,	1,	4,	392,	0,	1,	0, 0x108ULL, ImplicitList1, OperandInfo136 },  // Inst #996 = EXTSW_32_64_rec
5242  { 995,	2,	1,	4,	392,	0,	0,	0, 0x108ULL, nullptr, OperandInfo136 },  // Inst #995 = EXTSW_32_64
5243  { 994,	2,	1,	4,	392,	0,	0,	0, 0x8ULL, nullptr, OperandInfo79 },  // Inst #994 = EXTSW_32
5244  { 993,	3,	1,	4,	373,	0,	2,	0, 0x8ULL, ImplicitList8, OperandInfo52 },  // Inst #993 = EXTSWSLI_rec
5245  { 992,	3,	1,	4,	373,	0,	1,	0, 0x8ULL, ImplicitList1, OperandInfo137 },  // Inst #992 = EXTSWSLI_32_64_rec
5246  { 991,	3,	1,	4,	408,	0,	0,	0, 0x8ULL, nullptr, OperandInfo137 },  // Inst #991 = EXTSWSLI_32_64
5247  { 990,	3,	1,	4,	408,	0,	1,	0, 0x8ULL, ImplicitList5, OperandInfo52 },  // Inst #990 = EXTSWSLI
5248  { 989,	2,	1,	4,	392,	0,	0,	0, 0x108ULL, nullptr, OperandInfo80 },  // Inst #989 = EXTSW
5249  { 988,	2,	1,	4,	392,	0,	1,	0, 0x108ULL, ImplicitList1, OperandInfo79 },  // Inst #988 = EXTSH_rec
5250  { 987,	2,	1,	4,	392,	0,	1,	0, 0x108ULL, ImplicitList1, OperandInfo80 },  // Inst #987 = EXTSH8_rec
5251  { 986,	2,	1,	4,	392,	0,	0,	0, 0x108ULL, nullptr, OperandInfo136 },  // Inst #986 = EXTSH8_32_64
5252  { 985,	2,	1,	4,	392,	0,	0,	0, 0x108ULL, nullptr, OperandInfo80 },  // Inst #985 = EXTSH8
5253  { 984,	2,	1,	4,	392,	0,	0,	0, 0x108ULL, nullptr, OperandInfo79 },  // Inst #984 = EXTSH
5254  { 983,	2,	1,	4,	392,	0,	1,	0, 0x108ULL, ImplicitList1, OperandInfo79 },  // Inst #983 = EXTSB_rec
5255  { 982,	2,	1,	4,	392,	0,	1,	0, 0x108ULL, ImplicitList1, OperandInfo80 },  // Inst #982 = EXTSB8_rec
5256  { 981,	2,	1,	4,	392,	0,	0,	0, 0x108ULL, nullptr, OperandInfo136 },  // Inst #981 = EXTSB8_32_64
5257  { 980,	2,	1,	4,	392,	0,	0,	0, 0x108ULL, nullptr, OperandInfo80 },  // Inst #980 = EXTSB8
5258  { 979,	2,	1,	4,	392,	0,	0,	0, 0x108ULL, nullptr, OperandInfo79 },  // Inst #979 = EXTSB
5259  { 978,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #978 = EVXOR
5260  { 977,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo135 },  // Inst #977 = EVSUBIFW
5261  { 976,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #976 = EVSUBFW
5262  { 975,	2,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #975 = EVSUBFUSIAAW
5263  { 974,	2,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #974 = EVSUBFUMIAAW
5264  { 973,	2,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #973 = EVSUBFSSIAAW
5265  { 972,	2,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #972 = EVSUBFSMIAAW
5266  { 971,	3,	0,	4,	297,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo131 },  // Inst #971 = EVSTWWOX
5267  { 970,	3,	0,	4,	297,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo130 },  // Inst #970 = EVSTWWO
5268  { 969,	3,	0,	4,	297,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo131 },  // Inst #969 = EVSTWWEX
5269  { 968,	3,	0,	4,	297,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo130 },  // Inst #968 = EVSTWWE
5270  { 967,	3,	0,	4,	297,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo131 },  // Inst #967 = EVSTWHOX
5271  { 966,	3,	0,	4,	297,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo130 },  // Inst #966 = EVSTWHO
5272  { 965,	3,	0,	4,	297,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo131 },  // Inst #965 = EVSTWHEX
5273  { 964,	3,	0,	4,	297,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo130 },  // Inst #964 = EVSTWHE
5274  { 963,	3,	0,	4,	297,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo131 },  // Inst #963 = EVSTDWX
5275  { 962,	3,	0,	4,	297,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo130 },  // Inst #962 = EVSTDW
5276  { 961,	3,	0,	4,	297,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo131 },  // Inst #961 = EVSTDHX
5277  { 960,	3,	0,	4,	297,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo130 },  // Inst #960 = EVSTDH
5278  { 959,	3,	0,	4,	297,	0,	0,	0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo131 },  // Inst #959 = EVSTDDX
5279  { 958,	3,	0,	4,	297,	0,	0,	0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo130 },  // Inst #958 = EVSTDD
5280  { 957,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #957 = EVSRWU
5281  { 956,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #956 = EVSRWS
5282  { 955,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo129 },  // Inst #955 = EVSRWIU
5283  { 954,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo129 },  // Inst #954 = EVSRWIS
5284  { 953,	2,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo134 },  // Inst #953 = EVSPLATI
5285  { 952,	2,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo134 },  // Inst #952 = EVSPLATFI
5286  { 951,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo129 },  // Inst #951 = EVSLWI
5287  { 950,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #950 = EVSLW
5288  { 949,	4,	1,	4,	23,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo133 },  // Inst #949 = EVSEL
5289  { 948,	2,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #948 = EVRNDW
5290  { 947,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo129 },  // Inst #947 = EVRLWI
5291  { 946,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #946 = EVRLW
5292  { 945,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #945 = EVORC
5293  { 944,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #944 = EVOR
5294  { 943,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #943 = EVNOR
5295  { 942,	2,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #942 = EVNEG
5296  { 941,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #941 = EVNAND
5297  { 940,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #940 = EVMWUMIAN
5298  { 939,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #939 = EVMWUMIAA
5299  { 938,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #938 = EVMWUMIA
5300  { 937,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #937 = EVMWUMI
5301  { 936,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #936 = EVMWSSFAN
5302  { 935,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #935 = EVMWSSFAA
5303  { 934,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #934 = EVMWSSFA
5304  { 933,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #933 = EVMWSSF
5305  { 932,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #932 = EVMWSMIAN
5306  { 931,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #931 = EVMWSMIAA
5307  { 930,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #930 = EVMWSMIA
5308  { 929,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #929 = EVMWSMI
5309  { 928,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #928 = EVMWSMFAN
5310  { 927,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #927 = EVMWSMFAA
5311  { 926,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #926 = EVMWSMFA
5312  { 925,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #925 = EVMWSMF
5313  { 924,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #924 = EVMWLUSIANW
5314  { 923,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #923 = EVMWLUSIAAW
5315  { 922,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #922 = EVMWLUMIANW
5316  { 921,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #921 = EVMWLUMIAAW
5317  { 920,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #920 = EVMWLUMIA
5318  { 919,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #919 = EVMWLUMI
5319  { 918,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #918 = EVMWLSSIANW
5320  { 917,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #917 = EVMWLSSIAAW
5321  { 916,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #916 = EVMWLSMIANW
5322  { 915,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #915 = EVMWLSMIAAW
5323  { 914,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #914 = EVMWHUMIA
5324  { 913,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #913 = EVMWHUMI
5325  { 912,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #912 = EVMWHSSFA
5326  { 911,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #911 = EVMWHSSF
5327  { 910,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #910 = EVMWHSMIA
5328  { 909,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #909 = EVMWHSMI
5329  { 908,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #908 = EVMWHSMFA
5330  { 907,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #907 = EVMWHSMF
5331  { 906,	2,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #906 = EVMRA
5332  { 905,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #905 = EVMHOUSIANW
5333  { 904,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #904 = EVMHOUSIAAW
5334  { 903,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #903 = EVMHOUMIANW
5335  { 902,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #902 = EVMHOUMIAAW
5336  { 901,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #901 = EVMHOUMIA
5337  { 900,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #900 = EVMHOUMI
5338  { 899,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #899 = EVMHOSSIANW
5339  { 898,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #898 = EVMHOSSIAAW
5340  { 897,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #897 = EVMHOSSFANW
5341  { 896,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #896 = EVMHOSSFAAW
5342  { 895,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #895 = EVMHOSSFA
5343  { 894,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #894 = EVMHOSSF
5344  { 893,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #893 = EVMHOSMIANW
5345  { 892,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #892 = EVMHOSMIAAW
5346  { 891,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #891 = EVMHOSMIA
5347  { 890,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #890 = EVMHOSMI
5348  { 889,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #889 = EVMHOSMFANW
5349  { 888,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #888 = EVMHOSMFAAW
5350  { 887,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #887 = EVMHOSMFA
5351  { 886,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #886 = EVMHOSMF
5352  { 885,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #885 = EVMHOGUMIAN
5353  { 884,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #884 = EVMHOGUMIAA
5354  { 883,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #883 = EVMHOGSMIAN
5355  { 882,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #882 = EVMHOGSMIAA
5356  { 881,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #881 = EVMHOGSMFAN
5357  { 880,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #880 = EVMHOGSMFAA
5358  { 879,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #879 = EVMHEUSIANW
5359  { 878,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #878 = EVMHEUSIAAW
5360  { 877,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #877 = EVMHEUMIANW
5361  { 876,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #876 = EVMHEUMIAAW
5362  { 875,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #875 = EVMHEUMIA
5363  { 874,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #874 = EVMHEUMI
5364  { 873,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #873 = EVMHESSIANW
5365  { 872,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #872 = EVMHESSIAAW
5366  { 871,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #871 = EVMHESSFANW
5367  { 870,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #870 = EVMHESSFAAW
5368  { 869,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #869 = EVMHESSFA
5369  { 868,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #868 = EVMHESSF
5370  { 867,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #867 = EVMHESMIANW
5371  { 866,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #866 = EVMHESMIAAW
5372  { 865,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #865 = EVMHESMIA
5373  { 864,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #864 = EVMHESMI
5374  { 863,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #863 = EVMHESMFANW
5375  { 862,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #862 = EVMHESMFAAW
5376  { 861,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #861 = EVMHESMFA
5377  { 860,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #860 = EVMHESMF
5378  { 859,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #859 = EVMHEGUMIAN
5379  { 858,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #858 = EVMHEGUMIAA
5380  { 857,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #857 = EVMHEGSMIAN
5381  { 856,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #856 = EVMHEGSMIAA
5382  { 855,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #855 = EVMHEGSMFAN
5383  { 854,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #854 = EVMHEGSMFAA
5384  { 853,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #853 = EVMERGELOHI
5385  { 852,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo132 },  // Inst #852 = EVMERGELO
5386  { 851,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #851 = EVMERGEHILO
5387  { 850,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #850 = EVMERGEHI
5388  { 849,	3,	1,	4,	296,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo131 },  // Inst #849 = EVLWWSPLATX
5389  { 848,	3,	1,	4,	296,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo130 },  // Inst #848 = EVLWWSPLAT
5390  { 847,	3,	1,	4,	296,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo131 },  // Inst #847 = EVLWHSPLATX
5391  { 846,	3,	1,	4,	296,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo130 },  // Inst #846 = EVLWHSPLAT
5392  { 845,	3,	1,	4,	296,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo131 },  // Inst #845 = EVLWHOUX
5393  { 844,	3,	1,	4,	296,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo130 },  // Inst #844 = EVLWHOU
5394  { 843,	3,	1,	4,	296,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo131 },  // Inst #843 = EVLWHOSX
5395  { 842,	3,	1,	4,	296,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo130 },  // Inst #842 = EVLWHOS
5396  { 841,	3,	1,	4,	296,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo131 },  // Inst #841 = EVLWHEX
5397  { 840,	3,	1,	4,	296,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo130 },  // Inst #840 = EVLWHE
5398  { 839,	3,	1,	4,	296,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo131 },  // Inst #839 = EVLHHOUSPLATX
5399  { 838,	3,	1,	4,	296,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo130 },  // Inst #838 = EVLHHOUSPLAT
5400  { 837,	3,	1,	4,	296,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo131 },  // Inst #837 = EVLHHOSSPLATX
5401  { 836,	3,	1,	4,	296,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo130 },  // Inst #836 = EVLHHOSSPLAT
5402  { 835,	3,	1,	4,	296,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo131 },  // Inst #835 = EVLHHESPLATX
5403  { 834,	3,	1,	4,	296,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo130 },  // Inst #834 = EVLHHESPLAT
5404  { 833,	3,	1,	4,	296,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo131 },  // Inst #833 = EVLDWX
5405  { 832,	3,	1,	4,	296,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo130 },  // Inst #832 = EVLDW
5406  { 831,	3,	1,	4,	296,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo131 },  // Inst #831 = EVLDHX
5407  { 830,	3,	1,	4,	296,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo130 },  // Inst #830 = EVLDH
5408  { 829,	3,	1,	4,	296,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo131 },  // Inst #829 = EVLDDX
5409  { 828,	3,	1,	4,	296,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo130 },  // Inst #828 = EVLDD
5410  { 827,	3,	1,	4,	23,	0,	0,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo125 },  // Inst #827 = EVFSTSTLT
5411  { 826,	3,	1,	4,	23,	0,	0,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo125 },  // Inst #826 = EVFSTSTGT
5412  { 825,	3,	1,	4,	23,	0,	0,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo125 },  // Inst #825 = EVFSTSTEQ
5413  { 824,	3,	1,	4,	24,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #824 = EVFSSUB
5414  { 823,	2,	1,	4,	23,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #823 = EVFSNEG
5415  { 822,	2,	1,	4,	23,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #822 = EVFSNABS
5416  { 821,	3,	1,	4,	24,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #821 = EVFSMUL
5417  { 820,	3,	1,	4,	19,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #820 = EVFSDIV
5418  { 819,	2,	1,	4,	24,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #819 = EVFSCTUIZ
5419  { 818,	2,	1,	4,	24,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #818 = EVFSCTUI
5420  { 817,	2,	1,	4,	24,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #817 = EVFSCTUF
5421  { 816,	2,	1,	4,	24,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #816 = EVFSCTSIZ
5422  { 815,	2,	1,	4,	24,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #815 = EVFSCTSI
5423  { 814,	2,	1,	4,	24,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #814 = EVFSCTSF
5424  { 813,	3,	1,	4,	20,	0,	0,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo125 },  // Inst #813 = EVFSCMPLT
5425  { 812,	3,	1,	4,	20,	0,	0,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo125 },  // Inst #812 = EVFSCMPGT
5426  { 811,	3,	1,	4,	20,	0,	0,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo125 },  // Inst #811 = EVFSCMPEQ
5427  { 810,	2,	1,	4,	24,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #810 = EVFSCFUI
5428  { 809,	2,	1,	4,	24,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #809 = EVFSCFUF
5429  { 808,	2,	1,	4,	24,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #808 = EVFSCFSI
5430  { 807,	2,	1,	4,	24,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #807 = EVFSCFSF
5431  { 806,	3,	1,	4,	24,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #806 = EVFSADD
5432  { 805,	2,	1,	4,	23,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #805 = EVFSABS
5433  { 804,	2,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #804 = EVEXTSH
5434  { 803,	2,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #803 = EVEXTSB
5435  { 802,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #802 = EVEQV
5436  { 801,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #801 = EVDIVWU
5437  { 800,	3,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #800 = EVDIVWS
5438  { 799,	2,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #799 = EVCNTLZW
5439  { 798,	2,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #798 = EVCNTLSW
5440  { 797,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo125 },  // Inst #797 = EVCMPLTU
5441  { 796,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo125 },  // Inst #796 = EVCMPLTS
5442  { 795,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo125 },  // Inst #795 = EVCMPGTU
5443  { 794,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo125 },  // Inst #794 = EVCMPGTS
5444  { 793,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo125 },  // Inst #793 = EVCMPEQ
5445  { 792,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #792 = EVANDC
5446  { 791,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #791 = EVAND
5447  { 790,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo123 },  // Inst #790 = EVADDW
5448  { 789,	2,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #789 = EVADDUSIAAW
5449  { 788,	2,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #788 = EVADDUMIAAW
5450  { 787,	2,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #787 = EVADDSSIAAW
5451  { 786,	2,	1,	4,	295,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #786 = EVADDSMIAAW
5452  { 785,	3,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo129 },  // Inst #785 = EVADDIW
5453  { 784,	2,	1,	4,	294,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo122 },  // Inst #784 = EVABS
5454  { 783,	3,	1,	4,	404,	0,	1,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList1, OperandInfo65 },  // Inst #783 = EQV_rec
5455  { 782,	3,	1,	4,	404,	0,	1,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList1, OperandInfo67 },  // Inst #782 = EQV8_rec
5456  { 781,	3,	1,	4,	404,	0,	0,	0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, OperandInfo67 },  // Inst #781 = EQV8
5457  { 780,	3,	1,	4,	404,	0,	0,	0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, OperandInfo65 },  // Inst #780 = EQV
5458  { 779,	1,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo87 },  // Inst #779 = EH_SjLj_Setup
5459  { 778,	2,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList17, OperandInfo128 },  // Inst #778 = EH_SjLj_SetJmp64
5460  { 777,	2,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList16, OperandInfo128 },  // Inst #777 = EH_SjLj_SetJmp32
5461  { 776,	1,	0,	4,	0,	0,	0,	0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo127 },  // Inst #776 = EH_SjLj_LongJmp64
5462  { 775,	1,	0,	4,	0,	0,	0,	0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo127 },  // Inst #775 = EH_SjLj_LongJmp32
5463  { 774,	3,	1,	4,	21,	0,	0,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo125 },  // Inst #774 = EFSTSTLT
5464  { 773,	3,	1,	4,	21,	0,	0,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo125 },  // Inst #773 = EFSTSTGT
5465  { 772,	3,	1,	4,	21,	0,	0,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo125 },  // Inst #772 = EFSTSTEQ
5466  { 771,	3,	1,	4,	20,	0,	0,	0, 0x0ULL, nullptr, OperandInfo65 },  // Inst #771 = EFSSUB
5467  { 770,	2,	1,	4,	22,	0,	0,	0, 0x0ULL, nullptr, OperandInfo79 },  // Inst #770 = EFSNEG
5468  { 769,	2,	1,	4,	22,	0,	0,	0, 0x0ULL, nullptr, OperandInfo79 },  // Inst #769 = EFSNABS
5469  { 768,	3,	1,	4,	22,	0,	0,	0, 0x0ULL, nullptr, OperandInfo65 },  // Inst #768 = EFSMUL
5470  { 767,	3,	1,	4,	19,	0,	0,	0, 0x0ULL, nullptr, OperandInfo65 },  // Inst #767 = EFSDIV
5471  { 766,	2,	1,	4,	20,	0,	0,	0, 0x0ULL, nullptr, OperandInfo79 },  // Inst #766 = EFSCTUIZ
5472  { 765,	2,	1,	4,	20,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo79 },  // Inst #765 = EFSCTUI
5473  { 764,	2,	1,	4,	20,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo124 },  // Inst #764 = EFSCTUF
5474  { 763,	2,	1,	4,	20,	0,	0,	0, 0x0ULL, nullptr, OperandInfo79 },  // Inst #763 = EFSCTSIZ
5475  { 762,	2,	1,	4,	20,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo79 },  // Inst #762 = EFSCTSI
5476  { 761,	2,	1,	4,	20,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo79 },  // Inst #761 = EFSCTSF
5477  { 760,	3,	1,	4,	21,	0,	0,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo100 },  // Inst #760 = EFSCMPLT
5478  { 759,	3,	1,	4,	21,	0,	0,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo100 },  // Inst #759 = EFSCMPGT
5479  { 758,	3,	1,	4,	21,	0,	0,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo100 },  // Inst #758 = EFSCMPEQ
5480  { 757,	2,	1,	4,	20,	0,	0,	0, 0x0ULL, nullptr, OperandInfo79 },  // Inst #757 = EFSCFUI
5481  { 756,	2,	1,	4,	20,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo79 },  // Inst #756 = EFSCFUF
5482  { 755,	2,	1,	4,	20,	0,	0,	0, 0x0ULL, nullptr, OperandInfo79 },  // Inst #755 = EFSCFSI
5483  { 754,	2,	1,	4,	20,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo79 },  // Inst #754 = EFSCFSF
5484  { 753,	2,	1,	4,	20,	0,	0,	0, 0x0ULL, nullptr, OperandInfo126 },  // Inst #753 = EFSCFD
5485  { 752,	3,	1,	4,	18,	0,	0,	0, 0x0ULL, nullptr, OperandInfo65 },  // Inst #752 = EFSADD
5486  { 751,	2,	1,	4,	20,	0,	0,	0, 0x0ULL, nullptr, OperandInfo79 },  // Inst #751 = EFSABS
5487  { 750,	3,	1,	4,	17,	0,	0,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo125 },  // Inst #750 = EFDTSTLT
5488  { 749,	3,	1,	4,	17,	0,	0,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo125 },  // Inst #749 = EFDTSTGT
5489  { 748,	3,	1,	4,	17,	0,	0,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo125 },  // Inst #748 = EFDTSTEQ
5490  { 747,	3,	1,	4,	17,	0,	0,	0, 0x0ULL, nullptr, OperandInfo123 },  // Inst #747 = EFDSUB
5491  { 746,	2,	1,	4,	17,	0,	0,	0, 0x0ULL, nullptr, OperandInfo122 },  // Inst #746 = EFDNEG
5492  { 745,	2,	1,	4,	17,	0,	0,	0, 0x0ULL, nullptr, OperandInfo122 },  // Inst #745 = EFDNABS
5493  { 744,	3,	1,	4,	17,	0,	0,	0, 0x0ULL, nullptr, OperandInfo123 },  // Inst #744 = EFDMUL
5494  { 743,	3,	1,	4,	19,	0,	0,	0, 0x0ULL, nullptr, OperandInfo123 },  // Inst #743 = EFDDIV
5495  { 742,	2,	1,	4,	17,	0,	0,	0, 0x0ULL, nullptr, OperandInfo126 },  // Inst #742 = EFDCTUIZ
5496  { 741,	2,	1,	4,	17,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo126 },  // Inst #741 = EFDCTUIDZ
5497  { 740,	2,	1,	4,	17,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo126 },  // Inst #740 = EFDCTUI
5498  { 739,	2,	1,	4,	17,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo124 },  // Inst #739 = EFDCTUF
5499  { 738,	2,	1,	4,	17,	0,	0,	0, 0x0ULL, nullptr, OperandInfo126 },  // Inst #738 = EFDCTSIZ
5500  { 737,	2,	1,	4,	17,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo126 },  // Inst #737 = EFDCTSIDZ
5501  { 736,	2,	1,	4,	17,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo126 },  // Inst #736 = EFDCTSI
5502  { 735,	2,	1,	4,	17,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo124 },  // Inst #735 = EFDCTSF
5503  { 734,	3,	1,	4,	17,	0,	0,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo125 },  // Inst #734 = EFDCMPLT
5504  { 733,	3,	1,	4,	17,	0,	0,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo125 },  // Inst #733 = EFDCMPGT
5505  { 732,	3,	1,	4,	17,	0,	0,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo125 },  // Inst #732 = EFDCMPEQ
5506  { 731,	2,	1,	4,	17,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo124 },  // Inst #731 = EFDCFUID
5507  { 730,	2,	1,	4,	17,	0,	0,	0, 0x0ULL, nullptr, OperandInfo124 },  // Inst #730 = EFDCFUI
5508  { 729,	2,	1,	4,	17,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo124 },  // Inst #729 = EFDCFUF
5509  { 728,	2,	1,	4,	17,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo124 },  // Inst #728 = EFDCFSID
5510  { 727,	2,	1,	4,	17,	0,	0,	0, 0x0ULL, nullptr, OperandInfo124 },  // Inst #727 = EFDCFSI
5511  { 726,	2,	1,	4,	17,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo124 },  // Inst #726 = EFDCFSF
5512  { 725,	2,	1,	4,	17,	0,	0,	0, 0x0ULL, nullptr, OperandInfo124 },  // Inst #725 = EFDCFS
5513  { 724,	3,	1,	4,	18,	0,	0,	0, 0x0ULL, nullptr, OperandInfo123 },  // Inst #724 = EFDADD
5514  { 723,	2,	1,	4,	17,	0,	0,	0, 0x0ULL, nullptr, OperandInfo122 },  // Inst #723 = EFDABS
5515  { 722,	2,	1,	4,	0,	1,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList30, OperandInfo121 },  // Inst #722 = DecreaseCTRloop
5516  { 721,	2,	1,	4,	0,	1,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList31, OperandInfo121 },  // Inst #721 = DecreaseCTR8loop
5517  { 720,	3,	1,	4,	0,	0,	0,	0, 0x0ULL, nullptr, OperandInfo120 },  // Inst #720 = DYNAREAOFFSET8
5518  { 719,	3,	1,	4,	0,	0,	0,	0, 0x0ULL, nullptr, OperandInfo120 },  // Inst #719 = DYNAREAOFFSET
5519  { 718,	4,	1,	4,	0,	1,	1,	0, 0x0ULL, ImplicitList40, OperandInfo119 },  // Inst #718 = DYNALLOC8
5520  { 717,	4,	1,	4,	0,	1,	1,	0, 0x0ULL, ImplicitList15, OperandInfo118 },  // Inst #717 = DYNALLOC
5521  { 716,	3,	0,	4,	414,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo117 },  // Inst #716 = DSTT64
5522  { 715,	3,	0,	4,	414,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo116 },  // Inst #715 = DSTT
5523  { 714,	3,	0,	4,	414,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo117 },  // Inst #714 = DSTSTT64
5524  { 713,	3,	0,	4,	414,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo116 },  // Inst #713 = DSTSTT
5525  { 712,	3,	0,	4,	414,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo117 },  // Inst #712 = DSTST64
5526  { 711,	3,	0,	4,	414,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo116 },  // Inst #711 = DSTST
5527  { 710,	3,	0,	4,	414,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo117 },  // Inst #710 = DST64
5528  { 709,	3,	0,	4,	414,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo116 },  // Inst #709 = DST
5529  { 708,	0,	0,	4,	387,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #708 = DSSALL
5530  { 707,	1,	0,	4,	387,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo3 },  // Inst #707 = DSS
5531  { 706,	3,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo115 },  // Inst #706 = DMXXINSTFDMR512_HI
5532  { 705,	3,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo114 },  // Inst #705 = DMXXINSTFDMR512
5533  { 704,	3,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo113 },  // Inst #704 = DMXXINSTFDMR256
5534  { 703,	3,	2,	4,	0,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo112 },  // Inst #703 = DMXXEXTFDMR512_HI
5535  { 702,	3,	2,	4,	0,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo111 },  // Inst #702 = DMXXEXTFDMR512
5536  { 701,	3,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo110 },  // Inst #701 = DMXXEXTFDMR256
5537  { 700,	3,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo109 },  // Inst #700 = DMXOR
5538  { 699,	1,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo108 },  // Inst #699 = DMSETDMRZ
5539  { 698,	2,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo107 },  // Inst #698 = DMMR
5540  { 697,	3,	1,	4,	242,	0,	1,	0, 0xdULL, ImplicitList1, OperandInfo65 },  // Inst #697 = DIVW_rec
5541  { 696,	3,	1,	4,	242,	0,	1,	0, 0xdULL, ImplicitList1, OperandInfo65 },  // Inst #696 = DIVWU_rec
5542  { 695,	3,	1,	4,	242,	0,	2,	0, 0x8ULL, ImplicitList4, OperandInfo65 },  // Inst #695 = DIVWUO_rec
5543  { 694,	3,	1,	4,	238,	0,	1,	0, 0x8ULL, ImplicitList3, OperandInfo65 },  // Inst #694 = DIVWUO
5544  { 693,	3,	1,	4,	238,	0,	0,	0, 0x8ULL, nullptr, OperandInfo65 },  // Inst #693 = DIVWU
5545  { 692,	3,	1,	4,	242,	0,	2,	0, 0x8ULL, ImplicitList4, OperandInfo65 },  // Inst #692 = DIVWO_rec
5546  { 691,	3,	1,	4,	238,	0,	1,	0, 0x8ULL, ImplicitList3, OperandInfo65 },  // Inst #691 = DIVWO
5547  { 690,	3,	1,	4,	244,	0,	1,	0, 0xdULL, ImplicitList1, OperandInfo65 },  // Inst #690 = DIVWE_rec
5548  { 689,	3,	1,	4,	244,	0,	1,	0, 0xdULL, ImplicitList1, OperandInfo65 },  // Inst #689 = DIVWEU_rec
5549  { 688,	3,	1,	4,	244,	0,	2,	0, 0x8ULL, ImplicitList4, OperandInfo65 },  // Inst #688 = DIVWEUO_rec
5550  { 687,	3,	1,	4,	347,	0,	1,	0, 0x8ULL, ImplicitList3, OperandInfo65 },  // Inst #687 = DIVWEUO
5551  { 686,	3,	1,	4,	347,	0,	0,	0, 0x8ULL, nullptr, OperandInfo65 },  // Inst #686 = DIVWEU
5552  { 685,	3,	1,	4,	244,	0,	2,	0, 0x8ULL, ImplicitList4, OperandInfo65 },  // Inst #685 = DIVWEO_rec
5553  { 684,	3,	1,	4,	347,	0,	1,	0, 0x8ULL, ImplicitList3, OperandInfo65 },  // Inst #684 = DIVWEO
5554  { 683,	3,	1,	4,	347,	0,	0,	0, 0x8ULL, nullptr, OperandInfo65 },  // Inst #683 = DIVWE
5555  { 682,	3,	1,	4,	238,	0,	0,	0, 0x8ULL, nullptr, OperandInfo65 },  // Inst #682 = DIVW
5556  { 681,	3,	1,	4,	243,	0,	1,	0, 0xdULL, ImplicitList1, OperandInfo67 },  // Inst #681 = DIVD_rec
5557  { 680,	3,	1,	4,	243,	0,	1,	0, 0xdULL, ImplicitList1, OperandInfo67 },  // Inst #680 = DIVDU_rec
5558  { 679,	3,	1,	4,	243,	0,	2,	0, 0x8ULL, ImplicitList4, OperandInfo67 },  // Inst #679 = DIVDUO_rec
5559  { 678,	3,	1,	4,	240,	0,	1,	0, 0x8ULL, ImplicitList3, OperandInfo67 },  // Inst #678 = DIVDUO
5560  { 677,	3,	1,	4,	240,	0,	0,	0, 0x8ULL, nullptr, OperandInfo67 },  // Inst #677 = DIVDU
5561  { 676,	3,	1,	4,	243,	0,	2,	0, 0x8ULL, ImplicitList4, OperandInfo67 },  // Inst #676 = DIVDO_rec
5562  { 675,	3,	1,	4,	240,	0,	1,	0, 0x8ULL, ImplicitList3, OperandInfo67 },  // Inst #675 = DIVDO
5563  { 674,	3,	1,	4,	245,	0,	1,	0, 0xdULL, ImplicitList1, OperandInfo67 },  // Inst #674 = DIVDE_rec
5564  { 673,	3,	1,	4,	245,	0,	1,	0, 0xdULL, ImplicitList1, OperandInfo67 },  // Inst #673 = DIVDEU_rec
5565  { 672,	3,	1,	4,	245,	0,	2,	0, 0x8ULL, ImplicitList4, OperandInfo67 },  // Inst #672 = DIVDEUO_rec
5566  { 671,	3,	1,	4,	241,	0,	1,	0, 0x8ULL, ImplicitList3, OperandInfo67 },  // Inst #671 = DIVDEUO
5567  { 670,	3,	1,	4,	241,	0,	0,	0, 0x8ULL, nullptr, OperandInfo67 },  // Inst #670 = DIVDEU
5568  { 669,	3,	1,	4,	245,	0,	2,	0, 0x8ULL, ImplicitList4, OperandInfo67 },  // Inst #669 = DIVDEO_rec
5569  { 668,	3,	1,	4,	241,	0,	1,	0, 0x8ULL, ImplicitList3, OperandInfo67 },  // Inst #668 = DIVDEO
5570  { 667,	3,	1,	4,	241,	0,	0,	0, 0x8ULL, nullptr, OperandInfo67 },  // Inst #667 = DIVDE
5571  { 666,	3,	1,	4,	240,	0,	0,	0, 0x8ULL, nullptr, OperandInfo67 },  // Inst #666 = DIVD
5572  { 665,	2,	0,	4,	492,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo79 },  // Inst #665 = DCCCI
5573  { 664,	2,	0,	4,	179,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo54 },  // Inst #664 = DCBZLEP
5574  { 663,	2,	0,	4,	491,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, OperandInfo54 },  // Inst #663 = DCBZL
5575  { 662,	2,	0,	4,	179,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo54 },  // Inst #662 = DCBZEP
5576  { 661,	2,	0,	4,	476,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, OperandInfo54 },  // Inst #661 = DCBZ
5577  { 660,	3,	0,	4,	179,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo55 },  // Inst #660 = DCBTSTEP
5578  { 659,	3,	0,	4,	434,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2ULL, nullptr, OperandInfo106 },  // Inst #659 = DCBTST
5579  { 658,	3,	0,	4,	179,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo55 },  // Inst #658 = DCBTEP
5580  { 657,	3,	0,	4,	434,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2ULL, nullptr, OperandInfo106 },  // Inst #657 = DCBT
5581  { 656,	2,	0,	4,	179,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo54 },  // Inst #656 = DCBSTEP
5582  { 655,	2,	0,	4,	476,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, OperandInfo54 },  // Inst #655 = DCBST
5583  { 654,	2,	0,	4,	317,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, OperandInfo54 },  // Inst #654 = DCBI
5584  { 653,	2,	0,	4,	179,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo54 },  // Inst #653 = DCBFEP
5585  { 652,	3,	0,	4,	478,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2ULL, nullptr, OperandInfo106 },  // Inst #652 = DCBF
5586  { 651,	2,	0,	4,	317,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, OperandInfo54 },  // Inst #651 = DCBA
5587  { 650,	2,	1,	4,	184,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, OperandInfo63 },  // Inst #650 = DARN
5588  { 649,	3,	0,	4,	335,	0,	0,	0|(1ULL<<MCID::Branch), 0x38ULL, nullptr, OperandInfo89 },  // Inst #649 = CTRL_DEP
5589  { 648,	3,	1,	4,	407,	0,	0,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo104 },  // Inst #648 = CRXOR
5590  { 647,	1,	1,	4,	407,	0,	0,	0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, OperandInfo92 },  // Inst #647 = CRUNSET
5591  { 646,	1,	1,	4,	386,	0,	0,	0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, OperandInfo92 },  // Inst #646 = CRSET
5592  { 645,	3,	1,	4,	407,	0,	0,	0, 0x0ULL, nullptr, OperandInfo104 },  // Inst #645 = CRORC
5593  { 644,	3,	1,	4,	407,	0,	0,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo104 },  // Inst #644 = CROR
5594  { 643,	2,	1,	4,	133,	0,	0,	0, 0x0ULL, nullptr, OperandInfo105 },  // Inst #643 = CRNOT
5595  { 642,	3,	1,	4,	407,	0,	0,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo104 },  // Inst #642 = CRNOR
5596  { 641,	3,	1,	4,	407,	0,	0,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo104 },  // Inst #641 = CRNAND
5597  { 640,	3,	1,	4,	386,	0,	0,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo104 },  // Inst #640 = CREQV
5598  { 639,	3,	1,	4,	407,	0,	0,	0, 0x0ULL, nullptr, OperandInfo104 },  // Inst #639 = CRANDC
5599  { 638,	3,	1,	4,	407,	0,	0,	0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo104 },  // Inst #638 = CRAND
5600  { 637,	0,	0,	4,	407,	0,	1,	0, 0x0ULL, ImplicitList39, nullptr },  // Inst #637 = CR6UNSET
5601  { 636,	0,	0,	4,	386,	0,	1,	0, 0x0ULL, ImplicitList39, nullptr },  // Inst #636 = CR6SET
5602  { 635,	3,	0,	4,	205,	0,	1,	0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, OperandInfo53 },  // Inst #635 = CP_PASTE_rec
5603  { 634,	3,	0,	4,	205,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo52 },  // Inst #634 = CP_PASTE8_rec
5604  { 633,	3,	0,	4,	180,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo52 },  // Inst #633 = CP_COPY8
5605  { 632,	3,	0,	4,	180,	0,	0,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo53 },  // Inst #632 = CP_COPY
5606  { 631,	0,	0,	4,	186,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #631 = CP_ABORT
5607  { 630,	2,	1,	4,	362,	0,	1,	0, 0x208ULL, ImplicitList1, OperandInfo79 },  // Inst #630 = CNTTZW_rec
5608  { 629,	2,	1,	4,	362,	0,	1,	0, 0x308ULL, ImplicitList1, OperandInfo80 },  // Inst #629 = CNTTZW8_rec
5609  { 628,	2,	1,	4,	362,	0,	0,	0, 0x308ULL, nullptr, OperandInfo80 },  // Inst #628 = CNTTZW8
5610  { 627,	2,	1,	4,	362,	0,	0,	0, 0x208ULL, nullptr, OperandInfo79 },  // Inst #627 = CNTTZW
5611  { 626,	2,	1,	4,	362,	0,	1,	0, 0x308ULL, ImplicitList1, OperandInfo80 },  // Inst #626 = CNTTZD_rec
5612  { 625,	3,	1,	4,	338,	0,	0,	0, 0x0ULL, nullptr, OperandInfo67 },  // Inst #625 = CNTTZDM
5613  { 624,	2,	1,	4,	362,	0,	0,	0, 0x308ULL, nullptr, OperandInfo80 },  // Inst #624 = CNTTZD
5614  { 623,	2,	1,	4,	362,	0,	1,	0, 0x208ULL, ImplicitList1, OperandInfo79 },  // Inst #623 = CNTLZW_rec
5615  { 622,	2,	1,	4,	362,	0,	1,	0, 0x308ULL, ImplicitList1, OperandInfo80 },  // Inst #622 = CNTLZW8_rec
5616  { 621,	2,	1,	4,	362,	0,	0,	0, 0x308ULL, nullptr, OperandInfo80 },  // Inst #621 = CNTLZW8
5617  { 620,	2,	1,	4,	362,	0,	0,	0, 0x208ULL, nullptr, OperandInfo79 },  // Inst #620 = CNTLZW
5618  { 619,	2,	1,	4,	362,	0,	1,	0, 0x308ULL, ImplicitList1, OperandInfo80 },  // Inst #619 = CNTLZD_rec
5619  { 618,	3,	1,	4,	338,	0,	0,	0, 0x0ULL, nullptr, OperandInfo67 },  // Inst #618 = CNTLZDM
5620  { 617,	2,	1,	4,	362,	0,	0,	0, 0x308ULL, nullptr, OperandInfo80 },  // Inst #617 = CNTLZD
5621  { 616,	3,	1,	4,	118,	0,	0,	0|(1ULL<<MCID::Compare), 0x8ULL, nullptr, OperandInfo101 },  // Inst #616 = CMPWI
5622  { 615,	3,	1,	4,	118,	0,	0,	0|(1ULL<<MCID::Compare), 0x8ULL, nullptr, OperandInfo100 },  // Inst #615 = CMPW
5623  { 614,	4,	1,	4,	107,	0,	0,	0|(1ULL<<MCID::Compare), 0x8ULL, nullptr, OperandInfo103 },  // Inst #614 = CMPRB8
5624  { 613,	4,	1,	4,	107,	0,	0,	0|(1ULL<<MCID::Compare), 0x8ULL, nullptr, OperandInfo102 },  // Inst #613 = CMPRB
5625  { 612,	3,	1,	4,	118,	0,	0,	0|(1ULL<<MCID::Compare), 0x8ULL, nullptr, OperandInfo101 },  // Inst #612 = CMPLWI
5626  { 611,	3,	1,	4,	118,	0,	0,	0|(1ULL<<MCID::Compare), 0x8ULL, nullptr, OperandInfo100 },  // Inst #611 = CMPLW
5627  { 610,	3,	1,	4,	118,	0,	0,	0|(1ULL<<MCID::Compare), 0x8ULL, nullptr, OperandInfo99 },  // Inst #610 = CMPLDI
5628  { 609,	3,	1,	4,	118,	0,	0,	0|(1ULL<<MCID::Compare), 0x8ULL, nullptr, OperandInfo98 },  // Inst #609 = CMPLD
5629  { 608,	3,	1,	4,	372,	0,	0,	0|(1ULL<<MCID::Compare), 0x8ULL, nullptr, OperandInfo98 },  // Inst #608 = CMPEQB
5630  { 607,	3,	1,	4,	118,	0,	0,	0|(1ULL<<MCID::Compare), 0x8ULL, nullptr, OperandInfo99 },  // Inst #607 = CMPDI
5631  { 606,	3,	1,	4,	118,	0,	0,	0|(1ULL<<MCID::Compare), 0x8ULL, nullptr, OperandInfo98 },  // Inst #606 = CMPD
5632  { 605,	3,	1,	4,	406,	0,	0,	0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, OperandInfo67 },  // Inst #605 = CMPB8
5633  { 604,	3,	1,	4,	406,	0,	0,	0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, OperandInfo65 },  // Inst #604 = CMPB
5634  { 603,	0,	0,	4,	494,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, nullptr },  // Inst #603 = CLRBHRB
5635  { 602,	3,	1,	4,	338,	0,	0,	0, 0x0ULL, nullptr, OperandInfo67 },  // Inst #602 = CFUGED
5636  { 601,	2,	1,	4,	460,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo80 },  // Inst #601 = BRW8
5637  { 600,	2,	1,	4,	460,	0,	0,	0, 0x0ULL, nullptr, OperandInfo79 },  // Inst #600 = BRW
5638  { 599,	3,	1,	4,	293,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo65 },  // Inst #599 = BRINC
5639  { 598,	2,	1,	4,	460,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo80 },  // Inst #598 = BRH8
5640  { 597,	2,	1,	4,	460,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo79 },  // Inst #597 = BRH
5641  { 596,	2,	1,	4,	460,	0,	0,	0, 0x0ULL, nullptr, OperandInfo80 },  // Inst #596 = BRD
5642  { 595,	3,	1,	4,	114,	0,	0,	0, 0x8ULL, nullptr, OperandInfo67 },  // Inst #595 = BPERMD
5643  { 594,	2,	0,	4,	333,	1,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList20, OperandInfo7 },  // Inst #594 = BL_TLS
5644  { 593,	1,	0,	4,	333,	1,	2,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList37, OperandInfo87 },  // Inst #593 = BL_RM
5645  { 592,	1,	0,	8,	333,	1,	2,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList37, OperandInfo87 },  // Inst #592 = BL_NOP_RM
5646  { 591,	1,	0,	8,	333,	1,	1,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList20, OperandInfo87 },  // Inst #591 = BL_NOP
5647  { 590,	0,	0,	4,	333,	2,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList22, nullptr },  // Inst #590 = BLRL
5648  { 589,	0,	0,	4,	333,	2,	0,	0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList38, nullptr },  // Inst #589 = BLR8
5649  { 588,	0,	0,	4,	333,	2,	0,	0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList21, nullptr },  // Inst #588 = BLR
5650  { 587,	1,	0,	4,	335,	1,	2,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList37, OperandInfo2 },  // Inst #587 = BLA_RM
5651  { 586,	1,	0,	4,	335,	1,	2,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList36, OperandInfo2 },  // Inst #586 = BLA8_RM
5652  { 585,	1,	0,	8,	335,	1,	2,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList36, OperandInfo2 },  // Inst #585 = BLA8_NOP_RM
5653  { 584,	1,	0,	8,	335,	1,	1,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList35, OperandInfo2 },  // Inst #584 = BLA8_NOP
5654  { 583,	1,	0,	4,	335,	1,	1,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList35, OperandInfo2 },  // Inst #583 = BLA8
5655  { 582,	1,	0,	4,	335,	1,	1,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList20, OperandInfo2 },  // Inst #582 = BLA
5656  { 581,	2,	0,	4,	333,	1,	1,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList35, OperandInfo7 },  // Inst #581 = BL8_TLS_
5657  { 580,	2,	0,	4,	333,	1,	1,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList35, OperandInfo7 },  // Inst #580 = BL8_TLS
5658  { 579,	1,	0,	4,	333,	1,	2,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList36, OperandInfo87 },  // Inst #579 = BL8_RM
5659  { 578,	2,	0,	4,	334,	1,	1,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList35, OperandInfo7 },  // Inst #578 = BL8_NOTOC_TLS
5660  { 577,	1,	0,	4,	334,	1,	2,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList36, OperandInfo87 },  // Inst #577 = BL8_NOTOC_RM
5661  { 576,	1,	0,	4,	334,	1,	1,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList35, OperandInfo87 },  // Inst #576 = BL8_NOTOC
5662  { 575,	2,	0,	8,	333,	1,	1,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList35, OperandInfo7 },  // Inst #575 = BL8_NOP_TLS
5663  { 574,	1,	0,	8,	333,	1,	2,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList36, OperandInfo87 },  // Inst #574 = BL8_NOP_RM
5664  { 573,	1,	0,	8,	333,	1,	1,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList35, OperandInfo87 },  // Inst #573 = BL8_NOP
5665  { 572,	1,	0,	4,	333,	1,	1,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList35, OperandInfo87 },  // Inst #572 = BL8
5666  { 571,	1,	0,	4,	333,	1,	1,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList20, OperandInfo87 },  // Inst #571 = BL
5667  { 570,	1,	0,	4,	335,	1,	1,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList30, OperandInfo87 },  // Inst #570 = BDZp
5668  { 569,	1,	0,	4,	335,	1,	1,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList30, OperandInfo87 },  // Inst #569 = BDZm
5669  { 568,	1,	0,	4,	335,	2,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList32, OperandInfo87 },  // Inst #568 = BDZLp
5670  { 567,	1,	0,	4,	335,	2,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList32, OperandInfo87 },  // Inst #567 = BDZLm
5671  { 566,	0,	0,	4,	333,	3,	1,	0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList33, nullptr },  // Inst #566 = BDZLRp
5672  { 565,	0,	0,	4,	333,	3,	1,	0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList33, nullptr },  // Inst #565 = BDZLRm
5673  { 564,	0,	0,	4,	333,	3,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList33, nullptr },  // Inst #564 = BDZLRLp
5674  { 563,	0,	0,	4,	333,	3,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList33, nullptr },  // Inst #563 = BDZLRLm
5675  { 562,	0,	0,	4,	333,	3,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList33, nullptr },  // Inst #562 = BDZLRL
5676  { 561,	0,	0,	4,	333,	3,	1,	0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList34, nullptr },  // Inst #561 = BDZLR8
5677  { 560,	0,	0,	4,	333,	3,	1,	0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList33, nullptr },  // Inst #560 = BDZLR
5678  { 559,	1,	0,	4,	289,	2,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList32, OperandInfo2 },  // Inst #559 = BDZLAp
5679  { 558,	1,	0,	4,	289,	2,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList32, OperandInfo2 },  // Inst #558 = BDZLAm
5680  { 557,	1,	0,	4,	289,	2,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList32, OperandInfo2 },  // Inst #557 = BDZLA
5681  { 556,	1,	0,	4,	335,	2,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList32, OperandInfo87 },  // Inst #556 = BDZL
5682  { 555,	1,	0,	4,	289,	1,	1,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList30, OperandInfo2 },  // Inst #555 = BDZAp
5683  { 554,	1,	0,	4,	289,	1,	1,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList30, OperandInfo2 },  // Inst #554 = BDZAm
5684  { 553,	1,	0,	4,	289,	1,	1,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList30, OperandInfo2 },  // Inst #553 = BDZA
5685  { 552,	1,	0,	4,	335,	1,	1,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList31, OperandInfo87 },  // Inst #552 = BDZ8
5686  { 551,	1,	0,	4,	335,	1,	1,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList30, OperandInfo87 },  // Inst #551 = BDZ
5687  { 550,	1,	0,	4,	335,	1,	1,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList30, OperandInfo87 },  // Inst #550 = BDNZp
5688  { 549,	1,	0,	4,	335,	1,	1,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList30, OperandInfo87 },  // Inst #549 = BDNZm
5689  { 548,	1,	0,	4,	335,	2,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList32, OperandInfo87 },  // Inst #548 = BDNZLp
5690  { 547,	1,	0,	4,	335,	2,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList32, OperandInfo87 },  // Inst #547 = BDNZLm
5691  { 546,	0,	0,	4,	333,	3,	1,	0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList33, nullptr },  // Inst #546 = BDNZLRp
5692  { 545,	0,	0,	4,	333,	3,	1,	0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList33, nullptr },  // Inst #545 = BDNZLRm
5693  { 544,	0,	0,	4,	333,	3,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList33, nullptr },  // Inst #544 = BDNZLRLp
5694  { 543,	0,	0,	4,	333,	3,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList33, nullptr },  // Inst #543 = BDNZLRLm
5695  { 542,	0,	0,	4,	333,	3,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList33, nullptr },  // Inst #542 = BDNZLRL
5696  { 541,	0,	0,	4,	333,	3,	1,	0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList34, nullptr },  // Inst #541 = BDNZLR8
5697  { 540,	0,	0,	4,	333,	3,	1,	0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList33, nullptr },  // Inst #540 = BDNZLR
5698  { 539,	1,	0,	4,	289,	2,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList32, OperandInfo2 },  // Inst #539 = BDNZLAp
5699  { 538,	1,	0,	4,	289,	2,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList32, OperandInfo2 },  // Inst #538 = BDNZLAm
5700  { 537,	1,	0,	4,	289,	2,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList32, OperandInfo2 },  // Inst #537 = BDNZLA
5701  { 536,	1,	0,	4,	335,	2,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList32, OperandInfo87 },  // Inst #536 = BDNZL
5702  { 535,	1,	0,	4,	289,	1,	1,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList30, OperandInfo2 },  // Inst #535 = BDNZAp
5703  { 534,	1,	0,	4,	289,	1,	1,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList30, OperandInfo2 },  // Inst #534 = BDNZAm
5704  { 533,	1,	0,	4,	289,	1,	1,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList30, OperandInfo2 },  // Inst #533 = BDNZA
5705  { 532,	1,	0,	4,	335,	1,	1,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList31, OperandInfo87 },  // Inst #532 = BDNZ8
5706  { 531,	1,	0,	4,	335,	1,	1,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList30, OperandInfo87 },  // Inst #531 = BDNZ
5707  { 530,	2,	0,	4,	335,	0,	0,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, nullptr, OperandInfo88 },  // Inst #530 = BCn
5708  { 529,	0,	0,	4,	335,	2,	2,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::Predicable), 0x38ULL, ImplicitList29, nullptr },  // Inst #529 = BCTRL_RM
5709  { 528,	2,	0,	8,	335,	2,	3,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList28, OperandInfo97 },  // Inst #528 = BCTRL_LWZinto_toc_RM
5710  { 527,	2,	0,	8,	335,	2,	2,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList27, OperandInfo97 },  // Inst #527 = BCTRL_LWZinto_toc
5711  { 526,	0,	0,	4,	335,	2,	2,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::Predicable), 0x38ULL, ImplicitList26, nullptr },  // Inst #526 = BCTRL8_RM
5712  { 525,	2,	0,	8,	335,	2,	3,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList25, OperandInfo97 },  // Inst #525 = BCTRL8_LDinto_toc_RM
5713  { 524,	2,	0,	8,	335,	2,	2,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList24, OperandInfo97 },  // Inst #524 = BCTRL8_LDinto_toc
5714  { 523,	0,	0,	4,	335,	2,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::Predicable), 0x38ULL, ImplicitList19, nullptr },  // Inst #523 = BCTRL8
5715  { 522,	0,	0,	4,	335,	2,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::Predicable), 0x38ULL, ImplicitList18, nullptr },  // Inst #522 = BCTRL
5716  { 521,	0,	0,	4,	335,	1,	0,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList17, nullptr },  // Inst #521 = BCTR8
5717  { 520,	0,	0,	4,	335,	1,	0,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList16, nullptr },  // Inst #520 = BCTR
5718  { 519,	2,	0,	4,	335,	1,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList20, OperandInfo88 },  // Inst #519 = BCLn
5719  { 518,	1,	0,	4,	335,	1,	1,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList20, OperandInfo87 },  // Inst #518 = BCLalways
5720  { 517,	1,	0,	4,	333,	2,	0,	0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList21, OperandInfo92 },  // Inst #517 = BCLRn
5721  { 516,	1,	0,	4,	333,	2,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList22, OperandInfo92 },  // Inst #516 = BCLRLn
5722  { 515,	1,	0,	4,	333,	2,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList22, OperandInfo92 },  // Inst #515 = BCLRL
5723  { 514,	1,	0,	4,	333,	2,	0,	0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList21, OperandInfo92 },  // Inst #514 = BCLR
5724  { 513,	2,	0,	4,	335,	1,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList20, OperandInfo88 },  // Inst #513 = BCL
5725  { 512,	3,	1,	4,	355,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList23, OperandInfo95 },  // Inst #512 = BCDUTRUNC_rec
5726  { 511,	3,	1,	4,	355,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList23, OperandInfo95 },  // Inst #511 = BCDUS_rec
5727  { 510,	4,	1,	4,	359,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList23, OperandInfo93 },  // Inst #510 = BCDTRUNC_rec
5728  { 509,	4,	1,	4,	359,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList23, OperandInfo93 },  // Inst #509 = BCDS_rec
5729  { 508,	4,	1,	4,	359,	0,	1,	0, 0x0ULL, ImplicitList23, OperandInfo93 },  // Inst #508 = BCDSUB_rec
5730  { 507,	4,	1,	4,	169,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList23, OperandInfo93 },  // Inst #507 = BCDSR_rec
5731  { 506,	3,	1,	4,	355,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList23, OperandInfo94 },  // Inst #506 = BCDSETSGN_rec
5732  { 505,	3,	1,	4,	355,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList23, OperandInfo94 },  // Inst #505 = BCDCTZ_rec
5733  { 504,	2,	1,	4,	170,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList23, OperandInfo96 },  // Inst #504 = BCDCTSQ_rec
5734  { 503,	2,	1,	4,	354,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList23, OperandInfo96 },  // Inst #503 = BCDCTN_rec
5735  { 502,	3,	1,	4,	355,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList23, OperandInfo95 },  // Inst #502 = BCDCPSGN_rec
5736  { 501,	3,	1,	4,	355,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList23, OperandInfo94 },  // Inst #501 = BCDCFZ_rec
5737  { 500,	3,	1,	4,	172,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList23, OperandInfo94 },  // Inst #500 = BCDCFSQ_rec
5738  { 499,	3,	1,	4,	355,	0,	1,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList23, OperandInfo94 },  // Inst #499 = BCDCFN_rec
5739  { 498,	4,	1,	4,	359,	0,	1,	0, 0x0ULL, ImplicitList23, OperandInfo93 },  // Inst #498 = BCDADD_rec
5740  { 497,	1,	0,	4,	336,	1,	0,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList16, OperandInfo92 },  // Inst #497 = BCCTRn
5741  { 496,	1,	0,	4,	336,	2,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, OperandInfo92 },  // Inst #496 = BCCTRLn
5742  { 495,	1,	0,	4,	336,	2,	1,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList19, OperandInfo92 },  // Inst #495 = BCCTRL8n
5743  { 494,	1,	0,	4,	336,	2,	1,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList19, OperandInfo92 },  // Inst #494 = BCCTRL8
5744  { 493,	1,	0,	4,	336,	2,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, OperandInfo92 },  // Inst #493 = BCCTRL
5745  { 492,	1,	0,	4,	336,	1,	0,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList17, OperandInfo92 },  // Inst #492 = BCCTR8n
5746  { 491,	1,	0,	4,	336,	1,	0,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList17, OperandInfo92 },  // Inst #491 = BCCTR8
5747  { 490,	1,	0,	4,	336,	1,	0,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList16, OperandInfo92 },  // Inst #490 = BCCTR
5748  { 489,	2,	0,	4,	335,	2,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList22, OperandInfo91 },  // Inst #489 = BCCLRL
5749  { 488,	2,	0,	4,	335,	2,	0,	0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList21, OperandInfo91 },  // Inst #488 = BCCLR
5750  { 487,	3,	0,	4,	335,	1,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList20, OperandInfo90 },  // Inst #487 = BCCLA
5751  { 486,	3,	0,	4,	335,	1,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList20, OperandInfo89 },  // Inst #486 = BCCL
5752  { 485,	2,	0,	4,	335,	2,	1,	0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList19, OperandInfo91 },  // Inst #485 = BCCCTRL8
5753  { 484,	2,	0,	4,	335,	2,	1,	0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, OperandInfo91 },  // Inst #484 = BCCCTRL
5754  { 483,	2,	0,	4,	335,	1,	0,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList17, OperandInfo91 },  // Inst #483 = BCCCTR8
5755  { 482,	2,	0,	4,	335,	1,	0,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList16, OperandInfo91 },  // Inst #482 = BCCCTR
5756  { 481,	3,	0,	4,	335,	0,	0,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, nullptr, OperandInfo90 },  // Inst #481 = BCCA
5757  { 480,	3,	0,	4,	335,	0,	0,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, nullptr, OperandInfo89 },  // Inst #480 = BCC
5758  { 479,	2,	0,	4,	335,	0,	0,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, nullptr, OperandInfo88 },  // Inst #479 = BC
5759  { 478,	1,	0,	4,	335,	0,	0,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x38ULL, nullptr, OperandInfo2 },  // Inst #478 = BA
5760  { 477,	1,	0,	4,	335,	0,	0,	0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Terminator), 0x38ULL, nullptr, OperandInfo87 },  // Inst #477 = B
5761  { 476,	0,	0,	4,	490,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #476 = ATTN
5762  { 475,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #475 = ATOMIC_SWAP_I8
5763  { 474,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo86 },  // Inst #474 = ATOMIC_SWAP_I64
5764  { 473,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #473 = ATOMIC_SWAP_I32
5765  { 472,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #472 = ATOMIC_SWAP_I16
5766  { 471,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #471 = ATOMIC_LOAD_XOR_I8
5767  { 470,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo86 },  // Inst #470 = ATOMIC_LOAD_XOR_I64
5768  { 469,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #469 = ATOMIC_LOAD_XOR_I32
5769  { 468,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #468 = ATOMIC_LOAD_XOR_I16
5770  { 467,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #467 = ATOMIC_LOAD_UMIN_I8
5771  { 466,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo86 },  // Inst #466 = ATOMIC_LOAD_UMIN_I64
5772  { 465,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #465 = ATOMIC_LOAD_UMIN_I32
5773  { 464,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #464 = ATOMIC_LOAD_UMIN_I16
5774  { 463,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #463 = ATOMIC_LOAD_UMAX_I8
5775  { 462,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo86 },  // Inst #462 = ATOMIC_LOAD_UMAX_I64
5776  { 461,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #461 = ATOMIC_LOAD_UMAX_I32
5777  { 460,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #460 = ATOMIC_LOAD_UMAX_I16
5778  { 459,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #459 = ATOMIC_LOAD_SUB_I8
5779  { 458,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo86 },  // Inst #458 = ATOMIC_LOAD_SUB_I64
5780  { 457,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #457 = ATOMIC_LOAD_SUB_I32
5781  { 456,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #456 = ATOMIC_LOAD_SUB_I16
5782  { 455,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #455 = ATOMIC_LOAD_OR_I8
5783  { 454,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo86 },  // Inst #454 = ATOMIC_LOAD_OR_I64
5784  { 453,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #453 = ATOMIC_LOAD_OR_I32
5785  { 452,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #452 = ATOMIC_LOAD_OR_I16
5786  { 451,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #451 = ATOMIC_LOAD_NAND_I8
5787  { 450,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo86 },  // Inst #450 = ATOMIC_LOAD_NAND_I64
5788  { 449,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #449 = ATOMIC_LOAD_NAND_I32
5789  { 448,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #448 = ATOMIC_LOAD_NAND_I16
5790  { 447,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #447 = ATOMIC_LOAD_MIN_I8
5791  { 446,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo86 },  // Inst #446 = ATOMIC_LOAD_MIN_I64
5792  { 445,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #445 = ATOMIC_LOAD_MIN_I32
5793  { 444,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #444 = ATOMIC_LOAD_MIN_I16
5794  { 443,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #443 = ATOMIC_LOAD_MAX_I8
5795  { 442,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo86 },  // Inst #442 = ATOMIC_LOAD_MAX_I64
5796  { 441,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #441 = ATOMIC_LOAD_MAX_I32
5797  { 440,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #440 = ATOMIC_LOAD_MAX_I16
5798  { 439,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #439 = ATOMIC_LOAD_AND_I8
5799  { 438,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo86 },  // Inst #438 = ATOMIC_LOAD_AND_I64
5800  { 437,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #437 = ATOMIC_LOAD_AND_I32
5801  { 436,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #436 = ATOMIC_LOAD_AND_I16
5802  { 435,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #435 = ATOMIC_LOAD_ADD_I8
5803  { 434,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo86 },  // Inst #434 = ATOMIC_LOAD_ADD_I64
5804  { 433,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #433 = ATOMIC_LOAD_ADD_I32
5805  { 432,	4,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo85 },  // Inst #432 = ATOMIC_LOAD_ADD_I16
5806  { 431,	5,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo83 },  // Inst #431 = ATOMIC_CMP_SWAP_I8
5807  { 430,	5,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo84 },  // Inst #430 = ATOMIC_CMP_SWAP_I64
5808  { 429,	5,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo83 },  // Inst #429 = ATOMIC_CMP_SWAP_I32
5809  { 428,	5,	1,	4,	0,	0,	1,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, OperandInfo83 },  // Inst #428 = ATOMIC_CMP_SWAP_I16
5810  { 427,	3,	1,	4,	404,	0,	1,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList1, OperandInfo65 },  // Inst #427 = AND_rec
5811  { 426,	2,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, OperandInfo82 },  // Inst #426 = ANDI_rec_1_GT_BIT8
5812  { 425,	2,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, OperandInfo81 },  // Inst #425 = ANDI_rec_1_GT_BIT
5813  { 424,	2,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, OperandInfo82 },  // Inst #424 = ANDI_rec_1_EQ_BIT8
5814  { 423,	2,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, OperandInfo81 },  // Inst #423 = ANDI_rec_1_EQ_BIT
5815  { 422,	3,	1,	4,	405,	0,	1,	0, 0x308ULL, ImplicitList1, OperandInfo53 },  // Inst #422 = ANDI_rec
5816  { 421,	3,	1,	4,	405,	0,	1,	0, 0x208ULL, ImplicitList1, OperandInfo53 },  // Inst #421 = ANDIS_rec
5817  { 420,	3,	1,	4,	405,	0,	1,	0, 0x208ULL, ImplicitList1, OperandInfo52 },  // Inst #420 = ANDIS8_rec
5818  { 419,	3,	1,	4,	405,	0,	1,	0, 0x308ULL, ImplicitList1, OperandInfo52 },  // Inst #419 = ANDI8_rec
5819  { 418,	3,	1,	4,	404,	0,	1,	0, 0x8ULL, ImplicitList1, OperandInfo65 },  // Inst #418 = ANDC_rec
5820  { 417,	3,	1,	4,	404,	0,	1,	0, 0x8ULL, ImplicitList1, OperandInfo67 },  // Inst #417 = ANDC8_rec
5821  { 416,	3,	1,	4,	404,	0,	0,	0, 0x8ULL, nullptr, OperandInfo67 },  // Inst #416 = ANDC8
5822  { 415,	3,	1,	4,	404,	0,	0,	0, 0x8ULL, nullptr, OperandInfo65 },  // Inst #415 = ANDC
5823  { 414,	3,	1,	4,	404,	0,	1,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList1, OperandInfo67 },  // Inst #414 = AND8_rec
5824  { 413,	3,	1,	4,	404,	0,	0,	0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, OperandInfo67 },  // Inst #413 = AND8
5825  { 412,	3,	1,	4,	404,	0,	0,	0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, OperandInfo65 },  // Inst #412 = AND
5826  { 411,	2,	0,	4,	0,	1,	1,	0, 0x0ULL, ImplicitList15, OperandInfo10 },  // Inst #411 = ADJCALLSTACKUP
5827  { 410,	2,	0,	4,	0,	1,	1,	0, 0x0ULL, ImplicitList15, OperandInfo10 },  // Inst #410 = ADJCALLSTACKDOWN
5828  { 409,	2,	1,	4,	418,	1,	2,	0, 0x8ULL, ImplicitList12, OperandInfo79 },  // Inst #409 = ADDZE_rec
5829  { 408,	2,	1,	4,	418,	1,	3,	0, 0x8ULL, ImplicitList11, OperandInfo79 },  // Inst #408 = ADDZEO_rec
5830  { 407,	2,	1,	4,	395,	1,	2,	0, 0x8ULL, ImplicitList10, OperandInfo79 },  // Inst #407 = ADDZEO
5831  { 406,	2,	1,	4,	418,	1,	2,	0, 0x8ULL, ImplicitList12, OperandInfo80 },  // Inst #406 = ADDZE8_rec
5832  { 405,	2,	1,	4,	418,	1,	3,	0, 0x8ULL, ImplicitList11, OperandInfo80 },  // Inst #405 = ADDZE8O_rec
5833  { 404,	2,	1,	4,	395,	1,	2,	0, 0x8ULL, ImplicitList10, OperandInfo80 },  // Inst #404 = ADDZE8O
5834  { 403,	2,	1,	4,	395,	1,	1,	0, 0x8ULL, ImplicitList9, OperandInfo80 },  // Inst #403 = ADDZE8
5835  { 402,	2,	1,	4,	395,	1,	1,	0, 0x8ULL, ImplicitList9, OperandInfo79 },  // Inst #402 = ADDZE
5836  { 401,	2,	1,	4,	290,	0,	0,	0, 0x8ULL, nullptr, OperandInfo63 },  // Inst #401 = ADDPCIS
5837  { 400,	2,	1,	4,	418,	1,	2,	0, 0x8ULL, ImplicitList12, OperandInfo79 },  // Inst #400 = ADDME_rec
5838  { 399,	2,	1,	4,	418,	1,	3,	0, 0x8ULL, ImplicitList11, OperandInfo79 },  // Inst #399 = ADDMEO_rec
5839  { 398,	2,	1,	4,	395,	1,	2,	0, 0x8ULL, ImplicitList10, OperandInfo79 },  // Inst #398 = ADDMEO
5840  { 397,	2,	1,	4,	418,	1,	2,	0, 0x8ULL, ImplicitList12, OperandInfo80 },  // Inst #397 = ADDME8_rec
5841  { 396,	2,	1,	4,	418,	1,	3,	0, 0x8ULL, ImplicitList11, OperandInfo80 },  // Inst #396 = ADDME8O_rec
5842  { 395,	2,	1,	4,	395,	1,	2,	0, 0x8ULL, ImplicitList10, OperandInfo80 },  // Inst #395 = ADDME8O
5843  { 394,	2,	1,	4,	395,	1,	1,	0, 0x8ULL, ImplicitList9, OperandInfo80 },  // Inst #394 = ADDME8
5844  { 393,	2,	1,	4,	395,	1,	1,	0, 0x8ULL, ImplicitList9, OperandInfo79 },  // Inst #393 = ADDME
5845  { 392,	3,	1,	4,	394,	0,	0,	0|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, OperandInfo68 },  // Inst #392 = ADDItocL
5846  { 391,	3,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo78 },  // Inst #391 = ADDItoc8
5847  { 390,	3,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo77 },  // Inst #390 = ADDItoc
5848  { 389,	4,	1,	4,	393,	0,	18,	0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, ImplicitList14, OperandInfo76 },  // Inst #389 = ADDItlsldLADDR32
5849  { 388,	4,	1,	4,	0,	0,	18,	0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, ImplicitList13, OperandInfo75 },  // Inst #388 = ADDItlsldLADDR
5850  { 387,	3,	1,	4,	0,	0,	0,	0, 0x0ULL, nullptr, OperandInfo72 },  // Inst #387 = ADDItlsldL32
5851  { 386,	3,	1,	4,	0,	0,	0,	0, 0x0ULL, nullptr, OperandInfo73 },  // Inst #386 = ADDItlsldL
5852  { 385,	4,	1,	4,	0,	0,	18,	0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, ImplicitList14, OperandInfo76 },  // Inst #385 = ADDItlsgdLADDR32
5853  { 384,	4,	1,	4,	0,	0,	18,	0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, ImplicitList13, OperandInfo75 },  // Inst #384 = ADDItlsgdLADDR
5854  { 383,	3,	1,	4,	0,	0,	0,	0, 0x0ULL, nullptr, OperandInfo72 },  // Inst #383 = ADDItlsgdL32
5855  { 382,	3,	1,	4,	0,	0,	0,	0, 0x0ULL, nullptr, OperandInfo73 },  // Inst #382 = ADDItlsgdL
5856  { 381,	3,	1,	4,	393,	0,	0,	0, 0x0ULL, nullptr, OperandInfo72 },  // Inst #381 = ADDIdtprelL32
5857  { 380,	3,	1,	4,	0,	0,	0,	0, 0x0ULL, nullptr, OperandInfo73 },  // Inst #380 = ADDIdtprelL
5858  { 379,	3,	1,	4,	394,	0,	0,	0|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, OperandInfo68 },  // Inst #379 = ADDIStocHA8
5859  { 378,	3,	1,	4,	394,	0,	0,	0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo74 },  // Inst #378 = ADDIStocHA
5860  { 377,	3,	1,	4,	0,	0,	0,	0, 0x0ULL, nullptr, OperandInfo73 },  // Inst #377 = ADDIStlsldHA
5861  { 376,	3,	1,	4,	0,	0,	0,	0, 0x0ULL, nullptr, OperandInfo73 },  // Inst #376 = ADDIStlsgdHA
5862  { 375,	3,	1,	4,	0,	0,	0,	0, 0x0ULL, nullptr, OperandInfo73 },  // Inst #375 = ADDISgotTprelHA
5863  { 374,	3,	1,	4,	393,	0,	0,	0, 0x0ULL, nullptr, OperandInfo72 },  // Inst #374 = ADDISdtprelHA32
5864  { 373,	3,	1,	4,	0,	0,	0,	0, 0x0ULL, nullptr, OperandInfo73 },  // Inst #373 = ADDISdtprelHA
5865  { 372,	3,	1,	4,	392,	0,	0,	0, 0x8ULL, nullptr, OperandInfo73 },  // Inst #372 = ADDIS8
5866  { 371,	3,	1,	4,	392,	0,	0,	0, 0x8ULL, nullptr, OperandInfo72 },  // Inst #371 = ADDIS
5867  { 370,	3,	1,	4,	421,	0,	2,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, ImplicitList8, OperandInfo53 },  // Inst #370 = ADDIC_rec
5868  { 369,	3,	1,	4,	405,	0,	1,	0, 0x8ULL, ImplicitList5, OperandInfo52 },  // Inst #369 = ADDIC8
5869  { 368,	3,	1,	4,	405,	0,	1,	0, 0xcULL, ImplicitList5, OperandInfo53 },  // Inst #368 = ADDIC
5870  { 367,	3,	1,	4,	392,	0,	0,	0, 0x8ULL, nullptr, OperandInfo73 },  // Inst #367 = ADDI8
5871  { 366,	3,	1,	4,	392,	0,	0,	0, 0x8ULL, nullptr, OperandInfo72 },  // Inst #366 = ADDI
5872  { 365,	3,	1,	4,	421,	1,	2,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList12, OperandInfo65 },  // Inst #365 = ADDE_rec
5873  { 364,	4,	1,	4,	413,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo71 },  // Inst #364 = ADDEX8
5874  { 363,	4,	1,	4,	413,	0,	0,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo70 },  // Inst #363 = ADDEX
5875  { 362,	3,	1,	4,	421,	1,	3,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList11, OperandInfo65 },  // Inst #362 = ADDEO_rec
5876  { 361,	3,	1,	4,	405,	1,	2,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList10, OperandInfo65 },  // Inst #361 = ADDEO
5877  { 360,	3,	1,	4,	421,	1,	2,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList12, OperandInfo67 },  // Inst #360 = ADDE8_rec
5878  { 359,	3,	1,	4,	421,	1,	3,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList11, OperandInfo67 },  // Inst #359 = ADDE8O_rec
5879  { 358,	3,	1,	4,	405,	1,	2,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList10, OperandInfo67 },  // Inst #358 = ADDE8O
5880  { 357,	3,	1,	4,	405,	1,	1,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList9, OperandInfo67 },  // Inst #357 = ADDE8
5881  { 356,	3,	1,	4,	405,	1,	1,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList9, OperandInfo65 },  // Inst #356 = ADDE
5882  { 355,	3,	1,	4,	426,	0,	2,	0|(1ULL<<MCID::Commutable), 0xcULL, ImplicitList8, OperandInfo65 },  // Inst #355 = ADDC_rec
5883  { 354,	3,	1,	4,	247,	0,	3,	0|(1ULL<<MCID::Commutable), 0xcULL, ImplicitList7, OperandInfo65 },  // Inst #354 = ADDCO_rec
5884  { 353,	3,	1,	4,	425,	0,	2,	0|(1ULL<<MCID::Commutable), 0xcULL, ImplicitList6, OperandInfo65 },  // Inst #353 = ADDCO
5885  { 352,	3,	1,	4,	426,	0,	2,	0|(1ULL<<MCID::Commutable), 0xcULL, ImplicitList8, OperandInfo67 },  // Inst #352 = ADDC8_rec
5886  { 351,	3,	1,	4,	247,	0,	3,	0|(1ULL<<MCID::Commutable), 0xcULL, ImplicitList7, OperandInfo67 },  // Inst #351 = ADDC8O_rec
5887  { 350,	3,	1,	4,	425,	0,	2,	0|(1ULL<<MCID::Commutable), 0xcULL, ImplicitList6, OperandInfo67 },  // Inst #350 = ADDC8O
5888  { 349,	3,	1,	4,	425,	0,	1,	0|(1ULL<<MCID::Commutable), 0xcULL, ImplicitList5, OperandInfo67 },  // Inst #349 = ADDC8
5889  { 348,	3,	1,	4,	425,	0,	1,	0|(1ULL<<MCID::Commutable), 0xcULL, ImplicitList5, OperandInfo65 },  // Inst #348 = ADDC
5890  { 347,	3,	1,	4,	404,	0,	1,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList1, OperandInfo67 },  // Inst #347 = ADD8_rec
5891  { 346,	3,	1,	4,	404,	0,	0,	0, 0x8ULL, nullptr, OperandInfo69 },  // Inst #346 = ADD8TLS_
5892  { 345,	3,	1,	4,	404,	0,	0,	0, 0x8ULL, nullptr, OperandInfo68 },  // Inst #345 = ADD8TLS
5893  { 344,	3,	1,	4,	120,	0,	2,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList4, OperandInfo67 },  // Inst #344 = ADD8O_rec
5894  { 343,	3,	1,	4,	404,	0,	1,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList3, OperandInfo67 },  // Inst #343 = ADD8O
5895  { 342,	3,	1,	4,	404,	0,	0,	0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, OperandInfo67 },  // Inst #342 = ADD8
5896  { 341,	3,	1,	4,	404,	0,	1,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList1, OperandInfo65 },  // Inst #341 = ADD4_rec
5897  { 340,	3,	1,	4,	404,	0,	0,	0, 0x8ULL, nullptr, OperandInfo66 },  // Inst #340 = ADD4TLS
5898  { 339,	3,	1,	4,	120,	0,	2,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList4, OperandInfo65 },  // Inst #339 = ADD4O_rec
5899  { 338,	3,	1,	4,	404,	0,	1,	0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList3, OperandInfo65 },  // Inst #338 = ADD4O
5900  { 337,	3,	1,	4,	404,	0,	0,	0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, OperandInfo65 },  // Inst #337 = ADD4
5901  { 336,	3,	0,	4,	219,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x40ULL, nullptr, OperandInfo60 },  // Inst #336 = XFSTOREf64
5902  { 335,	3,	0,	4,	219,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x40ULL, nullptr, OperandInfo64 },  // Inst #335 = XFSTOREf32
5903  { 334,	3,	1,	4,	178,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo60 },  // Inst #334 = XFLOADf64
5904  { 333,	3,	1,	4,	213,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo64 },  // Inst #333 = XFLOADf32
5905  { 332,	2,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo63 },  // Inst #332 = SUBPCIS
5906  { 331,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo53 },  // Inst #331 = SUBIS
5907  { 330,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo53 },  // Inst #330 = SUBIC_rec
5908  { 329,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo53 },  // Inst #329 = SUBIC
5909  { 328,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo53 },  // Inst #328 = SUBI
5910  { 327,	3,	0,	4,	483,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x40ULL, nullptr, OperandInfo60 },  // Inst #327 = STIWX
5911  { 326,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo53 },  // Inst #326 = SRWI_rec
5912  { 325,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo53 },  // Inst #325 = SRWI
5913  { 324,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo52 },  // Inst #324 = SRDI_rec
5914  { 323,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo52 },  // Inst #323 = SRDI
5915  { 322,	3,	0,	4,	485,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x40ULL, nullptr, OperandInfo62 },  // Inst #322 = SPILLTOVSR_STX
5916  { 321,	3,	0,	4,	481,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo61 },  // Inst #321 = SPILLTOVSR_ST
5917  { 320,	3,	1,	4,	437,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo62 },  // Inst #320 = SPILLTOVSR_LDX
5918  { 319,	3,	1,	4,	432,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo61 },  // Inst #319 = SPILLTOVSR_LD
5919  { 318,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo53 },  // Inst #318 = SLWI_rec
5920  { 317,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo53 },  // Inst #317 = SLWI
5921  { 316,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo52 },  // Inst #316 = SLDI_rec
5922  { 315,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo52 },  // Inst #315 = SLDI
5923  { 314,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo53 },  // Inst #314 = ROTRWI_rec
5924  { 313,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo53 },  // Inst #313 = ROTRWI
5925  { 312,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo52 },  // Inst #312 = ROTRDI_rec
5926  { 311,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo52 },  // Inst #311 = ROTRDI
5927  { 310,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo50 },  // Inst #310 = RLWNMbm_rec
5928  { 309,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo50 },  // Inst #309 = RLWNMbm
5929  { 308,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo50 },  // Inst #308 = RLWINMbm_rec
5930  { 307,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo50 },  // Inst #307 = RLWINMbm
5931  { 306,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo50 },  // Inst #306 = RLWIMIbm_rec
5932  { 305,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo50 },  // Inst #305 = RLWIMIbm
5933  { 304,	3,	1,	4,	178,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo60 },  // Inst #304 = LIWZX
5934  { 303,	3,	1,	4,	210,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, OperandInfo60 },  // Inst #303 = LIWAX
5935  { 302,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo59 },  // Inst #302 = LAx
5936  { 301,	2,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo58 },  // Inst #301 = KILL_PAIR
5937  { 300,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo51 },  // Inst #300 = INSRWI_rec
5938  { 299,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo51 },  // Inst #299 = INSRWI
5939  { 298,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo50 },  // Inst #298 = INSRDI_rec
5940  { 297,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo50 },  // Inst #297 = INSRDI
5941  { 296,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo51 },  // Inst #296 = INSLWI_rec
5942  { 295,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo51 },  // Inst #295 = INSLWI
5943  { 294,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo51 },  // Inst #294 = EXTRWI_rec
5944  { 293,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo51 },  // Inst #293 = EXTRWI
5945  { 292,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo50 },  // Inst #292 = EXTRDI_rec
5946  { 291,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo50 },  // Inst #291 = EXTRDI
5947  { 290,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo51 },  // Inst #290 = EXTLWI_rec
5948  { 289,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo51 },  // Inst #289 = EXTLWI
5949  { 288,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo50 },  // Inst #288 = EXTLDI_rec
5950  { 287,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo50 },  // Inst #287 = EXTLDI
5951  { 286,	3,	0,	4,	483,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo57 },  // Inst #286 = DFSTOREf64
5952  { 285,	3,	0,	4,	483,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo56 },  // Inst #285 = DFSTOREf32
5953  { 284,	3,	1,	4,	178,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo57 },  // Inst #284 = DFLOADf64
5954  { 283,	3,	1,	4,	213,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo56 },  // Inst #283 = DFLOADf32
5955  { 282,	2,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo54 },  // Inst #282 = DCBTx
5956  { 281,	2,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo54 },  // Inst #281 = DCBTT
5957  { 280,	2,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo54 },  // Inst #280 = DCBTSTx
5958  { 279,	2,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo54 },  // Inst #279 = DCBTSTT
5959  { 278,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo55 },  // Inst #278 = DCBTSTDS
5960  { 277,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo55 },  // Inst #277 = DCBTSTCT
5961  { 276,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo55 },  // Inst #276 = DCBTDS
5962  { 275,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo55 },  // Inst #275 = DCBTCT
5963  { 274,	2,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo54 },  // Inst #274 = DCBSTPS
5964  { 273,	2,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo54 },  // Inst #273 = DCBFx
5965  { 272,	2,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo54 },  // Inst #272 = DCBFPS
5966  { 271,	2,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo54 },  // Inst #271 = DCBFLP
5967  { 270,	2,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo54 },  // Inst #270 = DCBFL
5968  { 269,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo53 },  // Inst #269 = CLRRWI_rec
5969  { 268,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo53 },  // Inst #268 = CLRRWI
5970  { 267,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo52 },  // Inst #267 = CLRRDI_rec
5971  { 266,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo52 },  // Inst #266 = CLRRDI
5972  { 265,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo51 },  // Inst #265 = CLRLSLWI_rec
5973  { 264,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo51 },  // Inst #264 = CLRLSLWI
5974  { 263,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo50 },  // Inst #263 = CLRLSLDI_rec
5975  { 262,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo50 },  // Inst #262 = CLRLSLDI
5976  { 261,	1,	0,	4,	1,	0,	1,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList2, OperandInfo49 },  // Inst #261 = CFENCE8
5977  { 260,	2,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo48 },  // Inst #260 = BUILD_UACC
5978  { 259,	3,	1,	4,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo47 },  // Inst #259 = BUILD_QUADWORD
5979  { 258,	6,	2,	4,	0,	0,	1,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, OperandInfo46 },  // Inst #258 = ATOMIC_SWAP_I128
5980  { 257,	6,	2,	4,	0,	0,	1,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, OperandInfo46 },  // Inst #257 = ATOMIC_LOAD_XOR_I128
5981  { 256,	6,	2,	4,	0,	0,	1,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, OperandInfo46 },  // Inst #256 = ATOMIC_LOAD_SUB_I128
5982  { 255,	6,	2,	4,	0,	0,	1,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, OperandInfo46 },  // Inst #255 = ATOMIC_LOAD_OR_I128
5983  { 254,	6,	2,	4,	0,	0,	1,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, OperandInfo46 },  // Inst #254 = ATOMIC_LOAD_NAND_I128
5984  { 253,	6,	2,	4,	0,	0,	1,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, OperandInfo46 },  // Inst #253 = ATOMIC_LOAD_AND_I128
5985  { 252,	6,	2,	4,	0,	0,	1,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, OperandInfo46 },  // Inst #252 = ATOMIC_LOAD_ADD_I128
5986  { 251,	8,	2,	4,	0,	0,	1,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, OperandInfo45 },  // Inst #251 = ATOMIC_CMP_SWAP_I128
5987  { 250,	4,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo44 },  // Inst #250 = G_UBFX
5988  { 249,	4,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo44 },  // Inst #249 = G_SBFX
5989  { 248,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #248 = G_VECREDUCE_UMIN
5990  { 247,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #247 = G_VECREDUCE_UMAX
5991  { 246,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #246 = G_VECREDUCE_SMIN
5992  { 245,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #245 = G_VECREDUCE_SMAX
5993  { 244,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #244 = G_VECREDUCE_XOR
5994  { 243,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #243 = G_VECREDUCE_OR
5995  { 242,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #242 = G_VECREDUCE_AND
5996  { 241,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #241 = G_VECREDUCE_MUL
5997  { 240,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #240 = G_VECREDUCE_ADD
5998  { 239,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #239 = G_VECREDUCE_FMIN
5999  { 238,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #238 = G_VECREDUCE_FMAX
6000  { 237,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #237 = G_VECREDUCE_FMUL
6001  { 236,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #236 = G_VECREDUCE_FADD
6002  { 235,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo40 },  // Inst #235 = G_VECREDUCE_SEQ_FMUL
6003  { 234,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo40 },  // Inst #234 = G_VECREDUCE_SEQ_FADD
6004  { 233,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo22 },  // Inst #233 = G_BZERO
6005  { 232,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo43 },  // Inst #232 = G_MEMSET
6006  { 231,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo43 },  // Inst #231 = G_MEMMOVE
6007  { 230,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo40 },  // Inst #230 = G_MEMCPY_INLINE
6008  { 229,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo43 },  // Inst #229 = G_MEMCPY
6009  { 228,	2,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL, nullptr, OperandInfo42 },  // Inst #228 = G_WRITE_REGISTER
6010  { 227,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL, nullptr, OperandInfo21 },  // Inst #227 = G_READ_REGISTER
6011  { 226,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo25 },  // Inst #226 = G_STRICT_FSQRT
6012  { 225,	4,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo19 },  // Inst #225 = G_STRICT_FMA
6013  { 224,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo18 },  // Inst #224 = G_STRICT_FREM
6014  { 223,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo18 },  // Inst #223 = G_STRICT_FDIV
6015  { 222,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo18 },  // Inst #222 = G_STRICT_FMUL
6016  { 221,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo18 },  // Inst #221 = G_STRICT_FSUB
6017  { 220,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo18 },  // Inst #220 = G_STRICT_FADD
6018  { 219,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo26 },  // Inst #219 = G_DYN_STACKALLOC
6019  { 218,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo21 },  // Inst #218 = G_JUMP_TABLE
6020  { 217,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo21 },  // Inst #217 = G_BLOCK_ADDR
6021  { 216,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #216 = G_ADDRSPACE_CAST
6022  { 215,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo25 },  // Inst #215 = G_FNEARBYINT
6023  { 214,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo25 },  // Inst #214 = G_FRINT
6024  { 213,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo25 },  // Inst #213 = G_FFLOOR
6025  { 212,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo25 },  // Inst #212 = G_FSQRT
6026  { 211,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo25 },  // Inst #211 = G_FSIN
6027  { 210,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo25 },  // Inst #210 = G_FCOS
6028  { 209,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo25 },  // Inst #209 = G_FCEIL
6029  { 208,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo25 },  // Inst #208 = G_BITREVERSE
6030  { 207,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo25 },  // Inst #207 = G_BSWAP
6031  { 206,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #206 = G_CTPOP
6032  { 205,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #205 = G_CTLZ_ZERO_UNDEF
6033  { 204,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #204 = G_CTLZ
6034  { 203,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #203 = G_CTTZ_ZERO_UNDEF
6035  { 202,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #202 = G_CTTZ
6036  { 201,	4,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo41 },  // Inst #201 = G_SHUFFLE_VECTOR
6037  { 200,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo40 },  // Inst #200 = G_EXTRACT_VECTOR_ELT
6038  { 199,	4,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo39 },  // Inst #199 = G_INSERT_VECTOR_ELT
6039  { 198,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, OperandInfo38 },  // Inst #198 = G_BRJT
6040  { 197,	1,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, OperandInfo2 },  // Inst #197 = G_BR
6041  { 196,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #196 = G_LLROUND
6042  { 195,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #195 = G_LROUND
6043  { 194,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo25 },  // Inst #194 = G_ABS
6044  { 193,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo18 },  // Inst #193 = G_UMAX
6045  { 192,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo18 },  // Inst #192 = G_UMIN
6046  { 191,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo18 },  // Inst #191 = G_SMAX
6047  { 190,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo18 },  // Inst #190 = G_SMIN
6048  { 189,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo33 },  // Inst #189 = G_PTRMASK
6049  { 188,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo33 },  // Inst #188 = G_PTR_ADD
6050  { 187,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo18 },  // Inst #187 = G_FMAXIMUM
6051  { 186,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo18 },  // Inst #186 = G_FMINIMUM
6052  { 185,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo18 },  // Inst #185 = G_FMAXNUM_IEEE
6053  { 184,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo18 },  // Inst #184 = G_FMINNUM_IEEE
6054  { 183,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo18 },  // Inst #183 = G_FMAXNUM
6055  { 182,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo18 },  // Inst #182 = G_FMINNUM
6056  { 181,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo25 },  // Inst #181 = G_FCANONICALIZE
6057  { 180,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo32 },  // Inst #180 = G_IS_FPCLASS
6058  { 179,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo33 },  // Inst #179 = G_FCOPYSIGN
6059  { 178,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo25 },  // Inst #178 = G_FABS
6060  { 177,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #177 = G_UITOFP
6061  { 176,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #176 = G_SITOFP
6062  { 175,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #175 = G_FPTOUI
6063  { 174,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #174 = G_FPTOSI
6064  { 173,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #173 = G_FPTRUNC
6065  { 172,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #172 = G_FPEXT
6066  { 171,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo25 },  // Inst #171 = G_FNEG
6067  { 170,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo25 },  // Inst #170 = G_FLOG10
6068  { 169,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo25 },  // Inst #169 = G_FLOG2
6069  { 168,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo25 },  // Inst #168 = G_FLOG
6070  { 167,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo25 },  // Inst #167 = G_FEXP2
6071  { 166,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo25 },  // Inst #166 = G_FEXP
6072  { 165,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo33 },  // Inst #165 = G_FPOWI
6073  { 164,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo18 },  // Inst #164 = G_FPOW
6074  { 163,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo18 },  // Inst #163 = G_FREM
6075  { 162,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo18 },  // Inst #162 = G_FDIV
6076  { 161,	4,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo19 },  // Inst #161 = G_FMAD
6077  { 160,	4,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo19 },  // Inst #160 = G_FMA
6078  { 159,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo18 },  // Inst #159 = G_FMUL
6079  { 158,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo18 },  // Inst #158 = G_FSUB
6080  { 157,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo18 },  // Inst #157 = G_FADD
6081  { 156,	4,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo37 },  // Inst #156 = G_UDIVFIXSAT
6082  { 155,	4,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo37 },  // Inst #155 = G_SDIVFIXSAT
6083  { 154,	4,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo37 },  // Inst #154 = G_UDIVFIX
6084  { 153,	4,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo37 },  // Inst #153 = G_SDIVFIX
6085  { 152,	4,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo37 },  // Inst #152 = G_UMULFIXSAT
6086  { 151,	4,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo37 },  // Inst #151 = G_SMULFIXSAT
6087  { 150,	4,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo37 },  // Inst #150 = G_UMULFIX
6088  { 149,	4,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo37 },  // Inst #149 = G_SMULFIX
6089  { 148,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo33 },  // Inst #148 = G_SSHLSAT
6090  { 147,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo33 },  // Inst #147 = G_USHLSAT
6091  { 146,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo18 },  // Inst #146 = G_SSUBSAT
6092  { 145,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo18 },  // Inst #145 = G_USUBSAT
6093  { 144,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo18 },  // Inst #144 = G_SADDSAT
6094  { 143,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo18 },  // Inst #143 = G_UADDSAT
6095  { 142,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo18 },  // Inst #142 = G_SMULH
6096  { 141,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo18 },  // Inst #141 = G_UMULH
6097  { 140,	4,	2,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo30 },  // Inst #140 = G_SMULO
6098  { 139,	4,	2,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo30 },  // Inst #139 = G_UMULO
6099  { 138,	5,	2,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo36 },  // Inst #138 = G_SSUBE
6100  { 137,	4,	2,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo30 },  // Inst #137 = G_SSUBO
6101  { 136,	5,	2,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo36 },  // Inst #136 = G_SADDE
6102  { 135,	4,	2,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo30 },  // Inst #135 = G_SADDO
6103  { 134,	5,	2,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo36 },  // Inst #134 = G_USUBE
6104  { 133,	4,	2,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo30 },  // Inst #133 = G_USUBO
6105  { 132,	5,	2,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo36 },  // Inst #132 = G_UADDE
6106  { 131,	4,	2,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo30 },  // Inst #131 = G_UADDO
6107  { 130,	4,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo30 },  // Inst #130 = G_SELECT
6108  { 129,	4,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo35 },  // Inst #129 = G_FCMP
6109  { 128,	4,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo35 },  // Inst #128 = G_ICMP
6110  { 127,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo33 },  // Inst #127 = G_ROTL
6111  { 126,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo33 },  // Inst #126 = G_ROTR
6112  { 125,	4,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo34 },  // Inst #125 = G_FSHR
6113  { 124,	4,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo34 },  // Inst #124 = G_FSHL
6114  { 123,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo33 },  // Inst #123 = G_ASHR
6115  { 122,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo33 },  // Inst #122 = G_LSHR
6116  { 121,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo33 },  // Inst #121 = G_SHL
6117  { 120,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #120 = G_ZEXT
6118  { 119,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo17 },  // Inst #119 = G_SEXT_INREG
6119  { 118,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #118 = G_SEXT
6120  { 117,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo32 },  // Inst #117 = G_VAARG
6121  { 116,	1,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo20 },  // Inst #116 = G_VASTART
6122  { 115,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo21 },  // Inst #115 = G_FCONSTANT
6123  { 114,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo21 },  // Inst #114 = G_CONSTANT
6124  { 113,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #113 = G_TRUNC
6125  { 112,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #112 = G_ANYEXT
6126  { 111,	1,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL, nullptr, OperandInfo2 },  // Inst #111 = G_INTRINSIC_W_SIDE_EFFECTS
6127  { 110,	1,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::Convergent), 0x0ULL, nullptr, OperandInfo2 },  // Inst #110 = G_INTRINSIC
6128  { 109,	0,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr },  // Inst #109 = G_INVOKE_REGION_START
6129  { 108,	1,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, OperandInfo20 },  // Inst #108 = G_BRINDIRECT
6130  { 107,	2,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, OperandInfo21 },  // Inst #107 = G_BRCOND
6131  { 106,	2,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo10 },  // Inst #106 = G_FENCE
6132  { 105,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo31 },  // Inst #105 = G_ATOMICRMW_UDEC_WRAP
6133  { 104,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo31 },  // Inst #104 = G_ATOMICRMW_UINC_WRAP
6134  { 103,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo31 },  // Inst #103 = G_ATOMICRMW_FMIN
6135  { 102,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo31 },  // Inst #102 = G_ATOMICRMW_FMAX
6136  { 101,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo31 },  // Inst #101 = G_ATOMICRMW_FSUB
6137  { 100,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo31 },  // Inst #100 = G_ATOMICRMW_FADD
6138  { 99,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo31 },  // Inst #99 = G_ATOMICRMW_UMIN
6139  { 98,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo31 },  // Inst #98 = G_ATOMICRMW_UMAX
6140  { 97,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo31 },  // Inst #97 = G_ATOMICRMW_MIN
6141  { 96,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo31 },  // Inst #96 = G_ATOMICRMW_MAX
6142  { 95,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo31 },  // Inst #95 = G_ATOMICRMW_XOR
6143  { 94,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo31 },  // Inst #94 = G_ATOMICRMW_OR
6144  { 93,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo31 },  // Inst #93 = G_ATOMICRMW_NAND
6145  { 92,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo31 },  // Inst #92 = G_ATOMICRMW_AND
6146  { 91,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo31 },  // Inst #91 = G_ATOMICRMW_SUB
6147  { 90,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo31 },  // Inst #90 = G_ATOMICRMW_ADD
6148  { 89,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo31 },  // Inst #89 = G_ATOMICRMW_XCHG
6149  { 88,	4,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo30 },  // Inst #88 = G_ATOMIC_CMPXCHG
6150  { 87,	5,	2,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo29 },  // Inst #87 = G_ATOMIC_CMPXCHG_WITH_SUCCESS
6151  { 86,	5,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo28 },  // Inst #86 = G_INDEXED_STORE
6152  { 85,	2,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, OperandInfo23 },  // Inst #85 = G_STORE
6153  { 84,	5,	2,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo27 },  // Inst #84 = G_INDEXED_ZEXTLOAD
6154  { 83,	5,	2,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo27 },  // Inst #83 = G_INDEXED_SEXTLOAD
6155  { 82,	5,	2,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo27 },  // Inst #82 = G_INDEXED_LOAD
6156  { 81,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo23 },  // Inst #81 = G_ZEXTLOAD
6157  { 80,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo23 },  // Inst #80 = G_SEXTLOAD
6158  { 79,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, OperandInfo23 },  // Inst #79 = G_LOAD
6159  { 78,	1,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo20 },  // Inst #78 = G_READCYCLECOUNTER
6160  { 77,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo25 },  // Inst #77 = G_INTRINSIC_ROUNDEVEN
6161  { 76,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #76 = G_INTRINSIC_LRINT
6162  { 75,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo25 },  // Inst #75 = G_INTRINSIC_ROUND
6163  { 74,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo25 },  // Inst #74 = G_INTRINSIC_TRUNC
6164  { 73,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo26 },  // Inst #73 = G_INTRINSIC_FPTRUNC_ROUND
6165  { 72,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo25 },  // Inst #72 = G_FREEZE
6166  { 71,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #71 = G_BITCAST
6167  { 70,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #70 = G_INTTOPTR
6168  { 69,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo23 },  // Inst #69 = G_PTRTOINT
6169  { 68,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, OperandInfo23 },  // Inst #68 = G_CONCAT_VECTORS
6170  { 67,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, OperandInfo23 },  // Inst #67 = G_BUILD_VECTOR_TRUNC
6171  { 66,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, OperandInfo23 },  // Inst #66 = G_BUILD_VECTOR
6172  { 65,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, OperandInfo23 },  // Inst #65 = G_MERGE_VALUES
6173  { 64,	4,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo24 },  // Inst #64 = G_INSERT
6174  { 63,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, OperandInfo23 },  // Inst #63 = G_UNMERGE_VALUES
6175  { 62,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo22 },  // Inst #62 = G_EXTRACT
6176  { 61,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo21 },  // Inst #61 = G_GLOBAL_VALUE
6177  { 60,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo21 },  // Inst #60 = G_FRAME_INDEX
6178  { 59,	1,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, OperandInfo20 },  // Inst #59 = G_PHI
6179  { 58,	1,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo20 },  // Inst #58 = G_IMPLICIT_DEF
6180  { 57,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo18 },  // Inst #57 = G_XOR
6181  { 56,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo18 },  // Inst #56 = G_OR
6182  { 55,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo18 },  // Inst #55 = G_AND
6183  { 54,	4,	2,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo19 },  // Inst #54 = G_UDIVREM
6184  { 53,	4,	2,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo19 },  // Inst #53 = G_SDIVREM
6185  { 52,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo18 },  // Inst #52 = G_UREM
6186  { 51,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo18 },  // Inst #51 = G_SREM
6187  { 50,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo18 },  // Inst #50 = G_UDIV
6188  { 49,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo18 },  // Inst #49 = G_SDIV
6189  { 48,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo18 },  // Inst #48 = G_MUL
6190  { 47,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo18 },  // Inst #47 = G_SUB
6191  { 46,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, OperandInfo18 },  // Inst #46 = G_ADD
6192  { 45,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo17 },  // Inst #45 = G_ASSERT_ALIGN
6193  { 44,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo17 },  // Inst #44 = G_ASSERT_ZEXT
6194  { 43,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo17 },  // Inst #43 = G_ASSERT_SEXT
6195  { 42,	0,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #42 = MEMBARRIER
6196  { 41,	0,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #41 = ICALL_BRANCH_FUNNEL
6197  { 40,	3,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo16 },  // Inst #40 = PATCHABLE_TYPED_EVENT_CALL
6198  { 39,	2,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo15 },  // Inst #39 = PATCHABLE_EVENT_CALL
6199  { 38,	0,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #38 = PATCHABLE_TAIL_CALL
6200  { 37,	0,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #37 = PATCHABLE_FUNCTION_EXIT
6201  { 36,	0,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #36 = PATCHABLE_RET
6202  { 35,	0,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #35 = PATCHABLE_FUNCTION_ENTER
6203  { 34,	0,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #34 = PATCHABLE_OP
6204  { 33,	1,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo2 },  // Inst #33 = FAULTING_OP
6205  { 32,	2,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo14 },  // Inst #32 = LOCAL_ESCAPE
6206  { 31,	0,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #31 = STATEPOINT
6207  { 30,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo13 },  // Inst #30 = PREALLOCATED_ARG
6208  { 29,	1,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo3 },  // Inst #29 = PREALLOCATED_SETUP
6209  { 28,	1,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, OperandInfo12 },  // Inst #28 = LOAD_STACK_GUARD
6210  { 27,	6,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo11 },  // Inst #27 = PATCHPOINT
6211  { 26,	0,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #26 = FENTRY_CALL
6212  { 25,	2,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo10 },  // Inst #25 = STACKMAP
6213  { 24,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL, nullptr, OperandInfo9 },  // Inst #24 = ARITH_FENCE
6214  { 23,	4,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, OperandInfo8 },  // Inst #23 = PSEUDO_PROBE
6215  { 22,	1,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL, nullptr, OperandInfo3 },  // Inst #22 = LIFETIME_END
6216  { 21,	1,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL, nullptr, OperandInfo3 },  // Inst #21 = LIFETIME_START
6217  { 20,	0,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr },  // Inst #20 = BUNDLE
6218  { 19,	2,	1,	0,	121,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, OperandInfo7 },  // Inst #19 = COPY
6219  { 18,	2,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, OperandInfo7 },  // Inst #18 = REG_SEQUENCE
6220  { 17,	1,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL, nullptr, OperandInfo2 },  // Inst #17 = DBG_LABEL
6221  { 16,	0,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr },  // Inst #16 = DBG_PHI
6222  { 15,	0,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr },  // Inst #15 = DBG_INSTR_REF
6223  { 14,	0,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr },  // Inst #14 = DBG_VALUE_LIST
6224  { 13,	0,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr },  // Inst #13 = DBG_VALUE
6225  { 12,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, OperandInfo4 },  // Inst #12 = COPY_TO_REGCLASS
6226  { 11,	4,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo6 },  // Inst #11 = SUBREG_TO_REG
6227  { 10,	1,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, OperandInfo2 },  // Inst #10 = IMPLICIT_DEF
6228  { 9,	4,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo5 },  // Inst #9 = INSERT_SUBREG
6229  { 8,	3,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, OperandInfo4 },  // Inst #8 = EXTRACT_SUBREG
6230  { 7,	0,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr },  // Inst #7 = KILL
6231  { 6,	1,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, OperandInfo3 },  // Inst #6 = ANNOTATION_LABEL
6232  { 5,	1,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, OperandInfo3 },  // Inst #5 = GC_LABEL
6233  { 4,	1,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, OperandInfo3 },  // Inst #4 = EH_LABEL
6234  { 3,	1,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, OperandInfo3 },  // Inst #3 = CFI_INSTRUCTION
6235  { 2,	0,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr },  // Inst #2 = INLINEASM_BR
6236  { 1,	0,	0,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr },  // Inst #1 = INLINEASM
6237  { 0,	1,	1,	0,	0,	0,	0,	0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, OperandInfo2 },  // Inst #0 = PHI
6238};
6239
6240
6241#ifdef __GNUC__
6242#pragma GCC diagnostic push
6243#pragma GCC diagnostic ignored "-Woverlength-strings"
6244#endif
6245extern const char PPCInstrNameData[] = {
6246  /* 0 */ "G_FLOG10\0"
6247  /* 9 */ "MTFSB0\0"
6248  /* 16 */ "V_SET0\0"
6249  /* 23 */ "VCTSXS_0\0"
6250  /* 32 */ "VCTUXS_0\0"
6251  /* 41 */ "VCFSX_0\0"
6252  /* 49 */ "VCFUX_0\0"
6253  /* 57 */ "MTFSB1\0"
6254  /* 64 */ "DMXXINSTFDMR512\0"
6255  /* 80 */ "DMXXEXTFDMR512\0"
6256  /* 95 */ "ADDISdtprelHA32\0"
6257  /* 111 */ "ATOMIC_LOAD_SUB_I32\0"
6258  /* 131 */ "ATOMIC_LOAD_ADD_I32\0"
6259  /* 151 */ "ATOMIC_LOAD_NAND_I32\0"
6260  /* 172 */ "ATOMIC_LOAD_AND_I32\0"
6261  /* 192 */ "ATOMIC_LOAD_UMIN_I32\0"
6262  /* 213 */ "ATOMIC_LOAD_MIN_I32\0"
6263  /* 233 */ "ATOMIC_SWAP_I32\0"
6264  /* 249 */ "ATOMIC_CMP_SWAP_I32\0"
6265  /* 269 */ "ATOMIC_LOAD_XOR_I32\0"
6266  /* 289 */ "ATOMIC_LOAD_OR_I32\0"
6267  /* 308 */ "ATOMIC_LOAD_UMAX_I32\0"
6268  /* 329 */ "ATOMIC_LOAD_MAX_I32\0"
6269  /* 349 */ "ADDItlsgdL32\0"
6270  /* 362 */ "ADDItlsldL32\0"
6271  /* 375 */ "LDgotTprelL32\0"
6272  /* 389 */ "ADDIdtprelL32\0"
6273  /* 403 */ "ADDItlsgdLADDR32\0"
6274  /* 420 */ "ADDItlsldLADDR32\0"
6275  /* 437 */ "GETtlsldADDR32\0"
6276  /* 452 */ "GETtlsADDR32\0"
6277  /* 465 */ "PREPARE_PROBED_ALLOCA_32\0"
6278  /* 490 */ "LWA_32\0"
6279  /* 497 */ "PROBED_STACKALLOC_32\0"
6280  /* 518 */ "PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32\0"
6281  /* 560 */ "SRADI_32\0"
6282  /* 569 */ "RLDICL_32\0"
6283  /* 579 */ "RLDICR_32\0"
6284  /* 589 */ "STBXTLS_32\0"
6285  /* 600 */ "STHXTLS_32\0"
6286  /* 611 */ "STWXTLS_32\0"
6287  /* 622 */ "LBZXTLS_32\0"
6288  /* 633 */ "LHZXTLS_32\0"
6289  /* 644 */ "LWZXTLS_32\0"
6290  /* 655 */ "EXTSW_32\0"
6291  /* 664 */ "LWAX_32\0"
6292  /* 672 */ "DFLOADf32\0"
6293  /* 682 */ "XFLOADf32\0"
6294  /* 692 */ "DFSTOREf32\0"
6295  /* 703 */ "XFSTOREf32\0"
6296  /* 714 */ "EH_SjLj_LongJmp32\0"
6297  /* 732 */ "EH_SjLj_SetJmp32\0"
6298  /* 749 */ "TLBRE2\0"
6299  /* 756 */ "TLBWE2\0"
6300  /* 763 */ "G_FLOG2\0"
6301  /* 771 */ "G_FEXP2\0"
6302  /* 779 */ "PMXVBF16GER2\0"
6303  /* 792 */ "PMXVF16GER2\0"
6304  /* 804 */ "PMXVI16GER2\0"
6305  /* 816 */ "TLBSX2\0"
6306  /* 823 */ "ATOMIC_LOAD_SUB_I64\0"
6307  /* 843 */ "ATOMIC_LOAD_ADD_I64\0"
6308  /* 863 */ "ATOMIC_LOAD_NAND_I64\0"
6309  /* 884 */ "ATOMIC_LOAD_AND_I64\0"
6310  /* 904 */ "ATOMIC_LOAD_UMIN_I64\0"
6311  /* 925 */ "ATOMIC_LOAD_MIN_I64\0"
6312  /* 945 */ "ATOMIC_SWAP_I64\0"
6313  /* 961 */ "ATOMIC_CMP_SWAP_I64\0"
6314  /* 981 */ "ATOMIC_LOAD_XOR_I64\0"
6315  /* 1001 */ "ATOMIC_LOAD_OR_I64\0"
6316  /* 1020 */ "ATOMIC_LOAD_UMAX_I64\0"
6317  /* 1041 */ "ATOMIC_LOAD_MAX_I64\0"
6318  /* 1061 */ "DST64\0"
6319  /* 1067 */ "DSTST64\0"
6320  /* 1075 */ "DSTT64\0"
6321  /* 1082 */ "DSTSTT64\0"
6322  /* 1091 */ "EXTSB8_32_64\0"
6323  /* 1104 */ "EXTSH8_32_64\0"
6324  /* 1117 */ "EXTSWSLI_32_64\0"
6325  /* 1132 */ "RLDICL_32_64\0"
6326  /* 1145 */ "EXTSW_32_64\0"
6327  /* 1157 */ "PREPARE_PROBED_ALLOCA_64\0"
6328  /* 1182 */ "PROBED_STACKALLOC_64\0"
6329  /* 1203 */ "PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64\0"
6330  /* 1245 */ "DFLOADf64\0"
6331  /* 1255 */ "XFLOADf64\0"
6332  /* 1265 */ "DFSTOREf64\0"
6333  /* 1276 */ "XFSTOREf64\0"
6334  /* 1287 */ "EH_SjLj_LongJmp64\0"
6335  /* 1305 */ "EH_SjLj_SetJmp64\0"
6336  /* 1322 */ "ADD4\0"
6337  /* 1327 */ "SELECT_CC_SPE4\0"
6338  /* 1342 */ "SELECT_SPE4\0"
6339  /* 1354 */ "SELECT_CC_F4\0"
6340  /* 1367 */ "SELECT_F4\0"
6341  /* 1377 */ "SELECT_CC_I4\0"
6342  /* 1390 */ "SELECT_I4\0"
6343  /* 1400 */ "PMXVI8GER4\0"
6344  /* 1411 */ "XVCVSPBF16\0"
6345  /* 1422 */ "SELECT_CC_F16\0"
6346  /* 1436 */ "SELECT_F16\0"
6347  /* 1447 */ "ATOMIC_LOAD_SUB_I16\0"
6348  /* 1467 */ "ATOMIC_LOAD_ADD_I16\0"
6349  /* 1487 */ "ATOMIC_LOAD_NAND_I16\0"
6350  /* 1508 */ "ATOMIC_LOAD_AND_I16\0"
6351  /* 1528 */ "ATOMIC_LOAD_UMIN_I16\0"
6352  /* 1549 */ "ATOMIC_LOAD_MIN_I16\0"
6353  /* 1569 */ "ATOMIC_SWAP_I16\0"
6354  /* 1585 */ "ATOMIC_CMP_SWAP_I16\0"
6355  /* 1605 */ "ATOMIC_LOAD_XOR_I16\0"
6356  /* 1625 */ "ATOMIC_LOAD_OR_I16\0"
6357  /* 1644 */ "ATOMIC_LOAD_UMAX_I16\0"
6358  /* 1665 */ "ATOMIC_LOAD_MAX_I16\0"
6359  /* 1685 */ "DMXXINSTFDMR256\0"
6360  /* 1701 */ "DMXXEXTFDMR256\0"
6361  /* 1716 */ "NOP_GT_PWR6\0"
6362  /* 1728 */ "NOP_GT_PWR7\0"
6363  /* 1740 */ "ATOMIC_LOAD_SUB_I128\0"
6364  /* 1761 */ "ATOMIC_LOAD_ADD_I128\0"
6365  /* 1782 */ "ATOMIC_LOAD_NAND_I128\0"
6366  /* 1804 */ "ATOMIC_LOAD_AND_I128\0"
6367  /* 1825 */ "ATOMIC_SWAP_I128\0"
6368  /* 1842 */ "ATOMIC_CMP_SWAP_I128\0"
6369  /* 1863 */ "ATOMIC_LOAD_XOR_I128\0"
6370  /* 1884 */ "ATOMIC_LOAD_OR_I128\0"
6371  /* 1904 */ "TAILBA8\0"
6372  /* 1912 */ "PLHA8\0"
6373  /* 1918 */ "ADDIStocHA8\0"
6374  /* 1930 */ "BLA8\0"
6375  /* 1935 */ "PLWA8\0"
6376  /* 1941 */ "TAILB8\0"
6377  /* 1948 */ "CMPB8\0"
6378  /* 1954 */ "CMPRB8\0"
6379  /* 1961 */ "EXTSB8\0"
6380  /* 1968 */ "SETB8\0"
6381  /* 1974 */ "MFTB8\0"
6382  /* 1980 */ "POPCNTB8\0"
6383  /* 1989 */ "PSTB8\0"
6384  /* 1995 */ "SETNBC8\0"
6385  /* 2003 */ "SETBC8\0"
6386  /* 2010 */ "ADDC8\0"
6387  /* 2016 */ "ANDC8\0"
6388  /* 2022 */ "SUBFC8\0"
6389  /* 2029 */ "ADDIC8\0"
6390  /* 2036 */ "SUBFIC8\0"
6391  /* 2044 */ "DYNALLOC8\0"
6392  /* 2054 */ "ORC8\0"
6393  /* 2059 */ "ADD8\0"
6394  /* 2064 */ "MADDLD8\0"
6395  /* 2072 */ "NAND8\0"
6396  /* 2078 */ "CFENCE8\0"
6397  /* 2086 */ "ADDE8\0"
6398  /* 2092 */ "SUBFE8\0"
6399  /* 2099 */ "ADDME8\0"
6400  /* 2106 */ "SUBFME8\0"
6401  /* 2114 */ "ADDZE8\0"
6402  /* 2121 */ "SUBFZE8\0"
6403  /* 2129 */ "SUBF8\0"
6404  /* 2135 */ "MFOCRF8\0"
6405  /* 2143 */ "MTOCRF8\0"
6406  /* 2151 */ "MTCRF8\0"
6407  /* 2158 */ "SELECT_CC_F8\0"
6408  /* 2171 */ "SELECT_F8\0"
6409  /* 2181 */ "NEG8\0"
6410  /* 2186 */ "BRH8\0"
6411  /* 2191 */ "EXTSH8\0"
6412  /* 2198 */ "PSTH8\0"
6413  /* 2204 */ "PADDI8\0"
6414  /* 2211 */ "MULLI8\0"
6415  /* 2218 */ "PLI8\0"
6416  /* 2223 */ "RLWIMI8\0"
6417  /* 2231 */ "XORI8\0"
6418  /* 2237 */ "ATOMIC_LOAD_SUB_I8\0"
6419  /* 2256 */ "SELECT_CC_I8\0"
6420  /* 2269 */ "ATOMIC_LOAD_ADD_I8\0"
6421  /* 2288 */ "ATOMIC_LOAD_NAND_I8\0"
6422  /* 2308 */ "ATOMIC_LOAD_AND_I8\0"
6423  /* 2327 */ "ATOMIC_LOAD_UMIN_I8\0"
6424  /* 2347 */ "ATOMIC_LOAD_MIN_I8\0"
6425  /* 2366 */ "ATOMIC_SWAP_I8\0"
6426  /* 2381 */ "ATOMIC_CMP_SWAP_I8\0"
6427  /* 2400 */ "ATOMIC_LOAD_XOR_I8\0"
6428  /* 2419 */ "ATOMIC_LOAD_OR_I8\0"
6429  /* 2437 */ "SELECT_I8\0"
6430  /* 2447 */ "ATOMIC_LOAD_UMAX_I8\0"
6431  /* 2467 */ "ATOMIC_LOAD_MAX_I8\0"
6432  /* 2486 */ "HASHCHK8\0"
6433  /* 2495 */ "BL8\0"
6434  /* 2499 */ "ISEL8\0"
6435  /* 2505 */ "BCTRL8\0"
6436  /* 2512 */ "BCCTRL8\0"
6437  /* 2520 */ "BCCCTRL8\0"
6438  /* 2529 */ "RLWINM8\0"
6439  /* 2537 */ "RLWNM8\0"
6440  /* 2544 */ "HASHCHKP8\0"
6441  /* 2554 */ "HASHSTP8\0"
6442  /* 2563 */ "SETNBCR8\0"
6443  /* 2572 */ "SETBCR8\0"
6444  /* 2580 */ "MFCR8\0"
6445  /* 2586 */ "PMXVI4GER8\0"
6446  /* 2597 */ "BLR8\0"
6447  /* 2602 */ "MFLR8\0"
6448  /* 2608 */ "MTLR8\0"
6449  /* 2614 */ "BDZLR8\0"
6450  /* 2621 */ "BDNZLR8\0"
6451  /* 2629 */ "MovePCtoLR8\0"
6452  /* 2641 */ "NOR8\0"
6453  /* 2646 */ "XOR8\0"
6454  /* 2651 */ "MFSPR8\0"
6455  /* 2658 */ "MTSPR8\0"
6456  /* 2665 */ "TAILBCTR8\0"
6457  /* 2675 */ "BCCTR8\0"
6458  /* 2682 */ "BCCCTR8\0"
6459  /* 2690 */ "MFCTR8\0"
6460  /* 2697 */ "MTCTR8\0"
6461  /* 2704 */ "ADDIS8\0"
6462  /* 2711 */ "LIS8\0"
6463  /* 2716 */ "XORIS8\0"
6464  /* 2723 */ "DYNAREAOFFSET8\0"
6465  /* 2738 */ "ANDI_rec_1_EQ_BIT8\0"
6466  /* 2757 */ "ANDI_rec_1_GT_BIT8\0"
6467  /* 2776 */ "HASHST8\0"
6468  /* 2784 */ "LHAU8\0"
6469  /* 2790 */ "STBU8\0"
6470  /* 2796 */ "STHU8\0"
6471  /* 2802 */ "STWU8\0"
6472  /* 2808 */ "LBZU8\0"
6473  /* 2814 */ "LHZU8\0"
6474  /* 2820 */ "LWZU8\0"
6475  /* 2826 */ "EQV8\0"
6476  /* 2831 */ "SLW8\0"
6477  /* 2836 */ "BRW8\0"
6478  /* 2841 */ "SRW8\0"
6479  /* 2846 */ "PSTW8\0"
6480  /* 2852 */ "CNTLZW8\0"
6481  /* 2860 */ "CNTTZW8\0"
6482  /* 2868 */ "LHAX8\0"
6483  /* 2874 */ "STBX8\0"
6484  /* 2880 */ "ADDEX8\0"
6485  /* 2887 */ "STHX8\0"
6486  /* 2893 */ "TLSGDAIX8\0"
6487  /* 2903 */ "LHBRX8\0"
6488  /* 2910 */ "LWBRX8\0"
6489  /* 2917 */ "LHAUX8\0"
6490  /* 2924 */ "STBUX8\0"
6491  /* 2931 */ "STHUX8\0"
6492  /* 2938 */ "STWUX8\0"
6493  /* 2945 */ "LBZUX8\0"
6494  /* 2952 */ "LHZUX8\0"
6495  /* 2959 */ "LWZUX8\0"
6496  /* 2966 */ "STWX8\0"
6497  /* 2972 */ "LBZX8\0"
6498  /* 2978 */ "LHZX8\0"
6499  /* 2984 */ "LWZX8\0"
6500  /* 2990 */ "CP_COPY8\0"
6501  /* 2999 */ "PLBZ8\0"
6502  /* 3005 */ "BDZ8\0"
6503  /* 3010 */ "PLHZ8\0"
6504  /* 3016 */ "BDNZ8\0"
6505  /* 3022 */ "PLWZ8\0"
6506  /* 3028 */ "ADDItoc8\0"
6507  /* 3037 */ "TCRETURNai8\0"
6508  /* 3049 */ "TCRETURNdi8\0"
6509  /* 3061 */ "TCRETURNri8\0"
6510  /* 3073 */ "EVMHEGSMFAA\0"
6511  /* 3085 */ "EVMHOGSMFAA\0"
6512  /* 3097 */ "EVMWSMFAA\0"
6513  /* 3107 */ "EVMWSSFAA\0"
6514  /* 3117 */ "EVMHEGSMIAA\0"
6515  /* 3129 */ "EVMHOGSMIAA\0"
6516  /* 3141 */ "EVMWSMIAA\0"
6517  /* 3151 */ "EVMHEGUMIAA\0"
6518  /* 3163 */ "EVMHOGUMIAA\0"
6519  /* 3175 */ "EVMWUMIAA\0"
6520  /* 3185 */ "DCBA\0"
6521  /* 3190 */ "TAILBA\0"
6522  /* 3197 */ "LDtocBA\0"
6523  /* 3205 */ "gBCA\0"
6524  /* 3210 */ "BCCA\0"
6525  /* 3215 */ "EVMHESMFA\0"
6526  /* 3225 */ "EVMWHSMFA\0"
6527  /* 3235 */ "EVMHOSMFA\0"
6528  /* 3245 */ "EVMWSMFA\0"
6529  /* 3254 */ "EVMHESSFA\0"
6530  /* 3264 */ "EVMWHSSFA\0"
6531  /* 3274 */ "EVMHOSSFA\0"
6532  /* 3284 */ "EVMWSSFA\0"
6533  /* 3293 */ "PLHA\0"
6534  /* 3298 */ "ADDIStocHA\0"
6535  /* 3309 */ "ADDIStlsgdHA\0"
6536  /* 3322 */ "ADDIStlsldHA\0"
6537  /* 3335 */ "ADDISgotTprelHA\0"
6538  /* 3351 */ "ADDISdtprelHA\0"
6539  /* 3365 */ "SLBIA\0"
6540  /* 3371 */ "TLBIA\0"
6541  /* 3377 */ "EVMHESMIA\0"
6542  /* 3387 */ "EVMWHSMIA\0"
6543  /* 3397 */ "EVMHOSMIA\0"
6544  /* 3407 */ "EVMWSMIA\0"
6545  /* 3416 */ "EVMHEUMIA\0"
6546  /* 3426 */ "EVMWHUMIA\0"
6547  /* 3436 */ "EVMWLUMIA\0"
6548  /* 3446 */ "EVMHOUMIA\0"
6549  /* 3456 */ "EVMWUMIA\0"
6550  /* 3465 */ "BLA\0"
6551  /* 3469 */ "gBCLA\0"
6552  /* 3475 */ "BCCLA\0"
6553  /* 3481 */ "BDZLA\0"
6554  /* 3487 */ "BDNZLA\0"
6555  /* 3494 */ "G_FMA\0"
6556  /* 3500 */ "G_STRICT_FMA\0"
6557  /* 3513 */ "EVMRA\0"
6558  /* 3519 */ "PLWA\0"
6559  /* 3524 */ "MTVSRWA\0"
6560  /* 3532 */ "MTVRWA\0"
6561  /* 3539 */ "BDZA\0"
6562  /* 3544 */ "BDNZA\0"
6563  /* 3550 */ "V_SET0B\0"
6564  /* 3558 */ "VSRAB\0"
6565  /* 3564 */ "RFEBB\0"
6566  /* 3570 */ "VCNTMBB\0"
6567  /* 3578 */ "XVTLSBB\0"
6568  /* 3586 */ "VCLZLSBB\0"
6569  /* 3595 */ "VCTZLSBB\0"
6570  /* 3604 */ "VCMPNEB\0"
6571  /* 3612 */ "VMRGHB\0"
6572  /* 3619 */ "XXSPLTIB\0"
6573  /* 3628 */ "VMRGLB\0"
6574  /* 3635 */ "TAILB\0"
6575  /* 3641 */ "VCLRLB\0"
6576  /* 3648 */ "VRLB\0"
6577  /* 3653 */ "VSLB\0"
6578  /* 3658 */ "VPMSUMB\0"
6579  /* 3666 */ "VGNB\0"
6580  /* 3671 */ "CMPB\0"
6581  /* 3676 */ "CMPEQB\0"
6582  /* 3683 */ "CLRBHRB\0"
6583  /* 3691 */ "CMPRB\0"
6584  /* 3697 */ "VCLRRB\0"
6585  /* 3704 */ "VSRB\0"
6586  /* 3709 */ "VMULESB\0"
6587  /* 3717 */ "V_SETALLONESB\0"
6588  /* 3731 */ "VAVGSB\0"
6589  /* 3738 */ "VUPKHSB\0"
6590  /* 3746 */ "VSPLTISB\0"
6591  /* 3755 */ "VUPKLSB\0"
6592  /* 3763 */ "VMINSB\0"
6593  /* 3770 */ "VMULOSB\0"
6594  /* 3778 */ "VCMPGTSB\0"
6595  /* 3787 */ "EVEXTSB\0"
6596  /* 3795 */ "VMAXSB\0"
6597  /* 3802 */ "SETB\0"
6598  /* 3807 */ "MFTB\0"
6599  /* 3812 */ "VSPLTB\0"
6600  /* 3819 */ "VPOPCNTB\0"
6601  /* 3828 */ "VINSERTB\0"
6602  /* 3837 */ "PSTB\0"
6603  /* 3842 */ "ReadTB\0"
6604  /* 3849 */ "VABSDUB\0"
6605  /* 3857 */ "VMULEUB\0"
6606  /* 3865 */ "VAVGUB\0"
6607  /* 3872 */ "VMINUB\0"
6608  /* 3879 */ "VMULOUB\0"
6609  /* 3887 */ "VCMPEQUB\0"
6610  /* 3896 */ "EFDSUB\0"
6611  /* 3903 */ "G_FSUB\0"
6612  /* 3910 */ "G_STRICT_FSUB\0"
6613  /* 3924 */ "G_ATOMICRMW_FSUB\0"
6614  /* 3941 */ "FMSUB\0"
6615  /* 3947 */ "FNMSUB\0"
6616  /* 3954 */ "EFSSUB\0"
6617  /* 3961 */ "EVFSSUB\0"
6618  /* 3969 */ "G_SUB\0"
6619  /* 3975 */ "G_ATOMICRMW_SUB\0"
6620  /* 3991 */ "VEXTRACTUB\0"
6621  /* 4002 */ "VCMPGTUB\0"
6622  /* 4011 */ "VMAXUB\0"
6623  /* 4018 */ "XXBLENDVB\0"
6624  /* 4028 */ "VCMPNEZB\0"
6625  /* 4037 */ "VCLZB\0"
6626  /* 4043 */ "VCTZB\0"
6627  /* 4049 */ "SETNBC\0"
6628  /* 4056 */ "SETBC\0"
6629  /* 4062 */ "gBC\0"
6630  /* 4066 */ "XXMFACC\0"
6631  /* 4074 */ "XXMTACC\0"
6632  /* 4082 */ "BUILD_UACC\0"
6633  /* 4093 */ "RESTORE_UACC\0"
6634  /* 4106 */ "SPILL_UACC\0"
6635  /* 4117 */ "RESTORE_WACC\0"
6636  /* 4130 */ "SPILL_WACC\0"
6637  /* 4141 */ "RESTORE_ACC\0"
6638  /* 4153 */ "SPILL_ACC\0"
6639  /* 4163 */ "BCC\0"
6640  /* 4167 */ "ADDC\0"
6641  /* 4172 */ "XXLANDC\0"
6642  /* 4180 */ "CRANDC\0"
6643  /* 4187 */ "EVANDC\0"
6644  /* 4194 */ "TABORTDC\0"
6645  /* 4203 */ "SUBFC\0"
6646  /* 4209 */ "SUBIC\0"
6647  /* 4215 */ "ADDIC\0"
6648  /* 4221 */ "RLDIC\0"
6649  /* 4227 */ "SUBFIC\0"
6650  /* 4234 */ "XSRDPIC\0"
6651  /* 4242 */ "XVRDPIC\0"
6652  /* 4250 */ "XVRSPIC\0"
6653  /* 4258 */ "G_INTRINSIC\0"
6654  /* 4270 */ "ICBLC\0"
6655  /* 4276 */ "BRINC\0"
6656  /* 4282 */ "G_FPTRUNC\0"
6657  /* 4292 */ "G_INTRINSIC_TRUNC\0"
6658  /* 4310 */ "G_TRUNC\0"
6659  /* 4318 */ "G_BUILD_VECTOR_TRUNC\0"
6660  /* 4339 */ "SLBSYNC\0"
6661  /* 4347 */ "TLBSYNC\0"
6662  /* 4355 */ "MSGSYNC\0"
6663  /* 4363 */ "ISYNC\0"
6664  /* 4369 */ "MSYNC\0"
6665  /* 4375 */ "G_DYN_STACKALLOC\0"
6666  /* 4392 */ "DYNALLOC\0"
6667  /* 4401 */ "BL8_NOTOC\0"
6668  /* 4411 */ "SELECT_CC_VSFRC\0"
6669  /* 4427 */ "SELECT_VSFRC\0"
6670  /* 4440 */ "XXLORC\0"
6671  /* 4447 */ "CRORC\0"
6672  /* 4453 */ "EVORC\0"
6673  /* 4459 */ "SELECT_CC_VRRC\0"
6674  /* 4474 */ "SELECT_VRRC\0"
6675  /* 4486 */ "SELECT_CC_VSSRC\0"
6676  /* 4502 */ "SELECT_VSSRC\0"
6677  /* 4515 */ "SELECT_CC_VSRC\0"
6678  /* 4530 */ "SELECT_VSRC\0"
6679  /* 4542 */ "SC\0"
6680  /* 4545 */ "TABORTWC\0"
6681  /* 4554 */ "VEXTSB2D\0"
6682  /* 4563 */ "VEXTSH2D\0"
6683  /* 4572 */ "VEXTSW2D\0"
6684  /* 4581 */ "TLBSX2D\0"
6685  /* 4589 */ "G_FMAD\0"
6686  /* 4596 */ "VSHASIGMAD\0"
6687  /* 4607 */ "G_INDEXED_SEXTLOAD\0"
6688  /* 4626 */ "G_SEXTLOAD\0"
6689  /* 4637 */ "G_INDEXED_ZEXTLOAD\0"
6690  /* 4656 */ "G_ZEXTLOAD\0"
6691  /* 4667 */ "G_INDEXED_LOAD\0"
6692  /* 4682 */ "G_LOAD\0"
6693  /* 4689 */ "VSRAD\0"
6694  /* 4695 */ "VGBBD\0"
6695  /* 4701 */ "VCNTMBD\0"
6696  /* 4709 */ "VPRTYBD\0"
6697  /* 4717 */ "EFDADD\0"
6698  /* 4724 */ "G_VECREDUCE_FADD\0"
6699  /* 4741 */ "G_FADD\0"
6700  /* 4748 */ "G_VECREDUCE_SEQ_FADD\0"
6701  /* 4769 */ "G_STRICT_FADD\0"
6702  /* 4783 */ "G_ATOMICRMW_FADD\0"
6703  /* 4800 */ "FMADD\0"
6704  /* 4806 */ "FNMADD\0"
6705  /* 4813 */ "EFSADD\0"
6706  /* 4820 */ "EVFSADD\0"
6707  /* 4828 */ "G_VECREDUCE_ADD\0"
6708  /* 4844 */ "G_ADD\0"
6709  /* 4850 */ "G_PTR_ADD\0"
6710  /* 4860 */ "G_ATOMICRMW_ADD\0"
6711  /* 4876 */ "EVLDD\0"
6712  /* 4882 */ "MTVSRDD\0"
6713  /* 4890 */ "EVSTDD\0"
6714  /* 4897 */ "VCFUGED\0"
6715  /* 4905 */ "EFSCFD\0"
6716  /* 4912 */ "PLFD\0"
6717  /* 4917 */ "PSTFD\0"
6718  /* 4923 */ "FNEGD\0"
6719  /* 4929 */ "VNEGD\0"
6720  /* 4935 */ "MADDHD\0"
6721  /* 4942 */ "MULHD\0"
6722  /* 4948 */ "FCFID\0"
6723  /* 4954 */ "HRFID\0"
6724  /* 4960 */ "EFDCFSID\0"
6725  /* 4969 */ "FCTID\0"
6726  /* 4975 */ "EFDCFUID\0"
6727  /* 4984 */ "TLBLD\0"
6728  /* 4990 */ "MADDLD\0"
6729  /* 4997 */ "FSELD\0"
6730  /* 5003 */ "VMULLD\0"
6731  /* 5010 */ "CMPLD\0"
6732  /* 5016 */ "MFVSRLD\0"
6733  /* 5024 */ "VRLD\0"
6734  /* 5029 */ "VSLD\0"
6735  /* 5034 */ "SPILLTOVSR_LD\0"
6736  /* 5048 */ "FRIMD\0"
6737  /* 5054 */ "VBPERMD\0"
6738  /* 5062 */ "VPMSUMD\0"
6739  /* 5070 */ "XXLAND\0"
6740  /* 5077 */ "XXLNAND\0"
6741  /* 5085 */ "CRNAND\0"
6742  /* 5092 */ "EVNAND\0"
6743  /* 5099 */ "G_ATOMICRMW_NAND\0"
6744  /* 5116 */ "CRAND\0"
6745  /* 5122 */ "EVAND\0"
6746  /* 5128 */ "G_VECREDUCE_AND\0"
6747  /* 5144 */ "G_AND\0"
6748  /* 5150 */ "G_ATOMICRMW_AND\0"
6749  /* 5166 */ "TEND\0"
6750  /* 5171 */ "LIFETIME_END\0"
6751  /* 5184 */ "FCPSGND\0"
6752  /* 5192 */ "FRIND\0"
6753  /* 5198 */ "G_BRCOND\0"
6754  /* 5207 */ "SETRND\0"
6755  /* 5214 */ "G_LLROUND\0"
6756  /* 5224 */ "G_LROUND\0"
6757  /* 5233 */ "G_INTRINSIC_ROUND\0"
6758  /* 5251 */ "G_INTRINSIC_FPTRUNC_ROUND\0"
6759  /* 5277 */ "FCMPOD\0"
6760  /* 5284 */ "VPDEPD\0"
6761  /* 5291 */ "FRIPD\0"
6762  /* 5297 */ "CMPD\0"
6763  /* 5302 */ "LOAD_STACK_GUARD\0"
6764  /* 5319 */ "XXBRD\0"
6765  /* 5325 */ "BUILD_QUADWORD\0"
6766  /* 5340 */ "RESTORE_QUADWORD\0"
6767  /* 5357 */ "SPILL_QUADWORD\0"
6768  /* 5372 */ "SPLIT_QUADWORD\0"
6769  /* 5387 */ "MTMSRD\0"
6770  /* 5394 */ "MFVSRD\0"
6771  /* 5401 */ "MTVSRD\0"
6772  /* 5408 */ "MFVRD\0"
6773  /* 5414 */ "MTVRD\0"
6774  /* 5420 */ "FABSD\0"
6775  /* 5426 */ "FNABSD\0"
6776  /* 5433 */ "VMODSD\0"
6777  /* 5440 */ "VMULESD\0"
6778  /* 5448 */ "VDIVESD\0"
6779  /* 5456 */ "VMULHSD\0"
6780  /* 5464 */ "VMINSD\0"
6781  /* 5471 */ "VINSD\0"
6782  /* 5477 */ "VMULOSD\0"
6783  /* 5485 */ "VCMPGTSD\0"
6784  /* 5494 */ "VDIVSD\0"
6785  /* 5501 */ "VMAXSD\0"
6786  /* 5508 */ "PLXSD\0"
6787  /* 5514 */ "PSTXSD\0"
6788  /* 5521 */ "VEXTRACTD\0"
6789  /* 5531 */ "VPOPCNTD\0"
6790  /* 5540 */ "VINSERTD\0"
6791  /* 5549 */ "PSTD\0"
6792  /* 5554 */ "VPEXTD\0"
6793  /* 5561 */ "VMSUMCUD\0"
6794  /* 5570 */ "VMODUD\0"
6795  /* 5577 */ "VMULEUD\0"
6796  /* 5585 */ "VDIVEUD\0"
6797  /* 5593 */ "VMULHUD\0"
6798  /* 5601 */ "VMINUD\0"
6799  /* 5608 */ "VMULOUD\0"
6800  /* 5616 */ "FCMPUD\0"
6801  /* 5623 */ "VCMPEQUD\0"
6802  /* 5632 */ "VCMPGTUD\0"
6803  /* 5641 */ "VDIVUD\0"
6804  /* 5648 */ "VMAXUD\0"
6805  /* 5655 */ "XXBLENDVD\0"
6806  /* 5665 */ "DIVD\0"
6807  /* 5670 */ "FRIZD\0"
6808  /* 5676 */ "VCLZD\0"
6809  /* 5682 */ "CNTLZD\0"
6810  /* 5689 */ "VCTZD\0"
6811  /* 5695 */ "CNTTZD\0"
6812  /* 5702 */ "PSEUDO_PROBE\0"
6813  /* 5715 */ "MFBHRBE\0"
6814  /* 5723 */ "G_SSUBE\0"
6815  /* 5731 */ "G_USUBE\0"
6816  /* 5739 */ "G_FENCE\0"
6817  /* 5747 */ "ARITH_FENCE\0"
6818  /* 5759 */ "REG_SEQUENCE\0"
6819  /* 5772 */ "MFFSCE\0"
6820  /* 5779 */ "G_SADDE\0"
6821  /* 5787 */ "G_UADDE\0"
6822  /* 5795 */ "DIVDE\0"
6823  /* 5801 */ "G_FMINNUM_IEEE\0"
6824  /* 5816 */ "G_FMAXNUM_IEEE\0"
6825  /* 5831 */ "SLBMFEE\0"
6826  /* 5839 */ "WRTEE\0"
6827  /* 5845 */ "SUBFE\0"
6828  /* 5851 */ "EVLWHE\0"
6829  /* 5858 */ "EVSTWHE\0"
6830  /* 5866 */ "SLBIE\0"
6831  /* 5872 */ "TLBIE\0"
6832  /* 5878 */ "G_JUMP_TABLE\0"
6833  /* 5891 */ "BUNDLE\0"
6834  /* 5898 */ "ADDME\0"
6835  /* 5904 */ "SUBFME\0"
6836  /* 5911 */ "G_MEMCPY_INLINE\0"
6837  /* 5927 */ "LOCAL_ESCAPE\0"
6838  /* 5940 */ "SELECT_CC_SPE\0"
6839  /* 5954 */ "SELECT_SPE\0"
6840  /* 5965 */ "TLBRE\0"
6841  /* 5971 */ "FRE\0"
6842  /* 5975 */ "G_INDEXED_STORE\0"
6843  /* 5991 */ "G_STORE\0"
6844  /* 5999 */ "G_BITREVERSE\0"
6845  /* 6012 */ "SLBMTE\0"
6846  /* 6019 */ "FRSQRTE\0"
6847  /* 6027 */ "DBG_VALUE\0"
6848  /* 6037 */ "G_GLOBAL_VALUE\0"
6849  /* 6052 */ "MFVRSAVE\0"
6850  /* 6061 */ "MTVRSAVE\0"
6851  /* 6070 */ "G_MEMMOVE\0"
6852  /* 6080 */ "TLBWE\0"
6853  /* 6086 */ "DIVWE\0"
6854  /* 6092 */ "EVSTWWE\0"
6855  /* 6100 */ "ADDZE\0"
6856  /* 6106 */ "G_FREEZE\0"
6857  /* 6115 */ "SUBFZE\0"
6858  /* 6122 */ "G_FCANONICALIZE\0"
6859  /* 6138 */ "DCBF\0"
6860  /* 6143 */ "SUBF\0"
6861  /* 6148 */ "G_CTLZ_ZERO_UNDEF\0"
6862  /* 6166 */ "G_CTTZ_ZERO_UNDEF\0"
6863  /* 6184 */ "G_IMPLICIT_DEF\0"
6864  /* 6199 */ "DBG_INSTR_REF\0"
6865  /* 6213 */ "EVMHESMF\0"
6866  /* 6222 */ "EVMWHSMF\0"
6867  /* 6231 */ "EVMHOSMF\0"
6868  /* 6240 */ "EVMWSMF\0"
6869  /* 6248 */ "MCRF\0"
6870  /* 6253 */ "MFOCRF\0"
6871  /* 6260 */ "MTOCRF\0"
6872  /* 6267 */ "MTCRF\0"
6873  /* 6273 */ "EFDCFSF\0"
6874  /* 6281 */ "EFSCFSF\0"
6875  /* 6289 */ "EVFSCFSF\0"
6876  /* 6298 */ "MTFSF\0"
6877  /* 6304 */ "EVMHESSF\0"
6878  /* 6313 */ "EVMWHSSF\0"
6879  /* 6322 */ "EVMHOSSF\0"
6880  /* 6331 */ "EVMWSSF\0"
6881  /* 6339 */ "EFDCTSF\0"
6882  /* 6347 */ "EFSCTSF\0"
6883  /* 6355 */ "EVFSCTSF\0"
6884  /* 6364 */ "EFDCFUF\0"
6885  /* 6372 */ "EFSCFUF\0"
6886  /* 6380 */ "EVFSCFUF\0"
6887  /* 6389 */ "EFDCTUF\0"
6888  /* 6397 */ "EFSCTUF\0"
6889  /* 6405 */ "EVFSCTUF\0"
6890  /* 6414 */ "SLBIEG\0"
6891  /* 6421 */ "EFDNEG\0"
6892  /* 6428 */ "G_FNEG\0"
6893  /* 6435 */ "EFSNEG\0"
6894  /* 6442 */ "EVFSNEG\0"
6895  /* 6450 */ "EVNEG\0"
6896  /* 6456 */ "EXTRACT_SUBREG\0"
6897  /* 6471 */ "INSERT_SUBREG\0"
6898  /* 6485 */ "G_SEXT_INREG\0"
6899  /* 6498 */ "SUBREG_TO_REG\0"
6900  /* 6512 */ "G_ATOMIC_CMPXCHG\0"
6901  /* 6529 */ "G_ATOMICRMW_XCHG\0"
6902  /* 6546 */ "G_FLOG\0"
6903  /* 6553 */ "G_VAARG\0"
6904  /* 6561 */ "PREALLOCATED_ARG\0"
6905  /* 6578 */ "V_SET0H\0"
6906  /* 6586 */ "VSRAH\0"
6907  /* 6592 */ "VCNTMBH\0"
6908  /* 6600 */ "EVLDH\0"
6909  /* 6606 */ "EVSTDH\0"
6910  /* 6613 */ "VCMPNEH\0"
6911  /* 6621 */ "VMRGHH\0"
6912  /* 6628 */ "VMRGLH\0"
6913  /* 6635 */ "VRLH\0"
6914  /* 6640 */ "VSLH\0"
6915  /* 6645 */ "G_SMULH\0"
6916  /* 6653 */ "G_UMULH\0"
6917  /* 6661 */ "VPMSUMH\0"
6918  /* 6669 */ "XXBRH\0"
6919  /* 6675 */ "VSRH\0"
6920  /* 6680 */ "VMULESH\0"
6921  /* 6688 */ "V_SETALLONESH\0"
6922  /* 6702 */ "VAVGSH\0"
6923  /* 6709 */ "VUPKHSH\0"
6924  /* 6717 */ "VSPLTISH\0"
6925  /* 6726 */ "VUPKLSH\0"
6926  /* 6734 */ "VMINSH\0"
6927  /* 6741 */ "VMULOSH\0"
6928  /* 6749 */ "VCMPGTSH\0"
6929  /* 6758 */ "EVEXTSH\0"
6930  /* 6766 */ "VMAXSH\0"
6931  /* 6773 */ "VSPLTH\0"
6932  /* 6780 */ "VPOPCNTH\0"
6933  /* 6789 */ "VINSERTH\0"
6934  /* 6798 */ "PSTH\0"
6935  /* 6803 */ "VABSDUH\0"
6936  /* 6811 */ "VMULEUH\0"
6937  /* 6819 */ "VAVGUH\0"
6938  /* 6826 */ "VMINUH\0"
6939  /* 6833 */ "VMULOUH\0"
6940  /* 6841 */ "VCMPEQUH\0"
6941  /* 6850 */ "VEXTRACTUH\0"
6942  /* 6861 */ "VCMPGTUH\0"
6943  /* 6870 */ "VMAXUH\0"
6944  /* 6877 */ "XXBLENDVH\0"
6945  /* 6887 */ "VCMPNEZH\0"
6946  /* 6896 */ "VCLZH\0"
6947  /* 6902 */ "VCTZH\0"
6948  /* 6908 */ "DCBI\0"
6949  /* 6913 */ "ICBI\0"
6950  /* 6918 */ "VSLDBI\0"
6951  /* 6925 */ "VSRDBI\0"
6952  /* 6932 */ "SUBI\0"
6953  /* 6937 */ "DCCCI\0"
6954  /* 6943 */ "ICCCI\0"
6955  /* 6949 */ "TABORTDCI\0"
6956  /* 6959 */ "RFCI\0"
6957  /* 6964 */ "RFMCI\0"
6958  /* 6970 */ "TABORTWCI\0"
6959  /* 6980 */ "SRADI\0"
6960  /* 6986 */ "PADDI\0"
6961  /* 6992 */ "RFDI\0"
6962  /* 6997 */ "CMPLDI\0"
6963  /* 7004 */ "CLRLSLDI\0"
6964  /* 7013 */ "EXTLDI\0"
6965  /* 7020 */ "XXPERMDI\0"
6966  /* 7029 */ "CMPDI\0"
6967  /* 7035 */ "CLRRDI\0"
6968  /* 7042 */ "INSRDI\0"
6969  /* 7049 */ "ROTRDI\0"
6970  /* 7056 */ "EXTRDI\0"
6971  /* 7063 */ "TDI\0"
6972  /* 7067 */ "WRTEEI\0"
6973  /* 7074 */ "RFI\0"
6974  /* 7078 */ "MTFSFI\0"
6975  /* 7085 */ "EVSPLATFI\0"
6976  /* 7095 */ "EVMERGEHI\0"
6977  /* 7105 */ "EVMERGELOHI\0"
6978  /* 7117 */ "DBG_PHI\0"
6979  /* 7125 */ "DMXXINSTFDMR512_HI\0"
6980  /* 7144 */ "DMXXEXTFDMR512_HI\0"
6981  /* 7162 */ "TLBLI\0"
6982  /* 7168 */ "MULLI\0"
6983  /* 7174 */ "PLI\0"
6984  /* 7178 */ "EXTSWSLI\0"
6985  /* 7187 */ "MTVSRBMI\0"
6986  /* 7196 */ "VRLDMI\0"
6987  /* 7203 */ "RLDIMI\0"
6988  /* 7210 */ "RLWIMI\0"
6989  /* 7217 */ "VRLQMI\0"
6990  /* 7224 */ "EVMHESMI\0"
6991  /* 7233 */ "EVMWHSMI\0"
6992  /* 7242 */ "EVMHOSMI\0"
6993  /* 7251 */ "EVMWSMI\0"
6994  /* 7259 */ "EVMHEUMI\0"
6995  /* 7268 */ "EVMWHUMI\0"
6996  /* 7277 */ "EVMWLUMI\0"
6997  /* 7286 */ "EVMHOUMI\0"
6998  /* 7295 */ "EVMWUMI\0"
6999  /* 7303 */ "VRLWMI\0"
7000  /* 7310 */ "MFFSCRNI\0"
7001  /* 7319 */ "MFFSCDRNI\0"
7002  /* 7329 */ "VSLDOI\0"
7003  /* 7336 */ "XSRDPI\0"
7004  /* 7343 */ "XVRDPI\0"
7005  /* 7350 */ "XSRQPI\0"
7006  /* 7357 */ "XVRSPI\0"
7007  /* 7364 */ "XORI\0"
7008  /* 7369 */ "EFDCFSI\0"
7009  /* 7377 */ "EFSCFSI\0"
7010  /* 7385 */ "EVFSCFSI\0"
7011  /* 7394 */ "G_FPTOSI\0"
7012  /* 7403 */ "EFDCTSI\0"
7013  /* 7411 */ "EFSCTSI\0"
7014  /* 7419 */ "EVFSCTSI\0"
7015  /* 7428 */ "EVSPLATI\0"
7016  /* 7437 */ "LDtocJTI\0"
7017  /* 7446 */ "EFDCFUI\0"
7018  /* 7454 */ "EFSCFUI\0"
7019  /* 7462 */ "EVFSCFUI\0"
7020  /* 7471 */ "G_FPTOUI\0"
7021  /* 7480 */ "EFDCTUI\0"
7022  /* 7488 */ "EFSCTUI\0"
7023  /* 7496 */ "EVFSCTUI\0"
7024  /* 7505 */ "SRAWI\0"
7025  /* 7511 */ "XXSLDWI\0"
7026  /* 7519 */ "CMPLWI\0"
7027  /* 7526 */ "EVRLWI\0"
7028  /* 7533 */ "CLRLSLWI\0"
7029  /* 7542 */ "INSLWI\0"
7030  /* 7549 */ "EVSLWI\0"
7031  /* 7556 */ "EXTLWI\0"
7032  /* 7563 */ "G_FPOWI\0"
7033  /* 7571 */ "CMPWI\0"
7034  /* 7577 */ "CLRRWI\0"
7035  /* 7584 */ "INSRWI\0"
7036  /* 7591 */ "ROTRWI\0"
7037  /* 7598 */ "EXTRWI\0"
7038  /* 7605 */ "LSWI\0"
7039  /* 7610 */ "STSWI\0"
7040  /* 7616 */ "TWI\0"
7041  /* 7620 */ "TCHECK\0"
7042  /* 7627 */ "HASHCHK\0"
7043  /* 7635 */ "G_PTRMASK\0"
7044  /* 7645 */ "XXEVAL\0"
7045  /* 7652 */ "VSTRIBL\0"
7046  /* 7660 */ "gBCL\0"
7047  /* 7665 */ "BCCL\0"
7048  /* 7670 */ "RLDCL\0"
7049  /* 7676 */ "RLDICL\0"
7050  /* 7683 */ "GC_LABEL\0"
7051  /* 7692 */ "DBG_LABEL\0"
7052  /* 7702 */ "EH_LABEL\0"
7053  /* 7711 */ "ANNOTATION_LABEL\0"
7054  /* 7728 */ "TLBIEL\0"
7055  /* 7735 */ "ICALL_BRANCH_FUNNEL\0"
7056  /* 7755 */ "GETtlsldADDRPCREL\0"
7057  /* 7773 */ "GETtlsADDRPCREL\0"
7058  /* 7789 */ "ISEL\0"
7059  /* 7794 */ "EVSEL\0"
7060  /* 7800 */ "XXSEL\0"
7061  /* 7806 */ "DCBFL\0"
7062  /* 7812 */ "VSTRIHL\0"
7063  /* 7820 */ "G_FSHL\0"
7064  /* 7827 */ "G_SHL\0"
7065  /* 7833 */ "G_FCEIL\0"
7066  /* 7841 */ "PATCHABLE_TAIL_CALL\0"
7067  /* 7861 */ "PATCHABLE_TYPED_EVENT_CALL\0"
7068  /* 7888 */ "PATCHABLE_EVENT_CALL\0"
7069  /* 7909 */ "FENTRY_CALL\0"
7070  /* 7921 */ "DSSALL\0"
7071  /* 7928 */ "KILL\0"
7072  /* 7933 */ "LXVPRLL\0"
7073  /* 7941 */ "STXVPRLL\0"
7074  /* 7950 */ "LXVRLL\0"
7075  /* 7957 */ "STXVRLL\0"
7076  /* 7965 */ "LXVLL\0"
7077  /* 7971 */ "STXVLL\0"
7078  /* 7978 */ "BLRL\0"
7079  /* 7983 */ "gBCLRL\0"
7080  /* 7990 */ "BCCLRL\0"
7081  /* 7997 */ "BDZLRL\0"
7082  /* 8004 */ "BDNZLRL\0"
7083  /* 8012 */ "LXVPRL\0"
7084  /* 8019 */ "STXVPRL\0"
7085  /* 8027 */ "BCTRL\0"
7086  /* 8033 */ "gBCCTRL\0"
7087  /* 8041 */ "BCCCTRL\0"
7088  /* 8049 */ "LXVRL\0"
7089  /* 8055 */ "STXVRL\0"
7090  /* 8062 */ "MFFSL\0"
7091  /* 8068 */ "LVSL\0"
7092  /* 8073 */ "G_ROTL\0"
7093  /* 8080 */ "EFDMUL\0"
7094  /* 8087 */ "G_VECREDUCE_FMUL\0"
7095  /* 8104 */ "G_FMUL\0"
7096  /* 8111 */ "G_VECREDUCE_SEQ_FMUL\0"
7097  /* 8132 */ "G_STRICT_FMUL\0"
7098  /* 8146 */ "EFSMUL\0"
7099  /* 8153 */ "EVFSMUL\0"
7100  /* 8161 */ "G_VECREDUCE_MUL\0"
7101  /* 8177 */ "G_MUL\0"
7102  /* 8183 */ "LXVL\0"
7103  /* 8188 */ "STXVL\0"
7104  /* 8194 */ "LBARXL\0"
7105  /* 8201 */ "LDARXL\0"
7106  /* 8208 */ "LHARXL\0"
7107  /* 8215 */ "LQARXL\0"
7108  /* 8222 */ "LWARXL\0"
7109  /* 8229 */ "LVXL\0"
7110  /* 8234 */ "STVXL\0"
7111  /* 8240 */ "DCBZL\0"
7112  /* 8246 */ "BDZL\0"
7113  /* 8251 */ "BDNZL\0"
7114  /* 8257 */ "LDtocL\0"
7115  /* 8264 */ "ADDItocL\0"
7116  /* 8273 */ "LWZtocL\0"
7117  /* 8281 */ "ADDItlsgdL\0"
7118  /* 8292 */ "ADDItlsldL\0"
7119  /* 8303 */ "LDgotTprelL\0"
7120  /* 8315 */ "ADDIdtprelL\0"
7121  /* 8327 */ "VEXPANDBM\0"
7122  /* 8337 */ "VMSUMMBM\0"
7123  /* 8346 */ "MTVSRBM\0"
7124  /* 8354 */ "VEXTRACTBM\0"
7125  /* 8365 */ "VSUBUBM\0"
7126  /* 8373 */ "VADDUBM\0"
7127  /* 8381 */ "VMSUMUBM\0"
7128  /* 8390 */ "XXGENPCVBM\0"
7129  /* 8401 */ "VEXPANDDM\0"
7130  /* 8411 */ "MTVSRDM\0"
7131  /* 8419 */ "VEXTRACTDM\0"
7132  /* 8430 */ "VSUBUDM\0"
7133  /* 8438 */ "VADDUDM\0"
7134  /* 8446 */ "VMSUMUDM\0"
7135  /* 8455 */ "XXGENPCVDM\0"
7136  /* 8466 */ "VCLZDM\0"
7137  /* 8473 */ "CNTLZDM\0"
7138  /* 8481 */ "VCTZDM\0"
7139  /* 8488 */ "CNTTZDM\0"
7140  /* 8496 */ "G_FREM\0"
7141  /* 8503 */ "G_STRICT_FREM\0"
7142  /* 8517 */ "G_SREM\0"
7143  /* 8524 */ "G_UREM\0"
7144  /* 8531 */ "G_SDIVREM\0"
7145  /* 8541 */ "G_UDIVREM\0"
7146  /* 8551 */ "VEXPANDHM\0"
7147  /* 8561 */ "MTVSRHM\0"
7148  /* 8569 */ "VMSUMSHM\0"
7149  /* 8578 */ "VEXTRACTHM\0"
7150  /* 8589 */ "VSUBUHM\0"
7151  /* 8597 */ "VMLADDUHM\0"
7152  /* 8607 */ "VADDUHM\0"
7153  /* 8615 */ "VMSUMUHM\0"
7154  /* 8624 */ "XXGENPCVHM\0"
7155  /* 8635 */ "TRECLAIM\0"
7156  /* 8644 */ "VRFIM\0"
7157  /* 8650 */ "XSRDPIM\0"
7158  /* 8658 */ "XVRDPIM\0"
7159  /* 8666 */ "XVRSPIM\0"
7160  /* 8674 */ "SETFLM\0"
7161  /* 8681 */ "VRLDNM\0"
7162  /* 8688 */ "RLWINM\0"
7163  /* 8695 */ "VRLQNM\0"
7164  /* 8702 */ "VRLWNM\0"
7165  /* 8709 */ "VEXPANDQM\0"
7166  /* 8719 */ "MTVSRQM\0"
7167  /* 8727 */ "VEXTRACTQM\0"
7168  /* 8738 */ "VSUBUQM\0"
7169  /* 8746 */ "VADDUQM\0"
7170  /* 8754 */ "VSUBEUQM\0"
7171  /* 8763 */ "VADDEUQM\0"
7172  /* 8772 */ "VPERM\0"
7173  /* 8778 */ "XXPERM\0"
7174  /* 8785 */ "BLA8_RM\0"
7175  /* 8793 */ "BL8_RM\0"
7176  /* 8800 */ "BCTRL8_RM\0"
7177  /* 8810 */ "BLA_RM\0"
7178  /* 8817 */ "BL8_NOTOC_RM\0"
7179  /* 8830 */ "BL_RM\0"
7180  /* 8836 */ "BCTRL_RM\0"
7181  /* 8845 */ "BLA8_NOP_RM\0"
7182  /* 8857 */ "BL8_NOP_RM\0"
7183  /* 8868 */ "BL_NOP_RM\0"
7184  /* 8878 */ "BCTRL8_LDinto_toc_RM\0"
7185  /* 8899 */ "BCTRL_LWZinto_toc_RM\0"
7186  /* 8920 */ "INLINEASM\0"
7187  /* 8930 */ "VPKUDUM\0"
7188  /* 8938 */ "VPKUHUM\0"
7189  /* 8946 */ "G_FMINIMUM\0"
7190  /* 8957 */ "G_FMAXIMUM\0"
7191  /* 8968 */ "G_FMINNUM\0"
7192  /* 8978 */ "G_FMAXNUM\0"
7193  /* 8988 */ "VPKUWUM\0"
7194  /* 8996 */ "VEXPANDWM\0"
7195  /* 9006 */ "MTVSRWM\0"
7196  /* 9014 */ "VEXTRACTWM\0"
7197  /* 9025 */ "VSUBUWM\0"
7198  /* 9033 */ "VADDUWM\0"
7199  /* 9041 */ "VMULUWM\0"
7200  /* 9049 */ "XXGENPCVWM\0"
7201  /* 9060 */ "EVMHEGSMFAN\0"
7202  /* 9072 */ "EVMHOGSMFAN\0"
7203  /* 9084 */ "EVMWSMFAN\0"
7204  /* 9094 */ "EVMWSSFAN\0"
7205  /* 9104 */ "EVMHEGSMIAN\0"
7206  /* 9116 */ "EVMHOGSMIAN\0"
7207  /* 9128 */ "EVMWSMIAN\0"
7208  /* 9138 */ "EVMHEGUMIAN\0"
7209  /* 9150 */ "EVMHOGUMIAN\0"
7210  /* 9162 */ "EVMWUMIAN\0"
7211  /* 9172 */ "G_INTRINSIC_ROUNDEVEN\0"
7212  /* 9194 */ "G_ASSERT_ALIGN\0"
7213  /* 9209 */ "G_FCOPYSIGN\0"
7214  /* 9221 */ "VRFIN\0"
7215  /* 9227 */ "TBEGIN\0"
7216  /* 9234 */ "G_VECREDUCE_FMIN\0"
7217  /* 9251 */ "G_ATOMICRMW_FMIN\0"
7218  /* 9268 */ "G_VECREDUCE_SMIN\0"
7219  /* 9285 */ "G_SMIN\0"
7220  /* 9292 */ "G_VECREDUCE_UMIN\0"
7221  /* 9309 */ "G_UMIN\0"
7222  /* 9316 */ "G_ATOMICRMW_UMIN\0"
7223  /* 9333 */ "G_ATOMICRMW_MIN\0"
7224  /* 9349 */ "MFSRIN\0"
7225  /* 9356 */ "MTSRIN\0"
7226  /* 9363 */ "G_FSIN\0"
7227  /* 9370 */ "PMXVBF16GER2NN\0"
7228  /* 9385 */ "PMXVF16GER2NN\0"
7229  /* 9399 */ "PMXVF32GERNN\0"
7230  /* 9412 */ "PMXVF64GERNN\0"
7231  /* 9425 */ "PMXVBF16GER2WNN\0"
7232  /* 9441 */ "PMXVF16GER2WNN\0"
7233  /* 9456 */ "PMXVF32GERWNN\0"
7234  /* 9470 */ "PMXVF64GERWNN\0"
7235  /* 9484 */ "CFI_INSTRUCTION\0"
7236  /* 9500 */ "PMXVBF16GER2PN\0"
7237  /* 9515 */ "PMXVF16GER2PN\0"
7238  /* 9529 */ "XSCVSPDPN\0"
7239  /* 9539 */ "PMXVF32GERPN\0"
7240  /* 9552 */ "PMXVF64GERPN\0"
7241  /* 9565 */ "XVCVBF16SPN\0"
7242  /* 9577 */ "XSCVDPSPN\0"
7243  /* 9587 */ "PMXVBF16GER2WPN\0"
7244  /* 9603 */ "PMXVF16GER2WPN\0"
7245  /* 9618 */ "PMXVF32GERWPN\0"
7246  /* 9632 */ "PMXVF64GERWPN\0"
7247  /* 9646 */ "DARN\0"
7248  /* 9651 */ "MFFSCRN\0"
7249  /* 9659 */ "MFFSCDRN\0"
7250  /* 9668 */ "ATTN\0"
7251  /* 9673 */ "ADJCALLSTACKDOWN\0"
7252  /* 9690 */ "ADD4O\0"
7253  /* 9696 */ "ADDC8O\0"
7254  /* 9703 */ "SUBFC8O\0"
7255  /* 9711 */ "ADD8O\0"
7256  /* 9717 */ "ADDE8O\0"
7257  /* 9724 */ "SUBFE8O\0"
7258  /* 9732 */ "ADDME8O\0"
7259  /* 9740 */ "SUBFME8O\0"
7260  /* 9749 */ "ADDZE8O\0"
7261  /* 9757 */ "SUBFZE8O\0"
7262  /* 9766 */ "SUBF8O\0"
7263  /* 9773 */ "NEG8O\0"
7264  /* 9779 */ "G_SSUBO\0"
7265  /* 9787 */ "G_USUBO\0"
7266  /* 9795 */ "ADDCO\0"
7267  /* 9801 */ "SUBFCO\0"
7268  /* 9808 */ "G_SADDO\0"
7269  /* 9816 */ "G_UADDO\0"
7270  /* 9824 */ "MULLDO\0"
7271  /* 9831 */ "LQX_PSEUDO\0"
7272  /* 9842 */ "STQX_PSEUDO\0"
7273  /* 9854 */ "DIVDO\0"
7274  /* 9860 */ "ADDEO\0"
7275  /* 9866 */ "DIVDEO\0"
7276  /* 9873 */ "SUBFEO\0"
7277  /* 9880 */ "ADDMEO\0"
7278  /* 9887 */ "SUBFMEO\0"
7279  /* 9895 */ "DIVWEO\0"
7280  /* 9902 */ "ADDZEO\0"
7281  /* 9909 */ "SUBFZEO\0"
7282  /* 9917 */ "SUBFO\0"
7283  /* 9923 */ "NEGO\0"
7284  /* 9928 */ "EVSTWHO\0"
7285  /* 9936 */ "PseudoEIEIO\0"
7286  /* 9948 */ "EnforceIEIO\0"
7287  /* 9960 */ "EVMERGELO\0"
7288  /* 9970 */ "EVMERGEHILO\0"
7289  /* 9982 */ "VSLO\0"
7290  /* 9987 */ "G_SMULO\0"
7291  /* 9995 */ "G_UMULO\0"
7292  /* 10003 */ "XSCVQPDPO\0"
7293  /* 10013 */ "XSNMSUBQPO\0"
7294  /* 10024 */ "XSMSUBQPO\0"
7295  /* 10034 */ "XSSUBQPO\0"
7296  /* 10043 */ "XSNMADDQPO\0"
7297  /* 10054 */ "XSMADDQPO\0"
7298  /* 10064 */ "XSADDQPO\0"
7299  /* 10073 */ "XSMULQPO\0"
7300  /* 10082 */ "XSSQRTQPO\0"
7301  /* 10092 */ "XSDIVQPO\0"
7302  /* 10101 */ "G_BZERO\0"
7303  /* 10109 */ "VSRO\0"
7304  /* 10114 */ "DIVDUO\0"
7305  /* 10121 */ "DIVDEUO\0"
7306  /* 10129 */ "DIVWEUO\0"
7307  /* 10137 */ "DIVWUO\0"
7308  /* 10144 */ "MULLWO\0"
7309  /* 10151 */ "DIVWO\0"
7310  /* 10157 */ "EVSTWWO\0"
7311  /* 10165 */ "STACKMAP\0"
7312  /* 10174 */ "NAP\0"
7313  /* 10178 */ "TRAP\0"
7314  /* 10183 */ "G_ATOMICRMW_UDEC_WRAP\0"
7315  /* 10205 */ "G_ATOMICRMW_UINC_WRAP\0"
7316  /* 10227 */ "G_BSWAP\0"
7317  /* 10235 */ "XSNMSUBADP\0"
7318  /* 10246 */ "XVNMSUBADP\0"
7319  /* 10257 */ "XSMSUBADP\0"
7320  /* 10267 */ "XVMSUBADP\0"
7321  /* 10277 */ "XSNMADDADP\0"
7322  /* 10288 */ "XVNMADDADP\0"
7323  /* 10299 */ "XSMADDADP\0"
7324  /* 10309 */ "XVMADDADP\0"
7325  /* 10319 */ "XSSUBDP\0"
7326  /* 10327 */ "XVSUBDP\0"
7327  /* 10335 */ "XSTSTDCDP\0"
7328  /* 10345 */ "XVTSTDCDP\0"
7329  /* 10355 */ "XSMINCDP\0"
7330  /* 10364 */ "XSMAXCDP\0"
7331  /* 10373 */ "XSADDDP\0"
7332  /* 10381 */ "XVADDDP\0"
7333  /* 10389 */ "XSCVSXDDP\0"
7334  /* 10399 */ "XVCVSXDDP\0"
7335  /* 10409 */ "XSCVUXDDP\0"
7336  /* 10419 */ "XVCVUXDDP\0"
7337  /* 10429 */ "XSCMPGEDP\0"
7338  /* 10439 */ "XVCMPGEDP\0"
7339  /* 10449 */ "XSREDP\0"
7340  /* 10456 */ "XVREDP\0"
7341  /* 10463 */ "XSRSQRTEDP\0"
7342  /* 10474 */ "XVRSQRTEDP\0"
7343  /* 10485 */ "XSNEGDP\0"
7344  /* 10493 */ "XVNEGDP\0"
7345  /* 10501 */ "XSXSIGDP\0"
7346  /* 10510 */ "XVXSIGDP\0"
7347  /* 10519 */ "XXSPLTIDP\0"
7348  /* 10529 */ "XSMINJDP\0"
7349  /* 10538 */ "XSMAXJDP\0"
7350  /* 10547 */ "XSMULDP\0"
7351  /* 10555 */ "XVMULDP\0"
7352  /* 10563 */ "XSNMSUBMDP\0"
7353  /* 10574 */ "XVNMSUBMDP\0"
7354  /* 10585 */ "XSMSUBMDP\0"
7355  /* 10595 */ "XVMSUBMDP\0"
7356  /* 10605 */ "XSNMADDMDP\0"
7357  /* 10616 */ "XVNMADDMDP\0"
7358  /* 10627 */ "XSMADDMDP\0"
7359  /* 10637 */ "XVMADDMDP\0"
7360  /* 10647 */ "XSCPSGNDP\0"
7361  /* 10657 */ "XVCPSGNDP\0"
7362  /* 10667 */ "XSMINDP\0"
7363  /* 10675 */ "XVMINDP\0"
7364  /* 10683 */ "XSCMPODP\0"
7365  /* 10692 */ "XSCVHPDP\0"
7366  /* 10701 */ "XSCVQPDP\0"
7367  /* 10710 */ "XSCVSPDP\0"
7368  /* 10719 */ "XVCVSPDP\0"
7369  /* 10728 */ "XSIEXPDP\0"
7370  /* 10737 */ "XVIEXPDP\0"
7371  /* 10746 */ "XSCMPEXPDP\0"
7372  /* 10757 */ "XSXEXPDP\0"
7373  /* 10766 */ "XVXEXPDP\0"
7374  /* 10775 */ "XSCMPEQDP\0"
7375  /* 10785 */ "XVCMPEQDP\0"
7376  /* 10795 */ "XSNABSDP\0"
7377  /* 10804 */ "XVNABSDP\0"
7378  /* 10813 */ "XSABSDP\0"
7379  /* 10821 */ "XVABSDP\0"
7380  /* 10829 */ "XSCMPGTDP\0"
7381  /* 10839 */ "XVCMPGTDP\0"
7382  /* 10849 */ "XSSQRTDP\0"
7383  /* 10858 */ "XSTSQRTDP\0"
7384  /* 10868 */ "XVTSQRTDP\0"
7385  /* 10878 */ "XVSQRTDP\0"
7386  /* 10887 */ "XSCMPUDP\0"
7387  /* 10896 */ "XSDIVDP\0"
7388  /* 10904 */ "XSTDIVDP\0"
7389  /* 10913 */ "XVTDIVDP\0"
7390  /* 10922 */ "XVDIVDP\0"
7391  /* 10930 */ "XVCVSXWDP\0"
7392  /* 10940 */ "XVCVUXWDP\0"
7393  /* 10950 */ "XSMAXDP\0"
7394  /* 10958 */ "XVMAXDP\0"
7395  /* 10966 */ "CTRL_DEP\0"
7396  /* 10975 */ "DCBFEP\0"
7397  /* 10982 */ "ICBIEP\0"
7398  /* 10989 */ "DCBZLEP\0"
7399  /* 10997 */ "DCBTEP\0"
7400  /* 11004 */ "DCBSTEP\0"
7401  /* 11012 */ "DCBTSTEP\0"
7402  /* 11021 */ "DCBZEP\0"
7403  /* 11028 */ "VCMPBFP\0"
7404  /* 11036 */ "VNMSUBFP\0"
7405  /* 11045 */ "VSUBFP\0"
7406  /* 11052 */ "VMADDFP\0"
7407  /* 11060 */ "VADDFP\0"
7408  /* 11067 */ "VLOGEFP\0"
7409  /* 11075 */ "VCMPGEFP\0"
7410  /* 11084 */ "VREFP\0"
7411  /* 11090 */ "VEXPTEFP\0"
7412  /* 11099 */ "VRSQRTEFP\0"
7413  /* 11109 */ "VMINFP\0"
7414  /* 11116 */ "G_SITOFP\0"
7415  /* 11125 */ "G_UITOFP\0"
7416  /* 11134 */ "VCMPEQFP\0"
7417  /* 11143 */ "VCMPGTFP\0"
7418  /* 11152 */ "VMAXFP\0"
7419  /* 11159 */ "XSCVDPHP\0"
7420  /* 11168 */ "XVCVSPHP\0"
7421  /* 11177 */ "VRFIP\0"
7422  /* 11183 */ "XSRDPIP\0"
7423  /* 11191 */ "XVRDPIP\0"
7424  /* 11199 */ "XVRSPIP\0"
7425  /* 11207 */ "HASHCHKP\0"
7426  /* 11216 */ "DCBFLP\0"
7427  /* 11223 */ "G_FCMP\0"
7428  /* 11230 */ "G_ICMP\0"
7429  /* 11237 */ "PMXVBF16GER2NP\0"
7430  /* 11252 */ "PMXVF16GER2NP\0"
7431  /* 11266 */ "PMXVF32GERNP\0"
7432  /* 11279 */ "PMXVF64GERNP\0"
7433  /* 11292 */ "PMXVBF16GER2WNP\0"
7434  /* 11308 */ "PMXVF16GER2WNP\0"
7435  /* 11323 */ "PMXVF32GERWNP\0"
7436  /* 11337 */ "PMXVF64GERWNP\0"
7437  /* 11351 */ "BLA8_NOP\0"
7438  /* 11360 */ "BL8_NOP\0"
7439  /* 11368 */ "UNENCODED_NOP\0"
7440  /* 11382 */ "BL_NOP\0"
7441  /* 11389 */ "G_CTPOP\0"
7442  /* 11397 */ "STOP\0"
7443  /* 11402 */ "PATCHABLE_OP\0"
7444  /* 11415 */ "FAULTING_OP\0"
7445  /* 11427 */ "PMXVBF16GER2PP\0"
7446  /* 11442 */ "PMXVF16GER2PP\0"
7447  /* 11456 */ "PMXVI16GER2PP\0"
7448  /* 11470 */ "PMXVI8GER4PP\0"
7449  /* 11483 */ "PMXVI4GER8PP\0"
7450  /* 11496 */ "PMXVF32GERPP\0"
7451  /* 11509 */ "PMXVF64GERPP\0"
7452  /* 11522 */ "PMXVI16GER2SPP\0"
7453  /* 11537 */ "PMXVI8GER4SPP\0"
7454  /* 11551 */ "PMXVI8GER4WSPP\0"
7455  /* 11566 */ "PMXVBF16GER2WPP\0"
7456  /* 11582 */ "PMXVF16GER2WPP\0"
7457  /* 11597 */ "PMXVI16GER2WPP\0"
7458  /* 11612 */ "PMXVI8GER4WPP\0"
7459  /* 11626 */ "PMXVI4GER8WPP\0"
7460  /* 11640 */ "PMXVF32GERWPP\0"
7461  /* 11654 */ "PMXVF64GERWPP\0"
7462  /* 11668 */ "PMXVI16GER2SWPP\0"
7463  /* 11684 */ "XSNMSUBQP\0"
7464  /* 11694 */ "XSMSUBQP\0"
7465  /* 11703 */ "XSSUBQP\0"
7466  /* 11711 */ "XSTSTDCQP\0"
7467  /* 11721 */ "XSMINCQP\0"
7468  /* 11730 */ "XSMAXCQP\0"
7469  /* 11739 */ "XSNMADDQP\0"
7470  /* 11749 */ "XSMADDQP\0"
7471  /* 11758 */ "XSADDQP\0"
7472  /* 11766 */ "XSCVSDQP\0"
7473  /* 11775 */ "XSCVUDQP\0"
7474  /* 11784 */ "XSCMPGEQP\0"
7475  /* 11794 */ "XSNEGQP\0"
7476  /* 11802 */ "XSXSIGQP\0"
7477  /* 11811 */ "XSMULQP\0"
7478  /* 11819 */ "XSCPSGNQP\0"
7479  /* 11829 */ "XSCMPOQP\0"
7480  /* 11838 */ "XSCVDPQP\0"
7481  /* 11847 */ "XSIEXPQP\0"
7482  /* 11856 */ "XSCMPEXPQP\0"
7483  /* 11867 */ "XSXEXPQP\0"
7484  /* 11876 */ "XSCMPEQQP\0"
7485  /* 11886 */ "XSCVSQQP\0"
7486  /* 11895 */ "XSCVUQQP\0"
7487  /* 11904 */ "XSNABSQP\0"
7488  /* 11913 */ "XSABSQP\0"
7489  /* 11921 */ "XSCMPGTQP\0"
7490  /* 11931 */ "XSSQRTQP\0"
7491  /* 11940 */ "XSCMPUQP\0"
7492  /* 11949 */ "XSDIVQP\0"
7493  /* 11957 */ "XSNMSUBASP\0"
7494  /* 11968 */ "XVNMSUBASP\0"
7495  /* 11979 */ "XSMSUBASP\0"
7496  /* 11989 */ "XVMSUBASP\0"
7497  /* 11999 */ "XSNMADDASP\0"
7498  /* 12010 */ "XVNMADDASP\0"
7499  /* 12021 */ "XSMADDASP\0"
7500  /* 12031 */ "XVMADDASP\0"
7501  /* 12041 */ "XSSUBSP\0"
7502  /* 12049 */ "XVSUBSP\0"
7503  /* 12057 */ "XSTSTDCSP\0"
7504  /* 12067 */ "XVTSTDCSP\0"
7505  /* 12077 */ "XSADDSP\0"
7506  /* 12085 */ "XVADDSP\0"
7507  /* 12093 */ "XSCVSXDSP\0"
7508  /* 12103 */ "XVCVSXDSP\0"
7509  /* 12113 */ "XSCVUXDSP\0"
7510  /* 12123 */ "XVCVUXDSP\0"
7511  /* 12133 */ "XVCMPGESP\0"
7512  /* 12143 */ "XSRESP\0"
7513  /* 12150 */ "XVRESP\0"
7514  /* 12157 */ "XSRSQRTESP\0"
7515  /* 12168 */ "XVRSQRTESP\0"
7516  /* 12179 */ "XVNEGSP\0"
7517  /* 12187 */ "XVXSIGSP\0"
7518  /* 12196 */ "XSMULSP\0"
7519  /* 12204 */ "XVMULSP\0"
7520  /* 12212 */ "XSNMSUBMSP\0"
7521  /* 12223 */ "XVNMSUBMSP\0"
7522  /* 12234 */ "XSMSUBMSP\0"
7523  /* 12244 */ "XVMSUBMSP\0"
7524  /* 12254 */ "XSNMADDMSP\0"
7525  /* 12265 */ "XVNMADDMSP\0"
7526  /* 12276 */ "XSMADDMSP\0"
7527  /* 12286 */ "XVMADDMSP\0"
7528  /* 12296 */ "XVCPSGNSP\0"
7529  /* 12306 */ "XVMINSP\0"
7530  /* 12314 */ "XSCVDPSP\0"
7531  /* 12323 */ "XVCVDPSP\0"
7532  /* 12332 */ "XVCVHPSP\0"
7533  /* 12341 */ "XVIEXPSP\0"
7534  /* 12350 */ "XVXEXPSP\0"
7535  /* 12359 */ "XVCMPEQSP\0"
7536  /* 12369 */ "FRSP\0"
7537  /* 12374 */ "XSRSP\0"
7538  /* 12380 */ "XVNABSSP\0"
7539  /* 12389 */ "XVABSSP\0"
7540  /* 12397 */ "PLXSSP\0"
7541  /* 12404 */ "PSTXSSP\0"
7542  /* 12412 */ "XVCMPGTSP\0"
7543  /* 12422 */ "XSSQRTSP\0"
7544  /* 12431 */ "XVTSQRTSP\0"
7545  /* 12441 */ "XVSQRTSP\0"
7546  /* 12450 */ "XSDIVSP\0"
7547  /* 12458 */ "XVTDIVSP\0"
7548  /* 12467 */ "XVDIVSP\0"
7549  /* 12475 */ "XVCVSXWSP\0"
7550  /* 12485 */ "XVCVUXWSP\0"
7551  /* 12495 */ "XVMAXSP\0"
7552  /* 12503 */ "HASHSTP\0"
7553  /* 12511 */ "ADJCALLSTACKUP\0"
7554  /* 12526 */ "PREALLOCATED_SETUP\0"
7555  /* 12545 */ "PLXVP\0"
7556  /* 12551 */ "PSTXVP\0"
7557  /* 12558 */ "G_FEXP\0"
7558  /* 12565 */ "XSRQPXP\0"
7559  /* 12573 */ "VEXTSD2Q\0"
7560  /* 12582 */ "VSRAQ\0"
7561  /* 12588 */ "VPRTYBQ\0"
7562  /* 12596 */ "EFDCMPEQ\0"
7563  /* 12605 */ "EFSCMPEQ\0"
7564  /* 12614 */ "EVFSCMPEQ\0"
7565  /* 12624 */ "EVCMPEQ\0"
7566  /* 12632 */ "EFDTSTEQ\0"
7567  /* 12641 */ "EFSTSTEQ\0"
7568  /* 12650 */ "EVFSTSTEQ\0"
7569  /* 12660 */ "LXVKQ\0"
7570  /* 12666 */ "ICBLQ\0"
7571  /* 12672 */ "VRLQ\0"
7572  /* 12677 */ "VSLQ\0"
7573  /* 12682 */ "VBPERMQ\0"
7574  /* 12690 */ "XXBRQ\0"
7575  /* 12696 */ "VSRQ\0"
7576  /* 12701 */ "VMODSQ\0"
7577  /* 12708 */ "VDIVESQ\0"
7578  /* 12716 */ "VCMPSQ\0"
7579  /* 12723 */ "VCMPGTSQ\0"
7580  /* 12732 */ "VDIVSQ\0"
7581  /* 12739 */ "STQ\0"
7582  /* 12743 */ "VMUL10UQ\0"
7583  /* 12752 */ "VMUL10CUQ\0"
7584  /* 12762 */ "VSUBCUQ\0"
7585  /* 12770 */ "VADDCUQ\0"
7586  /* 12778 */ "VMUL10ECUQ\0"
7587  /* 12789 */ "VSUBECUQ\0"
7588  /* 12798 */ "VADDECUQ\0"
7589  /* 12807 */ "VMODUQ\0"
7590  /* 12814 */ "VMUL10EUQ\0"
7591  /* 12824 */ "VDIVEUQ\0"
7592  /* 12832 */ "VCMPUQ\0"
7593  /* 12839 */ "VCMPEQUQ\0"
7594  /* 12848 */ "VCMPGTUQ\0"
7595  /* 12857 */ "VDIVUQ\0"
7596  /* 12864 */ "MBAR\0"
7597  /* 12869 */ "UpdateGBR\0"
7598  /* 12879 */ "VSTRIBR\0"
7599  /* 12887 */ "G_BR\0"
7600  /* 12892 */ "INLINEASM_BR\0"
7601  /* 12905 */ "SETNBCR\0"
7602  /* 12913 */ "SETBCR\0"
7603  /* 12920 */ "MFDCR\0"
7604  /* 12926 */ "RLDCR\0"
7605  /* 12932 */ "MTDCR\0"
7606  /* 12938 */ "MFCR\0"
7607  /* 12943 */ "RLDICR\0"
7608  /* 12950 */ "MFUDSCR\0"
7609  /* 12958 */ "MTUDSCR\0"
7610  /* 12966 */ "MFVSCR\0"
7611  /* 12973 */ "MTVSCR\0"
7612  /* 12980 */ "RESTORE_CR\0"
7613  /* 12991 */ "SPILL_CR\0"
7614  /* 13000 */ "ADDItlsgdLADDR\0"
7615  /* 13015 */ "ADDItlsldLADDR\0"
7616  /* 13030 */ "G_BLOCK_ADDR\0"
7617  /* 13043 */ "GETtlsldADDR\0"
7618  /* 13056 */ "GETtlsADDR\0"
7619  /* 13067 */ "PMXVF32GER\0"
7620  /* 13078 */ "PMXVF64GER\0"
7621  /* 13089 */ "VNCIPHER\0"
7622  /* 13098 */ "VCIPHER\0"
7623  /* 13106 */ "MEMBARRIER\0"
7624  /* 13117 */ "PATCHABLE_FUNCTION_ENTER\0"
7625  /* 13142 */ "G_READCYCLECOUNTER\0"
7626  /* 13161 */ "G_READ_REGISTER\0"
7627  /* 13177 */ "G_WRITE_REGISTER\0"
7628  /* 13194 */ "VSTRIHR\0"
7629  /* 13202 */ "G_ASHR\0"
7630  /* 13209 */ "G_FSHR\0"
7631  /* 13216 */ "G_LSHR\0"
7632  /* 13223 */ "KILL_PAIR\0"
7633  /* 13233 */ "BLR\0"
7634  /* 13237 */ "gBCLR\0"
7635  /* 13243 */ "BCCLR\0"
7636  /* 13249 */ "MFLR\0"
7637  /* 13254 */ "MTLR\0"
7638  /* 13259 */ "BDZLR\0"
7639  /* 13265 */ "BDNZLR\0"
7640  /* 13272 */ "MovePCtoLR\0"
7641  /* 13283 */ "MoveGOTtoLR\0"
7642  /* 13295 */ "FMR\0"
7643  /* 13299 */ "DMMR\0"
7644  /* 13304 */ "MFPMR\0"
7645  /* 13310 */ "MTPMR\0"
7646  /* 13316 */ "VPERMR\0"
7647  /* 13323 */ "XXPERMR\0"
7648  /* 13331 */ "XXLOR\0"
7649  /* 13337 */ "XXLNOR\0"
7650  /* 13344 */ "CRNOR\0"
7651  /* 13350 */ "EVNOR\0"
7652  /* 13356 */ "G_FFLOOR\0"
7653  /* 13365 */ "CROR\0"
7654  /* 13370 */ "G_BUILD_VECTOR\0"
7655  /* 13385 */ "G_SHUFFLE_VECTOR\0"
7656  /* 13402 */ "EVOR\0"
7657  /* 13407 */ "XXLXOR\0"
7658  /* 13414 */ "DMXOR\0"
7659  /* 13420 */ "VPERMXOR\0"
7660  /* 13429 */ "CRXOR\0"
7661  /* 13435 */ "EVXOR\0"
7662  /* 13441 */ "G_VECREDUCE_XOR\0"
7663  /* 13457 */ "G_XOR\0"
7664  /* 13463 */ "G_ATOMICRMW_XOR\0"
7665  /* 13479 */ "G_VECREDUCE_OR\0"
7666  /* 13494 */ "G_OR\0"
7667  /* 13499 */ "G_ATOMICRMW_OR\0"
7668  /* 13514 */ "MFSPR\0"
7669  /* 13520 */ "MTSPR\0"
7670  /* 13526 */ "MFSR\0"
7671  /* 13531 */ "MFMSR\0"
7672  /* 13537 */ "MTMSR\0"
7673  /* 13543 */ "MTSR\0"
7674  /* 13548 */ "LVSR\0"
7675  /* 13553 */ "TAILBCTR\0"
7676  /* 13562 */ "gBCCTR\0"
7677  /* 13569 */ "BCCCTR\0"
7678  /* 13576 */ "MFCTR\0"
7679  /* 13582 */ "MTCTR\0"
7680  /* 13588 */ "G_ROTR\0"
7681  /* 13595 */ "G_INTTOPTR\0"
7682  /* 13606 */ "PMXVI16GER2S\0"
7683  /* 13619 */ "EFDABS\0"
7684  /* 13626 */ "G_FABS\0"
7685  /* 13633 */ "EFDNABS\0"
7686  /* 13641 */ "EFSNABS\0"
7687  /* 13649 */ "EVFSNABS\0"
7688  /* 13658 */ "EFSABS\0"
7689  /* 13665 */ "EVFSABS\0"
7690  /* 13673 */ "EVABS\0"
7691  /* 13679 */ "G_ABS\0"
7692  /* 13685 */ "VSUM4SBS\0"
7693  /* 13694 */ "VSUBSBS\0"
7694  /* 13702 */ "VADDSBS\0"
7695  /* 13710 */ "VSUM4UBS\0"
7696  /* 13719 */ "VSUBUBS\0"
7697  /* 13727 */ "VADDUBS\0"
7698  /* 13735 */ "FSUBS\0"
7699  /* 13741 */ "FMSUBS\0"
7700  /* 13748 */ "FNMSUBS\0"
7701  /* 13756 */ "FADDS\0"
7702  /* 13762 */ "FMADDS\0"
7703  /* 13769 */ "FNMADDS\0"
7704  /* 13777 */ "FCFIDS\0"
7705  /* 13784 */ "DCBTDS\0"
7706  /* 13791 */ "DCBTSTDS\0"
7707  /* 13800 */ "XSCVDPSXDS\0"
7708  /* 13811 */ "XVCVDPSXDS\0"
7709  /* 13822 */ "XVCVSPSXDS\0"
7710  /* 13833 */ "XSCVDPUXDS\0"
7711  /* 13844 */ "XVCVDPUXDS\0"
7712  /* 13855 */ "XVCVSPUXDS\0"
7713  /* 13866 */ "V_SETALLONES\0"
7714  /* 13879 */ "FRES\0"
7715  /* 13884 */ "FRSQRTES\0"
7716  /* 13893 */ "G_UNMERGE_VALUES\0"
7717  /* 13910 */ "G_MERGE_VALUES\0"
7718  /* 13925 */ "EFDCFS\0"
7719  /* 13932 */ "MFFS\0"
7720  /* 13937 */ "PLFS\0"
7721  /* 13942 */ "MCRFS\0"
7722  /* 13948 */ "PSTFS\0"
7723  /* 13954 */ "FNEGS\0"
7724  /* 13960 */ "VSUM4SHS\0"
7725  /* 13969 */ "VSUBSHS\0"
7726  /* 13977 */ "VMHADDSHS\0"
7727  /* 13987 */ "VMHRADDSHS\0"
7728  /* 13998 */ "VADDSHS\0"
7729  /* 14006 */ "VMSUMSHS\0"
7730  /* 14015 */ "VSUBUHS\0"
7731  /* 14023 */ "VADDUHS\0"
7732  /* 14031 */ "VMSUMUHS\0"
7733  /* 14040 */ "SUBIS\0"
7734  /* 14046 */ "SUBPCIS\0"
7735  /* 14054 */ "ADDPCIS\0"
7736  /* 14062 */ "ADDIS\0"
7737  /* 14068 */ "LIS\0"
7738  /* 14072 */ "XORIS\0"
7739  /* 14078 */ "EVSRWIS\0"
7740  /* 14086 */ "FSELS\0"
7741  /* 14092 */ "ADD4TLS\0"
7742  /* 14100 */ "ADD8TLS\0"
7743  /* 14108 */ "ICBTLS\0"
7744  /* 14115 */ "STBXTLS\0"
7745  /* 14123 */ "LDXTLS\0"
7746  /* 14130 */ "STDXTLS\0"
7747  /* 14138 */ "STHXTLS\0"
7748  /* 14146 */ "STWXTLS\0"
7749  /* 14154 */ "LBZXTLS\0"
7750  /* 14162 */ "LHZXTLS\0"
7751  /* 14170 */ "LWZXTLS\0"
7752  /* 14178 */ "BL8_TLS\0"
7753  /* 14186 */ "BL8_NOTOC_TLS\0"
7754  /* 14200 */ "BL_TLS\0"
7755  /* 14207 */ "BL8_NOP_TLS\0"
7756  /* 14219 */ "FMULS\0"
7757  /* 14225 */ "FRIMS\0"
7758  /* 14231 */ "FCPSGNS\0"
7759  /* 14239 */ "FRINS\0"
7760  /* 14245 */ "G_FCOS\0"
7761  /* 14252 */ "EVLWHOS\0"
7762  /* 14260 */ "FCMPOS\0"
7763  /* 14267 */ "DCBFPS\0"
7764  /* 14274 */ "FRIPS\0"
7765  /* 14280 */ "DCBSTPS\0"
7766  /* 14288 */ "G_CONCAT_VECTORS\0"
7767  /* 14305 */ "COPY_TO_REGCLASS\0"
7768  /* 14322 */ "G_IS_FPCLASS\0"
7769  /* 14335 */ "FABSS\0"
7770  /* 14341 */ "FNABSS\0"
7771  /* 14348 */ "VPKSDSS\0"
7772  /* 14356 */ "G_ATOMIC_CMPXCHG_WITH_SUCCESS\0"
7773  /* 14386 */ "VPKSHSS\0"
7774  /* 14394 */ "VPKSWSS\0"
7775  /* 14402 */ "G_INTRINSIC_W_SIDE_EFFECTS\0"
7776  /* 14429 */ "EVCMPGTS\0"
7777  /* 14438 */ "EVCMPLTS\0"
7778  /* 14447 */ "FSQRTS\0"
7779  /* 14454 */ "FCFIDUS\0"
7780  /* 14462 */ "VPKSDUS\0"
7781  /* 14470 */ "VPKUDUS\0"
7782  /* 14478 */ "SUBFUS\0"
7783  /* 14485 */ "VPKSHUS\0"
7784  /* 14493 */ "VPKUHUS\0"
7785  /* 14501 */ "FCMPUS\0"
7786  /* 14508 */ "VPKSWUS\0"
7787  /* 14516 */ "VPKUWUS\0"
7788  /* 14524 */ "FDIVS\0"
7789  /* 14530 */ "EVSRWS\0"
7790  /* 14537 */ "MTVSRWS\0"
7791  /* 14545 */ "VSUM2SWS\0"
7792  /* 14554 */ "VSUBSWS\0"
7793  /* 14562 */ "VADDSWS\0"
7794  /* 14570 */ "VSUMSWS\0"
7795  /* 14578 */ "VSUBUWS\0"
7796  /* 14586 */ "VADDUWS\0"
7797  /* 14594 */ "EVDIVWS\0"
7798  /* 14602 */ "XSCVDPSXWS\0"
7799  /* 14613 */ "XVCVDPSXWS\0"
7800  /* 14624 */ "XVCVSPSXWS\0"
7801  /* 14635 */ "XSCVDPUXWS\0"
7802  /* 14646 */ "XVCVDPUXWS\0"
7803  /* 14657 */ "XVCVSPUXWS\0"
7804  /* 14668 */ "VCTSXS\0"
7805  /* 14675 */ "VCTUXS\0"
7806  /* 14682 */ "FRIZS\0"
7807  /* 14688 */ "LDAT\0"
7808  /* 14693 */ "STDAT\0"
7809  /* 14699 */ "EVLHHESPLAT\0"
7810  /* 14711 */ "EVLWHSPLAT\0"
7811  /* 14722 */ "EVLHHOSSPLAT\0"
7812  /* 14735 */ "EVLHHOUSPLAT\0"
7813  /* 14748 */ "EVLWWSPLAT\0"
7814  /* 14759 */ "G_SSUBSAT\0"
7815  /* 14769 */ "G_USUBSAT\0"
7816  /* 14779 */ "G_SADDSAT\0"
7817  /* 14789 */ "G_UADDSAT\0"
7818  /* 14799 */ "G_SSHLSAT\0"
7819  /* 14809 */ "G_USHLSAT\0"
7820  /* 14819 */ "G_SMULFIXSAT\0"
7821  /* 14832 */ "G_UMULFIXSAT\0"
7822  /* 14845 */ "G_SDIVFIXSAT\0"
7823  /* 14858 */ "G_UDIVFIXSAT\0"
7824  /* 14871 */ "LWAT\0"
7825  /* 14876 */ "STWAT\0"
7826  /* 14882 */ "DCBT\0"
7827  /* 14887 */ "ICBT\0"
7828  /* 14892 */ "G_EXTRACT\0"
7829  /* 14902 */ "G_SELECT\0"
7830  /* 14911 */ "G_BRINDIRECT\0"
7831  /* 14924 */ "DCBTCT\0"
7832  /* 14931 */ "DCBTSTCT\0"
7833  /* 14940 */ "PATCHABLE_RET\0"
7834  /* 14954 */ "TCHECK_RET\0"
7835  /* 14965 */ "TBEGIN_RET\0"
7836  /* 14976 */ "CR6SET\0"
7837  /* 14983 */ "DYNAREAOFFSET\0"
7838  /* 14997 */ "G_MEMSET\0"
7839  /* 15006 */ "CR6UNSET\0"
7840  /* 15015 */ "CRUNSET\0"
7841  /* 15023 */ "CRSET\0"
7842  /* 15029 */ "EFDCMPGT\0"
7843  /* 15038 */ "EFSCMPGT\0"
7844  /* 15047 */ "EVFSCMPGT\0"
7845  /* 15057 */ "EFDTSTGT\0"
7846  /* 15066 */ "EFSTSTGT\0"
7847  /* 15075 */ "EVFSTSTGT\0"
7848  /* 15085 */ "WAIT\0"
7849  /* 15090 */ "RESTORE_CRBIT\0"
7850  /* 15104 */ "SPILL_CRBIT\0"
7851  /* 15116 */ "ANDI_rec_1_EQ_BIT\0"
7852  /* 15134 */ "ANDI_rec_1_GT_BIT\0"
7853  /* 15152 */ "PATCHABLE_FUNCTION_EXIT\0"
7854  /* 15176 */ "G_BRJT\0"
7855  /* 15183 */ "G_EXTRACT_VECTOR_ELT\0"
7856  /* 15204 */ "G_INSERT_VECTOR_ELT\0"
7857  /* 15224 */ "EFDCMPLT\0"
7858  /* 15233 */ "EFSCMPLT\0"
7859  /* 15242 */ "EVFSCMPLT\0"
7860  /* 15252 */ "EFDTSTLT\0"
7861  /* 15261 */ "EFSTSTLT\0"
7862  /* 15270 */ "EVFSTSTLT\0"
7863  /* 15280 */ "G_FCONSTANT\0"
7864  /* 15292 */ "G_CONSTANT\0"
7865  /* 15303 */ "STATEPOINT\0"
7866  /* 15314 */ "PATCHPOINT\0"
7867  /* 15325 */ "G_PTRTOINT\0"
7868  /* 15336 */ "G_FRINT\0"
7869  /* 15344 */ "G_INTRINSIC_LRINT\0"
7870  /* 15362 */ "G_FNEARBYINT\0"
7871  /* 15375 */ "PPC32GOT\0"
7872  /* 15384 */ "PPC32PICGOT\0"
7873  /* 15396 */ "CRNOT\0"
7874  /* 15402 */ "LDtocCPT\0"
7875  /* 15411 */ "TRECHKPT\0"
7876  /* 15420 */ "G_VASTART\0"
7877  /* 15430 */ "LIFETIME_START\0"
7878  /* 15445 */ "G_INVOKE_REGION_START\0"
7879  /* 15467 */ "G_INSERT\0"
7880  /* 15476 */ "TABORT\0"
7881  /* 15483 */ "CP_ABORT\0"
7882  /* 15492 */ "G_FSQRT\0"
7883  /* 15500 */ "G_STRICT_FSQRT\0"
7884  /* 15515 */ "FTSQRT\0"
7885  /* 15522 */ "G_BITCAST\0"
7886  /* 15532 */ "G_ADDRSPACE_CAST\0"
7887  /* 15549 */ "VNCIPHERLAST\0"
7888  /* 15562 */ "VCIPHERLAST\0"
7889  /* 15574 */ "DCBST\0"
7890  /* 15580 */ "DST\0"
7891  /* 15584 */ "HASHST\0"
7892  /* 15591 */ "DBG_VALUE_LIST\0"
7893  /* 15606 */ "DCBTST\0"
7894  /* 15613 */ "DSTST\0"
7895  /* 15619 */ "SPILLTOVSR_ST\0"
7896  /* 15633 */ "DCBTT\0"
7897  /* 15639 */ "DSTT\0"
7898  /* 15644 */ "DCBTSTT\0"
7899  /* 15652 */ "DSTSTT\0"
7900  /* 15659 */ "G_FPEXT\0"
7901  /* 15667 */ "G_SEXT\0"
7902  /* 15674 */ "G_ASSERT_SEXT\0"
7903  /* 15688 */ "G_ANYEXT\0"
7904  /* 15697 */ "G_ZEXT\0"
7905  /* 15704 */ "G_ASSERT_ZEXT\0"
7906  /* 15718 */ "LHAU\0"
7907  /* 15723 */ "STBU\0"
7908  /* 15728 */ "LFDU\0"
7909  /* 15733 */ "STFDU\0"
7910  /* 15739 */ "MADDHDU\0"
7911  /* 15747 */ "MULHDU\0"
7912  /* 15754 */ "FCFIDU\0"
7913  /* 15761 */ "FCTIDU\0"
7914  /* 15768 */ "LDU\0"
7915  /* 15772 */ "STDU\0"
7916  /* 15777 */ "DIVDU\0"
7917  /* 15783 */ "DIVDEU\0"
7918  /* 15790 */ "DIVWEU\0"
7919  /* 15797 */ "STHU\0"
7920  /* 15802 */ "EVSRWIU\0"
7921  /* 15810 */ "EVLWHOU\0"
7922  /* 15818 */ "LFSU\0"
7923  /* 15823 */ "STFSU\0"
7924  /* 15829 */ "EVCMPGTU\0"
7925  /* 15838 */ "EVCMPLTU\0"
7926  /* 15847 */ "MULHWU\0"
7927  /* 15854 */ "FCTIWU\0"
7928  /* 15861 */ "EVSRWU\0"
7929  /* 15868 */ "STWU\0"
7930  /* 15873 */ "EVDIVWU\0"
7931  /* 15881 */ "LBZU\0"
7932  /* 15886 */ "LHZU\0"
7933  /* 15891 */ "LWZU\0"
7934  /* 15896 */ "SLBMFEV\0"
7935  /* 15904 */ "EFDDIV\0"
7936  /* 15911 */ "G_FDIV\0"
7937  /* 15918 */ "G_STRICT_FDIV\0"
7938  /* 15932 */ "EFSDIV\0"
7939  /* 15939 */ "EVFSDIV\0"
7940  /* 15947 */ "G_SDIV\0"
7941  /* 15954 */ "FTDIV\0"
7942  /* 15960 */ "G_UDIV\0"
7943  /* 15967 */ "VSLV\0"
7944  /* 15972 */ "XXLEQV\0"
7945  /* 15979 */ "CREQV\0"
7946  /* 15985 */ "EVEQV\0"
7947  /* 15991 */ "VSRV\0"
7948  /* 15996 */ "PLXV\0"
7949  /* 16001 */ "PSTXV\0"
7950  /* 16007 */ "VEXTSB2W\0"
7951  /* 16016 */ "VEXTSH2W\0"
7952  /* 16025 */ "PMXVBF16GER2W\0"
7953  /* 16039 */ "PMXVF16GER2W\0"
7954  /* 16052 */ "PMXVI16GER2W\0"
7955  /* 16065 */ "PMXVI8GER4W\0"
7956  /* 16077 */ "PMXVI4GER8W\0"
7957  /* 16089 */ "EVMHESMFAAW\0"
7958  /* 16101 */ "EVMHOSMFAAW\0"
7959  /* 16113 */ "EVMHESSFAAW\0"
7960  /* 16125 */ "EVMHOSSFAAW\0"
7961  /* 16137 */ "EVADDSMIAAW\0"
7962  /* 16149 */ "EVMHESMIAAW\0"
7963  /* 16161 */ "EVSUBFSMIAAW\0"
7964  /* 16174 */ "EVMWLSMIAAW\0"
7965  /* 16186 */ "EVMHOSMIAAW\0"
7966  /* 16198 */ "EVADDUMIAAW\0"
7967  /* 16210 */ "EVMHEUMIAAW\0"
7968  /* 16222 */ "EVSUBFUMIAAW\0"
7969  /* 16235 */ "EVMWLUMIAAW\0"
7970  /* 16247 */ "EVMHOUMIAAW\0"
7971  /* 16259 */ "EVADDSSIAAW\0"
7972  /* 16271 */ "EVMHESSIAAW\0"
7973  /* 16283 */ "EVSUBFSSIAAW\0"
7974  /* 16296 */ "EVMWLSSIAAW\0"
7975  /* 16308 */ "EVMHOSSIAAW\0"
7976  /* 16320 */ "EVADDUSIAAW\0"
7977  /* 16332 */ "EVMHEUSIAAW\0"
7978  /* 16344 */ "EVSUBFUSIAAW\0"
7979  /* 16357 */ "EVMWLUSIAAW\0"
7980  /* 16369 */ "EVMHOUSIAAW\0"
7981  /* 16381 */ "VSHASIGMAW\0"
7982  /* 16392 */ "VSRAW\0"
7983  /* 16398 */ "VCNTMBW\0"
7984  /* 16406 */ "VPRTYBW\0"
7985  /* 16414 */ "XXMFACCW\0"
7986  /* 16423 */ "XXMTACCW\0"
7987  /* 16432 */ "EVADDW\0"
7988  /* 16439 */ "EVLDW\0"
7989  /* 16445 */ "EVRNDW\0"
7990  /* 16452 */ "EVSTDW\0"
7991  /* 16459 */ "VMRGEW\0"
7992  /* 16466 */ "VCMPNEW\0"
7993  /* 16474 */ "EVSUBFW\0"
7994  /* 16482 */ "EVSUBIFW\0"
7995  /* 16491 */ "VNEGW\0"
7996  /* 16497 */ "VMRGHW\0"
7997  /* 16504 */ "XXMRGHW\0"
7998  /* 16512 */ "MULHW\0"
7999  /* 16518 */ "EVADDIW\0"
8000  /* 16526 */ "FCTIW\0"
8001  /* 16532 */ "XXSPLTIW\0"
8002  /* 16541 */ "VMRGLW\0"
8003  /* 16548 */ "XXMRGLW\0"
8004  /* 16556 */ "MULLW\0"
8005  /* 16562 */ "CMPLW\0"
8006  /* 16568 */ "EVRLW\0"
8007  /* 16574 */ "EVSLW\0"
8008  /* 16580 */ "LMW\0"
8009  /* 16584 */ "STMW\0"
8010  /* 16589 */ "VPMSUMW\0"
8011  /* 16597 */ "EVMHESMFANW\0"
8012  /* 16609 */ "EVMHOSMFANW\0"
8013  /* 16621 */ "EVMHESSFANW\0"
8014  /* 16633 */ "EVMHOSSFANW\0"
8015  /* 16645 */ "EVMHESMIANW\0"
8016  /* 16657 */ "EVMWLSMIANW\0"
8017  /* 16669 */ "EVMHOSMIANW\0"
8018  /* 16681 */ "EVMHEUMIANW\0"
8019  /* 16693 */ "EVMWLUMIANW\0"
8020  /* 16705 */ "EVMHOUMIANW\0"
8021  /* 16717 */ "EVMHESSIANW\0"
8022  /* 16729 */ "EVMWLSSIANW\0"
8023  /* 16741 */ "EVMHOSSIANW\0"
8024  /* 16753 */ "EVMHEUSIANW\0"
8025  /* 16765 */ "EVMWLUSIANW\0"
8026  /* 16777 */ "EVMHOUSIANW\0"
8027  /* 16789 */ "VMRGOW\0"
8028  /* 16796 */ "G_FPOW\0"
8029  /* 16803 */ "CMPW\0"
8030  /* 16808 */ "XXBRW\0"
8031  /* 16814 */ "PMXVF32GERW\0"
8032  /* 16826 */ "PMXVF64GERW\0"
8033  /* 16838 */ "VSRW\0"
8034  /* 16843 */ "PMXVI16GER2SW\0"
8035  /* 16857 */ "VMODSW\0"
8036  /* 16864 */ "VMULESW\0"
8037  /* 16872 */ "VDIVESW\0"
8038  /* 16880 */ "VAVGSW\0"
8039  /* 16887 */ "VUPKHSW\0"
8040  /* 16895 */ "VMULHSW\0"
8041  /* 16903 */ "VSPLTISW\0"
8042  /* 16912 */ "VUPKLSW\0"
8043  /* 16920 */ "EVCNTLSW\0"
8044  /* 16929 */ "VMINSW\0"
8045  /* 16936 */ "VINSW\0"
8046  /* 16942 */ "VMULOSW\0"
8047  /* 16950 */ "VCMPGTSW\0"
8048  /* 16959 */ "EXTSW\0"
8049  /* 16965 */ "VDIVSW\0"
8050  /* 16972 */ "VMAXSW\0"
8051  /* 16979 */ "VSPLTW\0"
8052  /* 16986 */ "XXSPLTW\0"
8053  /* 16994 */ "VPOPCNTW\0"
8054  /* 17003 */ "VINSERTW\0"
8055  /* 17012 */ "XXINSERTW\0"
8056  /* 17022 */ "SPESTW\0"
8057  /* 17029 */ "PSTW\0"
8058  /* 17034 */ "VSUBCUW\0"
8059  /* 17042 */ "VADDCUW\0"
8060  /* 17050 */ "VMODUW\0"
8061  /* 17057 */ "VABSDUW\0"
8062  /* 17065 */ "VMULEUW\0"
8063  /* 17073 */ "VDIVEUW\0"
8064  /* 17081 */ "VAVGUW\0"
8065  /* 17088 */ "VMULHUW\0"
8066  /* 17096 */ "VMINUW\0"
8067  /* 17103 */ "VMULOUW\0"
8068  /* 17111 */ "VCMPEQUW\0"
8069  /* 17120 */ "VEXTRACTUW\0"
8070  /* 17131 */ "XXEXTRACTUW\0"
8071  /* 17143 */ "VCMPGTUW\0"
8072  /* 17152 */ "VDIVUW\0"
8073  /* 17159 */ "VMAXUW\0"
8074  /* 17166 */ "XXBLENDVW\0"
8075  /* 17176 */ "DIVW\0"
8076  /* 17181 */ "XXSETACCZW\0"
8077  /* 17192 */ "VCMPNEZW\0"
8078  /* 17201 */ "VCLZW\0"
8079  /* 17207 */ "EVCNTLZW\0"
8080  /* 17216 */ "VCTZW\0"
8081  /* 17222 */ "CNTTZW\0"
8082  /* 17229 */ "LXVD2X\0"
8083  /* 17236 */ "STXVD2X\0"
8084  /* 17244 */ "LXVW4X\0"
8085  /* 17251 */ "STXVW4X\0"
8086  /* 17259 */ "LXVB16X\0"
8087  /* 17267 */ "STXVB16X\0"
8088  /* 17276 */ "LXVH8X\0"
8089  /* 17283 */ "STXVH8X\0"
8090  /* 17291 */ "LHAX\0"
8091  /* 17296 */ "G_VECREDUCE_FMAX\0"
8092  /* 17313 */ "G_ATOMICRMW_FMAX\0"
8093  /* 17330 */ "G_VECREDUCE_SMAX\0"
8094  /* 17347 */ "G_SMAX\0"
8095  /* 17354 */ "G_VECREDUCE_UMAX\0"
8096  /* 17371 */ "G_UMAX\0"
8097  /* 17378 */ "G_ATOMICRMW_UMAX\0"
8098  /* 17395 */ "G_ATOMICRMW_MAX\0"
8099  /* 17411 */ "TLBIVAX\0"
8100  /* 17419 */ "LFIWAX\0"
8101  /* 17426 */ "LIWAX\0"
8102  /* 17432 */ "LXSIWAX\0"
8103  /* 17440 */ "LWAX\0"
8104  /* 17445 */ "LVEBX\0"
8105  /* 17451 */ "STVEBX\0"
8106  /* 17458 */ "STXSIBX\0"
8107  /* 17466 */ "LXVRBX\0"
8108  /* 17473 */ "STXVRBX\0"
8109  /* 17481 */ "STBX\0"
8110  /* 17486 */ "STBCX\0"
8111  /* 17492 */ "STDCX\0"
8112  /* 17498 */ "STHCX\0"
8113  /* 17504 */ "STQCX\0"
8114  /* 17510 */ "STWCX\0"
8115  /* 17516 */ "XXSPLTI32DX\0"
8116  /* 17528 */ "EVLDDX\0"
8117  /* 17535 */ "EVSTDDX\0"
8118  /* 17543 */ "LFDX\0"
8119  /* 17548 */ "STFDX\0"
8120  /* 17554 */ "SPILLTOVSR_LDX\0"
8121  /* 17569 */ "LXVRDX\0"
8122  /* 17576 */ "STXVRDX\0"
8123  /* 17584 */ "LXSDX\0"
8124  /* 17590 */ "STXSDX\0"
8125  /* 17597 */ "STDX\0"
8126  /* 17602 */ "ADDEX\0"
8127  /* 17608 */ "G_FRAME_INDEX\0"
8128  /* 17622 */ "EVLWHEX\0"
8129  /* 17630 */ "EVSTWHEX\0"
8130  /* 17639 */ "EVSTWWEX\0"
8131  /* 17648 */ "G_SBFX\0"
8132  /* 17655 */ "G_UBFX\0"
8133  /* 17662 */ "EVLDHX\0"
8134  /* 17669 */ "EVSTDHX\0"
8135  /* 17677 */ "LVEHX\0"
8136  /* 17683 */ "STVEHX\0"
8137  /* 17690 */ "STXSIHX\0"
8138  /* 17698 */ "LXVRHX\0"
8139  /* 17705 */ "STXVRHX\0"
8140  /* 17713 */ "STHX\0"
8141  /* 17718 */ "GETtlsADDR32AIX\0"
8142  /* 17734 */ "GETtlsADDR64AIX\0"
8143  /* 17750 */ "TLSGDAIX\0"
8144  /* 17759 */ "STBCIX\0"
8145  /* 17766 */ "LDCIX\0"
8146  /* 17772 */ "STDCIX\0"
8147  /* 17779 */ "STHCIX\0"
8148  /* 17786 */ "STWCIX\0"
8149  /* 17793 */ "LBZCIX\0"
8150  /* 17800 */ "LHZCIX\0"
8151  /* 17807 */ "LWZCIX\0"
8152  /* 17814 */ "G_SMULFIX\0"
8153  /* 17824 */ "G_UMULFIX\0"
8154  /* 17834 */ "G_SDIVFIX\0"
8155  /* 17844 */ "G_UDIVFIX\0"
8156  /* 17854 */ "XSRQPIX\0"
8157  /* 17862 */ "VINSBLX\0"
8158  /* 17870 */ "VEXTUBLX\0"
8159  /* 17879 */ "VINSDLX\0"
8160  /* 17887 */ "VINSHLX\0"
8161  /* 17895 */ "VEXTUHLX\0"
8162  /* 17904 */ "VINSBVLX\0"
8163  /* 17913 */ "VEXTDUBVLX\0"
8164  /* 17924 */ "VEXTDDVLX\0"
8165  /* 17934 */ "VINSHVLX\0"
8166  /* 17943 */ "VEXTDUHVLX\0"
8167  /* 17954 */ "VINSWVLX\0"
8168  /* 17963 */ "VEXTDUWVLX\0"
8169  /* 17974 */ "VINSWLX\0"
8170  /* 17982 */ "VEXTUWLX\0"
8171  /* 17991 */ "XXPERMX\0"
8172  /* 17999 */ "VSBOX\0"
8173  /* 18005 */ "EVSTWHOX\0"
8174  /* 18014 */ "EVSTWWOX\0"
8175  /* 18023 */ "LBEPX\0"
8176  /* 18029 */ "STBEPX\0"
8177  /* 18036 */ "LFDEPX\0"
8178  /* 18043 */ "STFDEPX\0"
8179  /* 18051 */ "LHEPX\0"
8180  /* 18057 */ "STHEPX\0"
8181  /* 18064 */ "LWEPX\0"
8182  /* 18070 */ "STWEPX\0"
8183  /* 18077 */ "VUPKHPX\0"
8184  /* 18085 */ "VPKPX\0"
8185  /* 18091 */ "VUPKLPX\0"
8186  /* 18099 */ "LXSSPX\0"
8187  /* 18106 */ "STXSSPX\0"
8188  /* 18114 */ "LXVPX\0"
8189  /* 18120 */ "STXVPX\0"
8190  /* 18127 */ "LBARX\0"
8191  /* 18133 */ "LDARX\0"
8192  /* 18139 */ "LHARX\0"
8193  /* 18145 */ "LQARX\0"
8194  /* 18151 */ "LWARX\0"
8195  /* 18157 */ "LDBRX\0"
8196  /* 18163 */ "STDBRX\0"
8197  /* 18170 */ "LHBRX\0"
8198  /* 18176 */ "STHBRX\0"
8199  /* 18183 */ "VINSBRX\0"
8200  /* 18191 */ "VEXTUBRX\0"
8201  /* 18200 */ "LWBRX\0"
8202  /* 18206 */ "STWBRX\0"
8203  /* 18213 */ "VINSDRX\0"
8204  /* 18221 */ "VINSHRX\0"
8205  /* 18229 */ "VEXTUHRX\0"
8206  /* 18238 */ "VINSBVRX\0"
8207  /* 18247 */ "VEXTDUBVRX\0"
8208  /* 18258 */ "VEXTDDVRX\0"
8209  /* 18268 */ "VINSHVRX\0"
8210  /* 18277 */ "VEXTDUHVRX\0"
8211  /* 18288 */ "VINSWVRX\0"
8212  /* 18297 */ "VEXTDUWVRX\0"
8213  /* 18308 */ "VINSWRX\0"
8214  /* 18316 */ "VEXTUWRX\0"
8215  /* 18325 */ "MCRXRX\0"
8216  /* 18332 */ "TLBSX\0"
8217  /* 18338 */ "LXVDSX\0"
8218  /* 18345 */ "VCFSX\0"
8219  /* 18351 */ "LFSX\0"
8220  /* 18356 */ "STFSX\0"
8221  /* 18362 */ "EVLWHOSX\0"
8222  /* 18371 */ "LXVWSX\0"
8223  /* 18378 */ "EVLHHESPLATX\0"
8224  /* 18391 */ "EVLWHSPLATX\0"
8225  /* 18403 */ "EVLHHOSSPLATX\0"
8226  /* 18417 */ "EVLHHOUSPLATX\0"
8227  /* 18431 */ "EVLWWSPLATX\0"
8228  /* 18443 */ "SPILLTOVSR_STX\0"
8229  /* 18458 */ "LHAUX\0"
8230  /* 18464 */ "LWAUX\0"
8231  /* 18470 */ "STBUX\0"
8232  /* 18476 */ "LFDUX\0"
8233  /* 18482 */ "STFDUX\0"
8234  /* 18489 */ "LDUX\0"
8235  /* 18494 */ "STDUX\0"
8236  /* 18500 */ "VCFUX\0"
8237  /* 18506 */ "STHUX\0"
8238  /* 18512 */ "EVLWHOUX\0"
8239  /* 18521 */ "LFSUX\0"
8240  /* 18527 */ "STFSUX\0"
8241  /* 18534 */ "STWUX\0"
8242  /* 18540 */ "LBZUX\0"
8243  /* 18546 */ "LHZUX\0"
8244  /* 18552 */ "LWZUX\0"
8245  /* 18558 */ "LVX\0"
8246  /* 18562 */ "STVX\0"
8247  /* 18567 */ "LXVX\0"
8248  /* 18572 */ "STXVX\0"
8249  /* 18578 */ "EVLDWX\0"
8250  /* 18585 */ "EVSTDWX\0"
8251  /* 18593 */ "LVEWX\0"
8252  /* 18599 */ "STVEWX\0"
8253  /* 18606 */ "STFIWX\0"
8254  /* 18613 */ "STXSIWX\0"
8255  /* 18621 */ "STIWX\0"
8256  /* 18627 */ "LXVRWX\0"
8257  /* 18634 */ "STXVRWX\0"
8258  /* 18642 */ "SPESTWX\0"
8259  /* 18650 */ "LXSIBZX\0"
8260  /* 18658 */ "LBZX\0"
8261  /* 18663 */ "LXSIHZX\0"
8262  /* 18671 */ "LHZX\0"
8263  /* 18676 */ "LFIWZX\0"
8264  /* 18683 */ "LIWZX\0"
8265  /* 18689 */ "LXSIWZX\0"
8266  /* 18697 */ "SPELWZX\0"
8267  /* 18705 */ "G_MEMCPY\0"
8268  /* 18714 */ "CP_COPY\0"
8269  /* 18722 */ "DCBZ\0"
8270  /* 18727 */ "PLBZ\0"
8271  /* 18732 */ "XXSETACCZ\0"
8272  /* 18742 */ "BDZ\0"
8273  /* 18746 */ "EFDCTSIDZ\0"
8274  /* 18756 */ "FCTIDZ\0"
8275  /* 18763 */ "EFDCTUIDZ\0"
8276  /* 18773 */ "XSCVQPSDZ\0"
8277  /* 18783 */ "XSCVQPUDZ\0"
8278  /* 18793 */ "PLHZ\0"
8279  /* 18798 */ "VRFIZ\0"
8280  /* 18804 */ "XSRDPIZ\0"
8281  /* 18812 */ "XVRDPIZ\0"
8282  /* 18820 */ "XVRSPIZ\0"
8283  /* 18828 */ "EFDCTSIZ\0"
8284  /* 18837 */ "EFSCTSIZ\0"
8285  /* 18846 */ "EVFSCTSIZ\0"
8286  /* 18856 */ "EFDCTUIZ\0"
8287  /* 18865 */ "EFSCTUIZ\0"
8288  /* 18874 */ "EVFSCTUIZ\0"
8289  /* 18884 */ "G_CTLZ\0"
8290  /* 18891 */ "BDNZ\0"
8291  /* 18896 */ "XSCVQPSQZ\0"
8292  /* 18906 */ "XSCVQPUQZ\0"
8293  /* 18916 */ "DMSETDMRZ\0"
8294  /* 18926 */ "G_CTTZ\0"
8295  /* 18933 */ "FCTIDUZ\0"
8296  /* 18941 */ "FCTIWUZ\0"
8297  /* 18949 */ "FCTIWZ\0"
8298  /* 18956 */ "SPELWZ\0"
8299  /* 18963 */ "PLWZ\0"
8300  /* 18968 */ "MFVSRWZ\0"
8301  /* 18976 */ "MTVSRWZ\0"
8302  /* 18984 */ "MFVRWZ\0"
8303  /* 18991 */ "MTVRWZ\0"
8304  /* 18998 */ "XSCVQPSWZ\0"
8305  /* 19008 */ "XSCVQPUWZ\0"
8306  /* 19018 */ "ADD8TLS_\0"
8307  /* 19027 */ "STBXTLS_\0"
8308  /* 19036 */ "LDXTLS_\0"
8309  /* 19044 */ "STDXTLS_\0"
8310  /* 19053 */ "STHXTLS_\0"
8311  /* 19062 */ "STWXTLS_\0"
8312  /* 19071 */ "LBZXTLS_\0"
8313  /* 19080 */ "LHZXTLS_\0"
8314  /* 19089 */ "LWZXTLS_\0"
8315  /* 19098 */ "BL8_TLS_\0"
8316  /* 19107 */ "MTFSFb\0"
8317  /* 19114 */ "MTFSFIb\0"
8318  /* 19122 */ "RLDICL_32_rec\0"
8319  /* 19136 */ "EXTSWSLI_32_64_rec\0"
8320  /* 19155 */ "EXTSW_32_64_rec\0"
8321  /* 19171 */ "ADD4_rec\0"
8322  /* 19180 */ "EXTSB8_rec\0"
8323  /* 19191 */ "ADDC8_rec\0"
8324  /* 19201 */ "ANDC8_rec\0"
8325  /* 19211 */ "SUBFC8_rec\0"
8326  /* 19222 */ "ORC8_rec\0"
8327  /* 19231 */ "ADD8_rec\0"
8328  /* 19240 */ "NAND8_rec\0"
8329  /* 19250 */ "ADDE8_rec\0"
8330  /* 19260 */ "SUBFE8_rec\0"
8331  /* 19271 */ "ADDME8_rec\0"
8332  /* 19282 */ "SUBFME8_rec\0"
8333  /* 19294 */ "CP_PASTE8_rec\0"
8334  /* 19308 */ "ADDZE8_rec\0"
8335  /* 19319 */ "SUBFZE8_rec\0"
8336  /* 19331 */ "SUBF8_rec\0"
8337  /* 19341 */ "NEG8_rec\0"
8338  /* 19350 */ "EXTSH8_rec\0"
8339  /* 19361 */ "ANDI8_rec\0"
8340  /* 19371 */ "RLWIMI8_rec\0"
8341  /* 19383 */ "RLWINM8_rec\0"
8342  /* 19395 */ "RLWNM8_rec\0"
8343  /* 19406 */ "NOR8_rec\0"
8344  /* 19415 */ "XOR8_rec\0"
8345  /* 19424 */ "ANDIS8_rec\0"
8346  /* 19435 */ "EQV8_rec\0"
8347  /* 19444 */ "SLW8_rec\0"
8348  /* 19453 */ "SRW8_rec\0"
8349  /* 19462 */ "CNTLZW8_rec\0"
8350  /* 19474 */ "CNTTZW8_rec\0"
8351  /* 19486 */ "VCMPNEB_rec\0"
8352  /* 19498 */ "VCMPGTSB_rec\0"
8353  /* 19511 */ "EXTSB_rec\0"
8354  /* 19521 */ "VCMPEQUB_rec\0"
8355  /* 19534 */ "BCDSUB_rec\0"
8356  /* 19545 */ "FSUB_rec\0"
8357  /* 19554 */ "FMSUB_rec\0"
8358  /* 19564 */ "FNMSUB_rec\0"
8359  /* 19575 */ "VCMPGTUB_rec\0"
8360  /* 19588 */ "VCMPNEZB_rec\0"
8361  /* 19601 */ "ADDC_rec\0"
8362  /* 19610 */ "ANDC_rec\0"
8363  /* 19619 */ "SUBFC_rec\0"
8364  /* 19629 */ "SUBIC_rec\0"
8365  /* 19639 */ "ADDIC_rec\0"
8366  /* 19649 */ "RLDIC_rec\0"
8367  /* 19659 */ "BCDTRUNC_rec\0"
8368  /* 19672 */ "BCDUTRUNC_rec\0"
8369  /* 19686 */ "ORC_rec\0"
8370  /* 19694 */ "SRAD_rec\0"
8371  /* 19703 */ "BCDADD_rec\0"
8372  /* 19714 */ "FADD_rec\0"
8373  /* 19723 */ "FMADD_rec\0"
8374  /* 19733 */ "FNMADD_rec\0"
8375  /* 19744 */ "FNEGD_rec\0"
8376  /* 19754 */ "MULHD_rec\0"
8377  /* 19764 */ "FCFID_rec\0"
8378  /* 19774 */ "FCTID_rec\0"
8379  /* 19784 */ "FSELD_rec\0"
8380  /* 19794 */ "MULLD_rec\0"
8381  /* 19804 */ "SLD_rec\0"
8382  /* 19812 */ "FRIMD_rec\0"
8383  /* 19822 */ "NAND_rec\0"
8384  /* 19831 */ "FCPSGND_rec\0"
8385  /* 19843 */ "FRIND_rec\0"
8386  /* 19853 */ "FRIPD_rec\0"
8387  /* 19863 */ "SRD_rec\0"
8388  /* 19871 */ "FABSD_rec\0"
8389  /* 19881 */ "FNABSD_rec\0"
8390  /* 19892 */ "VCMPGTSD_rec\0"
8391  /* 19905 */ "VCMPEQUD_rec\0"
8392  /* 19918 */ "VCMPGTUD_rec\0"
8393  /* 19931 */ "DIVD_rec\0"
8394  /* 19940 */ "FRIZD_rec\0"
8395  /* 19950 */ "CNTLZD_rec\0"
8396  /* 19961 */ "CNTTZD_rec\0"
8397  /* 19972 */ "ADDE_rec\0"
8398  /* 19981 */ "DIVDE_rec\0"
8399  /* 19991 */ "SLBFEE_rec\0"
8400  /* 20002 */ "SUBFE_rec\0"
8401  /* 20012 */ "ADDME_rec\0"
8402  /* 20022 */ "SUBFME_rec\0"
8403  /* 20033 */ "FRE_rec\0"
8404  /* 20041 */ "FRSQRTE_rec\0"
8405  /* 20053 */ "CP_PASTE_rec\0"
8406  /* 20066 */ "DIVWE_rec\0"
8407  /* 20076 */ "ADDZE_rec\0"
8408  /* 20086 */ "SUBFZE_rec\0"
8409  /* 20097 */ "SUBF_rec\0"
8410  /* 20106 */ "MTFSF_rec\0"
8411  /* 20116 */ "NEG_rec\0"
8412  /* 20124 */ "VCMPNEH_rec\0"
8413  /* 20136 */ "VCMPGTSH_rec\0"
8414  /* 20149 */ "EXTSH_rec\0"
8415  /* 20159 */ "VCMPEQUH_rec\0"
8416  /* 20172 */ "VCMPGTUH_rec\0"
8417  /* 20185 */ "VCMPNEZH_rec\0"
8418  /* 20198 */ "SRADI_rec\0"
8419  /* 20208 */ "CLRLSLDI_rec\0"
8420  /* 20221 */ "EXTLDI_rec\0"
8421  /* 20232 */ "ANDI_rec\0"
8422  /* 20241 */ "CLRRDI_rec\0"
8423  /* 20252 */ "INSRDI_rec\0"
8424  /* 20263 */ "ROTRDI_rec\0"
8425  /* 20274 */ "EXTRDI_rec\0"
8426  /* 20285 */ "MTFSFI_rec\0"
8427  /* 20296 */ "EXTSWSLI_rec\0"
8428  /* 20309 */ "RLDIMI_rec\0"
8429  /* 20320 */ "RLWIMI_rec\0"
8430  /* 20331 */ "SRAWI_rec\0"
8431  /* 20341 */ "CLRLSLWI_rec\0"
8432  /* 20354 */ "INSLWI_rec\0"
8433  /* 20365 */ "EXTLWI_rec\0"
8434  /* 20376 */ "CLRRWI_rec\0"
8435  /* 20387 */ "INSRWI_rec\0"
8436  /* 20398 */ "ROTRWI_rec\0"
8437  /* 20409 */ "EXTRWI_rec\0"
8438  /* 20420 */ "VSTRIBL_rec\0"
8439  /* 20432 */ "RLDCL_rec\0"
8440  /* 20442 */ "RLDICL_rec\0"
8441  /* 20453 */ "VSTRIHL_rec\0"
8442  /* 20465 */ "FMUL_rec\0"
8443  /* 20474 */ "RLWINM_rec\0"
8444  /* 20485 */ "RLWNM_rec\0"
8445  /* 20495 */ "BCDCFN_rec\0"
8446  /* 20506 */ "BCDCPSGN_rec\0"
8447  /* 20519 */ "BCDSETSGN_rec\0"
8448  /* 20533 */ "BCDCTN_rec\0"
8449  /* 20544 */ "ADD4O_rec\0"
8450  /* 20554 */ "ADDC8O_rec\0"
8451  /* 20565 */ "SUBFC8O_rec\0"
8452  /* 20577 */ "ADD8O_rec\0"
8453  /* 20587 */ "ADDE8O_rec\0"
8454  /* 20598 */ "SUBFE8O_rec\0"
8455  /* 20610 */ "ADDME8O_rec\0"
8456  /* 20622 */ "SUBFME8O_rec\0"
8457  /* 20635 */ "ADDZE8O_rec\0"
8458  /* 20647 */ "SUBFZE8O_rec\0"
8459  /* 20660 */ "SUBF8O_rec\0"
8460  /* 20671 */ "NEG8O_rec\0"
8461  /* 20681 */ "ADDCO_rec\0"
8462  /* 20691 */ "SUBFCO_rec\0"
8463  /* 20702 */ "MULLDO_rec\0"
8464  /* 20713 */ "DIVDO_rec\0"
8465  /* 20723 */ "ADDEO_rec\0"
8466  /* 20733 */ "DIVDEO_rec\0"
8467  /* 20744 */ "SUBFEO_rec\0"
8468  /* 20755 */ "ADDMEO_rec\0"
8469  /* 20766 */ "SUBFMEO_rec\0"
8470  /* 20778 */ "DIVWEO_rec\0"
8471  /* 20789 */ "ADDZEO_rec\0"
8472  /* 20800 */ "SUBFZEO_rec\0"
8473  /* 20812 */ "SUBFO_rec\0"
8474  /* 20822 */ "NEGO_rec\0"
8475  /* 20831 */ "DIVDUO_rec\0"
8476  /* 20842 */ "DIVDEUO_rec\0"
8477  /* 20854 */ "DIVWEUO_rec\0"
8478  /* 20866 */ "DIVWUO_rec\0"
8479  /* 20877 */ "MULLWO_rec\0"
8480  /* 20888 */ "DIVWO_rec\0"
8481  /* 20898 */ "XVCMPGEDP_rec\0"
8482  /* 20912 */ "XVCMPEQDP_rec\0"
8483  /* 20926 */ "XVCMPGTDP_rec\0"
8484  /* 20940 */ "VCMPBFP_rec\0"
8485  /* 20952 */ "VCMPGEFP_rec\0"
8486  /* 20965 */ "VCMPEQFP_rec\0"
8487  /* 20978 */ "VCMPGTFP_rec\0"
8488  /* 20991 */ "XVCMPGESP_rec\0"
8489  /* 21005 */ "XVCMPEQSP_rec\0"
8490  /* 21019 */ "FRSP_rec\0"
8491  /* 21028 */ "XVCMPGTSP_rec\0"
8492  /* 21042 */ "BCDCFSQ_rec\0"
8493  /* 21054 */ "BCDCTSQ_rec\0"
8494  /* 21066 */ "VCMPGTSQ_rec\0"
8495  /* 21079 */ "VCMPEQUQ_rec\0"
8496  /* 21092 */ "VCMPGTUQ_rec\0"
8497  /* 21105 */ "VSTRIBR_rec\0"
8498  /* 21117 */ "RLDCR_rec\0"
8499  /* 21127 */ "RLDICR_rec\0"
8500  /* 21138 */ "VSTRIHR_rec\0"
8501  /* 21150 */ "FMR_rec\0"
8502  /* 21158 */ "NOR_rec\0"
8503  /* 21166 */ "XOR_rec\0"
8504  /* 21174 */ "BCDSR_rec\0"
8505  /* 21184 */ "FSUBS_rec\0"
8506  /* 21194 */ "FMSUBS_rec\0"
8507  /* 21205 */ "FNMSUBS_rec\0"
8508  /* 21217 */ "BCDS_rec\0"
8509  /* 21226 */ "FADDS_rec\0"
8510  /* 21236 */ "FMADDS_rec\0"
8511  /* 21247 */ "FNMADDS_rec\0"
8512  /* 21259 */ "FCFIDS_rec\0"
8513  /* 21270 */ "FRES_rec\0"
8514  /* 21279 */ "FRSQRTES_rec\0"
8515  /* 21292 */ "MFFS_rec\0"
8516  /* 21301 */ "FNEGS_rec\0"
8517  /* 21311 */ "ANDIS_rec\0"
8518  /* 21321 */ "FSELS_rec\0"
8519  /* 21331 */ "FMULS_rec\0"
8520  /* 21341 */ "FRIMS_rec\0"
8521  /* 21351 */ "FCPSGNS_rec\0"
8522  /* 21363 */ "FRINS_rec\0"
8523  /* 21373 */ "FRIPS_rec\0"
8524  /* 21383 */ "FABSS_rec\0"
8525  /* 21393 */ "FNABSS_rec\0"
8526  /* 21404 */ "FSQRTS_rec\0"
8527  /* 21415 */ "BCDUS_rec\0"
8528  /* 21425 */ "FCFIDUS_rec\0"
8529  /* 21437 */ "SUBFUS_rec\0"
8530  /* 21448 */ "FDIVS_rec\0"
8531  /* 21458 */ "FRIZS_rec\0"
8532  /* 21468 */ "FSQRT_rec\0"
8533  /* 21478 */ "MULHDU_rec\0"
8534  /* 21489 */ "FCFIDU_rec\0"
8535  /* 21500 */ "FCTIDU_rec\0"
8536  /* 21511 */ "DIVDU_rec\0"
8537  /* 21521 */ "DIVDEU_rec\0"
8538  /* 21532 */ "DIVWEU_rec\0"
8539  /* 21543 */ "MULHWU_rec\0"
8540  /* 21554 */ "FCTIWU_rec\0"
8541  /* 21565 */ "DIVWU_rec\0"
8542  /* 21575 */ "FDIV_rec\0"
8543  /* 21584 */ "EQV_rec\0"
8544  /* 21592 */ "SRAW_rec\0"
8545  /* 21601 */ "VCMPNEW_rec\0"
8546  /* 21613 */ "MULHW_rec\0"
8547  /* 21623 */ "FCTIW_rec\0"
8548  /* 21633 */ "MULLW_rec\0"
8549  /* 21643 */ "SLW_rec\0"
8550  /* 21651 */ "SRW_rec\0"
8551  /* 21659 */ "VCMPGTSW_rec\0"
8552  /* 21672 */ "EXTSW_rec\0"
8553  /* 21682 */ "VCMPEQUW_rec\0"
8554  /* 21695 */ "VCMPGTUW_rec\0"
8555  /* 21708 */ "DIVW_rec\0"
8556  /* 21717 */ "VCMPNEZW_rec\0"
8557  /* 21730 */ "CNTLZW_rec\0"
8558  /* 21741 */ "CNTTZW_rec\0"
8559  /* 21752 */ "FCTIDZ_rec\0"
8560  /* 21763 */ "BCDCFZ_rec\0"
8561  /* 21774 */ "BCDCTZ_rec\0"
8562  /* 21785 */ "FCTIDUZ_rec\0"
8563  /* 21797 */ "FCTIWUZ_rec\0"
8564  /* 21809 */ "FCTIWZ_rec\0"
8565  /* 21820 */ "RLWIMIbm_rec\0"
8566  /* 21833 */ "RLWINMbm_rec\0"
8567  /* 21846 */ "RLWNMbm_rec\0"
8568  /* 21858 */ "LDtoc\0"
8569  /* 21864 */ "ADDItoc\0"
8570  /* 21872 */ "LWZtoc\0"
8571  /* 21879 */ "BCTRL8_LDinto_toc\0"
8572  /* 21897 */ "BCTRL_LWZinto_toc\0"
8573  /* 21915 */ "PLHA8pc\0"
8574  /* 21923 */ "PLWA8pc\0"
8575  /* 21931 */ "PSTB8pc\0"
8576  /* 21939 */ "PSTH8pc\0"
8577  /* 21947 */ "PADDI8pc\0"
8578  /* 21956 */ "PSTW8pc\0"
8579  /* 21964 */ "PLBZ8pc\0"
8580  /* 21972 */ "PLHZ8pc\0"
8581  /* 21980 */ "PLWZ8pc\0"
8582  /* 21988 */ "PLHApc\0"
8583  /* 21995 */ "PLWApc\0"
8584  /* 22002 */ "PSTBpc\0"
8585  /* 22009 */ "PLFDpc\0"
8586  /* 22016 */ "PSTFDpc\0"
8587  /* 22024 */ "PLDpc\0"
8588  /* 22030 */ "PLXSDpc\0"
8589  /* 22038 */ "PSTXSDpc\0"
8590  /* 22047 */ "PSTDpc\0"
8591  /* 22054 */ "PSTHpc\0"
8592  /* 22061 */ "PADDIpc\0"
8593  /* 22069 */ "PLXSSPpc\0"
8594  /* 22078 */ "PSTXSSPpc\0"
8595  /* 22088 */ "PLXVPpc\0"
8596  /* 22096 */ "PSTXVPpc\0"
8597  /* 22105 */ "PLFSpc\0"
8598  /* 22112 */ "PSTFSpc\0"
8599  /* 22120 */ "PLXVpc\0"
8600  /* 22127 */ "PSTXVpc\0"
8601  /* 22135 */ "PSTWpc\0"
8602  /* 22142 */ "PLBZpc\0"
8603  /* 22149 */ "PLHZpc\0"
8604  /* 22156 */ "PLWZpc\0"
8605  /* 22163 */ "XXLORf\0"
8606  /* 22170 */ "SETRNDi\0"
8607  /* 22178 */ "TCRETURNai\0"
8608  /* 22189 */ "TCRETURNdi\0"
8609  /* 22200 */ "TCRETURNri\0"
8610  /* 22211 */ "PADDIdtprel\0"
8611  /* 22223 */ "BDZLAm\0"
8612  /* 22230 */ "BDNZLAm\0"
8613  /* 22238 */ "BDZAm\0"
8614  /* 22244 */ "BDNZAm\0"
8615  /* 22251 */ "BDZLRLm\0"
8616  /* 22259 */ "BDNZLRLm\0"
8617  /* 22268 */ "BDZLm\0"
8618  /* 22274 */ "BDNZLm\0"
8619  /* 22281 */ "BDZLRm\0"
8620  /* 22288 */ "BDNZLRm\0"
8621  /* 22296 */ "BDZm\0"
8622  /* 22301 */ "BDNZm\0"
8623  /* 22307 */ "RLWIMIbm\0"
8624  /* 22316 */ "RLWINMbm\0"
8625  /* 22325 */ "RLWNMbm\0"
8626  /* 22333 */ "BCCTRL8n\0"
8627  /* 22342 */ "BCCTR8n\0"
8628  /* 22350 */ "BCn\0"
8629  /* 22354 */ "BCLn\0"
8630  /* 22359 */ "BCLRLn\0"
8631  /* 22366 */ "BCCTRLn\0"
8632  /* 22374 */ "BCLRn\0"
8633  /* 22380 */ "BCCTRn\0"
8634  /* 22387 */ "BDZLAp\0"
8635  /* 22394 */ "BDNZLAp\0"
8636  /* 22402 */ "BDZAp\0"
8637  /* 22408 */ "BDNZAp\0"
8638  /* 22415 */ "BDZLRLp\0"
8639  /* 22423 */ "BDNZLRLp\0"
8640  /* 22432 */ "BDZLp\0"
8641  /* 22438 */ "BDNZLp\0"
8642  /* 22445 */ "BDZLRp\0"
8643  /* 22452 */ "BDNZLRp\0"
8644  /* 22460 */ "BDZp\0"
8645  /* 22465 */ "BDNZp\0"
8646  /* 22471 */ "MTCTR8loop\0"
8647  /* 22482 */ "DecreaseCTR8loop\0"
8648  /* 22499 */ "MTCTRloop\0"
8649  /* 22509 */ "DecreaseCTRloop\0"
8650  /* 22525 */ "EH_SjLj_Setup\0"
8651  /* 22539 */ "VSPLTBs\0"
8652  /* 22547 */ "VEXTSB2Ds\0"
8653  /* 22557 */ "VEXTSH2Ds\0"
8654  /* 22567 */ "VEXTSW2Ds\0"
8655  /* 22577 */ "VSPLTHs\0"
8656  /* 22585 */ "XXPERMDIs\0"
8657  /* 22595 */ "XXSLDWIs\0"
8658  /* 22604 */ "XSNABSDPs\0"
8659  /* 22614 */ "XSCVDPSXDSs\0"
8660  /* 22626 */ "XSCVDPUXDSs\0"
8661  /* 22638 */ "XSCVDPSXWSs\0"
8662  /* 22650 */ "XSCVDPUXWSs\0"
8663  /* 22662 */ "VEXTSB2Ws\0"
8664  /* 22672 */ "VEXTSH2Ws\0"
8665  /* 22682 */ "XXSPLTWs\0"
8666  /* 22691 */ "XXLEQVOnes\0"
8667  /* 22702 */ "BCLalways\0"
8668  /* 22712 */ "gBCAat\0"
8669  /* 22719 */ "gBCLAat\0"
8670  /* 22727 */ "gBCat\0"
8671  /* 22733 */ "gBCLat\0"
8672  /* 22740 */ "MFVRSAVEv\0"
8673  /* 22750 */ "MTVRSAVEv\0"
8674  /* 22760 */ "STXSIBXv\0"
8675  /* 22769 */ "STXSIHXv\0"
8676  /* 22778 */ "LAx\0"
8677  /* 22782 */ "DCBFx\0"
8678  /* 22788 */ "DCBTx\0"
8679  /* 22794 */ "DCBTSTx\0"
8680  /* 22802 */ "XXLXORz\0"
8681  /* 22810 */ "XXLXORdpz\0"
8682  /* 22820 */ "XXLXORspz\0"
8683  /* 22830 */ "FADDrtz\0"
8684};
8685#ifdef __GNUC__
8686#pragma GCC diagnostic pop
8687#endif
8688
8689extern const unsigned PPCInstrNameIndices[] = {
8690    7121U, 8920U, 12892U, 9484U, 7702U, 7683U, 7711U, 7928U,
8691    6456U, 6471U, 6186U, 6498U, 14305U, 6027U, 15591U, 6199U,
8692    7117U, 7692U, 5759U, 18717U, 5891U, 15430U, 5171U, 5702U,
8693    5747U, 10165U, 7909U, 15314U, 5302U, 12526U, 6561U, 15303U,
8694    5927U, 11415U, 11402U, 13117U, 14940U, 15152U, 7841U, 7888U,
8695    7861U, 7735U, 13106U, 15674U, 15704U, 9194U, 4844U, 3969U,
8696    8177U, 15947U, 15960U, 8517U, 8524U, 8531U, 8541U, 5144U,
8697    13494U, 13457U, 6184U, 7119U, 17608U, 6037U, 14892U, 13893U,
8698    15467U, 13910U, 13370U, 4318U, 14288U, 15325U, 13595U, 15522U,
8699    6106U, 5251U, 4292U, 5233U, 15344U, 9172U, 13142U, 4682U,
8700    4626U, 4656U, 4667U, 4607U, 4637U, 5991U, 5975U, 14356U,
8701    6512U, 6529U, 4860U, 3975U, 5150U, 5099U, 13499U, 13463U,
8702    17395U, 9333U, 17378U, 9316U, 4783U, 3924U, 17313U, 9251U,
8703    10205U, 10183U, 5739U, 5198U, 14911U, 15445U, 4258U, 14402U,
8704    15688U, 4310U, 15292U, 15280U, 15420U, 6553U, 15667U, 6485U,
8705    15697U, 7827U, 13216U, 13202U, 7820U, 13209U, 13588U, 8073U,
8706    11230U, 11223U, 14902U, 9816U, 5787U, 9787U, 5731U, 9808U,
8707    5779U, 9779U, 5723U, 9995U, 9987U, 6653U, 6645U, 14789U,
8708    14779U, 14769U, 14759U, 14809U, 14799U, 17814U, 17824U, 14819U,
8709    14832U, 17834U, 17844U, 14845U, 14858U, 4741U, 3903U, 8104U,
8710    3494U, 4589U, 15911U, 8496U, 16796U, 7563U, 12558U, 771U,
8711    6546U, 763U, 0U, 6428U, 15659U, 4282U, 7394U, 7471U,
8712    11116U, 11125U, 13626U, 9209U, 14322U, 6122U, 8968U, 8978U,
8713    5801U, 5816U, 8946U, 8957U, 4850U, 7635U, 9285U, 17347U,
8714    9309U, 17371U, 13679U, 5224U, 5214U, 12887U, 15176U, 15204U,
8715    15183U, 13385U, 18926U, 6166U, 18884U, 6148U, 11389U, 10227U,
8716    5999U, 7833U, 14245U, 9363U, 15492U, 13356U, 15336U, 15362U,
8717    15532U, 13030U, 5878U, 4375U, 4769U, 3910U, 8132U, 15918U,
8718    8503U, 3500U, 15500U, 13161U, 13177U, 18705U, 5911U, 6070U,
8719    14997U, 10101U, 4748U, 8111U, 4724U, 8087U, 17296U, 9234U,
8720    4828U, 8161U, 5128U, 13479U, 13441U, 17330U, 9268U, 17354U,
8721    9292U, 17648U, 17655U, 1842U, 1761U, 1804U, 1782U, 1884U,
8722    1740U, 1863U, 1825U, 5325U, 4082U, 2078U, 7004U, 20208U,
8723    7533U, 20341U, 7035U, 20241U, 7577U, 20376U, 7806U, 11216U,
8724    14267U, 22782U, 14280U, 14924U, 13784U, 14931U, 13791U, 15644U,
8725    22794U, 15633U, 22788U, 672U, 1245U, 692U, 1265U, 7013U,
8726    20221U, 7556U, 20365U, 7056U, 20274U, 7598U, 20409U, 7542U,
8727    20354U, 7042U, 20252U, 7584U, 20387U, 13223U, 22778U, 17426U,
8728    18683U, 22307U, 21820U, 22316U, 21833U, 22325U, 21846U, 7049U,
8729    20263U, 7591U, 20398U, 7008U, 20212U, 7537U, 20345U, 5034U,
8730    17554U, 15619U, 18443U, 7044U, 20254U, 7586U, 20389U, 18621U,
8731    6932U, 4209U, 19629U, 14040U, 14046U, 682U, 1255U, 703U,
8732    1276U, 1322U, 9690U, 20544U, 14092U, 19171U, 2059U, 9711U,
8733    20577U, 14100U, 19018U, 19231U, 4167U, 2010U, 9696U, 20554U,
8734    19191U, 9795U, 20681U, 19601U, 5782U, 2086U, 9717U, 20587U,
8735    19250U, 9860U, 20723U, 17602U, 2880U, 19972U, 6987U, 2205U,
8736    4215U, 2029U, 19639U, 14062U, 2704U, 3351U, 95U, 3335U,
8737    3309U, 3322U, 3298U, 1918U, 8315U, 389U, 8281U, 349U,
8738    13000U, 403U, 8292U, 362U, 13015U, 420U, 21864U, 3028U,
8739    8264U, 5898U, 2099U, 9732U, 20610U, 19271U, 9880U, 20755U,
8740    20012U, 14054U, 6100U, 2114U, 9749U, 20635U, 19308U, 9902U,
8741    20789U, 20076U, 9673U, 12511U, 5073U, 2073U, 19241U, 4175U,
8742    2016U, 19201U, 19610U, 19361U, 19424U, 21311U, 20232U, 15116U,
8743    2738U, 15134U, 2757U, 19823U, 1585U, 249U, 961U, 2381U,
8744    1467U, 131U, 843U, 2269U, 1508U, 172U, 884U, 2308U,
8745    1665U, 329U, 1041U, 2467U, 1549U, 213U, 925U, 2347U,
8746    1487U, 151U, 863U, 2288U, 1625U, 289U, 1001U, 2419U,
8747    1447U, 111U, 823U, 2237U, 1644U, 308U, 1020U, 2447U,
8748    1528U, 192U, 904U, 2327U, 1605U, 269U, 981U, 2400U,
8749    1569U, 233U, 945U, 2366U, 9668U, 3556U, 3187U, 4053U,
8750    4163U, 3210U, 13569U, 2682U, 8041U, 2520U, 7665U, 3475U,
8751    13243U, 7990U, 13563U, 2675U, 22342U, 8034U, 2512U, 22333U,
8752    22366U, 22380U, 19703U, 20495U, 21042U, 21763U, 20506U, 20533U,
8753    21054U, 21774U, 20519U, 21174U, 19534U, 21217U, 19659U, 21415U,
8754    19672U, 7661U, 13238U, 7984U, 22359U, 22374U, 22702U, 22354U,
8755    13557U, 2669U, 8027U, 2505U, 21879U, 8878U, 8800U, 21897U,
8756    8899U, 8836U, 22350U, 18891U, 3016U, 3544U, 22244U, 22408U,
8757    8251U, 3487U, 22230U, 22394U, 13265U, 2621U, 8004U, 22259U,
8758    22423U, 22288U, 22452U, 22274U, 22438U, 22301U, 22465U, 18742U,
8759    3005U, 3539U, 22238U, 22402U, 8246U, 3481U, 22223U, 22387U,
8760    13259U, 2614U, 7997U, 22251U, 22415U, 22281U, 22445U, 22268U,
8761    22432U, 22296U, 22460U, 7657U, 2495U, 11360U, 8857U, 14207U,
8762    4401U, 8817U, 14186U, 8793U, 14178U, 19098U, 3465U, 1930U,
8763    11351U, 8845U, 8785U, 8810U, 13233U, 2597U, 7978U, 11382U,
8764    8868U, 8830U, 14200U, 5055U, 5321U, 6671U, 2186U, 4276U,
8765    16810U, 2836U, 4898U, 3683U, 3671U, 1948U, 5297U, 7029U,
8766    3676U, 5010U, 6997U, 16562U, 7519U, 3691U, 1954U, 16803U,
8767    7571U, 5682U, 8473U, 19950U, 17209U, 2852U, 19462U, 21730U,
8768    5695U, 8488U, 19961U, 17222U, 2860U, 19474U, 21741U, 15483U,
8769    18714U, 2990U, 19294U, 20053U, 14976U, 15006U, 5116U, 4180U,
8770    15979U, 5085U, 13344U, 15396U, 13365U, 4447U, 15023U, 15015U,
8771    13429U, 10966U, 9646U, 3185U, 6138U, 10975U, 6908U, 15574U,
8772    11004U, 14882U, 10997U, 15606U, 11012U, 18722U, 11021U, 8240U,
8773    10989U, 6937U, 5665U, 5795U, 9866U, 20733U, 15783U, 10121U,
8774    20842U, 21521U, 19981U, 9854U, 20713U, 15777U, 10114U, 20831U,
8775    21511U, 19931U, 17176U, 6086U, 9895U, 20778U, 15790U, 10129U,
8776    20854U, 21532U, 20066U, 10151U, 20888U, 15875U, 10137U, 20866U,
8777    21565U, 21708U, 13299U, 18916U, 13414U, 1701U, 80U, 7144U,
8778    1685U, 64U, 7125U, 14352U, 7921U, 15580U, 1061U, 15613U,
8779    1067U, 15652U, 1082U, 15639U, 1075U, 4392U, 2044U, 14983U,
8780    2723U, 22482U, 22509U, 13619U, 4717U, 13925U, 6273U, 7369U,
8781    4960U, 6364U, 7446U, 4975U, 12596U, 15029U, 15224U, 6339U,
8782    7403U, 18746U, 18828U, 6389U, 7480U, 18763U, 18856U, 15904U,
8783    8080U, 13633U, 6421U, 3896U, 12632U, 15057U, 15252U, 13658U,
8784    4813U, 4905U, 6281U, 7377U, 6372U, 7454U, 12605U, 15038U,
8785    15233U, 6347U, 7411U, 18837U, 6397U, 7488U, 18865U, 15932U,
8786    8146U, 13641U, 6435U, 3954U, 12641U, 15066U, 15261U, 714U,
8787    1287U, 732U, 1305U, 22525U, 15975U, 2826U, 19435U, 21584U,
8788    13673U, 16518U, 16137U, 16259U, 16198U, 16320U, 16432U, 5122U,
8789    4187U, 12624U, 14429U, 15829U, 14438U, 15838U, 16920U, 17207U,
8790    14594U, 15873U, 15985U, 3787U, 6758U, 13665U, 4820U, 6289U,
8791    7385U, 6380U, 7462U, 12614U, 15047U, 15242U, 6355U, 7419U,
8792    18846U, 6405U, 7496U, 18874U, 15939U, 8153U, 13649U, 6442U,
8793    3961U, 12650U, 15075U, 15270U, 4876U, 17528U, 6600U, 17662U,
8794    16439U, 18578U, 14699U, 18378U, 14722U, 18403U, 14735U, 18417U,
8795    5851U, 17622U, 14252U, 18362U, 15810U, 18512U, 14711U, 18391U,
8796    14748U, 18431U, 7095U, 9970U, 9960U, 7105U, 3073U, 9060U,
8797    3117U, 9104U, 3151U, 9138U, 6213U, 3215U, 16089U, 16597U,
8798    7224U, 3377U, 16149U, 16645U, 6304U, 3254U, 16113U, 16621U,
8799    16271U, 16717U, 7259U, 3416U, 16210U, 16681U, 16332U, 16753U,
8800    3085U, 9072U, 3129U, 9116U, 3163U, 9150U, 6231U, 3235U,
8801    16101U, 16609U, 7242U, 3397U, 16186U, 16669U, 6322U, 3274U,
8802    16125U, 16633U, 16308U, 16741U, 7286U, 3446U, 16247U, 16705U,
8803    16369U, 16777U, 3513U, 6222U, 3225U, 7233U, 3387U, 6313U,
8804    3264U, 7268U, 3426U, 16174U, 16657U, 16296U, 16729U, 7277U,
8805    3436U, 16235U, 16693U, 16357U, 16765U, 6240U, 3245U, 3097U,
8806    9084U, 7251U, 3407U, 3141U, 9128U, 6331U, 3284U, 3107U,
8807    9094U, 7295U, 3456U, 3175U, 9162U, 5092U, 6450U, 13350U,
8808    13402U, 4453U, 16568U, 7526U, 16445U, 7794U, 16574U, 7549U,
8809    7085U, 7428U, 14078U, 15802U, 14530U, 15861U, 4890U, 17535U,
8810    6606U, 17669U, 16452U, 18585U, 5858U, 17630U, 9928U, 18005U,
8811    6092U, 17639U, 10157U, 18014U, 16161U, 16283U, 16222U, 16344U,
8812    16474U, 16482U, 13435U, 3789U, 1961U, 1091U, 19180U, 19511U,
8813    6760U, 2191U, 1104U, 19350U, 20149U, 16959U, 7178U, 1117U,
8814    19136U, 20296U, 655U, 1145U, 19155U, 21672U, 9948U, 5420U,
8815    19871U, 14335U, 21383U, 4736U, 13756U, 21226U, 19714U, 22830U,
8816    4948U, 13777U, 21259U, 15754U, 14454U, 21425U, 21489U, 19764U,
8817    5277U, 14260U, 5616U, 14501U, 5184U, 19831U, 14231U, 21351U,
8818    4969U, 15761U, 18933U, 21785U, 21500U, 18756U, 21752U, 19774U,
8819    16526U, 15854U, 18941U, 21797U, 21554U, 18949U, 21809U, 21623U,
8820    15913U, 14524U, 21448U, 21575U, 4800U, 13762U, 21236U, 19723U,
8821    13295U, 21150U, 3941U, 13741U, 21194U, 19554U, 8099U, 14219U,
8822    21331U, 20465U, 5426U, 19881U, 14341U, 21393U, 4923U, 19744U,
8823    13954U, 21301U, 4806U, 13769U, 21247U, 19733U, 3947U, 13748U,
8824    21205U, 19564U, 5971U, 13879U, 21270U, 20033U, 5048U, 19812U,
8825    14225U, 21341U, 5192U, 19843U, 14239U, 21363U, 5291U, 19853U,
8826    14274U, 21373U, 5670U, 19940U, 14682U, 21458U, 12369U, 21019U,
8827    6019U, 13884U, 21279U, 20041U, 4997U, 19784U, 14086U, 21321U,
8828    15494U, 14447U, 21404U, 21468U, 3905U, 13735U, 21184U, 19545U,
8829    15954U, 15515U, 13056U, 452U, 17718U, 17734U, 7773U, 13043U,
8830    437U, 7755U, 7627U, 2486U, 11207U, 2544U, 15584U, 2776U,
8831    12503U, 2554U, 4954U, 6913U, 10982U, 4270U, 12666U, 14887U,
8832    14108U, 6943U, 7789U, 2499U, 4363U, 3466U, 1931U, 18127U,
8833    8194U, 18023U, 18728U, 3000U, 17793U, 15881U, 2808U, 18540U,
8834    2945U, 18658U, 2972U, 14154U, 19071U, 622U, 4987U, 18133U,
8835    8201U, 14688U, 18157U, 17766U, 15768U, 18489U, 17565U, 14123U,
8836    19036U, 8303U, 375U, 21858U, 3197U, 15402U, 7437U, 8257U,
8837    4913U, 18036U, 15728U, 18476U, 17543U, 17419U, 18676U, 13938U,
8838    15818U, 18521U, 18351U, 3294U, 1913U, 18139U, 8208U, 15718U,
8839    2784U, 18458U, 2917U, 17291U, 2868U, 18170U, 2903U, 18051U,
8840    18794U, 3011U, 17800U, 15886U, 2814U, 18546U, 2952U, 18671U,
8841    2978U, 14162U, 19080U, 633U, 7165U, 2214U, 14068U, 2711U,
8842    16580U, 12669U, 18145U, 8215U, 9831U, 7605U, 17445U, 17677U,
8843    18593U, 8068U, 13548U, 18558U, 8229U, 3520U, 18151U, 8222U,
8844    14871U, 18464U, 17440U, 664U, 490U, 18200U, 2910U, 18064U,
8845    18959U, 3023U, 17807U, 15891U, 2820U, 18552U, 2959U, 18700U,
8846    2984U, 14170U, 19089U, 644U, 21872U, 8273U, 5509U, 17584U,
8847    18650U, 18663U, 17432U, 18689U, 12398U, 18099U, 15997U, 17259U,
8848    17229U, 18338U, 17276U, 12660U, 8183U, 7965U, 12546U, 8012U,
8849    7933U, 18114U, 17466U, 17569U, 17698U, 8049U, 7950U, 18627U,
8850    17244U, 18371U, 18567U, 4935U, 15739U, 4990U, 2064U, 12864U,
8851    6248U, 13942U, 18325U, 5715U, 12938U, 2580U, 13576U, 2690U,
8852    12920U, 13932U, 9659U, 7319U, 5772U, 9651U, 7310U, 8062U,
8853    21292U, 13249U, 2602U, 13531U, 6253U, 2135U, 13304U, 13514U,
8854    2651U, 13526U, 9349U, 3807U, 1974U, 12950U, 5408U, 6052U,
8855    22740U, 18984U, 12966U, 5394U, 5016U, 18968U, 5434U, 16858U,
8856    5571U, 17051U, 4355U, 4369U, 6267U, 2151U, 13582U, 2697U,
8857    22471U, 22499U, 12932U, 9U, 57U, 6298U, 7078U, 20285U,
8858    19114U, 20106U, 19107U, 13254U, 2608U, 13537U, 5387U, 6260U,
8859    2143U, 13310U, 13520U, 2658U, 13543U, 9356U, 12958U, 5414U,
8860    6061U, 22750U, 3532U, 18991U, 12973U, 8346U, 7187U, 5401U,
8861    4882U, 8411U, 8561U, 8719U, 3524U, 9006U, 14537U, 18976U,
8862    4942U, 15747U, 21478U, 19754U, 16512U, 15847U, 21543U, 21613U,
8863    5004U, 9824U, 20702U, 19794U, 7168U, 2211U, 16556U, 10144U,
8864    20877U, 21633U, 13283U, 13272U, 2629U, 5080U, 2072U, 19240U,
8865    19822U, 10174U, 6424U, 2181U, 9773U, 20671U, 19341U, 9923U,
8866    20822U, 20116U, 11356U, 1716U, 1728U, 13340U, 2641U, 19406U,
8867    21158U, 13334U, 2642U, 19407U, 4443U, 2054U, 19222U, 19686U,
8868    7365U, 2232U, 14073U, 2717U, 21159U, 6986U, 2204U, 21947U,
8869    22211U, 22061U, 5285U, 5555U, 18727U, 2999U, 21964U, 22142U,
8870    5012U, 22024U, 4912U, 22009U, 13937U, 22105U, 3293U, 1912U,
8871    21915U, 21988U, 18793U, 3010U, 21972U, 22149U, 7174U, 2218U,
8872    3519U, 1935U, 21923U, 21995U, 18963U, 3022U, 21980U, 22156U,
8873    5508U, 22030U, 12397U, 22069U, 15996U, 12545U, 22088U, 22120U,
8874    779U, 9370U, 11237U, 9500U, 11427U, 16025U, 9425U, 11292U,
8875    9587U, 11566U, 792U, 9385U, 11252U, 9515U, 11442U, 16039U,
8876    9441U, 11308U, 9603U, 11582U, 13067U, 9399U, 11266U, 9539U,
8877    11496U, 16814U, 9456U, 11323U, 9618U, 11640U, 13078U, 9412U,
8878    11279U, 9552U, 11509U, 16826U, 9470U, 11337U, 9632U, 11654U,
8879    804U, 11456U, 13606U, 11522U, 16843U, 11668U, 16052U, 11597U,
8880    2586U, 11483U, 16077U, 11626U, 1400U, 11470U, 11537U, 16065U,
8881    11612U, 11551U, 3820U, 1980U, 5532U, 16995U, 15375U, 15384U,
8882    465U, 1157U, 518U, 1203U, 473U, 1165U, 497U, 1182U,
8883    3837U, 1989U, 21931U, 22002U, 5549U, 22047U, 4917U, 22016U,
8884    13948U, 22112U, 6798U, 2198U, 21939U, 22054U, 17029U, 2846U,
8885    21956U, 22135U, 5514U, 22038U, 12404U, 22078U, 16001U, 12551U,
8886    22096U, 22127U, 9936U, 4141U, 12980U, 15090U, 5340U, 4093U,
8887    4117U, 6959U, 6992U, 3564U, 7074U, 4955U, 6964U, 7670U,
8888    20432U, 12926U, 21117U, 4221U, 7676U, 569U, 1132U, 19122U,
8889    20442U, 12943U, 579U, 21127U, 19649U, 7203U, 20309U, 7210U,
8890    2223U, 19371U, 20320U, 8688U, 2529U, 19383U, 20474U, 8703U,
8891    2537U, 19395U, 20485U, 3842U, 4542U, 1422U, 1354U, 2158U,
8892    1377U, 2256U, 5940U, 1327U, 4459U, 4411U, 4515U, 4486U,
8893    1436U, 1367U, 2171U, 1390U, 2437U, 5954U, 1342U, 4474U,
8894    4427U, 4530U, 4502U, 3802U, 1968U, 4056U, 2003U, 12913U,
8895    2572U, 8674U, 4049U, 1995U, 12905U, 2563U, 5207U, 22170U,
8896    19991U, 3365U, 5866U, 6414U, 5831U, 15896U, 6012U, 4339U,
8897    5030U, 19804U, 16576U, 2831U, 19444U, 21643U, 18956U, 18697U,
8898    17022U, 18642U, 4153U, 12991U, 15104U, 5357U, 4106U, 4130U,
8899    5372U, 4690U, 6980U, 560U, 20198U, 19694U, 16393U, 7505U,
8900    20331U, 21592U, 5390U, 19863U, 16839U, 2841U, 19453U, 21651U,
8901    3838U, 1990U, 17759U, 17486U, 18029U, 15723U, 2790U, 18470U,
8902    2924U, 17481U, 2874U, 14115U, 19027U, 589U, 5550U, 14693U,
8903    18163U, 17772U, 17492U, 15772U, 18494U, 17597U, 14130U, 19044U,
8904    4918U, 18043U, 15733U, 18482U, 17548U, 18606U, 13949U, 15823U,
8905    18527U, 18356U, 6799U, 2199U, 18176U, 17779U, 17498U, 18057U,
8906    15797U, 2796U, 18506U, 2931U, 17713U, 2887U, 14138U, 19053U,
8907    600U, 16584U, 11397U, 12739U, 17504U, 9842U, 7610U, 17451U,
8908    17683U, 18599U, 18562U, 8234U, 17025U, 2847U, 14876U, 18206U,
8909    17786U, 17510U, 18070U, 15868U, 2802U, 18534U, 2938U, 18645U,
8910    2966U, 14146U, 19062U, 611U, 5515U, 17590U, 17458U, 22760U,
8911    17690U, 22769U, 18613U, 12405U, 18106U, 16002U, 17267U, 17236U,
8912    17283U, 8188U, 7971U, 12552U, 8019U, 7941U, 18120U, 17473U,
8913    17576U, 17705U, 8055U, 7957U, 18634U, 17251U, 18572U, 6143U,
8914    2129U, 9766U, 20660U, 19331U, 4203U, 2022U, 9703U, 20565U,
8915    19211U, 9801U, 20691U, 19619U, 5845U, 2092U, 9724U, 20598U,
8916    19260U, 9873U, 20744U, 20002U, 4227U, 2036U, 5904U, 2106U,
8917    9740U, 20622U, 19282U, 9887U, 20766U, 20022U, 9917U, 20812U,
8918    14478U, 21437U, 6115U, 2121U, 9757U, 20647U, 19319U, 9909U,
8919    20800U, 20086U, 20097U, 4342U, 15476U, 4194U, 6949U, 4545U,
8920    6970U, 3635U, 1941U, 3190U, 1904U, 13553U, 2665U, 9227U,
8921    14965U, 7620U, 14954U, 22178U, 3037U, 22189U, 3049U, 22200U,
8922    3061U, 5528U, 7063U, 5166U, 3371U, 5872U, 7728U, 17411U,
8923    4984U, 7162U, 5965U, 749U, 18332U, 816U, 4581U, 4347U,
8924    6080U, 756U, 17750U, 2893U, 10178U, 15411U, 8635U, 13544U,
8925    16983U, 7616U, 11368U, 12869U, 3849U, 6803U, 17057U, 12770U,
8926    17042U, 12798U, 8763U, 11060U, 13702U, 13998U, 14562U, 8373U,
8927    13727U, 8438U, 8607U, 14023U, 8746U, 9033U, 14586U, 5123U,
8928    4188U, 3731U, 6702U, 16880U, 3865U, 6819U, 17081U, 5054U,
8929    12682U, 18345U, 41U, 4897U, 18500U, 49U, 13098U, 15562U,
8930    3641U, 3697U, 4037U, 5676U, 8466U, 6896U, 3586U, 17201U,
8931    11028U, 20940U, 11134U, 20965U, 3887U, 19521U, 5623U, 19905U,
8932    6841U, 20159U, 12839U, 21079U, 17111U, 21682U, 11075U, 20952U,
8933    11143U, 20978U, 3778U, 19498U, 5485U, 19892U, 6749U, 20136U,
8934    12723U, 21066U, 16950U, 21659U, 4002U, 19575U, 5632U, 19918U,
8935    6861U, 20172U, 12848U, 21092U, 17143U, 21695U, 3604U, 19486U,
8936    6613U, 20124U, 16466U, 21601U, 4028U, 19588U, 6887U, 20185U,
8937    17192U, 21717U, 12716U, 12832U, 3570U, 4701U, 6592U, 16398U,
8938    14668U, 23U, 14675U, 32U, 4043U, 5689U, 8481U, 6902U,
8939    3595U, 17216U, 5448U, 12708U, 16872U, 5585U, 12824U, 17073U,
8940    5494U, 12732U, 16965U, 5641U, 12857U, 17152U, 15986U, 8327U,
8941    8401U, 8551U, 8709U, 8996U, 11090U, 17924U, 18258U, 17913U,
8942    18247U, 17943U, 18277U, 17963U, 18297U, 8354U, 5521U, 8419U,
8943    8578U, 8727U, 3991U, 6850U, 17120U, 9014U, 4554U, 22547U,
8944    16007U, 22662U, 12573U, 4563U, 22557U, 16016U, 22672U, 4572U,
8945    22567U, 17870U, 18191U, 17895U, 18229U, 17982U, 18316U, 4695U,
8946    3666U, 17862U, 18183U, 17904U, 18238U, 5471U, 17879U, 18213U,
8947    3828U, 5540U, 6789U, 17003U, 17887U, 18221U, 17934U, 18268U,
8948    16936U, 17974U, 18308U, 17954U, 18288U, 11067U, 11052U, 11152U,
8949    3795U, 5501U, 6766U, 16972U, 4011U, 5648U, 6870U, 17159U,
8950    13977U, 13987U, 11109U, 3763U, 5464U, 6734U, 16929U, 3872U,
8951    5601U, 6826U, 17096U, 8597U, 5433U, 12701U, 16857U, 5570U,
8952    12807U, 17050U, 16459U, 3612U, 6621U, 16497U, 3628U, 6628U,
8953    16541U, 16789U, 5561U, 8337U, 8569U, 14006U, 8381U, 8446U,
8954    8615U, 14031U, 12752U, 12778U, 12814U, 12743U, 3709U, 5440U,
8955    6680U, 16864U, 3857U, 5577U, 6811U, 17065U, 5456U, 16895U,
8956    5593U, 17088U, 5003U, 3770U, 5477U, 6741U, 16942U, 3879U,
8957    5608U, 6833U, 17103U, 9041U, 5093U, 13089U, 15549U, 4929U,
8958    16491U, 11036U, 13351U, 13403U, 4454U, 5284U, 8772U, 13316U,
8959    13420U, 5554U, 18085U, 14348U, 14462U, 14386U, 14485U, 14394U,
8960    14508U, 8930U, 14470U, 8938U, 14493U, 8988U, 14516U, 3658U,
8961    5062U, 6661U, 16589U, 3819U, 5531U, 6780U, 16994U, 4709U,
8962    12588U, 16406U, 11084U, 8644U, 9221U, 11177U, 18798U, 3648U,
8963    5024U, 7196U, 8681U, 6635U, 12672U, 7217U, 8695U, 16569U,
8964    7303U, 8702U, 11099U, 17999U, 7795U, 4596U, 16381U, 8069U,
8965    3653U, 5029U, 6918U, 7329U, 6640U, 9982U, 12677U, 15967U,
8966    16575U, 3812U, 22539U, 6773U, 22577U, 3746U, 6717U, 16903U,
8967    16979U, 13549U, 3558U, 4689U, 6586U, 12582U, 16392U, 3704U,
8968    5396U, 6925U, 6675U, 10109U, 12696U, 15991U, 16838U, 7652U,
8969    20420U, 12879U, 21105U, 7812U, 20453U, 13194U, 21138U, 12762U,
8970    17034U, 12789U, 8754U, 11045U, 13694U, 13969U, 14554U, 8365U,
8971    13719U, 8430U, 8589U, 14015U, 8738U, 9025U, 14578U, 14545U,
8972    13685U, 13960U, 13710U, 14570U, 18077U, 3738U, 6709U, 16887U,
8973    18091U, 3755U, 6726U, 16912U, 13436U, 16U, 3550U, 6578U,
8974    13866U, 3717U, 6688U, 15085U, 5839U, 7067U, 13410U, 2646U,
8975    19415U, 7364U, 2231U, 14072U, 2716U, 21166U, 10813U, 11913U,
8976    10373U, 11758U, 10064U, 12077U, 10775U, 11876U, 10746U, 11856U,
8977    10429U, 11784U, 10829U, 11921U, 10683U, 11829U, 10887U, 11940U,
8978    10647U, 11819U, 11159U, 11838U, 12314U, 9577U, 13800U, 22614U,
8979    14602U, 22638U, 13833U, 22626U, 14635U, 22650U, 10692U, 10701U,
8980    10003U, 18773U, 18896U, 18998U, 18783U, 18906U, 19008U, 11766U,
8981    10710U, 9529U, 11886U, 10389U, 12093U, 11775U, 11895U, 10409U,
8982    12113U, 10896U, 11949U, 10092U, 12450U, 10728U, 11847U, 10299U,
8983    12021U, 10627U, 12276U, 11749U, 10054U, 10364U, 11730U, 10950U,
8984    10538U, 10355U, 11721U, 10667U, 10529U, 10257U, 11979U, 10585U,
8985    12234U, 11694U, 10024U, 10547U, 11811U, 10073U, 12196U, 10795U,
8986    22604U, 11904U, 10485U, 11794U, 10277U, 11999U, 10605U, 12254U,
8987    11739U, 10043U, 10235U, 11957U, 10563U, 12212U, 11684U, 10013U,
8988    7336U, 4234U, 8650U, 11183U, 18804U, 10449U, 12143U, 7350U,
8989    17854U, 12565U, 12374U, 10463U, 12157U, 10849U, 11931U, 10082U,
8990    12422U, 10319U, 11703U, 10034U, 12041U, 10904U, 10858U, 10335U,
8991    11711U, 12057U, 10757U, 11867U, 10501U, 11802U, 10821U, 12389U,
8992    10381U, 12085U, 781U, 9372U, 11239U, 9502U, 11429U, 16027U,
8993    9427U, 11294U, 9589U, 11568U, 10785U, 20912U, 12359U, 21005U,
8994    10439U, 20898U, 12133U, 20991U, 10839U, 20926U, 12412U, 21028U,
8995    10657U, 12296U, 9565U, 12323U, 13811U, 14613U, 13844U, 14646U,
8996    12332U, 1411U, 10719U, 11168U, 13822U, 14624U, 13855U, 14657U,
8997    10399U, 12103U, 10930U, 12475U, 10419U, 12123U, 10940U, 12485U,
8998    10922U, 12467U, 794U, 9387U, 11254U, 9517U, 11444U, 16041U,
8999    9443U, 11310U, 9605U, 11584U, 13069U, 9401U, 11268U, 9541U,
9000    11498U, 16816U, 9458U, 11325U, 9620U, 11642U, 13080U, 9414U,
9001    11281U, 9554U, 11511U, 16828U, 9472U, 11339U, 9634U, 11656U,
9002    806U, 11458U, 13608U, 11524U, 16845U, 11670U, 16054U, 11599U,
9003    2588U, 11485U, 16079U, 11628U, 1402U, 11472U, 11539U, 16067U,
9004    11614U, 11553U, 10737U, 12341U, 10309U, 12031U, 10637U, 12286U,
9005    10958U, 12495U, 10675U, 12306U, 10267U, 11989U, 10595U, 12244U,
9006    10555U, 12204U, 10804U, 12380U, 10493U, 12179U, 10288U, 12010U,
9007    10616U, 12265U, 10246U, 11968U, 10574U, 12223U, 7343U, 4242U,
9008    8658U, 11191U, 18812U, 10456U, 12150U, 7357U, 4250U, 8666U,
9009    11199U, 18820U, 10474U, 12168U, 10878U, 12441U, 10327U, 12049U,
9010    10913U, 12458U, 3578U, 10868U, 12431U, 10345U, 12067U, 10766U,
9011    12350U, 10510U, 12187U, 4018U, 5655U, 6877U, 17166U, 5319U,
9012    6669U, 12690U, 16808U, 7645U, 17131U, 8390U, 8455U, 8624U,
9013    9049U, 17012U, 5070U, 4172U, 15972U, 22691U, 5077U, 13337U,
9014    13331U, 4440U, 22163U, 13407U, 22810U, 22820U, 22802U, 4066U,
9015    16414U, 16504U, 16548U, 4074U, 16423U, 8778U, 7020U, 22585U,
9016    13323U, 17991U, 7800U, 18732U, 17181U, 7511U, 22595U, 17516U,
9017    3619U, 10519U, 16532U, 16986U, 22682U, 4062U, 3205U, 22712U,
9018    13562U, 8033U, 7660U, 3469U, 22719U, 13237U, 7983U, 22733U,
9019    22727U,
9020};
9021
9022extern const uint8_t PPCInstrDeprecationFeatures[] = {
9023    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9024    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9025    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9026    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9027    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9028    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9029    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9030    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9031    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9032    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9033    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9034    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9035    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9036    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9037    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9038    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9039    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9040    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9041    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9042    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9043    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9044    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9045    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9046    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9047    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9048    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9049    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9050    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9051    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9052    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9053    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9054    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9055    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9056    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9057    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9058    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9059    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9060    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9061    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9062    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9063    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9064    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9065    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9066    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9067    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9068    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9069    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9070    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9071    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9072    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9073    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9074    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9075    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9076    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9077    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9078    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9079    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9080    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9081    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9082    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9083    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9084    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9085    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9086    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9087    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9088    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9089    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9090    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9091    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9092    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9093    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9094    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9095    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9096    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9097    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9098    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9099    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9100    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9101    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9102    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9103    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9104    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9105    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9106    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9107    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9108    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9109    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9110    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9111    uint8_t(-1), uint8_t(-1), uint8_t(-1), PPC::DeprecatedDST, PPC::DeprecatedDST, PPC::DeprecatedDST, PPC::DeprecatedDST, PPC::DeprecatedDST,
9112    PPC::DeprecatedDST, PPC::DeprecatedDST, PPC::DeprecatedDST, PPC::DeprecatedDST, PPC::DeprecatedDST, uint8_t(-1), uint8_t(-1), uint8_t(-1),
9113    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9114    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9115    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9116    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9117    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9118    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9119    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9120    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9121    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9122    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9123    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9124    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9125    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9126    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9127    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9128    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9129    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9130    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9131    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9132    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9133    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9134    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9135    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9136    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9137    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9138    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9139    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9140    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9141    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9142    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9143    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9144    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9145    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9146    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9147    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9148    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9149    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9150    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9151    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9152    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9153    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9154    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9155    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9156    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9157    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9158    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9159    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9160    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9161    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9162    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9163    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9164    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9165    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9166    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9167    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9168    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9169    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9170    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9171    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9172    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9173    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9174    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9175    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9176    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9177    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9178    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9179    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9180    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9181    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9182    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9183    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9184    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9185    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9186    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9187    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9188    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9189    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9190    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9191    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9192    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9193    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9194    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9195    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9196    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9197    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9198    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9199    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9200    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9201    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9202    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9203    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9204    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9205    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9206    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9207    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9208    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9209    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9210    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9211    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9212    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9213    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9214    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9215    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9216    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9217    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9218    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9219    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9220    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9221    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9222    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9223    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9224    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9225    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9226    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9227    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9228    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9229    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9230    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9231    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9232    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9233    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9234    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9235    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9236    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9237    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9238    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9239    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9240    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9241    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9242    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9243    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9244    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9245    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9246    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9247    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9248    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9249    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9250    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9251    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9252    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9253    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9254    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9255    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9256    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9257    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9258    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9259    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9260    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9261    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9262    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9263    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9264    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9265    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9266    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9267    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9268    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9269    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9270    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9271    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9272    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9273    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9274    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9275    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9276    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9277    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9278    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9279    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9280    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9281    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9282    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9283    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9284    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9285    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9286    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9287    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9288    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9289    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9290    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9291    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9292    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9293    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9294    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9295    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9296    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9297    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9298    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9299    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9300    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9301    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9302    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9303    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9304    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9305    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9306    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9307    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9308    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9309    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9310    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9311    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9312    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9313    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9314    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9315    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9316    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9317    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9318    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9319    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9320    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9321    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9322    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9323    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9324    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9325    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9326    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9327    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9328    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9329    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9330    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9331    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9332    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9333    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9334    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9335    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9336    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9337    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9338    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9339    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9340    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9341    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9342    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9343    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9344    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9345    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9346    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9347    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9348    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9349    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9350    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9351    uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9352    uint8_t(-1),
9353};
9354
9355static inline void InitPPCMCInstrInfo(MCInstrInfo *II) {
9356  II->InitMCInstrInfo(PPCInsts, PPCInstrNameIndices, PPCInstrNameData, PPCInstrDeprecationFeatures, nullptr, 2633);
9357}
9358
9359} // end namespace llvm
9360#endif // GET_INSTRINFO_MC_DESC
9361
9362#ifdef GET_INSTRINFO_HEADER
9363#undef GET_INSTRINFO_HEADER
9364namespace llvm {
9365struct PPCGenInstrInfo : public TargetInstrInfo {
9366  explicit PPCGenInstrInfo(unsigned CFSetupOpcode = ~0u, unsigned CFDestroyOpcode = ~0u, unsigned CatchRetOpcode = ~0u, unsigned ReturnOpcode = ~0u);
9367  ~PPCGenInstrInfo() override = default;
9368
9369};
9370} // end namespace llvm
9371#endif // GET_INSTRINFO_HEADER
9372
9373#ifdef GET_INSTRINFO_HELPER_DECLS
9374#undef GET_INSTRINFO_HELPER_DECLS
9375
9376
9377#endif // GET_INSTRINFO_HELPER_DECLS
9378
9379#ifdef GET_INSTRINFO_HELPERS
9380#undef GET_INSTRINFO_HELPERS
9381
9382#endif // GET_INSTRINFO_HELPERS
9383
9384#ifdef GET_INSTRINFO_CTOR_DTOR
9385#undef GET_INSTRINFO_CTOR_DTOR
9386namespace llvm {
9387extern const MCInstrDesc PPCInsts[];
9388extern const unsigned PPCInstrNameIndices[];
9389extern const char PPCInstrNameData[];
9390extern const uint8_t PPCInstrDeprecationFeatures[];
9391PPCGenInstrInfo::PPCGenInstrInfo(unsigned CFSetupOpcode, unsigned CFDestroyOpcode, unsigned CatchRetOpcode, unsigned ReturnOpcode)
9392  : TargetInstrInfo(CFSetupOpcode, CFDestroyOpcode, CatchRetOpcode, ReturnOpcode) {
9393  InitMCInstrInfo(PPCInsts, PPCInstrNameIndices, PPCInstrNameData, PPCInstrDeprecationFeatures, nullptr, 2633);
9394}
9395} // end namespace llvm
9396#endif // GET_INSTRINFO_CTOR_DTOR
9397
9398#ifdef GET_INSTRINFO_OPERAND_ENUM
9399#undef GET_INSTRINFO_OPERAND_ENUM
9400namespace llvm {
9401namespace PPC {
9402namespace OpName {
9403enum {
9404  OPERAND_LAST
9405};
9406} // end namespace OpName
9407} // end namespace PPC
9408} // end namespace llvm
9409#endif //GET_INSTRINFO_OPERAND_ENUM
9410
9411#ifdef GET_INSTRINFO_NAMED_OPS
9412#undef GET_INSTRINFO_NAMED_OPS
9413namespace llvm {
9414namespace PPC {
9415LLVM_READONLY
9416int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIdx) {
9417  return -1;
9418}
9419} // end namespace PPC
9420} // end namespace llvm
9421#endif //GET_INSTRINFO_NAMED_OPS
9422
9423#ifdef GET_INSTRINFO_OPERAND_TYPES_ENUM
9424#undef GET_INSTRINFO_OPERAND_TYPES_ENUM
9425namespace llvm {
9426namespace PPC {
9427namespace OpTypes {
9428enum OperandType {
9429  abscalltarget = 0,
9430  abscondbrtarget = 1,
9431  absdirectbrtarget = 2,
9432  atimm = 3,
9433  calltarget = 4,
9434  condbrtarget = 5,
9435  crbitm = 6,
9436  directbrtarget = 7,
9437  dispRI = 8,
9438  dispRI34 = 9,
9439  dispRIHash = 10,
9440  dispRIX = 11,
9441  dispRIX16 = 12,
9442  dispSPE2 = 13,
9443  dispSPE4 = 14,
9444  dispSPE8 = 15,
9445  f32imm = 16,
9446  f64imm = 17,
9447  i16imm = 18,
9448  i1imm = 19,
9449  i32imm = 20,
9450  i64imm = 21,
9451  i8imm = 22,
9452  imm32SExt16 = 23,
9453  imm64SExt16 = 24,
9454  imm64ZExt32 = 25,
9455  immZero = 26,
9456  memr = 27,
9457  memri = 28,
9458  memri34 = 29,
9459  memri34_pcrel = 30,
9460  memrihash = 31,
9461  memrix = 32,
9462  memrix16 = 33,
9463  memrr = 34,
9464  pred = 35,
9465  ptr_rc_idx = 36,
9466  ptr_rc_nor0 = 37,
9467  ptype0 = 38,
9468  ptype1 = 39,
9469  ptype2 = 40,
9470  ptype3 = 41,
9471  ptype4 = 42,
9472  ptype5 = 43,
9473  s16imm = 44,
9474  s16imm64 = 45,
9475  s17imm = 46,
9476  s17imm64 = 47,
9477  s34imm = 48,
9478  s34imm_pcrel = 49,
9479  s5imm = 50,
9480  spe2dis = 51,
9481  spe4dis = 52,
9482  spe8dis = 53,
9483  tlscall = 54,
9484  tlscall32 = 55,
9485  tlsgd = 56,
9486  tlsgd32 = 57,
9487  tlsreg = 58,
9488  tlsreg32 = 59,
9489  tocentry = 60,
9490  tocentry32 = 61,
9491  type0 = 62,
9492  type1 = 63,
9493  type2 = 64,
9494  type3 = 65,
9495  type4 = 66,
9496  type5 = 67,
9497  u10imm = 68,
9498  u12imm = 69,
9499  u16imm = 70,
9500  u16imm64 = 71,
9501  u1imm = 72,
9502  u2imm = 73,
9503  u3imm = 74,
9504  u4imm = 75,
9505  u5imm = 76,
9506  u6imm = 77,
9507  u7imm = 78,
9508  u8imm = 79,
9509  untyped_imm_0 = 80,
9510  acc = 81,
9511  crbitrc = 82,
9512  crrc = 83,
9513  dmr = 84,
9514  dmrp = 85,
9515  dmrrow = 86,
9516  dmrrowp = 87,
9517  f4rc = 88,
9518  f8rc = 89,
9519  g8prc = 90,
9520  g8rc = 91,
9521  g8rc_nox0 = 92,
9522  gprc = 93,
9523  gprc_nor0 = 94,
9524  spe4rc = 95,
9525  sperc = 96,
9526  spilltovsrrc = 97,
9527  uacc = 98,
9528  vfrc = 99,
9529  vrrc = 100,
9530  vsfrc = 101,
9531  vsrc = 102,
9532  vsrpevenrc = 103,
9533  vsrprc = 104,
9534  vssrc = 105,
9535  wacc = 106,
9536  wacc_hi = 107,
9537  ACCRC = 108,
9538  CARRYRC = 109,
9539  CRBITRC = 110,
9540  CRRC = 111,
9541  CTRRC = 112,
9542  CTRRC8 = 113,
9543  DMRRC = 114,
9544  DMRROWRC = 115,
9545  DMRROWpRC = 116,
9546  DMRpRC = 117,
9547  F4RC = 118,
9548  F8RC = 119,
9549  G8RC = 120,
9550  G8RC_NOX0 = 121,
9551  G8pRC = 122,
9552  GPRC = 123,
9553  GPRC_NOR0 = 124,
9554  LR8RC = 125,
9555  LRRC = 126,
9556  SPERC = 127,
9557  SPILLTOVSRRC = 128,
9558  UACCRC = 129,
9559  VFRC = 130,
9560  VRRC = 131,
9561  VRSAVERC = 132,
9562  VSFRC = 133,
9563  VSLRC = 134,
9564  VSRC = 135,
9565  VSRpRC = 136,
9566  VSSRC = 137,
9567  WACCRC = 138,
9568  WACC_HIRC = 139,
9569  OPERAND_TYPE_LIST_END
9570};
9571} // end namespace OpTypes
9572} // end namespace PPC
9573} // end namespace llvm
9574#endif // GET_INSTRINFO_OPERAND_TYPES_ENUM
9575
9576#ifdef GET_INSTRINFO_OPERAND_TYPE
9577#undef GET_INSTRINFO_OPERAND_TYPE
9578namespace llvm {
9579namespace PPC {
9580LLVM_READONLY
9581static int getOperandType(uint16_t Opcode, uint16_t OpIdx) {
9582  const uint16_t Offsets[] = {
9583    /* PHI */
9584    0,
9585    /* INLINEASM */
9586    1,
9587    /* INLINEASM_BR */
9588    1,
9589    /* CFI_INSTRUCTION */
9590    1,
9591    /* EH_LABEL */
9592    2,
9593    /* GC_LABEL */
9594    3,
9595    /* ANNOTATION_LABEL */
9596    4,
9597    /* KILL */
9598    5,
9599    /* EXTRACT_SUBREG */
9600    5,
9601    /* INSERT_SUBREG */
9602    8,
9603    /* IMPLICIT_DEF */
9604    12,
9605    /* SUBREG_TO_REG */
9606    13,
9607    /* COPY_TO_REGCLASS */
9608    17,
9609    /* DBG_VALUE */
9610    20,
9611    /* DBG_VALUE_LIST */
9612    20,
9613    /* DBG_INSTR_REF */
9614    20,
9615    /* DBG_PHI */
9616    20,
9617    /* DBG_LABEL */
9618    20,
9619    /* REG_SEQUENCE */
9620    21,
9621    /* COPY */
9622    23,
9623    /* BUNDLE */
9624    25,
9625    /* LIFETIME_START */
9626    25,
9627    /* LIFETIME_END */
9628    26,
9629    /* PSEUDO_PROBE */
9630    27,
9631    /* ARITH_FENCE */
9632    31,
9633    /* STACKMAP */
9634    33,
9635    /* FENTRY_CALL */
9636    35,
9637    /* PATCHPOINT */
9638    35,
9639    /* LOAD_STACK_GUARD */
9640    41,
9641    /* PREALLOCATED_SETUP */
9642    42,
9643    /* PREALLOCATED_ARG */
9644    43,
9645    /* STATEPOINT */
9646    46,
9647    /* LOCAL_ESCAPE */
9648    46,
9649    /* FAULTING_OP */
9650    48,
9651    /* PATCHABLE_OP */
9652    49,
9653    /* PATCHABLE_FUNCTION_ENTER */
9654    49,
9655    /* PATCHABLE_RET */
9656    49,
9657    /* PATCHABLE_FUNCTION_EXIT */
9658    49,
9659    /* PATCHABLE_TAIL_CALL */
9660    49,
9661    /* PATCHABLE_EVENT_CALL */
9662    49,
9663    /* PATCHABLE_TYPED_EVENT_CALL */
9664    51,
9665    /* ICALL_BRANCH_FUNNEL */
9666    54,
9667    /* MEMBARRIER */
9668    54,
9669    /* G_ASSERT_SEXT */
9670    54,
9671    /* G_ASSERT_ZEXT */
9672    57,
9673    /* G_ASSERT_ALIGN */
9674    60,
9675    /* G_ADD */
9676    63,
9677    /* G_SUB */
9678    66,
9679    /* G_MUL */
9680    69,
9681    /* G_SDIV */
9682    72,
9683    /* G_UDIV */
9684    75,
9685    /* G_SREM */
9686    78,
9687    /* G_UREM */
9688    81,
9689    /* G_SDIVREM */
9690    84,
9691    /* G_UDIVREM */
9692    88,
9693    /* G_AND */
9694    92,
9695    /* G_OR */
9696    95,
9697    /* G_XOR */
9698    98,
9699    /* G_IMPLICIT_DEF */
9700    101,
9701    /* G_PHI */
9702    102,
9703    /* G_FRAME_INDEX */
9704    103,
9705    /* G_GLOBAL_VALUE */
9706    105,
9707    /* G_EXTRACT */
9708    107,
9709    /* G_UNMERGE_VALUES */
9710    110,
9711    /* G_INSERT */
9712    112,
9713    /* G_MERGE_VALUES */
9714    116,
9715    /* G_BUILD_VECTOR */
9716    118,
9717    /* G_BUILD_VECTOR_TRUNC */
9718    120,
9719    /* G_CONCAT_VECTORS */
9720    122,
9721    /* G_PTRTOINT */
9722    124,
9723    /* G_INTTOPTR */
9724    126,
9725    /* G_BITCAST */
9726    128,
9727    /* G_FREEZE */
9728    130,
9729    /* G_INTRINSIC_FPTRUNC_ROUND */
9730    132,
9731    /* G_INTRINSIC_TRUNC */
9732    135,
9733    /* G_INTRINSIC_ROUND */
9734    137,
9735    /* G_INTRINSIC_LRINT */
9736    139,
9737    /* G_INTRINSIC_ROUNDEVEN */
9738    141,
9739    /* G_READCYCLECOUNTER */
9740    143,
9741    /* G_LOAD */
9742    144,
9743    /* G_SEXTLOAD */
9744    146,
9745    /* G_ZEXTLOAD */
9746    148,
9747    /* G_INDEXED_LOAD */
9748    150,
9749    /* G_INDEXED_SEXTLOAD */
9750    155,
9751    /* G_INDEXED_ZEXTLOAD */
9752    160,
9753    /* G_STORE */
9754    165,
9755    /* G_INDEXED_STORE */
9756    167,
9757    /* G_ATOMIC_CMPXCHG_WITH_SUCCESS */
9758    172,
9759    /* G_ATOMIC_CMPXCHG */
9760    177,
9761    /* G_ATOMICRMW_XCHG */
9762    181,
9763    /* G_ATOMICRMW_ADD */
9764    184,
9765    /* G_ATOMICRMW_SUB */
9766    187,
9767    /* G_ATOMICRMW_AND */
9768    190,
9769    /* G_ATOMICRMW_NAND */
9770    193,
9771    /* G_ATOMICRMW_OR */
9772    196,
9773    /* G_ATOMICRMW_XOR */
9774    199,
9775    /* G_ATOMICRMW_MAX */
9776    202,
9777    /* G_ATOMICRMW_MIN */
9778    205,
9779    /* G_ATOMICRMW_UMAX */
9780    208,
9781    /* G_ATOMICRMW_UMIN */
9782    211,
9783    /* G_ATOMICRMW_FADD */
9784    214,
9785    /* G_ATOMICRMW_FSUB */
9786    217,
9787    /* G_ATOMICRMW_FMAX */
9788    220,
9789    /* G_ATOMICRMW_FMIN */
9790    223,
9791    /* G_ATOMICRMW_UINC_WRAP */
9792    226,
9793    /* G_ATOMICRMW_UDEC_WRAP */
9794    229,
9795    /* G_FENCE */
9796    232,
9797    /* G_BRCOND */
9798    234,
9799    /* G_BRINDIRECT */
9800    236,
9801    /* G_INVOKE_REGION_START */
9802    237,
9803    /* G_INTRINSIC */
9804    237,
9805    /* G_INTRINSIC_W_SIDE_EFFECTS */
9806    238,
9807    /* G_ANYEXT */
9808    239,
9809    /* G_TRUNC */
9810    241,
9811    /* G_CONSTANT */
9812    243,
9813    /* G_FCONSTANT */
9814    245,
9815    /* G_VASTART */
9816    247,
9817    /* G_VAARG */
9818    248,
9819    /* G_SEXT */
9820    251,
9821    /* G_SEXT_INREG */
9822    253,
9823    /* G_ZEXT */
9824    256,
9825    /* G_SHL */
9826    258,
9827    /* G_LSHR */
9828    261,
9829    /* G_ASHR */
9830    264,
9831    /* G_FSHL */
9832    267,
9833    /* G_FSHR */
9834    271,
9835    /* G_ROTR */
9836    275,
9837    /* G_ROTL */
9838    278,
9839    /* G_ICMP */
9840    281,
9841    /* G_FCMP */
9842    285,
9843    /* G_SELECT */
9844    289,
9845    /* G_UADDO */
9846    293,
9847    /* G_UADDE */
9848    297,
9849    /* G_USUBO */
9850    302,
9851    /* G_USUBE */
9852    306,
9853    /* G_SADDO */
9854    311,
9855    /* G_SADDE */
9856    315,
9857    /* G_SSUBO */
9858    320,
9859    /* G_SSUBE */
9860    324,
9861    /* G_UMULO */
9862    329,
9863    /* G_SMULO */
9864    333,
9865    /* G_UMULH */
9866    337,
9867    /* G_SMULH */
9868    340,
9869    /* G_UADDSAT */
9870    343,
9871    /* G_SADDSAT */
9872    346,
9873    /* G_USUBSAT */
9874    349,
9875    /* G_SSUBSAT */
9876    352,
9877    /* G_USHLSAT */
9878    355,
9879    /* G_SSHLSAT */
9880    358,
9881    /* G_SMULFIX */
9882    361,
9883    /* G_UMULFIX */
9884    365,
9885    /* G_SMULFIXSAT */
9886    369,
9887    /* G_UMULFIXSAT */
9888    373,
9889    /* G_SDIVFIX */
9890    377,
9891    /* G_UDIVFIX */
9892    381,
9893    /* G_SDIVFIXSAT */
9894    385,
9895    /* G_UDIVFIXSAT */
9896    389,
9897    /* G_FADD */
9898    393,
9899    /* G_FSUB */
9900    396,
9901    /* G_FMUL */
9902    399,
9903    /* G_FMA */
9904    402,
9905    /* G_FMAD */
9906    406,
9907    /* G_FDIV */
9908    410,
9909    /* G_FREM */
9910    413,
9911    /* G_FPOW */
9912    416,
9913    /* G_FPOWI */
9914    419,
9915    /* G_FEXP */
9916    422,
9917    /* G_FEXP2 */
9918    424,
9919    /* G_FLOG */
9920    426,
9921    /* G_FLOG2 */
9922    428,
9923    /* G_FLOG10 */
9924    430,
9925    /* G_FNEG */
9926    432,
9927    /* G_FPEXT */
9928    434,
9929    /* G_FPTRUNC */
9930    436,
9931    /* G_FPTOSI */
9932    438,
9933    /* G_FPTOUI */
9934    440,
9935    /* G_SITOFP */
9936    442,
9937    /* G_UITOFP */
9938    444,
9939    /* G_FABS */
9940    446,
9941    /* G_FCOPYSIGN */
9942    448,
9943    /* G_IS_FPCLASS */
9944    451,
9945    /* G_FCANONICALIZE */
9946    454,
9947    /* G_FMINNUM */
9948    456,
9949    /* G_FMAXNUM */
9950    459,
9951    /* G_FMINNUM_IEEE */
9952    462,
9953    /* G_FMAXNUM_IEEE */
9954    465,
9955    /* G_FMINIMUM */
9956    468,
9957    /* G_FMAXIMUM */
9958    471,
9959    /* G_PTR_ADD */
9960    474,
9961    /* G_PTRMASK */
9962    477,
9963    /* G_SMIN */
9964    480,
9965    /* G_SMAX */
9966    483,
9967    /* G_UMIN */
9968    486,
9969    /* G_UMAX */
9970    489,
9971    /* G_ABS */
9972    492,
9973    /* G_LROUND */
9974    494,
9975    /* G_LLROUND */
9976    496,
9977    /* G_BR */
9978    498,
9979    /* G_BRJT */
9980    499,
9981    /* G_INSERT_VECTOR_ELT */
9982    502,
9983    /* G_EXTRACT_VECTOR_ELT */
9984    506,
9985    /* G_SHUFFLE_VECTOR */
9986    509,
9987    /* G_CTTZ */
9988    513,
9989    /* G_CTTZ_ZERO_UNDEF */
9990    515,
9991    /* G_CTLZ */
9992    517,
9993    /* G_CTLZ_ZERO_UNDEF */
9994    519,
9995    /* G_CTPOP */
9996    521,
9997    /* G_BSWAP */
9998    523,
9999    /* G_BITREVERSE */
10000    525,
10001    /* G_FCEIL */
10002    527,
10003    /* G_FCOS */
10004    529,
10005    /* G_FSIN */
10006    531,
10007    /* G_FSQRT */
10008    533,
10009    /* G_FFLOOR */
10010    535,
10011    /* G_FRINT */
10012    537,
10013    /* G_FNEARBYINT */
10014    539,
10015    /* G_ADDRSPACE_CAST */
10016    541,
10017    /* G_BLOCK_ADDR */
10018    543,
10019    /* G_JUMP_TABLE */
10020    545,
10021    /* G_DYN_STACKALLOC */
10022    547,
10023    /* G_STRICT_FADD */
10024    550,
10025    /* G_STRICT_FSUB */
10026    553,
10027    /* G_STRICT_FMUL */
10028    556,
10029    /* G_STRICT_FDIV */
10030    559,
10031    /* G_STRICT_FREM */
10032    562,
10033    /* G_STRICT_FMA */
10034    565,
10035    /* G_STRICT_FSQRT */
10036    569,
10037    /* G_READ_REGISTER */
10038    571,
10039    /* G_WRITE_REGISTER */
10040    573,
10041    /* G_MEMCPY */
10042    575,
10043    /* G_MEMCPY_INLINE */
10044    579,
10045    /* G_MEMMOVE */
10046    582,
10047    /* G_MEMSET */
10048    586,
10049    /* G_BZERO */
10050    590,
10051    /* G_VECREDUCE_SEQ_FADD */
10052    593,
10053    /* G_VECREDUCE_SEQ_FMUL */
10054    596,
10055    /* G_VECREDUCE_FADD */
10056    599,
10057    /* G_VECREDUCE_FMUL */
10058    601,
10059    /* G_VECREDUCE_FMAX */
10060    603,
10061    /* G_VECREDUCE_FMIN */
10062    605,
10063    /* G_VECREDUCE_ADD */
10064    607,
10065    /* G_VECREDUCE_MUL */
10066    609,
10067    /* G_VECREDUCE_AND */
10068    611,
10069    /* G_VECREDUCE_OR */
10070    613,
10071    /* G_VECREDUCE_XOR */
10072    615,
10073    /* G_VECREDUCE_SMAX */
10074    617,
10075    /* G_VECREDUCE_SMIN */
10076    619,
10077    /* G_VECREDUCE_UMAX */
10078    621,
10079    /* G_VECREDUCE_UMIN */
10080    623,
10081    /* G_SBFX */
10082    625,
10083    /* G_UBFX */
10084    629,
10085    /* ATOMIC_CMP_SWAP_I128 */
10086    633,
10087    /* ATOMIC_LOAD_ADD_I128 */
10088    641,
10089    /* ATOMIC_LOAD_AND_I128 */
10090    647,
10091    /* ATOMIC_LOAD_NAND_I128 */
10092    653,
10093    /* ATOMIC_LOAD_OR_I128 */
10094    659,
10095    /* ATOMIC_LOAD_SUB_I128 */
10096    665,
10097    /* ATOMIC_LOAD_XOR_I128 */
10098    671,
10099    /* ATOMIC_SWAP_I128 */
10100    677,
10101    /* BUILD_QUADWORD */
10102    683,
10103    /* BUILD_UACC */
10104    686,
10105    /* CFENCE8 */
10106    688,
10107    /* CLRLSLDI */
10108    689,
10109    /* CLRLSLDI_rec */
10110    693,
10111    /* CLRLSLWI */
10112    697,
10113    /* CLRLSLWI_rec */
10114    701,
10115    /* CLRRDI */
10116    705,
10117    /* CLRRDI_rec */
10118    708,
10119    /* CLRRWI */
10120    711,
10121    /* CLRRWI_rec */
10122    714,
10123    /* DCBFL */
10124    717,
10125    /* DCBFLP */
10126    719,
10127    /* DCBFPS */
10128    721,
10129    /* DCBFx */
10130    723,
10131    /* DCBSTPS */
10132    725,
10133    /* DCBTCT */
10134    727,
10135    /* DCBTDS */
10136    730,
10137    /* DCBTSTCT */
10138    733,
10139    /* DCBTSTDS */
10140    736,
10141    /* DCBTSTT */
10142    739,
10143    /* DCBTSTx */
10144    741,
10145    /* DCBTT */
10146    743,
10147    /* DCBTx */
10148    745,
10149    /* DFLOADf32 */
10150    747,
10151    /* DFLOADf64 */
10152    750,
10153    /* DFSTOREf32 */
10154    753,
10155    /* DFSTOREf64 */
10156    756,
10157    /* EXTLDI */
10158    759,
10159    /* EXTLDI_rec */
10160    763,
10161    /* EXTLWI */
10162    767,
10163    /* EXTLWI_rec */
10164    771,
10165    /* EXTRDI */
10166    775,
10167    /* EXTRDI_rec */
10168    779,
10169    /* EXTRWI */
10170    783,
10171    /* EXTRWI_rec */
10172    787,
10173    /* INSLWI */
10174    791,
10175    /* INSLWI_rec */
10176    795,
10177    /* INSRDI */
10178    799,
10179    /* INSRDI_rec */
10180    803,
10181    /* INSRWI */
10182    807,
10183    /* INSRWI_rec */
10184    811,
10185    /* KILL_PAIR */
10186    815,
10187    /* LAx */
10188    817,
10189    /* LIWAX */
10190    820,
10191    /* LIWZX */
10192    823,
10193    /* RLWIMIbm */
10194    826,
10195    /* RLWIMIbm_rec */
10196    830,
10197    /* RLWINMbm */
10198    834,
10199    /* RLWINMbm_rec */
10200    838,
10201    /* RLWNMbm */
10202    842,
10203    /* RLWNMbm_rec */
10204    846,
10205    /* ROTRDI */
10206    850,
10207    /* ROTRDI_rec */
10208    853,
10209    /* ROTRWI */
10210    856,
10211    /* ROTRWI_rec */
10212    859,
10213    /* SLDI */
10214    862,
10215    /* SLDI_rec */
10216    865,
10217    /* SLWI */
10218    868,
10219    /* SLWI_rec */
10220    871,
10221    /* SPILLTOVSR_LD */
10222    874,
10223    /* SPILLTOVSR_LDX */
10224    877,
10225    /* SPILLTOVSR_ST */
10226    880,
10227    /* SPILLTOVSR_STX */
10228    883,
10229    /* SRDI */
10230    886,
10231    /* SRDI_rec */
10232    889,
10233    /* SRWI */
10234    892,
10235    /* SRWI_rec */
10236    895,
10237    /* STIWX */
10238    898,
10239    /* SUBI */
10240    901,
10241    /* SUBIC */
10242    904,
10243    /* SUBIC_rec */
10244    907,
10245    /* SUBIS */
10246    910,
10247    /* SUBPCIS */
10248    913,
10249    /* XFLOADf32 */
10250    915,
10251    /* XFLOADf64 */
10252    918,
10253    /* XFSTOREf32 */
10254    921,
10255    /* XFSTOREf64 */
10256    924,
10257    /* ADD4 */
10258    927,
10259    /* ADD4O */
10260    930,
10261    /* ADD4O_rec */
10262    933,
10263    /* ADD4TLS */
10264    936,
10265    /* ADD4_rec */
10266    939,
10267    /* ADD8 */
10268    942,
10269    /* ADD8O */
10270    945,
10271    /* ADD8O_rec */
10272    948,
10273    /* ADD8TLS */
10274    951,
10275    /* ADD8TLS_ */
10276    954,
10277    /* ADD8_rec */
10278    957,
10279    /* ADDC */
10280    960,
10281    /* ADDC8 */
10282    963,
10283    /* ADDC8O */
10284    966,
10285    /* ADDC8O_rec */
10286    969,
10287    /* ADDC8_rec */
10288    972,
10289    /* ADDCO */
10290    975,
10291    /* ADDCO_rec */
10292    978,
10293    /* ADDC_rec */
10294    981,
10295    /* ADDE */
10296    984,
10297    /* ADDE8 */
10298    987,
10299    /* ADDE8O */
10300    990,
10301    /* ADDE8O_rec */
10302    993,
10303    /* ADDE8_rec */
10304    996,
10305    /* ADDEO */
10306    999,
10307    /* ADDEO_rec */
10308    1002,
10309    /* ADDEX */
10310    1005,
10311    /* ADDEX8 */
10312    1009,
10313    /* ADDE_rec */
10314    1013,
10315    /* ADDI */
10316    1016,
10317    /* ADDI8 */
10318    1019,
10319    /* ADDIC */
10320    1022,
10321    /* ADDIC8 */
10322    1025,
10323    /* ADDIC_rec */
10324    1028,
10325    /* ADDIS */
10326    1031,
10327    /* ADDIS8 */
10328    1034,
10329    /* ADDISdtprelHA */
10330    1037,
10331    /* ADDISdtprelHA32 */
10332    1040,
10333    /* ADDISgotTprelHA */
10334    1043,
10335    /* ADDIStlsgdHA */
10336    1046,
10337    /* ADDIStlsldHA */
10338    1049,
10339    /* ADDIStocHA */
10340    1052,
10341    /* ADDIStocHA8 */
10342    1055,
10343    /* ADDIdtprelL */
10344    1058,
10345    /* ADDIdtprelL32 */
10346    1061,
10347    /* ADDItlsgdL */
10348    1064,
10349    /* ADDItlsgdL32 */
10350    1067,
10351    /* ADDItlsgdLADDR */
10352    1070,
10353    /* ADDItlsgdLADDR32 */
10354    1074,
10355    /* ADDItlsldL */
10356    1078,
10357    /* ADDItlsldL32 */
10358    1081,
10359    /* ADDItlsldLADDR */
10360    1084,
10361    /* ADDItlsldLADDR32 */
10362    1088,
10363    /* ADDItoc */
10364    1092,
10365    /* ADDItoc8 */
10366    1095,
10367    /* ADDItocL */
10368    1098,
10369    /* ADDME */
10370    1101,
10371    /* ADDME8 */
10372    1103,
10373    /* ADDME8O */
10374    1105,
10375    /* ADDME8O_rec */
10376    1107,
10377    /* ADDME8_rec */
10378    1109,
10379    /* ADDMEO */
10380    1111,
10381    /* ADDMEO_rec */
10382    1113,
10383    /* ADDME_rec */
10384    1115,
10385    /* ADDPCIS */
10386    1117,
10387    /* ADDZE */
10388    1119,
10389    /* ADDZE8 */
10390    1121,
10391    /* ADDZE8O */
10392    1123,
10393    /* ADDZE8O_rec */
10394    1125,
10395    /* ADDZE8_rec */
10396    1127,
10397    /* ADDZEO */
10398    1129,
10399    /* ADDZEO_rec */
10400    1131,
10401    /* ADDZE_rec */
10402    1133,
10403    /* ADJCALLSTACKDOWN */
10404    1135,
10405    /* ADJCALLSTACKUP */
10406    1137,
10407    /* AND */
10408    1139,
10409    /* AND8 */
10410    1142,
10411    /* AND8_rec */
10412    1145,
10413    /* ANDC */
10414    1148,
10415    /* ANDC8 */
10416    1151,
10417    /* ANDC8_rec */
10418    1154,
10419    /* ANDC_rec */
10420    1157,
10421    /* ANDI8_rec */
10422    1160,
10423    /* ANDIS8_rec */
10424    1163,
10425    /* ANDIS_rec */
10426    1166,
10427    /* ANDI_rec */
10428    1169,
10429    /* ANDI_rec_1_EQ_BIT */
10430    1172,
10431    /* ANDI_rec_1_EQ_BIT8 */
10432    1174,
10433    /* ANDI_rec_1_GT_BIT */
10434    1176,
10435    /* ANDI_rec_1_GT_BIT8 */
10436    1178,
10437    /* AND_rec */
10438    1180,
10439    /* ATOMIC_CMP_SWAP_I16 */
10440    1183,
10441    /* ATOMIC_CMP_SWAP_I32 */
10442    1188,
10443    /* ATOMIC_CMP_SWAP_I64 */
10444    1193,
10445    /* ATOMIC_CMP_SWAP_I8 */
10446    1198,
10447    /* ATOMIC_LOAD_ADD_I16 */
10448    1203,
10449    /* ATOMIC_LOAD_ADD_I32 */
10450    1207,
10451    /* ATOMIC_LOAD_ADD_I64 */
10452    1211,
10453    /* ATOMIC_LOAD_ADD_I8 */
10454    1215,
10455    /* ATOMIC_LOAD_AND_I16 */
10456    1219,
10457    /* ATOMIC_LOAD_AND_I32 */
10458    1223,
10459    /* ATOMIC_LOAD_AND_I64 */
10460    1227,
10461    /* ATOMIC_LOAD_AND_I8 */
10462    1231,
10463    /* ATOMIC_LOAD_MAX_I16 */
10464    1235,
10465    /* ATOMIC_LOAD_MAX_I32 */
10466    1239,
10467    /* ATOMIC_LOAD_MAX_I64 */
10468    1243,
10469    /* ATOMIC_LOAD_MAX_I8 */
10470    1247,
10471    /* ATOMIC_LOAD_MIN_I16 */
10472    1251,
10473    /* ATOMIC_LOAD_MIN_I32 */
10474    1255,
10475    /* ATOMIC_LOAD_MIN_I64 */
10476    1259,
10477    /* ATOMIC_LOAD_MIN_I8 */
10478    1263,
10479    /* ATOMIC_LOAD_NAND_I16 */
10480    1267,
10481    /* ATOMIC_LOAD_NAND_I32 */
10482    1271,
10483    /* ATOMIC_LOAD_NAND_I64 */
10484    1275,
10485    /* ATOMIC_LOAD_NAND_I8 */
10486    1279,
10487    /* ATOMIC_LOAD_OR_I16 */
10488    1283,
10489    /* ATOMIC_LOAD_OR_I32 */
10490    1287,
10491    /* ATOMIC_LOAD_OR_I64 */
10492    1291,
10493    /* ATOMIC_LOAD_OR_I8 */
10494    1295,
10495    /* ATOMIC_LOAD_SUB_I16 */
10496    1299,
10497    /* ATOMIC_LOAD_SUB_I32 */
10498    1303,
10499    /* ATOMIC_LOAD_SUB_I64 */
10500    1307,
10501    /* ATOMIC_LOAD_SUB_I8 */
10502    1311,
10503    /* ATOMIC_LOAD_UMAX_I16 */
10504    1315,
10505    /* ATOMIC_LOAD_UMAX_I32 */
10506    1319,
10507    /* ATOMIC_LOAD_UMAX_I64 */
10508    1323,
10509    /* ATOMIC_LOAD_UMAX_I8 */
10510    1327,
10511    /* ATOMIC_LOAD_UMIN_I16 */
10512    1331,
10513    /* ATOMIC_LOAD_UMIN_I32 */
10514    1335,
10515    /* ATOMIC_LOAD_UMIN_I64 */
10516    1339,
10517    /* ATOMIC_LOAD_UMIN_I8 */
10518    1343,
10519    /* ATOMIC_LOAD_XOR_I16 */
10520    1347,
10521    /* ATOMIC_LOAD_XOR_I32 */
10522    1351,
10523    /* ATOMIC_LOAD_XOR_I64 */
10524    1355,
10525    /* ATOMIC_LOAD_XOR_I8 */
10526    1359,
10527    /* ATOMIC_SWAP_I16 */
10528    1363,
10529    /* ATOMIC_SWAP_I32 */
10530    1367,
10531    /* ATOMIC_SWAP_I64 */
10532    1371,
10533    /* ATOMIC_SWAP_I8 */
10534    1375,
10535    /* ATTN */
10536    1379,
10537    /* B */
10538    1379,
10539    /* BA */
10540    1380,
10541    /* BC */
10542    1381,
10543    /* BCC */
10544    1383,
10545    /* BCCA */
10546    1386,
10547    /* BCCCTR */
10548    1389,
10549    /* BCCCTR8 */
10550    1391,
10551    /* BCCCTRL */
10552    1393,
10553    /* BCCCTRL8 */
10554    1395,
10555    /* BCCL */
10556    1397,
10557    /* BCCLA */
10558    1400,
10559    /* BCCLR */
10560    1403,
10561    /* BCCLRL */
10562    1405,
10563    /* BCCTR */
10564    1407,
10565    /* BCCTR8 */
10566    1408,
10567    /* BCCTR8n */
10568    1409,
10569    /* BCCTRL */
10570    1410,
10571    /* BCCTRL8 */
10572    1411,
10573    /* BCCTRL8n */
10574    1412,
10575    /* BCCTRLn */
10576    1413,
10577    /* BCCTRn */
10578    1414,
10579    /* BCDADD_rec */
10580    1415,
10581    /* BCDCFN_rec */
10582    1419,
10583    /* BCDCFSQ_rec */
10584    1422,
10585    /* BCDCFZ_rec */
10586    1425,
10587    /* BCDCPSGN_rec */
10588    1428,
10589    /* BCDCTN_rec */
10590    1431,
10591    /* BCDCTSQ_rec */
10592    1433,
10593    /* BCDCTZ_rec */
10594    1435,
10595    /* BCDSETSGN_rec */
10596    1438,
10597    /* BCDSR_rec */
10598    1441,
10599    /* BCDSUB_rec */
10600    1445,
10601    /* BCDS_rec */
10602    1449,
10603    /* BCDTRUNC_rec */
10604    1453,
10605    /* BCDUS_rec */
10606    1457,
10607    /* BCDUTRUNC_rec */
10608    1460,
10609    /* BCL */
10610    1463,
10611    /* BCLR */
10612    1465,
10613    /* BCLRL */
10614    1466,
10615    /* BCLRLn */
10616    1467,
10617    /* BCLRn */
10618    1468,
10619    /* BCLalways */
10620    1469,
10621    /* BCLn */
10622    1470,
10623    /* BCTR */
10624    1472,
10625    /* BCTR8 */
10626    1472,
10627    /* BCTRL */
10628    1472,
10629    /* BCTRL8 */
10630    1472,
10631    /* BCTRL8_LDinto_toc */
10632    1472,
10633    /* BCTRL8_LDinto_toc_RM */
10634    1474,
10635    /* BCTRL8_RM */
10636    1476,
10637    /* BCTRL_LWZinto_toc */
10638    1476,
10639    /* BCTRL_LWZinto_toc_RM */
10640    1478,
10641    /* BCTRL_RM */
10642    1480,
10643    /* BCn */
10644    1480,
10645    /* BDNZ */
10646    1482,
10647    /* BDNZ8 */
10648    1483,
10649    /* BDNZA */
10650    1484,
10651    /* BDNZAm */
10652    1485,
10653    /* BDNZAp */
10654    1486,
10655    /* BDNZL */
10656    1487,
10657    /* BDNZLA */
10658    1488,
10659    /* BDNZLAm */
10660    1489,
10661    /* BDNZLAp */
10662    1490,
10663    /* BDNZLR */
10664    1491,
10665    /* BDNZLR8 */
10666    1491,
10667    /* BDNZLRL */
10668    1491,
10669    /* BDNZLRLm */
10670    1491,
10671    /* BDNZLRLp */
10672    1491,
10673    /* BDNZLRm */
10674    1491,
10675    /* BDNZLRp */
10676    1491,
10677    /* BDNZLm */
10678    1491,
10679    /* BDNZLp */
10680    1492,
10681    /* BDNZm */
10682    1493,
10683    /* BDNZp */
10684    1494,
10685    /* BDZ */
10686    1495,
10687    /* BDZ8 */
10688    1496,
10689    /* BDZA */
10690    1497,
10691    /* BDZAm */
10692    1498,
10693    /* BDZAp */
10694    1499,
10695    /* BDZL */
10696    1500,
10697    /* BDZLA */
10698    1501,
10699    /* BDZLAm */
10700    1502,
10701    /* BDZLAp */
10702    1503,
10703    /* BDZLR */
10704    1504,
10705    /* BDZLR8 */
10706    1504,
10707    /* BDZLRL */
10708    1504,
10709    /* BDZLRLm */
10710    1504,
10711    /* BDZLRLp */
10712    1504,
10713    /* BDZLRm */
10714    1504,
10715    /* BDZLRp */
10716    1504,
10717    /* BDZLm */
10718    1504,
10719    /* BDZLp */
10720    1505,
10721    /* BDZm */
10722    1506,
10723    /* BDZp */
10724    1507,
10725    /* BL */
10726    1508,
10727    /* BL8 */
10728    1509,
10729    /* BL8_NOP */
10730    1510,
10731    /* BL8_NOP_RM */
10732    1511,
10733    /* BL8_NOP_TLS */
10734    1512,
10735    /* BL8_NOTOC */
10736    1514,
10737    /* BL8_NOTOC_RM */
10738    1515,
10739    /* BL8_NOTOC_TLS */
10740    1516,
10741    /* BL8_RM */
10742    1518,
10743    /* BL8_TLS */
10744    1519,
10745    /* BL8_TLS_ */
10746    1521,
10747    /* BLA */
10748    1523,
10749    /* BLA8 */
10750    1524,
10751    /* BLA8_NOP */
10752    1525,
10753    /* BLA8_NOP_RM */
10754    1526,
10755    /* BLA8_RM */
10756    1527,
10757    /* BLA_RM */
10758    1528,
10759    /* BLR */
10760    1529,
10761    /* BLR8 */
10762    1529,
10763    /* BLRL */
10764    1529,
10765    /* BL_NOP */
10766    1529,
10767    /* BL_NOP_RM */
10768    1530,
10769    /* BL_RM */
10770    1531,
10771    /* BL_TLS */
10772    1532,
10773    /* BPERMD */
10774    1534,
10775    /* BRD */
10776    1537,
10777    /* BRH */
10778    1539,
10779    /* BRH8 */
10780    1541,
10781    /* BRINC */
10782    1543,
10783    /* BRW */
10784    1546,
10785    /* BRW8 */
10786    1548,
10787    /* CFUGED */
10788    1550,
10789    /* CLRBHRB */
10790    1553,
10791    /* CMPB */
10792    1553,
10793    /* CMPB8 */
10794    1556,
10795    /* CMPD */
10796    1559,
10797    /* CMPDI */
10798    1562,
10799    /* CMPEQB */
10800    1565,
10801    /* CMPLD */
10802    1568,
10803    /* CMPLDI */
10804    1571,
10805    /* CMPLW */
10806    1574,
10807    /* CMPLWI */
10808    1577,
10809    /* CMPRB */
10810    1580,
10811    /* CMPRB8 */
10812    1584,
10813    /* CMPW */
10814    1588,
10815    /* CMPWI */
10816    1591,
10817    /* CNTLZD */
10818    1594,
10819    /* CNTLZDM */
10820    1596,
10821    /* CNTLZD_rec */
10822    1599,
10823    /* CNTLZW */
10824    1601,
10825    /* CNTLZW8 */
10826    1603,
10827    /* CNTLZW8_rec */
10828    1605,
10829    /* CNTLZW_rec */
10830    1607,
10831    /* CNTTZD */
10832    1609,
10833    /* CNTTZDM */
10834    1611,
10835    /* CNTTZD_rec */
10836    1614,
10837    /* CNTTZW */
10838    1616,
10839    /* CNTTZW8 */
10840    1618,
10841    /* CNTTZW8_rec */
10842    1620,
10843    /* CNTTZW_rec */
10844    1622,
10845    /* CP_ABORT */
10846    1624,
10847    /* CP_COPY */
10848    1624,
10849    /* CP_COPY8 */
10850    1627,
10851    /* CP_PASTE8_rec */
10852    1630,
10853    /* CP_PASTE_rec */
10854    1633,
10855    /* CR6SET */
10856    1636,
10857    /* CR6UNSET */
10858    1636,
10859    /* CRAND */
10860    1636,
10861    /* CRANDC */
10862    1639,
10863    /* CREQV */
10864    1642,
10865    /* CRNAND */
10866    1645,
10867    /* CRNOR */
10868    1648,
10869    /* CRNOT */
10870    1651,
10871    /* CROR */
10872    1653,
10873    /* CRORC */
10874    1656,
10875    /* CRSET */
10876    1659,
10877    /* CRUNSET */
10878    1660,
10879    /* CRXOR */
10880    1661,
10881    /* CTRL_DEP */
10882    1664,
10883    /* DARN */
10884    1667,
10885    /* DCBA */
10886    1669,
10887    /* DCBF */
10888    1671,
10889    /* DCBFEP */
10890    1674,
10891    /* DCBI */
10892    1676,
10893    /* DCBST */
10894    1678,
10895    /* DCBSTEP */
10896    1680,
10897    /* DCBT */
10898    1682,
10899    /* DCBTEP */
10900    1685,
10901    /* DCBTST */
10902    1688,
10903    /* DCBTSTEP */
10904    1691,
10905    /* DCBZ */
10906    1694,
10907    /* DCBZEP */
10908    1696,
10909    /* DCBZL */
10910    1698,
10911    /* DCBZLEP */
10912    1700,
10913    /* DCCCI */
10914    1702,
10915    /* DIVD */
10916    1704,
10917    /* DIVDE */
10918    1707,
10919    /* DIVDEO */
10920    1710,
10921    /* DIVDEO_rec */
10922    1713,
10923    /* DIVDEU */
10924    1716,
10925    /* DIVDEUO */
10926    1719,
10927    /* DIVDEUO_rec */
10928    1722,
10929    /* DIVDEU_rec */
10930    1725,
10931    /* DIVDE_rec */
10932    1728,
10933    /* DIVDO */
10934    1731,
10935    /* DIVDO_rec */
10936    1734,
10937    /* DIVDU */
10938    1737,
10939    /* DIVDUO */
10940    1740,
10941    /* DIVDUO_rec */
10942    1743,
10943    /* DIVDU_rec */
10944    1746,
10945    /* DIVD_rec */
10946    1749,
10947    /* DIVW */
10948    1752,
10949    /* DIVWE */
10950    1755,
10951    /* DIVWEO */
10952    1758,
10953    /* DIVWEO_rec */
10954    1761,
10955    /* DIVWEU */
10956    1764,
10957    /* DIVWEUO */
10958    1767,
10959    /* DIVWEUO_rec */
10960    1770,
10961    /* DIVWEU_rec */
10962    1773,
10963    /* DIVWE_rec */
10964    1776,
10965    /* DIVWO */
10966    1779,
10967    /* DIVWO_rec */
10968    1782,
10969    /* DIVWU */
10970    1785,
10971    /* DIVWUO */
10972    1788,
10973    /* DIVWUO_rec */
10974    1791,
10975    /* DIVWU_rec */
10976    1794,
10977    /* DIVW_rec */
10978    1797,
10979    /* DMMR */
10980    1800,
10981    /* DMSETDMRZ */
10982    1802,
10983    /* DMXOR */
10984    1803,
10985    /* DMXXEXTFDMR256 */
10986    1806,
10987    /* DMXXEXTFDMR512 */
10988    1809,
10989    /* DMXXEXTFDMR512_HI */
10990    1812,
10991    /* DMXXINSTFDMR256 */
10992    1815,
10993    /* DMXXINSTFDMR512 */
10994    1818,
10995    /* DMXXINSTFDMR512_HI */
10996    1821,
10997    /* DSS */
10998    1824,
10999    /* DSSALL */
11000    1825,
11001    /* DST */
11002    1825,
11003    /* DST64 */
11004    1828,
11005    /* DSTST */
11006    1831,
11007    /* DSTST64 */
11008    1834,
11009    /* DSTSTT */
11010    1837,
11011    /* DSTSTT64 */
11012    1840,
11013    /* DSTT */
11014    1843,
11015    /* DSTT64 */
11016    1846,
11017    /* DYNALLOC */
11018    1849,
11019    /* DYNALLOC8 */
11020    1853,
11021    /* DYNAREAOFFSET */
11022    1857,
11023    /* DYNAREAOFFSET8 */
11024    1860,
11025    /* DecreaseCTR8loop */
11026    1863,
11027    /* DecreaseCTRloop */
11028    1865,
11029    /* EFDABS */
11030    1867,
11031    /* EFDADD */
11032    1869,
11033    /* EFDCFS */
11034    1872,
11035    /* EFDCFSF */
11036    1874,
11037    /* EFDCFSI */
11038    1876,
11039    /* EFDCFSID */
11040    1878,
11041    /* EFDCFUF */
11042    1880,
11043    /* EFDCFUI */
11044    1882,
11045    /* EFDCFUID */
11046    1884,
11047    /* EFDCMPEQ */
11048    1886,
11049    /* EFDCMPGT */
11050    1889,
11051    /* EFDCMPLT */
11052    1892,
11053    /* EFDCTSF */
11054    1895,
11055    /* EFDCTSI */
11056    1897,
11057    /* EFDCTSIDZ */
11058    1899,
11059    /* EFDCTSIZ */
11060    1901,
11061    /* EFDCTUF */
11062    1903,
11063    /* EFDCTUI */
11064    1905,
11065    /* EFDCTUIDZ */
11066    1907,
11067    /* EFDCTUIZ */
11068    1909,
11069    /* EFDDIV */
11070    1911,
11071    /* EFDMUL */
11072    1914,
11073    /* EFDNABS */
11074    1917,
11075    /* EFDNEG */
11076    1919,
11077    /* EFDSUB */
11078    1921,
11079    /* EFDTSTEQ */
11080    1924,
11081    /* EFDTSTGT */
11082    1927,
11083    /* EFDTSTLT */
11084    1930,
11085    /* EFSABS */
11086    1933,
11087    /* EFSADD */
11088    1935,
11089    /* EFSCFD */
11090    1938,
11091    /* EFSCFSF */
11092    1940,
11093    /* EFSCFSI */
11094    1942,
11095    /* EFSCFUF */
11096    1944,
11097    /* EFSCFUI */
11098    1946,
11099    /* EFSCMPEQ */
11100    1948,
11101    /* EFSCMPGT */
11102    1951,
11103    /* EFSCMPLT */
11104    1954,
11105    /* EFSCTSF */
11106    1957,
11107    /* EFSCTSI */
11108    1959,
11109    /* EFSCTSIZ */
11110    1961,
11111    /* EFSCTUF */
11112    1963,
11113    /* EFSCTUI */
11114    1965,
11115    /* EFSCTUIZ */
11116    1967,
11117    /* EFSDIV */
11118    1969,
11119    /* EFSMUL */
11120    1972,
11121    /* EFSNABS */
11122    1975,
11123    /* EFSNEG */
11124    1977,
11125    /* EFSSUB */
11126    1979,
11127    /* EFSTSTEQ */
11128    1982,
11129    /* EFSTSTGT */
11130    1985,
11131    /* EFSTSTLT */
11132    1988,
11133    /* EH_SjLj_LongJmp32 */
11134    1991,
11135    /* EH_SjLj_LongJmp64 */
11136    1992,
11137    /* EH_SjLj_SetJmp32 */
11138    1993,
11139    /* EH_SjLj_SetJmp64 */
11140    1995,
11141    /* EH_SjLj_Setup */
11142    1997,
11143    /* EQV */
11144    1998,
11145    /* EQV8 */
11146    2001,
11147    /* EQV8_rec */
11148    2004,
11149    /* EQV_rec */
11150    2007,
11151    /* EVABS */
11152    2010,
11153    /* EVADDIW */
11154    2012,
11155    /* EVADDSMIAAW */
11156    2015,
11157    /* EVADDSSIAAW */
11158    2017,
11159    /* EVADDUMIAAW */
11160    2019,
11161    /* EVADDUSIAAW */
11162    2021,
11163    /* EVADDW */
11164    2023,
11165    /* EVAND */
11166    2026,
11167    /* EVANDC */
11168    2029,
11169    /* EVCMPEQ */
11170    2032,
11171    /* EVCMPGTS */
11172    2035,
11173    /* EVCMPGTU */
11174    2038,
11175    /* EVCMPLTS */
11176    2041,
11177    /* EVCMPLTU */
11178    2044,
11179    /* EVCNTLSW */
11180    2047,
11181    /* EVCNTLZW */
11182    2049,
11183    /* EVDIVWS */
11184    2051,
11185    /* EVDIVWU */
11186    2054,
11187    /* EVEQV */
11188    2057,
11189    /* EVEXTSB */
11190    2060,
11191    /* EVEXTSH */
11192    2062,
11193    /* EVFSABS */
11194    2064,
11195    /* EVFSADD */
11196    2066,
11197    /* EVFSCFSF */
11198    2069,
11199    /* EVFSCFSI */
11200    2071,
11201    /* EVFSCFUF */
11202    2073,
11203    /* EVFSCFUI */
11204    2075,
11205    /* EVFSCMPEQ */
11206    2077,
11207    /* EVFSCMPGT */
11208    2080,
11209    /* EVFSCMPLT */
11210    2083,
11211    /* EVFSCTSF */
11212    2086,
11213    /* EVFSCTSI */
11214    2088,
11215    /* EVFSCTSIZ */
11216    2090,
11217    /* EVFSCTUF */
11218    2092,
11219    /* EVFSCTUI */
11220    2094,
11221    /* EVFSCTUIZ */
11222    2096,
11223    /* EVFSDIV */
11224    2098,
11225    /* EVFSMUL */
11226    2101,
11227    /* EVFSNABS */
11228    2104,
11229    /* EVFSNEG */
11230    2106,
11231    /* EVFSSUB */
11232    2108,
11233    /* EVFSTSTEQ */
11234    2111,
11235    /* EVFSTSTGT */
11236    2114,
11237    /* EVFSTSTLT */
11238    2117,
11239    /* EVLDD */
11240    2120,
11241    /* EVLDDX */
11242    2123,
11243    /* EVLDH */
11244    2126,
11245    /* EVLDHX */
11246    2129,
11247    /* EVLDW */
11248    2132,
11249    /* EVLDWX */
11250    2135,
11251    /* EVLHHESPLAT */
11252    2138,
11253    /* EVLHHESPLATX */
11254    2141,
11255    /* EVLHHOSSPLAT */
11256    2144,
11257    /* EVLHHOSSPLATX */
11258    2147,
11259    /* EVLHHOUSPLAT */
11260    2150,
11261    /* EVLHHOUSPLATX */
11262    2153,
11263    /* EVLWHE */
11264    2156,
11265    /* EVLWHEX */
11266    2159,
11267    /* EVLWHOS */
11268    2162,
11269    /* EVLWHOSX */
11270    2165,
11271    /* EVLWHOU */
11272    2168,
11273    /* EVLWHOUX */
11274    2171,
11275    /* EVLWHSPLAT */
11276    2174,
11277    /* EVLWHSPLATX */
11278    2177,
11279    /* EVLWWSPLAT */
11280    2180,
11281    /* EVLWWSPLATX */
11282    2183,
11283    /* EVMERGEHI */
11284    2186,
11285    /* EVMERGEHILO */
11286    2189,
11287    /* EVMERGELO */
11288    2192,
11289    /* EVMERGELOHI */
11290    2195,
11291    /* EVMHEGSMFAA */
11292    2198,
11293    /* EVMHEGSMFAN */
11294    2201,
11295    /* EVMHEGSMIAA */
11296    2204,
11297    /* EVMHEGSMIAN */
11298    2207,
11299    /* EVMHEGUMIAA */
11300    2210,
11301    /* EVMHEGUMIAN */
11302    2213,
11303    /* EVMHESMF */
11304    2216,
11305    /* EVMHESMFA */
11306    2219,
11307    /* EVMHESMFAAW */
11308    2222,
11309    /* EVMHESMFANW */
11310    2225,
11311    /* EVMHESMI */
11312    2228,
11313    /* EVMHESMIA */
11314    2231,
11315    /* EVMHESMIAAW */
11316    2234,
11317    /* EVMHESMIANW */
11318    2237,
11319    /* EVMHESSF */
11320    2240,
11321    /* EVMHESSFA */
11322    2243,
11323    /* EVMHESSFAAW */
11324    2246,
11325    /* EVMHESSFANW */
11326    2249,
11327    /* EVMHESSIAAW */
11328    2252,
11329    /* EVMHESSIANW */
11330    2255,
11331    /* EVMHEUMI */
11332    2258,
11333    /* EVMHEUMIA */
11334    2261,
11335    /* EVMHEUMIAAW */
11336    2264,
11337    /* EVMHEUMIANW */
11338    2267,
11339    /* EVMHEUSIAAW */
11340    2270,
11341    /* EVMHEUSIANW */
11342    2273,
11343    /* EVMHOGSMFAA */
11344    2276,
11345    /* EVMHOGSMFAN */
11346    2279,
11347    /* EVMHOGSMIAA */
11348    2282,
11349    /* EVMHOGSMIAN */
11350    2285,
11351    /* EVMHOGUMIAA */
11352    2288,
11353    /* EVMHOGUMIAN */
11354    2291,
11355    /* EVMHOSMF */
11356    2294,
11357    /* EVMHOSMFA */
11358    2297,
11359    /* EVMHOSMFAAW */
11360    2300,
11361    /* EVMHOSMFANW */
11362    2303,
11363    /* EVMHOSMI */
11364    2306,
11365    /* EVMHOSMIA */
11366    2309,
11367    /* EVMHOSMIAAW */
11368    2312,
11369    /* EVMHOSMIANW */
11370    2315,
11371    /* EVMHOSSF */
11372    2318,
11373    /* EVMHOSSFA */
11374    2321,
11375    /* EVMHOSSFAAW */
11376    2324,
11377    /* EVMHOSSFANW */
11378    2327,
11379    /* EVMHOSSIAAW */
11380    2330,
11381    /* EVMHOSSIANW */
11382    2333,
11383    /* EVMHOUMI */
11384    2336,
11385    /* EVMHOUMIA */
11386    2339,
11387    /* EVMHOUMIAAW */
11388    2342,
11389    /* EVMHOUMIANW */
11390    2345,
11391    /* EVMHOUSIAAW */
11392    2348,
11393    /* EVMHOUSIANW */
11394    2351,
11395    /* EVMRA */
11396    2354,
11397    /* EVMWHSMF */
11398    2356,
11399    /* EVMWHSMFA */
11400    2359,
11401    /* EVMWHSMI */
11402    2362,
11403    /* EVMWHSMIA */
11404    2365,
11405    /* EVMWHSSF */
11406    2368,
11407    /* EVMWHSSFA */
11408    2371,
11409    /* EVMWHUMI */
11410    2374,
11411    /* EVMWHUMIA */
11412    2377,
11413    /* EVMWLSMIAAW */
11414    2380,
11415    /* EVMWLSMIANW */
11416    2383,
11417    /* EVMWLSSIAAW */
11418    2386,
11419    /* EVMWLSSIANW */
11420    2389,
11421    /* EVMWLUMI */
11422    2392,
11423    /* EVMWLUMIA */
11424    2395,
11425    /* EVMWLUMIAAW */
11426    2398,
11427    /* EVMWLUMIANW */
11428    2401,
11429    /* EVMWLUSIAAW */
11430    2404,
11431    /* EVMWLUSIANW */
11432    2407,
11433    /* EVMWSMF */
11434    2410,
11435    /* EVMWSMFA */
11436    2413,
11437    /* EVMWSMFAA */
11438    2416,
11439    /* EVMWSMFAN */
11440    2419,
11441    /* EVMWSMI */
11442    2422,
11443    /* EVMWSMIA */
11444    2425,
11445    /* EVMWSMIAA */
11446    2428,
11447    /* EVMWSMIAN */
11448    2431,
11449    /* EVMWSSF */
11450    2434,
11451    /* EVMWSSFA */
11452    2437,
11453    /* EVMWSSFAA */
11454    2440,
11455    /* EVMWSSFAN */
11456    2443,
11457    /* EVMWUMI */
11458    2446,
11459    /* EVMWUMIA */
11460    2449,
11461    /* EVMWUMIAA */
11462    2452,
11463    /* EVMWUMIAN */
11464    2455,
11465    /* EVNAND */
11466    2458,
11467    /* EVNEG */
11468    2461,
11469    /* EVNOR */
11470    2463,
11471    /* EVOR */
11472    2466,
11473    /* EVORC */
11474    2469,
11475    /* EVRLW */
11476    2472,
11477    /* EVRLWI */
11478    2475,
11479    /* EVRNDW */
11480    2478,
11481    /* EVSEL */
11482    2480,
11483    /* EVSLW */
11484    2484,
11485    /* EVSLWI */
11486    2487,
11487    /* EVSPLATFI */
11488    2490,
11489    /* EVSPLATI */
11490    2492,
11491    /* EVSRWIS */
11492    2494,
11493    /* EVSRWIU */
11494    2497,
11495    /* EVSRWS */
11496    2500,
11497    /* EVSRWU */
11498    2503,
11499    /* EVSTDD */
11500    2506,
11501    /* EVSTDDX */
11502    2509,
11503    /* EVSTDH */
11504    2512,
11505    /* EVSTDHX */
11506    2515,
11507    /* EVSTDW */
11508    2518,
11509    /* EVSTDWX */
11510    2521,
11511    /* EVSTWHE */
11512    2524,
11513    /* EVSTWHEX */
11514    2527,
11515    /* EVSTWHO */
11516    2530,
11517    /* EVSTWHOX */
11518    2533,
11519    /* EVSTWWE */
11520    2536,
11521    /* EVSTWWEX */
11522    2539,
11523    /* EVSTWWO */
11524    2542,
11525    /* EVSTWWOX */
11526    2545,
11527    /* EVSUBFSMIAAW */
11528    2548,
11529    /* EVSUBFSSIAAW */
11530    2550,
11531    /* EVSUBFUMIAAW */
11532    2552,
11533    /* EVSUBFUSIAAW */
11534    2554,
11535    /* EVSUBFW */
11536    2556,
11537    /* EVSUBIFW */
11538    2559,
11539    /* EVXOR */
11540    2562,
11541    /* EXTSB */
11542    2565,
11543    /* EXTSB8 */
11544    2567,
11545    /* EXTSB8_32_64 */
11546    2569,
11547    /* EXTSB8_rec */
11548    2571,
11549    /* EXTSB_rec */
11550    2573,
11551    /* EXTSH */
11552    2575,
11553    /* EXTSH8 */
11554    2577,
11555    /* EXTSH8_32_64 */
11556    2579,
11557    /* EXTSH8_rec */
11558    2581,
11559    /* EXTSH_rec */
11560    2583,
11561    /* EXTSW */
11562    2585,
11563    /* EXTSWSLI */
11564    2587,
11565    /* EXTSWSLI_32_64 */
11566    2590,
11567    /* EXTSWSLI_32_64_rec */
11568    2593,
11569    /* EXTSWSLI_rec */
11570    2596,
11571    /* EXTSW_32 */
11572    2599,
11573    /* EXTSW_32_64 */
11574    2601,
11575    /* EXTSW_32_64_rec */
11576    2603,
11577    /* EXTSW_rec */
11578    2605,
11579    /* EnforceIEIO */
11580    2607,
11581    /* FABSD */
11582    2607,
11583    /* FABSD_rec */
11584    2609,
11585    /* FABSS */
11586    2611,
11587    /* FABSS_rec */
11588    2613,
11589    /* FADD */
11590    2615,
11591    /* FADDS */
11592    2618,
11593    /* FADDS_rec */
11594    2621,
11595    /* FADD_rec */
11596    2624,
11597    /* FADDrtz */
11598    2627,
11599    /* FCFID */
11600    2630,
11601    /* FCFIDS */
11602    2632,
11603    /* FCFIDS_rec */
11604    2634,
11605    /* FCFIDU */
11606    2636,
11607    /* FCFIDUS */
11608    2638,
11609    /* FCFIDUS_rec */
11610    2640,
11611    /* FCFIDU_rec */
11612    2642,
11613    /* FCFID_rec */
11614    2644,
11615    /* FCMPOD */
11616    2646,
11617    /* FCMPOS */
11618    2649,
11619    /* FCMPUD */
11620    2652,
11621    /* FCMPUS */
11622    2655,
11623    /* FCPSGND */
11624    2658,
11625    /* FCPSGND_rec */
11626    2661,
11627    /* FCPSGNS */
11628    2664,
11629    /* FCPSGNS_rec */
11630    2667,
11631    /* FCTID */
11632    2670,
11633    /* FCTIDU */
11634    2672,
11635    /* FCTIDUZ */
11636    2674,
11637    /* FCTIDUZ_rec */
11638    2676,
11639    /* FCTIDU_rec */
11640    2678,
11641    /* FCTIDZ */
11642    2680,
11643    /* FCTIDZ_rec */
11644    2682,
11645    /* FCTID_rec */
11646    2684,
11647    /* FCTIW */
11648    2686,
11649    /* FCTIWU */
11650    2688,
11651    /* FCTIWUZ */
11652    2690,
11653    /* FCTIWUZ_rec */
11654    2692,
11655    /* FCTIWU_rec */
11656    2694,
11657    /* FCTIWZ */
11658    2696,
11659    /* FCTIWZ_rec */
11660    2698,
11661    /* FCTIW_rec */
11662    2700,
11663    /* FDIV */
11664    2702,
11665    /* FDIVS */
11666    2705,
11667    /* FDIVS_rec */
11668    2708,
11669    /* FDIV_rec */
11670    2711,
11671    /* FMADD */
11672    2714,
11673    /* FMADDS */
11674    2718,
11675    /* FMADDS_rec */
11676    2722,
11677    /* FMADD_rec */
11678    2726,
11679    /* FMR */
11680    2730,
11681    /* FMR_rec */
11682    2732,
11683    /* FMSUB */
11684    2734,
11685    /* FMSUBS */
11686    2738,
11687    /* FMSUBS_rec */
11688    2742,
11689    /* FMSUB_rec */
11690    2746,
11691    /* FMUL */
11692    2750,
11693    /* FMULS */
11694    2753,
11695    /* FMULS_rec */
11696    2756,
11697    /* FMUL_rec */
11698    2759,
11699    /* FNABSD */
11700    2762,
11701    /* FNABSD_rec */
11702    2764,
11703    /* FNABSS */
11704    2766,
11705    /* FNABSS_rec */
11706    2768,
11707    /* FNEGD */
11708    2770,
11709    /* FNEGD_rec */
11710    2772,
11711    /* FNEGS */
11712    2774,
11713    /* FNEGS_rec */
11714    2776,
11715    /* FNMADD */
11716    2778,
11717    /* FNMADDS */
11718    2782,
11719    /* FNMADDS_rec */
11720    2786,
11721    /* FNMADD_rec */
11722    2790,
11723    /* FNMSUB */
11724    2794,
11725    /* FNMSUBS */
11726    2798,
11727    /* FNMSUBS_rec */
11728    2802,
11729    /* FNMSUB_rec */
11730    2806,
11731    /* FRE */
11732    2810,
11733    /* FRES */
11734    2812,
11735    /* FRES_rec */
11736    2814,
11737    /* FRE_rec */
11738    2816,
11739    /* FRIMD */
11740    2818,
11741    /* FRIMD_rec */
11742    2820,
11743    /* FRIMS */
11744    2822,
11745    /* FRIMS_rec */
11746    2824,
11747    /* FRIND */
11748    2826,
11749    /* FRIND_rec */
11750    2828,
11751    /* FRINS */
11752    2830,
11753    /* FRINS_rec */
11754    2832,
11755    /* FRIPD */
11756    2834,
11757    /* FRIPD_rec */
11758    2836,
11759    /* FRIPS */
11760    2838,
11761    /* FRIPS_rec */
11762    2840,
11763    /* FRIZD */
11764    2842,
11765    /* FRIZD_rec */
11766    2844,
11767    /* FRIZS */
11768    2846,
11769    /* FRIZS_rec */
11770    2848,
11771    /* FRSP */
11772    2850,
11773    /* FRSP_rec */
11774    2852,
11775    /* FRSQRTE */
11776    2854,
11777    /* FRSQRTES */
11778    2856,
11779    /* FRSQRTES_rec */
11780    2858,
11781    /* FRSQRTE_rec */
11782    2860,
11783    /* FSELD */
11784    2862,
11785    /* FSELD_rec */
11786    2866,
11787    /* FSELS */
11788    2870,
11789    /* FSELS_rec */
11790    2874,
11791    /* FSQRT */
11792    2878,
11793    /* FSQRTS */
11794    2880,
11795    /* FSQRTS_rec */
11796    2882,
11797    /* FSQRT_rec */
11798    2884,
11799    /* FSUB */
11800    2886,
11801    /* FSUBS */
11802    2889,
11803    /* FSUBS_rec */
11804    2892,
11805    /* FSUB_rec */
11806    2895,
11807    /* FTDIV */
11808    2898,
11809    /* FTSQRT */
11810    2901,
11811    /* GETtlsADDR */
11812    2903,
11813    /* GETtlsADDR32 */
11814    2906,
11815    /* GETtlsADDR32AIX */
11816    2909,
11817    /* GETtlsADDR64AIX */
11818    2912,
11819    /* GETtlsADDRPCREL */
11820    2915,
11821    /* GETtlsldADDR */
11822    2918,
11823    /* GETtlsldADDR32 */
11824    2921,
11825    /* GETtlsldADDRPCREL */
11826    2924,
11827    /* HASHCHK */
11828    2927,
11829    /* HASHCHK8 */
11830    2930,
11831    /* HASHCHKP */
11832    2933,
11833    /* HASHCHKP8 */
11834    2936,
11835    /* HASHST */
11836    2939,
11837    /* HASHST8 */
11838    2942,
11839    /* HASHSTP */
11840    2945,
11841    /* HASHSTP8 */
11842    2948,
11843    /* HRFID */
11844    2951,
11845    /* ICBI */
11846    2951,
11847    /* ICBIEP */
11848    2953,
11849    /* ICBLC */
11850    2955,
11851    /* ICBLQ */
11852    2958,
11853    /* ICBT */
11854    2961,
11855    /* ICBTLS */
11856    2964,
11857    /* ICCCI */
11858    2967,
11859    /* ISEL */
11860    2969,
11861    /* ISEL8 */
11862    2973,
11863    /* ISYNC */
11864    2977,
11865    /* LA */
11866    2977,
11867    /* LA8 */
11868    2980,
11869    /* LBARX */
11870    2983,
11871    /* LBARXL */
11872    2986,
11873    /* LBEPX */
11874    2989,
11875    /* LBZ */
11876    2992,
11877    /* LBZ8 */
11878    2995,
11879    /* LBZCIX */
11880    2998,
11881    /* LBZU */
11882    3001,
11883    /* LBZU8 */
11884    3005,
11885    /* LBZUX */
11886    3009,
11887    /* LBZUX8 */
11888    3013,
11889    /* LBZX */
11890    3017,
11891    /* LBZX8 */
11892    3020,
11893    /* LBZXTLS */
11894    3023,
11895    /* LBZXTLS_ */
11896    3026,
11897    /* LBZXTLS_32 */
11898    3029,
11899    /* LD */
11900    3032,
11901    /* LDARX */
11902    3035,
11903    /* LDARXL */
11904    3038,
11905    /* LDAT */
11906    3041,
11907    /* LDBRX */
11908    3044,
11909    /* LDCIX */
11910    3047,
11911    /* LDU */
11912    3050,
11913    /* LDUX */
11914    3054,
11915    /* LDX */
11916    3058,
11917    /* LDXTLS */
11918    3061,
11919    /* LDXTLS_ */
11920    3064,
11921    /* LDgotTprelL */
11922    3067,
11923    /* LDgotTprelL32 */
11924    3070,
11925    /* LDtoc */
11926    3073,
11927    /* LDtocBA */
11928    3076,
11929    /* LDtocCPT */
11930    3079,
11931    /* LDtocJTI */
11932    3082,
11933    /* LDtocL */
11934    3085,
11935    /* LFD */
11936    3088,
11937    /* LFDEPX */
11938    3091,
11939    /* LFDU */
11940    3094,
11941    /* LFDUX */
11942    3098,
11943    /* LFDX */
11944    3102,
11945    /* LFIWAX */
11946    3105,
11947    /* LFIWZX */
11948    3108,
11949    /* LFS */
11950    3111,
11951    /* LFSU */
11952    3114,
11953    /* LFSUX */
11954    3118,
11955    /* LFSX */
11956    3122,
11957    /* LHA */
11958    3125,
11959    /* LHA8 */
11960    3128,
11961    /* LHARX */
11962    3131,
11963    /* LHARXL */
11964    3134,
11965    /* LHAU */
11966    3137,
11967    /* LHAU8 */
11968    3141,
11969    /* LHAUX */
11970    3145,
11971    /* LHAUX8 */
11972    3149,
11973    /* LHAX */
11974    3153,
11975    /* LHAX8 */
11976    3156,
11977    /* LHBRX */
11978    3159,
11979    /* LHBRX8 */
11980    3162,
11981    /* LHEPX */
11982    3165,
11983    /* LHZ */
11984    3168,
11985    /* LHZ8 */
11986    3171,
11987    /* LHZCIX */
11988    3174,
11989    /* LHZU */
11990    3177,
11991    /* LHZU8 */
11992    3181,
11993    /* LHZUX */
11994    3185,
11995    /* LHZUX8 */
11996    3189,
11997    /* LHZX */
11998    3193,
11999    /* LHZX8 */
12000    3196,
12001    /* LHZXTLS */
12002    3199,
12003    /* LHZXTLS_ */
12004    3202,
12005    /* LHZXTLS_32 */
12006    3205,
12007    /* LI */
12008    3208,
12009    /* LI8 */
12010    3210,
12011    /* LIS */
12012    3212,
12013    /* LIS8 */
12014    3214,
12015    /* LMW */
12016    3216,
12017    /* LQ */
12018    3219,
12019    /* LQARX */
12020    3222,
12021    /* LQARXL */
12022    3225,
12023    /* LQX_PSEUDO */
12024    3228,
12025    /* LSWI */
12026    3231,
12027    /* LVEBX */
12028    3234,
12029    /* LVEHX */
12030    3237,
12031    /* LVEWX */
12032    3240,
12033    /* LVSL */
12034    3243,
12035    /* LVSR */
12036    3246,
12037    /* LVX */
12038    3249,
12039    /* LVXL */
12040    3252,
12041    /* LWA */
12042    3255,
12043    /* LWARX */
12044    3258,
12045    /* LWARXL */
12046    3261,
12047    /* LWAT */
12048    3264,
12049    /* LWAUX */
12050    3267,
12051    /* LWAX */
12052    3271,
12053    /* LWAX_32 */
12054    3274,
12055    /* LWA_32 */
12056    3277,
12057    /* LWBRX */
12058    3280,
12059    /* LWBRX8 */
12060    3283,
12061    /* LWEPX */
12062    3286,
12063    /* LWZ */
12064    3289,
12065    /* LWZ8 */
12066    3292,
12067    /* LWZCIX */
12068    3295,
12069    /* LWZU */
12070    3298,
12071    /* LWZU8 */
12072    3302,
12073    /* LWZUX */
12074    3306,
12075    /* LWZUX8 */
12076    3310,
12077    /* LWZX */
12078    3314,
12079    /* LWZX8 */
12080    3317,
12081    /* LWZXTLS */
12082    3320,
12083    /* LWZXTLS_ */
12084    3323,
12085    /* LWZXTLS_32 */
12086    3326,
12087    /* LWZtoc */
12088    3329,
12089    /* LWZtocL */
12090    3332,
12091    /* LXSD */
12092    3335,
12093    /* LXSDX */
12094    3338,
12095    /* LXSIBZX */
12096    3341,
12097    /* LXSIHZX */
12098    3344,
12099    /* LXSIWAX */
12100    3347,
12101    /* LXSIWZX */
12102    3350,
12103    /* LXSSP */
12104    3353,
12105    /* LXSSPX */
12106    3356,
12107    /* LXV */
12108    3359,
12109    /* LXVB16X */
12110    3362,
12111    /* LXVD2X */
12112    3365,
12113    /* LXVDSX */
12114    3368,
12115    /* LXVH8X */
12116    3371,
12117    /* LXVKQ */
12118    3374,
12119    /* LXVL */
12120    3376,
12121    /* LXVLL */
12122    3379,
12123    /* LXVP */
12124    3382,
12125    /* LXVPRL */
12126    3385,
12127    /* LXVPRLL */
12128    3388,
12129    /* LXVPX */
12130    3391,
12131    /* LXVRBX */
12132    3394,
12133    /* LXVRDX */
12134    3397,
12135    /* LXVRHX */
12136    3400,
12137    /* LXVRL */
12138    3403,
12139    /* LXVRLL */
12140    3406,
12141    /* LXVRWX */
12142    3409,
12143    /* LXVW4X */
12144    3412,
12145    /* LXVWSX */
12146    3415,
12147    /* LXVX */
12148    3418,
12149    /* MADDHD */
12150    3421,
12151    /* MADDHDU */
12152    3425,
12153    /* MADDLD */
12154    3429,
12155    /* MADDLD8 */
12156    3433,
12157    /* MBAR */
12158    3437,
12159    /* MCRF */
12160    3438,
12161    /* MCRFS */
12162    3440,
12163    /* MCRXRX */
12164    3442,
12165    /* MFBHRBE */
12166    3443,
12167    /* MFCR */
12168    3446,
12169    /* MFCR8 */
12170    3447,
12171    /* MFCTR */
12172    3448,
12173    /* MFCTR8 */
12174    3449,
12175    /* MFDCR */
12176    3450,
12177    /* MFFS */
12178    3452,
12179    /* MFFSCDRN */
12180    3453,
12181    /* MFFSCDRNI */
12182    3455,
12183    /* MFFSCE */
12184    3457,
12185    /* MFFSCRN */
12186    3458,
12187    /* MFFSCRNI */
12188    3460,
12189    /* MFFSL */
12190    3462,
12191    /* MFFS_rec */
12192    3463,
12193    /* MFLR */
12194    3464,
12195    /* MFLR8 */
12196    3465,
12197    /* MFMSR */
12198    3466,
12199    /* MFOCRF */
12200    3467,
12201    /* MFOCRF8 */
12202    3469,
12203    /* MFPMR */
12204    3471,
12205    /* MFSPR */
12206    3473,
12207    /* MFSPR8 */
12208    3475,
12209    /* MFSR */
12210    3477,
12211    /* MFSRIN */
12212    3479,
12213    /* MFTB */
12214    3481,
12215    /* MFTB8 */
12216    3483,
12217    /* MFUDSCR */
12218    3484,
12219    /* MFVRD */
12220    3485,
12221    /* MFVRSAVE */
12222    3487,
12223    /* MFVRSAVEv */
12224    3488,
12225    /* MFVRWZ */
12226    3490,
12227    /* MFVSCR */
12228    3492,
12229    /* MFVSRD */
12230    3493,
12231    /* MFVSRLD */
12232    3495,
12233    /* MFVSRWZ */
12234    3497,
12235    /* MODSD */
12236    3499,
12237    /* MODSW */
12238    3502,
12239    /* MODUD */
12240    3505,
12241    /* MODUW */
12242    3508,
12243    /* MSGSYNC */
12244    3511,
12245    /* MSYNC */
12246    3511,
12247    /* MTCRF */
12248    3511,
12249    /* MTCRF8 */
12250    3513,
12251    /* MTCTR */
12252    3515,
12253    /* MTCTR8 */
12254    3516,
12255    /* MTCTR8loop */
12256    3517,
12257    /* MTCTRloop */
12258    3518,
12259    /* MTDCR */
12260    3519,
12261    /* MTFSB0 */
12262    3521,
12263    /* MTFSB1 */
12264    3522,
12265    /* MTFSF */
12266    3523,
12267    /* MTFSFI */
12268    3527,
12269    /* MTFSFI_rec */
12270    3530,
12271    /* MTFSFIb */
12272    3533,
12273    /* MTFSF_rec */
12274    3535,
12275    /* MTFSFb */
12276    3539,
12277    /* MTLR */
12278    3541,
12279    /* MTLR8 */
12280    3542,
12281    /* MTMSR */
12282    3543,
12283    /* MTMSRD */
12284    3545,
12285    /* MTOCRF */
12286    3547,
12287    /* MTOCRF8 */
12288    3549,
12289    /* MTPMR */
12290    3551,
12291    /* MTSPR */
12292    3553,
12293    /* MTSPR8 */
12294    3555,
12295    /* MTSR */
12296    3557,
12297    /* MTSRIN */
12298    3559,
12299    /* MTUDSCR */
12300    3561,
12301    /* MTVRD */
12302    3562,
12303    /* MTVRSAVE */
12304    3564,
12305    /* MTVRSAVEv */
12306    3565,
12307    /* MTVRWA */
12308    3567,
12309    /* MTVRWZ */
12310    3569,
12311    /* MTVSCR */
12312    3571,
12313    /* MTVSRBM */
12314    3572,
12315    /* MTVSRBMI */
12316    3574,
12317    /* MTVSRD */
12318    3576,
12319    /* MTVSRDD */
12320    3578,
12321    /* MTVSRDM */
12322    3581,
12323    /* MTVSRHM */
12324    3583,
12325    /* MTVSRQM */
12326    3585,
12327    /* MTVSRWA */
12328    3587,
12329    /* MTVSRWM */
12330    3589,
12331    /* MTVSRWS */
12332    3591,
12333    /* MTVSRWZ */
12334    3593,
12335    /* MULHD */
12336    3595,
12337    /* MULHDU */
12338    3598,
12339    /* MULHDU_rec */
12340    3601,
12341    /* MULHD_rec */
12342    3604,
12343    /* MULHW */
12344    3607,
12345    /* MULHWU */
12346    3610,
12347    /* MULHWU_rec */
12348    3613,
12349    /* MULHW_rec */
12350    3616,
12351    /* MULLD */
12352    3619,
12353    /* MULLDO */
12354    3622,
12355    /* MULLDO_rec */
12356    3625,
12357    /* MULLD_rec */
12358    3628,
12359    /* MULLI */
12360    3631,
12361    /* MULLI8 */
12362    3634,
12363    /* MULLW */
12364    3637,
12365    /* MULLWO */
12366    3640,
12367    /* MULLWO_rec */
12368    3643,
12369    /* MULLW_rec */
12370    3646,
12371    /* MoveGOTtoLR */
12372    3649,
12373    /* MovePCtoLR */
12374    3649,
12375    /* MovePCtoLR8 */
12376    3649,
12377    /* NAND */
12378    3649,
12379    /* NAND8 */
12380    3652,
12381    /* NAND8_rec */
12382    3655,
12383    /* NAND_rec */
12384    3658,
12385    /* NAP */
12386    3661,
12387    /* NEG */
12388    3661,
12389    /* NEG8 */
12390    3663,
12391    /* NEG8O */
12392    3665,
12393    /* NEG8O_rec */
12394    3667,
12395    /* NEG8_rec */
12396    3669,
12397    /* NEGO */
12398    3671,
12399    /* NEGO_rec */
12400    3673,
12401    /* NEG_rec */
12402    3675,
12403    /* NOP */
12404    3677,
12405    /* NOP_GT_PWR6 */
12406    3677,
12407    /* NOP_GT_PWR7 */
12408    3677,
12409    /* NOR */
12410    3677,
12411    /* NOR8 */
12412    3680,
12413    /* NOR8_rec */
12414    3683,
12415    /* NOR_rec */
12416    3686,
12417    /* OR */
12418    3689,
12419    /* OR8 */
12420    3692,
12421    /* OR8_rec */
12422    3695,
12423    /* ORC */
12424    3698,
12425    /* ORC8 */
12426    3701,
12427    /* ORC8_rec */
12428    3704,
12429    /* ORC_rec */
12430    3707,
12431    /* ORI */
12432    3710,
12433    /* ORI8 */
12434    3713,
12435    /* ORIS */
12436    3716,
12437    /* ORIS8 */
12438    3719,
12439    /* OR_rec */
12440    3722,
12441    /* PADDI */
12442    3725,
12443    /* PADDI8 */
12444    3728,
12445    /* PADDI8pc */
12446    3731,
12447    /* PADDIdtprel */
12448    3734,
12449    /* PADDIpc */
12450    3737,
12451    /* PDEPD */
12452    3740,
12453    /* PEXTD */
12454    3743,
12455    /* PLBZ */
12456    3746,
12457    /* PLBZ8 */
12458    3749,
12459    /* PLBZ8pc */
12460    3752,
12461    /* PLBZpc */
12462    3755,
12463    /* PLD */
12464    3758,
12465    /* PLDpc */
12466    3761,
12467    /* PLFD */
12468    3764,
12469    /* PLFDpc */
12470    3767,
12471    /* PLFS */
12472    3770,
12473    /* PLFSpc */
12474    3773,
12475    /* PLHA */
12476    3776,
12477    /* PLHA8 */
12478    3779,
12479    /* PLHA8pc */
12480    3782,
12481    /* PLHApc */
12482    3785,
12483    /* PLHZ */
12484    3788,
12485    /* PLHZ8 */
12486    3791,
12487    /* PLHZ8pc */
12488    3794,
12489    /* PLHZpc */
12490    3797,
12491    /* PLI */
12492    3800,
12493    /* PLI8 */
12494    3802,
12495    /* PLWA */
12496    3804,
12497    /* PLWA8 */
12498    3807,
12499    /* PLWA8pc */
12500    3810,
12501    /* PLWApc */
12502    3813,
12503    /* PLWZ */
12504    3816,
12505    /* PLWZ8 */
12506    3819,
12507    /* PLWZ8pc */
12508    3822,
12509    /* PLWZpc */
12510    3825,
12511    /* PLXSD */
12512    3828,
12513    /* PLXSDpc */
12514    3831,
12515    /* PLXSSP */
12516    3834,
12517    /* PLXSSPpc */
12518    3837,
12519    /* PLXV */
12520    3840,
12521    /* PLXVP */
12522    3843,
12523    /* PLXVPpc */
12524    3846,
12525    /* PLXVpc */
12526    3849,
12527    /* PMXVBF16GER2 */
12528    3852,
12529    /* PMXVBF16GER2NN */
12530    3858,
12531    /* PMXVBF16GER2NP */
12532    3865,
12533    /* PMXVBF16GER2PN */
12534    3872,
12535    /* PMXVBF16GER2PP */
12536    3879,
12537    /* PMXVBF16GER2W */
12538    3886,
12539    /* PMXVBF16GER2WNN */
12540    3892,
12541    /* PMXVBF16GER2WNP */
12542    3899,
12543    /* PMXVBF16GER2WPN */
12544    3906,
12545    /* PMXVBF16GER2WPP */
12546    3913,
12547    /* PMXVF16GER2 */
12548    3920,
12549    /* PMXVF16GER2NN */
12550    3926,
12551    /* PMXVF16GER2NP */
12552    3933,
12553    /* PMXVF16GER2PN */
12554    3940,
12555    /* PMXVF16GER2PP */
12556    3947,
12557    /* PMXVF16GER2W */
12558    3954,
12559    /* PMXVF16GER2WNN */
12560    3960,
12561    /* PMXVF16GER2WNP */
12562    3967,
12563    /* PMXVF16GER2WPN */
12564    3974,
12565    /* PMXVF16GER2WPP */
12566    3981,
12567    /* PMXVF32GER */
12568    3988,
12569    /* PMXVF32GERNN */
12570    3993,
12571    /* PMXVF32GERNP */
12572    3999,
12573    /* PMXVF32GERPN */
12574    4005,
12575    /* PMXVF32GERPP */
12576    4011,
12577    /* PMXVF32GERW */
12578    4017,
12579    /* PMXVF32GERWNN */
12580    4022,
12581    /* PMXVF32GERWNP */
12582    4028,
12583    /* PMXVF32GERWPN */
12584    4034,
12585    /* PMXVF32GERWPP */
12586    4040,
12587    /* PMXVF64GER */
12588    4046,
12589    /* PMXVF64GERNN */
12590    4051,
12591    /* PMXVF64GERNP */
12592    4057,
12593    /* PMXVF64GERPN */
12594    4063,
12595    /* PMXVF64GERPP */
12596    4069,
12597    /* PMXVF64GERW */
12598    4075,
12599    /* PMXVF64GERWNN */
12600    4080,
12601    /* PMXVF64GERWNP */
12602    4086,
12603    /* PMXVF64GERWPN */
12604    4092,
12605    /* PMXVF64GERWPP */
12606    4098,
12607    /* PMXVI16GER2 */
12608    4104,
12609    /* PMXVI16GER2PP */
12610    4110,
12611    /* PMXVI16GER2S */
12612    4117,
12613    /* PMXVI16GER2SPP */
12614    4123,
12615    /* PMXVI16GER2SW */
12616    4130,
12617    /* PMXVI16GER2SWPP */
12618    4136,
12619    /* PMXVI16GER2W */
12620    4143,
12621    /* PMXVI16GER2WPP */
12622    4149,
12623    /* PMXVI4GER8 */
12624    4156,
12625    /* PMXVI4GER8PP */
12626    4162,
12627    /* PMXVI4GER8W */
12628    4169,
12629    /* PMXVI4GER8WPP */
12630    4175,
12631    /* PMXVI8GER4 */
12632    4182,
12633    /* PMXVI8GER4PP */
12634    4188,
12635    /* PMXVI8GER4SPP */
12636    4195,
12637    /* PMXVI8GER4W */
12638    4202,
12639    /* PMXVI8GER4WPP */
12640    4208,
12641    /* PMXVI8GER4WSPP */
12642    4215,
12643    /* POPCNTB */
12644    4222,
12645    /* POPCNTB8 */
12646    4224,
12647    /* POPCNTD */
12648    4226,
12649    /* POPCNTW */
12650    4228,
12651    /* PPC32GOT */
12652    4230,
12653    /* PPC32PICGOT */
12654    4231,
12655    /* PREPARE_PROBED_ALLOCA_32 */
12656    4233,
12657    /* PREPARE_PROBED_ALLOCA_64 */
12658    4238,
12659    /* PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32 */
12660    4243,
12661    /* PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64 */
12662    4248,
12663    /* PROBED_ALLOCA_32 */
12664    4253,
12665    /* PROBED_ALLOCA_64 */
12666    4257,
12667    /* PROBED_STACKALLOC_32 */
12668    4261,
12669    /* PROBED_STACKALLOC_64 */
12670    4264,
12671    /* PSTB */
12672    4267,
12673    /* PSTB8 */
12674    4270,
12675    /* PSTB8pc */
12676    4273,
12677    /* PSTBpc */
12678    4276,
12679    /* PSTD */
12680    4279,
12681    /* PSTDpc */
12682    4282,
12683    /* PSTFD */
12684    4285,
12685    /* PSTFDpc */
12686    4288,
12687    /* PSTFS */
12688    4291,
12689    /* PSTFSpc */
12690    4294,
12691    /* PSTH */
12692    4297,
12693    /* PSTH8 */
12694    4300,
12695    /* PSTH8pc */
12696    4303,
12697    /* PSTHpc */
12698    4306,
12699    /* PSTW */
12700    4309,
12701    /* PSTW8 */
12702    4312,
12703    /* PSTW8pc */
12704    4315,
12705    /* PSTWpc */
12706    4318,
12707    /* PSTXSD */
12708    4321,
12709    /* PSTXSDpc */
12710    4324,
12711    /* PSTXSSP */
12712    4327,
12713    /* PSTXSSPpc */
12714    4330,
12715    /* PSTXV */
12716    4333,
12717    /* PSTXVP */
12718    4336,
12719    /* PSTXVPpc */
12720    4339,
12721    /* PSTXVpc */
12722    4342,
12723    /* PseudoEIEIO */
12724    4345,
12725    /* RESTORE_ACC */
12726    4345,
12727    /* RESTORE_CR */
12728    4348,
12729    /* RESTORE_CRBIT */
12730    4351,
12731    /* RESTORE_QUADWORD */
12732    4354,
12733    /* RESTORE_UACC */
12734    4357,
12735    /* RESTORE_WACC */
12736    4360,
12737    /* RFCI */
12738    4363,
12739    /* RFDI */
12740    4363,
12741    /* RFEBB */
12742    4363,
12743    /* RFI */
12744    4364,
12745    /* RFID */
12746    4364,
12747    /* RFMCI */
12748    4364,
12749    /* RLDCL */
12750    4364,
12751    /* RLDCL_rec */
12752    4368,
12753    /* RLDCR */
12754    4372,
12755    /* RLDCR_rec */
12756    4376,
12757    /* RLDIC */
12758    4380,
12759    /* RLDICL */
12760    4384,
12761    /* RLDICL_32 */
12762    4388,
12763    /* RLDICL_32_64 */
12764    4392,
12765    /* RLDICL_32_rec */
12766    4396,
12767    /* RLDICL_rec */
12768    4400,
12769    /* RLDICR */
12770    4404,
12771    /* RLDICR_32 */
12772    4408,
12773    /* RLDICR_rec */
12774    4412,
12775    /* RLDIC_rec */
12776    4416,
12777    /* RLDIMI */
12778    4420,
12779    /* RLDIMI_rec */
12780    4425,
12781    /* RLWIMI */
12782    4430,
12783    /* RLWIMI8 */
12784    4436,
12785    /* RLWIMI8_rec */
12786    4442,
12787    /* RLWIMI_rec */
12788    4448,
12789    /* RLWINM */
12790    4454,
12791    /* RLWINM8 */
12792    4459,
12793    /* RLWINM8_rec */
12794    4464,
12795    /* RLWINM_rec */
12796    4469,
12797    /* RLWNM */
12798    4474,
12799    /* RLWNM8 */
12800    4479,
12801    /* RLWNM8_rec */
12802    4484,
12803    /* RLWNM_rec */
12804    4489,
12805    /* ReadTB */
12806    4494,
12807    /* SC */
12808    4496,
12809    /* SELECT_CC_F16 */
12810    4497,
12811    /* SELECT_CC_F4 */
12812    4502,
12813    /* SELECT_CC_F8 */
12814    4507,
12815    /* SELECT_CC_I4 */
12816    4512,
12817    /* SELECT_CC_I8 */
12818    4517,
12819    /* SELECT_CC_SPE */
12820    4522,
12821    /* SELECT_CC_SPE4 */
12822    4527,
12823    /* SELECT_CC_VRRC */
12824    4532,
12825    /* SELECT_CC_VSFRC */
12826    4537,
12827    /* SELECT_CC_VSRC */
12828    4542,
12829    /* SELECT_CC_VSSRC */
12830    4547,
12831    /* SELECT_F16 */
12832    4552,
12833    /* SELECT_F4 */
12834    4556,
12835    /* SELECT_F8 */
12836    4560,
12837    /* SELECT_I4 */
12838    4564,
12839    /* SELECT_I8 */
12840    4568,
12841    /* SELECT_SPE */
12842    4572,
12843    /* SELECT_SPE4 */
12844    4576,
12845    /* SELECT_VRRC */
12846    4580,
12847    /* SELECT_VSFRC */
12848    4584,
12849    /* SELECT_VSRC */
12850    4588,
12851    /* SELECT_VSSRC */
12852    4592,
12853    /* SETB */
12854    4596,
12855    /* SETB8 */
12856    4598,
12857    /* SETBC */
12858    4600,
12859    /* SETBC8 */
12860    4602,
12861    /* SETBCR */
12862    4604,
12863    /* SETBCR8 */
12864    4606,
12865    /* SETFLM */
12866    4608,
12867    /* SETNBC */
12868    4610,
12869    /* SETNBC8 */
12870    4612,
12871    /* SETNBCR */
12872    4614,
12873    /* SETNBCR8 */
12874    4616,
12875    /* SETRND */
12876    4618,
12877    /* SETRNDi */
12878    4620,
12879    /* SLBFEE_rec */
12880    4622,
12881    /* SLBIA */
12882    4624,
12883    /* SLBIE */
12884    4624,
12885    /* SLBIEG */
12886    4625,
12887    /* SLBMFEE */
12888    4627,
12889    /* SLBMFEV */
12890    4629,
12891    /* SLBMTE */
12892    4631,
12893    /* SLBSYNC */
12894    4633,
12895    /* SLD */
12896    4633,
12897    /* SLD_rec */
12898    4636,
12899    /* SLW */
12900    4639,
12901    /* SLW8 */
12902    4642,
12903    /* SLW8_rec */
12904    4645,
12905    /* SLW_rec */
12906    4648,
12907    /* SPELWZ */
12908    4651,
12909    /* SPELWZX */
12910    4654,
12911    /* SPESTW */
12912    4657,
12913    /* SPESTWX */
12914    4660,
12915    /* SPILL_ACC */
12916    4663,
12917    /* SPILL_CR */
12918    4666,
12919    /* SPILL_CRBIT */
12920    4669,
12921    /* SPILL_QUADWORD */
12922    4672,
12923    /* SPILL_UACC */
12924    4675,
12925    /* SPILL_WACC */
12926    4678,
12927    /* SPLIT_QUADWORD */
12928    4681,
12929    /* SRAD */
12930    4684,
12931    /* SRADI */
12932    4687,
12933    /* SRADI_32 */
12934    4690,
12935    /* SRADI_rec */
12936    4693,
12937    /* SRAD_rec */
12938    4696,
12939    /* SRAW */
12940    4699,
12941    /* SRAWI */
12942    4702,
12943    /* SRAWI_rec */
12944    4705,
12945    /* SRAW_rec */
12946    4708,
12947    /* SRD */
12948    4711,
12949    /* SRD_rec */
12950    4714,
12951    /* SRW */
12952    4717,
12953    /* SRW8 */
12954    4720,
12955    /* SRW8_rec */
12956    4723,
12957    /* SRW_rec */
12958    4726,
12959    /* STB */
12960    4729,
12961    /* STB8 */
12962    4732,
12963    /* STBCIX */
12964    4735,
12965    /* STBCX */
12966    4738,
12967    /* STBEPX */
12968    4741,
12969    /* STBU */
12970    4744,
12971    /* STBU8 */
12972    4748,
12973    /* STBUX */
12974    4752,
12975    /* STBUX8 */
12976    4756,
12977    /* STBX */
12978    4760,
12979    /* STBX8 */
12980    4763,
12981    /* STBXTLS */
12982    4766,
12983    /* STBXTLS_ */
12984    4769,
12985    /* STBXTLS_32 */
12986    4772,
12987    /* STD */
12988    4775,
12989    /* STDAT */
12990    4778,
12991    /* STDBRX */
12992    4781,
12993    /* STDCIX */
12994    4784,
12995    /* STDCX */
12996    4787,
12997    /* STDU */
12998    4790,
12999    /* STDUX */
13000    4794,
13001    /* STDX */
13002    4798,
13003    /* STDXTLS */
13004    4801,
13005    /* STDXTLS_ */
13006    4804,
13007    /* STFD */
13008    4807,
13009    /* STFDEPX */
13010    4810,
13011    /* STFDU */
13012    4813,
13013    /* STFDUX */
13014    4817,
13015    /* STFDX */
13016    4821,
13017    /* STFIWX */
13018    4824,
13019    /* STFS */
13020    4827,
13021    /* STFSU */
13022    4830,
13023    /* STFSUX */
13024    4834,
13025    /* STFSX */
13026    4838,
13027    /* STH */
13028    4841,
13029    /* STH8 */
13030    4844,
13031    /* STHBRX */
13032    4847,
13033    /* STHCIX */
13034    4850,
13035    /* STHCX */
13036    4853,
13037    /* STHEPX */
13038    4856,
13039    /* STHU */
13040    4859,
13041    /* STHU8 */
13042    4863,
13043    /* STHUX */
13044    4867,
13045    /* STHUX8 */
13046    4871,
13047    /* STHX */
13048    4875,
13049    /* STHX8 */
13050    4878,
13051    /* STHXTLS */
13052    4881,
13053    /* STHXTLS_ */
13054    4884,
13055    /* STHXTLS_32 */
13056    4887,
13057    /* STMW */
13058    4890,
13059    /* STOP */
13060    4893,
13061    /* STQ */
13062    4893,
13063    /* STQCX */
13064    4896,
13065    /* STQX_PSEUDO */
13066    4899,
13067    /* STSWI */
13068    4902,
13069    /* STVEBX */
13070    4905,
13071    /* STVEHX */
13072    4908,
13073    /* STVEWX */
13074    4911,
13075    /* STVX */
13076    4914,
13077    /* STVXL */
13078    4917,
13079    /* STW */
13080    4920,
13081    /* STW8 */
13082    4923,
13083    /* STWAT */
13084    4926,
13085    /* STWBRX */
13086    4929,
13087    /* STWCIX */
13088    4932,
13089    /* STWCX */
13090    4935,
13091    /* STWEPX */
13092    4938,
13093    /* STWU */
13094    4941,
13095    /* STWU8 */
13096    4945,
13097    /* STWUX */
13098    4949,
13099    /* STWUX8 */
13100    4953,
13101    /* STWX */
13102    4957,
13103    /* STWX8 */
13104    4960,
13105    /* STWXTLS */
13106    4963,
13107    /* STWXTLS_ */
13108    4966,
13109    /* STWXTLS_32 */
13110    4969,
13111    /* STXSD */
13112    4972,
13113    /* STXSDX */
13114    4975,
13115    /* STXSIBX */
13116    4978,
13117    /* STXSIBXv */
13118    4981,
13119    /* STXSIHX */
13120    4984,
13121    /* STXSIHXv */
13122    4987,
13123    /* STXSIWX */
13124    4990,
13125    /* STXSSP */
13126    4993,
13127    /* STXSSPX */
13128    4996,
13129    /* STXV */
13130    4999,
13131    /* STXVB16X */
13132    5002,
13133    /* STXVD2X */
13134    5005,
13135    /* STXVH8X */
13136    5008,
13137    /* STXVL */
13138    5011,
13139    /* STXVLL */
13140    5014,
13141    /* STXVP */
13142    5017,
13143    /* STXVPRL */
13144    5020,
13145    /* STXVPRLL */
13146    5023,
13147    /* STXVPX */
13148    5026,
13149    /* STXVRBX */
13150    5029,
13151    /* STXVRDX */
13152    5032,
13153    /* STXVRHX */
13154    5035,
13155    /* STXVRL */
13156    5038,
13157    /* STXVRLL */
13158    5041,
13159    /* STXVRWX */
13160    5044,
13161    /* STXVW4X */
13162    5047,
13163    /* STXVX */
13164    5050,
13165    /* SUBF */
13166    5053,
13167    /* SUBF8 */
13168    5056,
13169    /* SUBF8O */
13170    5059,
13171    /* SUBF8O_rec */
13172    5062,
13173    /* SUBF8_rec */
13174    5065,
13175    /* SUBFC */
13176    5068,
13177    /* SUBFC8 */
13178    5071,
13179    /* SUBFC8O */
13180    5074,
13181    /* SUBFC8O_rec */
13182    5077,
13183    /* SUBFC8_rec */
13184    5080,
13185    /* SUBFCO */
13186    5083,
13187    /* SUBFCO_rec */
13188    5086,
13189    /* SUBFC_rec */
13190    5089,
13191    /* SUBFE */
13192    5092,
13193    /* SUBFE8 */
13194    5095,
13195    /* SUBFE8O */
13196    5098,
13197    /* SUBFE8O_rec */
13198    5101,
13199    /* SUBFE8_rec */
13200    5104,
13201    /* SUBFEO */
13202    5107,
13203    /* SUBFEO_rec */
13204    5110,
13205    /* SUBFE_rec */
13206    5113,
13207    /* SUBFIC */
13208    5116,
13209    /* SUBFIC8 */
13210    5119,
13211    /* SUBFME */
13212    5122,
13213    /* SUBFME8 */
13214    5124,
13215    /* SUBFME8O */
13216    5126,
13217    /* SUBFME8O_rec */
13218    5128,
13219    /* SUBFME8_rec */
13220    5130,
13221    /* SUBFMEO */
13222    5132,
13223    /* SUBFMEO_rec */
13224    5134,
13225    /* SUBFME_rec */
13226    5136,
13227    /* SUBFO */
13228    5138,
13229    /* SUBFO_rec */
13230    5141,
13231    /* SUBFUS */
13232    5144,
13233    /* SUBFUS_rec */
13234    5148,
13235    /* SUBFZE */
13236    5152,
13237    /* SUBFZE8 */
13238    5154,
13239    /* SUBFZE8O */
13240    5156,
13241    /* SUBFZE8O_rec */
13242    5158,
13243    /* SUBFZE8_rec */
13244    5160,
13245    /* SUBFZEO */
13246    5162,
13247    /* SUBFZEO_rec */
13248    5164,
13249    /* SUBFZE_rec */
13250    5166,
13251    /* SUBF_rec */
13252    5168,
13253    /* SYNC */
13254    5171,
13255    /* TABORT */
13256    5172,
13257    /* TABORTDC */
13258    5173,
13259    /* TABORTDCI */
13260    5176,
13261    /* TABORTWC */
13262    5179,
13263    /* TABORTWCI */
13264    5182,
13265    /* TAILB */
13266    5185,
13267    /* TAILB8 */
13268    5186,
13269    /* TAILBA */
13270    5187,
13271    /* TAILBA8 */
13272    5188,
13273    /* TAILBCTR */
13274    5189,
13275    /* TAILBCTR8 */
13276    5189,
13277    /* TBEGIN */
13278    5189,
13279    /* TBEGIN_RET */
13280    5190,
13281    /* TCHECK */
13282    5192,
13283    /* TCHECK_RET */
13284    5193,
13285    /* TCRETURNai */
13286    5194,
13287    /* TCRETURNai8 */
13288    5196,
13289    /* TCRETURNdi */
13290    5198,
13291    /* TCRETURNdi8 */
13292    5200,
13293    /* TCRETURNri */
13294    5202,
13295    /* TCRETURNri8 */
13296    5204,
13297    /* TD */
13298    5206,
13299    /* TDI */
13300    5209,
13301    /* TEND */
13302    5212,
13303    /* TLBIA */
13304    5213,
13305    /* TLBIE */
13306    5213,
13307    /* TLBIEL */
13308    5215,
13309    /* TLBIVAX */
13310    5216,
13311    /* TLBLD */
13312    5218,
13313    /* TLBLI */
13314    5219,
13315    /* TLBRE */
13316    5220,
13317    /* TLBRE2 */
13318    5220,
13319    /* TLBSX */
13320    5223,
13321    /* TLBSX2 */
13322    5225,
13323    /* TLBSX2D */
13324    5228,
13325    /* TLBSYNC */
13326    5231,
13327    /* TLBWE */
13328    5231,
13329    /* TLBWE2 */
13330    5231,
13331    /* TLSGDAIX */
13332    5234,
13333    /* TLSGDAIX8 */
13334    5237,
13335    /* TRAP */
13336    5240,
13337    /* TRECHKPT */
13338    5240,
13339    /* TRECLAIM */
13340    5240,
13341    /* TSR */
13342    5241,
13343    /* TW */
13344    5242,
13345    /* TWI */
13346    5245,
13347    /* UNENCODED_NOP */
13348    5248,
13349    /* UpdateGBR */
13350    5248,
13351    /* VABSDUB */
13352    5251,
13353    /* VABSDUH */
13354    5254,
13355    /* VABSDUW */
13356    5257,
13357    /* VADDCUQ */
13358    5260,
13359    /* VADDCUW */
13360    5263,
13361    /* VADDECUQ */
13362    5266,
13363    /* VADDEUQM */
13364    5270,
13365    /* VADDFP */
13366    5274,
13367    /* VADDSBS */
13368    5277,
13369    /* VADDSHS */
13370    5280,
13371    /* VADDSWS */
13372    5283,
13373    /* VADDUBM */
13374    5286,
13375    /* VADDUBS */
13376    5289,
13377    /* VADDUDM */
13378    5292,
13379    /* VADDUHM */
13380    5295,
13381    /* VADDUHS */
13382    5298,
13383    /* VADDUQM */
13384    5301,
13385    /* VADDUWM */
13386    5304,
13387    /* VADDUWS */
13388    5307,
13389    /* VAND */
13390    5310,
13391    /* VANDC */
13392    5313,
13393    /* VAVGSB */
13394    5316,
13395    /* VAVGSH */
13396    5319,
13397    /* VAVGSW */
13398    5322,
13399    /* VAVGUB */
13400    5325,
13401    /* VAVGUH */
13402    5328,
13403    /* VAVGUW */
13404    5331,
13405    /* VBPERMD */
13406    5334,
13407    /* VBPERMQ */
13408    5337,
13409    /* VCFSX */
13410    5340,
13411    /* VCFSX_0 */
13412    5343,
13413    /* VCFUGED */
13414    5345,
13415    /* VCFUX */
13416    5348,
13417    /* VCFUX_0 */
13418    5351,
13419    /* VCIPHER */
13420    5353,
13421    /* VCIPHERLAST */
13422    5356,
13423    /* VCLRLB */
13424    5359,
13425    /* VCLRRB */
13426    5362,
13427    /* VCLZB */
13428    5365,
13429    /* VCLZD */
13430    5367,
13431    /* VCLZDM */
13432    5369,
13433    /* VCLZH */
13434    5372,
13435    /* VCLZLSBB */
13436    5374,
13437    /* VCLZW */
13438    5376,
13439    /* VCMPBFP */
13440    5378,
13441    /* VCMPBFP_rec */
13442    5381,
13443    /* VCMPEQFP */
13444    5384,
13445    /* VCMPEQFP_rec */
13446    5387,
13447    /* VCMPEQUB */
13448    5390,
13449    /* VCMPEQUB_rec */
13450    5393,
13451    /* VCMPEQUD */
13452    5396,
13453    /* VCMPEQUD_rec */
13454    5399,
13455    /* VCMPEQUH */
13456    5402,
13457    /* VCMPEQUH_rec */
13458    5405,
13459    /* VCMPEQUQ */
13460    5408,
13461    /* VCMPEQUQ_rec */
13462    5411,
13463    /* VCMPEQUW */
13464    5414,
13465    /* VCMPEQUW_rec */
13466    5417,
13467    /* VCMPGEFP */
13468    5420,
13469    /* VCMPGEFP_rec */
13470    5423,
13471    /* VCMPGTFP */
13472    5426,
13473    /* VCMPGTFP_rec */
13474    5429,
13475    /* VCMPGTSB */
13476    5432,
13477    /* VCMPGTSB_rec */
13478    5435,
13479    /* VCMPGTSD */
13480    5438,
13481    /* VCMPGTSD_rec */
13482    5441,
13483    /* VCMPGTSH */
13484    5444,
13485    /* VCMPGTSH_rec */
13486    5447,
13487    /* VCMPGTSQ */
13488    5450,
13489    /* VCMPGTSQ_rec */
13490    5453,
13491    /* VCMPGTSW */
13492    5456,
13493    /* VCMPGTSW_rec */
13494    5459,
13495    /* VCMPGTUB */
13496    5462,
13497    /* VCMPGTUB_rec */
13498    5465,
13499    /* VCMPGTUD */
13500    5468,
13501    /* VCMPGTUD_rec */
13502    5471,
13503    /* VCMPGTUH */
13504    5474,
13505    /* VCMPGTUH_rec */
13506    5477,
13507    /* VCMPGTUQ */
13508    5480,
13509    /* VCMPGTUQ_rec */
13510    5483,
13511    /* VCMPGTUW */
13512    5486,
13513    /* VCMPGTUW_rec */
13514    5489,
13515    /* VCMPNEB */
13516    5492,
13517    /* VCMPNEB_rec */
13518    5495,
13519    /* VCMPNEH */
13520    5498,
13521    /* VCMPNEH_rec */
13522    5501,
13523    /* VCMPNEW */
13524    5504,
13525    /* VCMPNEW_rec */
13526    5507,
13527    /* VCMPNEZB */
13528    5510,
13529    /* VCMPNEZB_rec */
13530    5513,
13531    /* VCMPNEZH */
13532    5516,
13533    /* VCMPNEZH_rec */
13534    5519,
13535    /* VCMPNEZW */
13536    5522,
13537    /* VCMPNEZW_rec */
13538    5525,
13539    /* VCMPSQ */
13540    5528,
13541    /* VCMPUQ */
13542    5531,
13543    /* VCNTMBB */
13544    5534,
13545    /* VCNTMBD */
13546    5537,
13547    /* VCNTMBH */
13548    5540,
13549    /* VCNTMBW */
13550    5543,
13551    /* VCTSXS */
13552    5546,
13553    /* VCTSXS_0 */
13554    5549,
13555    /* VCTUXS */
13556    5551,
13557    /* VCTUXS_0 */
13558    5554,
13559    /* VCTZB */
13560    5556,
13561    /* VCTZD */
13562    5558,
13563    /* VCTZDM */
13564    5560,
13565    /* VCTZH */
13566    5563,
13567    /* VCTZLSBB */
13568    5565,
13569    /* VCTZW */
13570    5567,
13571    /* VDIVESD */
13572    5569,
13573    /* VDIVESQ */
13574    5572,
13575    /* VDIVESW */
13576    5575,
13577    /* VDIVEUD */
13578    5578,
13579    /* VDIVEUQ */
13580    5581,
13581    /* VDIVEUW */
13582    5584,
13583    /* VDIVSD */
13584    5587,
13585    /* VDIVSQ */
13586    5590,
13587    /* VDIVSW */
13588    5593,
13589    /* VDIVUD */
13590    5596,
13591    /* VDIVUQ */
13592    5599,
13593    /* VDIVUW */
13594    5602,
13595    /* VEQV */
13596    5605,
13597    /* VEXPANDBM */
13598    5608,
13599    /* VEXPANDDM */
13600    5610,
13601    /* VEXPANDHM */
13602    5612,
13603    /* VEXPANDQM */
13604    5614,
13605    /* VEXPANDWM */
13606    5616,
13607    /* VEXPTEFP */
13608    5618,
13609    /* VEXTDDVLX */
13610    5620,
13611    /* VEXTDDVRX */
13612    5624,
13613    /* VEXTDUBVLX */
13614    5628,
13615    /* VEXTDUBVRX */
13616    5632,
13617    /* VEXTDUHVLX */
13618    5636,
13619    /* VEXTDUHVRX */
13620    5640,
13621    /* VEXTDUWVLX */
13622    5644,
13623    /* VEXTDUWVRX */
13624    5648,
13625    /* VEXTRACTBM */
13626    5652,
13627    /* VEXTRACTD */
13628    5654,
13629    /* VEXTRACTDM */
13630    5657,
13631    /* VEXTRACTHM */
13632    5659,
13633    /* VEXTRACTQM */
13634    5661,
13635    /* VEXTRACTUB */
13636    5663,
13637    /* VEXTRACTUH */
13638    5666,
13639    /* VEXTRACTUW */
13640    5669,
13641    /* VEXTRACTWM */
13642    5672,
13643    /* VEXTSB2D */
13644    5674,
13645    /* VEXTSB2Ds */
13646    5676,
13647    /* VEXTSB2W */
13648    5678,
13649    /* VEXTSB2Ws */
13650    5680,
13651    /* VEXTSD2Q */
13652    5682,
13653    /* VEXTSH2D */
13654    5684,
13655    /* VEXTSH2Ds */
13656    5686,
13657    /* VEXTSH2W */
13658    5688,
13659    /* VEXTSH2Ws */
13660    5690,
13661    /* VEXTSW2D */
13662    5692,
13663    /* VEXTSW2Ds */
13664    5694,
13665    /* VEXTUBLX */
13666    5696,
13667    /* VEXTUBRX */
13668    5699,
13669    /* VEXTUHLX */
13670    5702,
13671    /* VEXTUHRX */
13672    5705,
13673    /* VEXTUWLX */
13674    5708,
13675    /* VEXTUWRX */
13676    5711,
13677    /* VGBBD */
13678    5714,
13679    /* VGNB */
13680    5716,
13681    /* VINSBLX */
13682    5719,
13683    /* VINSBRX */
13684    5723,
13685    /* VINSBVLX */
13686    5727,
13687    /* VINSBVRX */
13688    5731,
13689    /* VINSD */
13690    5735,
13691    /* VINSDLX */
13692    5739,
13693    /* VINSDRX */
13694    5743,
13695    /* VINSERTB */
13696    5747,
13697    /* VINSERTD */
13698    5751,
13699    /* VINSERTH */
13700    5754,
13701    /* VINSERTW */
13702    5758,
13703    /* VINSHLX */
13704    5761,
13705    /* VINSHRX */
13706    5765,
13707    /* VINSHVLX */
13708    5769,
13709    /* VINSHVRX */
13710    5773,
13711    /* VINSW */
13712    5777,
13713    /* VINSWLX */
13714    5781,
13715    /* VINSWRX */
13716    5785,
13717    /* VINSWVLX */
13718    5789,
13719    /* VINSWVRX */
13720    5793,
13721    /* VLOGEFP */
13722    5797,
13723    /* VMADDFP */
13724    5799,
13725    /* VMAXFP */
13726    5803,
13727    /* VMAXSB */
13728    5806,
13729    /* VMAXSD */
13730    5809,
13731    /* VMAXSH */
13732    5812,
13733    /* VMAXSW */
13734    5815,
13735    /* VMAXUB */
13736    5818,
13737    /* VMAXUD */
13738    5821,
13739    /* VMAXUH */
13740    5824,
13741    /* VMAXUW */
13742    5827,
13743    /* VMHADDSHS */
13744    5830,
13745    /* VMHRADDSHS */
13746    5834,
13747    /* VMINFP */
13748    5838,
13749    /* VMINSB */
13750    5841,
13751    /* VMINSD */
13752    5844,
13753    /* VMINSH */
13754    5847,
13755    /* VMINSW */
13756    5850,
13757    /* VMINUB */
13758    5853,
13759    /* VMINUD */
13760    5856,
13761    /* VMINUH */
13762    5859,
13763    /* VMINUW */
13764    5862,
13765    /* VMLADDUHM */
13766    5865,
13767    /* VMODSD */
13768    5869,
13769    /* VMODSQ */
13770    5872,
13771    /* VMODSW */
13772    5875,
13773    /* VMODUD */
13774    5878,
13775    /* VMODUQ */
13776    5881,
13777    /* VMODUW */
13778    5884,
13779    /* VMRGEW */
13780    5887,
13781    /* VMRGHB */
13782    5890,
13783    /* VMRGHH */
13784    5893,
13785    /* VMRGHW */
13786    5896,
13787    /* VMRGLB */
13788    5899,
13789    /* VMRGLH */
13790    5902,
13791    /* VMRGLW */
13792    5905,
13793    /* VMRGOW */
13794    5908,
13795    /* VMSUMCUD */
13796    5911,
13797    /* VMSUMMBM */
13798    5915,
13799    /* VMSUMSHM */
13800    5919,
13801    /* VMSUMSHS */
13802    5923,
13803    /* VMSUMUBM */
13804    5927,
13805    /* VMSUMUDM */
13806    5931,
13807    /* VMSUMUHM */
13808    5935,
13809    /* VMSUMUHS */
13810    5939,
13811    /* VMUL10CUQ */
13812    5943,
13813    /* VMUL10ECUQ */
13814    5945,
13815    /* VMUL10EUQ */
13816    5948,
13817    /* VMUL10UQ */
13818    5951,
13819    /* VMULESB */
13820    5953,
13821    /* VMULESD */
13822    5956,
13823    /* VMULESH */
13824    5959,
13825    /* VMULESW */
13826    5962,
13827    /* VMULEUB */
13828    5965,
13829    /* VMULEUD */
13830    5968,
13831    /* VMULEUH */
13832    5971,
13833    /* VMULEUW */
13834    5974,
13835    /* VMULHSD */
13836    5977,
13837    /* VMULHSW */
13838    5980,
13839    /* VMULHUD */
13840    5983,
13841    /* VMULHUW */
13842    5986,
13843    /* VMULLD */
13844    5989,
13845    /* VMULOSB */
13846    5992,
13847    /* VMULOSD */
13848    5995,
13849    /* VMULOSH */
13850    5998,
13851    /* VMULOSW */
13852    6001,
13853    /* VMULOUB */
13854    6004,
13855    /* VMULOUD */
13856    6007,
13857    /* VMULOUH */
13858    6010,
13859    /* VMULOUW */
13860    6013,
13861    /* VMULUWM */
13862    6016,
13863    /* VNAND */
13864    6019,
13865    /* VNCIPHER */
13866    6022,
13867    /* VNCIPHERLAST */
13868    6025,
13869    /* VNEGD */
13870    6028,
13871    /* VNEGW */
13872    6030,
13873    /* VNMSUBFP */
13874    6032,
13875    /* VNOR */
13876    6036,
13877    /* VOR */
13878    6039,
13879    /* VORC */
13880    6042,
13881    /* VPDEPD */
13882    6045,
13883    /* VPERM */
13884    6048,
13885    /* VPERMR */
13886    6052,
13887    /* VPERMXOR */
13888    6056,
13889    /* VPEXTD */
13890    6060,
13891    /* VPKPX */
13892    6063,
13893    /* VPKSDSS */
13894    6066,
13895    /* VPKSDUS */
13896    6069,
13897    /* VPKSHSS */
13898    6072,
13899    /* VPKSHUS */
13900    6075,
13901    /* VPKSWSS */
13902    6078,
13903    /* VPKSWUS */
13904    6081,
13905    /* VPKUDUM */
13906    6084,
13907    /* VPKUDUS */
13908    6087,
13909    /* VPKUHUM */
13910    6090,
13911    /* VPKUHUS */
13912    6093,
13913    /* VPKUWUM */
13914    6096,
13915    /* VPKUWUS */
13916    6099,
13917    /* VPMSUMB */
13918    6102,
13919    /* VPMSUMD */
13920    6105,
13921    /* VPMSUMH */
13922    6108,
13923    /* VPMSUMW */
13924    6111,
13925    /* VPOPCNTB */
13926    6114,
13927    /* VPOPCNTD */
13928    6116,
13929    /* VPOPCNTH */
13930    6118,
13931    /* VPOPCNTW */
13932    6120,
13933    /* VPRTYBD */
13934    6122,
13935    /* VPRTYBQ */
13936    6124,
13937    /* VPRTYBW */
13938    6126,
13939    /* VREFP */
13940    6128,
13941    /* VRFIM */
13942    6130,
13943    /* VRFIN */
13944    6132,
13945    /* VRFIP */
13946    6134,
13947    /* VRFIZ */
13948    6136,
13949    /* VRLB */
13950    6138,
13951    /* VRLD */
13952    6141,
13953    /* VRLDMI */
13954    6144,
13955    /* VRLDNM */
13956    6148,
13957    /* VRLH */
13958    6151,
13959    /* VRLQ */
13960    6154,
13961    /* VRLQMI */
13962    6157,
13963    /* VRLQNM */
13964    6161,
13965    /* VRLW */
13966    6164,
13967    /* VRLWMI */
13968    6167,
13969    /* VRLWNM */
13970    6171,
13971    /* VRSQRTEFP */
13972    6174,
13973    /* VSBOX */
13974    6176,
13975    /* VSEL */
13976    6178,
13977    /* VSHASIGMAD */
13978    6182,
13979    /* VSHASIGMAW */
13980    6186,
13981    /* VSL */
13982    6190,
13983    /* VSLB */
13984    6193,
13985    /* VSLD */
13986    6196,
13987    /* VSLDBI */
13988    6199,
13989    /* VSLDOI */
13990    6203,
13991    /* VSLH */
13992    6207,
13993    /* VSLO */
13994    6210,
13995    /* VSLQ */
13996    6213,
13997    /* VSLV */
13998    6216,
13999    /* VSLW */
14000    6219,
14001    /* VSPLTB */
14002    6222,
14003    /* VSPLTBs */
14004    6225,
14005    /* VSPLTH */
14006    6228,
14007    /* VSPLTHs */
14008    6231,
14009    /* VSPLTISB */
14010    6234,
14011    /* VSPLTISH */
14012    6236,
14013    /* VSPLTISW */
14014    6238,
14015    /* VSPLTW */
14016    6240,
14017    /* VSR */
14018    6243,
14019    /* VSRAB */
14020    6246,
14021    /* VSRAD */
14022    6249,
14023    /* VSRAH */
14024    6252,
14025    /* VSRAQ */
14026    6255,
14027    /* VSRAW */
14028    6258,
14029    /* VSRB */
14030    6261,
14031    /* VSRD */
14032    6264,
14033    /* VSRDBI */
14034    6267,
14035    /* VSRH */
14036    6271,
14037    /* VSRO */
14038    6274,
14039    /* VSRQ */
14040    6277,
14041    /* VSRV */
14042    6280,
14043    /* VSRW */
14044    6283,
14045    /* VSTRIBL */
14046    6286,
14047    /* VSTRIBL_rec */
14048    6288,
14049    /* VSTRIBR */
14050    6290,
14051    /* VSTRIBR_rec */
14052    6292,
14053    /* VSTRIHL */
14054    6294,
14055    /* VSTRIHL_rec */
14056    6296,
14057    /* VSTRIHR */
14058    6298,
14059    /* VSTRIHR_rec */
14060    6300,
14061    /* VSUBCUQ */
14062    6302,
14063    /* VSUBCUW */
14064    6305,
14065    /* VSUBECUQ */
14066    6308,
14067    /* VSUBEUQM */
14068    6312,
14069    /* VSUBFP */
14070    6316,
14071    /* VSUBSBS */
14072    6319,
14073    /* VSUBSHS */
14074    6322,
14075    /* VSUBSWS */
14076    6325,
14077    /* VSUBUBM */
14078    6328,
14079    /* VSUBUBS */
14080    6331,
14081    /* VSUBUDM */
14082    6334,
14083    /* VSUBUHM */
14084    6337,
14085    /* VSUBUHS */
14086    6340,
14087    /* VSUBUQM */
14088    6343,
14089    /* VSUBUWM */
14090    6346,
14091    /* VSUBUWS */
14092    6349,
14093    /* VSUM2SWS */
14094    6352,
14095    /* VSUM4SBS */
14096    6355,
14097    /* VSUM4SHS */
14098    6358,
14099    /* VSUM4UBS */
14100    6361,
14101    /* VSUMSWS */
14102    6364,
14103    /* VUPKHPX */
14104    6367,
14105    /* VUPKHSB */
14106    6369,
14107    /* VUPKHSH */
14108    6371,
14109    /* VUPKHSW */
14110    6373,
14111    /* VUPKLPX */
14112    6375,
14113    /* VUPKLSB */
14114    6377,
14115    /* VUPKLSH */
14116    6379,
14117    /* VUPKLSW */
14118    6381,
14119    /* VXOR */
14120    6383,
14121    /* V_SET0 */
14122    6386,
14123    /* V_SET0B */
14124    6387,
14125    /* V_SET0H */
14126    6388,
14127    /* V_SETALLONES */
14128    6389,
14129    /* V_SETALLONESB */
14130    6390,
14131    /* V_SETALLONESH */
14132    6391,
14133    /* WAIT */
14134    6392,
14135    /* WRTEE */
14136    6393,
14137    /* WRTEEI */
14138    6394,
14139    /* XOR */
14140    6395,
14141    /* XOR8 */
14142    6398,
14143    /* XOR8_rec */
14144    6401,
14145    /* XORI */
14146    6404,
14147    /* XORI8 */
14148    6407,
14149    /* XORIS */
14150    6410,
14151    /* XORIS8 */
14152    6413,
14153    /* XOR_rec */
14154    6416,
14155    /* XSABSDP */
14156    6419,
14157    /* XSABSQP */
14158    6421,
14159    /* XSADDDP */
14160    6423,
14161    /* XSADDQP */
14162    6426,
14163    /* XSADDQPO */
14164    6429,
14165    /* XSADDSP */
14166    6432,
14167    /* XSCMPEQDP */
14168    6435,
14169    /* XSCMPEQQP */
14170    6438,
14171    /* XSCMPEXPDP */
14172    6441,
14173    /* XSCMPEXPQP */
14174    6444,
14175    /* XSCMPGEDP */
14176    6447,
14177    /* XSCMPGEQP */
14178    6450,
14179    /* XSCMPGTDP */
14180    6453,
14181    /* XSCMPGTQP */
14182    6456,
14183    /* XSCMPODP */
14184    6459,
14185    /* XSCMPOQP */
14186    6462,
14187    /* XSCMPUDP */
14188    6465,
14189    /* XSCMPUQP */
14190    6468,
14191    /* XSCPSGNDP */
14192    6471,
14193    /* XSCPSGNQP */
14194    6474,
14195    /* XSCVDPHP */
14196    6477,
14197    /* XSCVDPQP */
14198    6479,
14199    /* XSCVDPSP */
14200    6481,
14201    /* XSCVDPSPN */
14202    6483,
14203    /* XSCVDPSXDS */
14204    6485,
14205    /* XSCVDPSXDSs */
14206    6487,
14207    /* XSCVDPSXWS */
14208    6489,
14209    /* XSCVDPSXWSs */
14210    6491,
14211    /* XSCVDPUXDS */
14212    6493,
14213    /* XSCVDPUXDSs */
14214    6495,
14215    /* XSCVDPUXWS */
14216    6497,
14217    /* XSCVDPUXWSs */
14218    6499,
14219    /* XSCVHPDP */
14220    6501,
14221    /* XSCVQPDP */
14222    6503,
14223    /* XSCVQPDPO */
14224    6505,
14225    /* XSCVQPSDZ */
14226    6507,
14227    /* XSCVQPSQZ */
14228    6509,
14229    /* XSCVQPSWZ */
14230    6511,
14231    /* XSCVQPUDZ */
14232    6513,
14233    /* XSCVQPUQZ */
14234    6515,
14235    /* XSCVQPUWZ */
14236    6517,
14237    /* XSCVSDQP */
14238    6519,
14239    /* XSCVSPDP */
14240    6521,
14241    /* XSCVSPDPN */
14242    6523,
14243    /* XSCVSQQP */
14244    6525,
14245    /* XSCVSXDDP */
14246    6527,
14247    /* XSCVSXDSP */
14248    6529,
14249    /* XSCVUDQP */
14250    6531,
14251    /* XSCVUQQP */
14252    6533,
14253    /* XSCVUXDDP */
14254    6535,
14255    /* XSCVUXDSP */
14256    6537,
14257    /* XSDIVDP */
14258    6539,
14259    /* XSDIVQP */
14260    6542,
14261    /* XSDIVQPO */
14262    6545,
14263    /* XSDIVSP */
14264    6548,
14265    /* XSIEXPDP */
14266    6551,
14267    /* XSIEXPQP */
14268    6554,
14269    /* XSMADDADP */
14270    6557,
14271    /* XSMADDASP */
14272    6561,
14273    /* XSMADDMDP */
14274    6565,
14275    /* XSMADDMSP */
14276    6569,
14277    /* XSMADDQP */
14278    6573,
14279    /* XSMADDQPO */
14280    6577,
14281    /* XSMAXCDP */
14282    6581,
14283    /* XSMAXCQP */
14284    6584,
14285    /* XSMAXDP */
14286    6587,
14287    /* XSMAXJDP */
14288    6590,
14289    /* XSMINCDP */
14290    6593,
14291    /* XSMINCQP */
14292    6596,
14293    /* XSMINDP */
14294    6599,
14295    /* XSMINJDP */
14296    6602,
14297    /* XSMSUBADP */
14298    6605,
14299    /* XSMSUBASP */
14300    6609,
14301    /* XSMSUBMDP */
14302    6613,
14303    /* XSMSUBMSP */
14304    6617,
14305    /* XSMSUBQP */
14306    6621,
14307    /* XSMSUBQPO */
14308    6625,
14309    /* XSMULDP */
14310    6629,
14311    /* XSMULQP */
14312    6632,
14313    /* XSMULQPO */
14314    6635,
14315    /* XSMULSP */
14316    6638,
14317    /* XSNABSDP */
14318    6641,
14319    /* XSNABSDPs */
14320    6643,
14321    /* XSNABSQP */
14322    6645,
14323    /* XSNEGDP */
14324    6647,
14325    /* XSNEGQP */
14326    6649,
14327    /* XSNMADDADP */
14328    6651,
14329    /* XSNMADDASP */
14330    6655,
14331    /* XSNMADDMDP */
14332    6659,
14333    /* XSNMADDMSP */
14334    6663,
14335    /* XSNMADDQP */
14336    6667,
14337    /* XSNMADDQPO */
14338    6671,
14339    /* XSNMSUBADP */
14340    6675,
14341    /* XSNMSUBASP */
14342    6679,
14343    /* XSNMSUBMDP */
14344    6683,
14345    /* XSNMSUBMSP */
14346    6687,
14347    /* XSNMSUBQP */
14348    6691,
14349    /* XSNMSUBQPO */
14350    6695,
14351    /* XSRDPI */
14352    6699,
14353    /* XSRDPIC */
14354    6701,
14355    /* XSRDPIM */
14356    6703,
14357    /* XSRDPIP */
14358    6705,
14359    /* XSRDPIZ */
14360    6707,
14361    /* XSREDP */
14362    6709,
14363    /* XSRESP */
14364    6711,
14365    /* XSRQPI */
14366    6713,
14367    /* XSRQPIX */
14368    6717,
14369    /* XSRQPXP */
14370    6721,
14371    /* XSRSP */
14372    6725,
14373    /* XSRSQRTEDP */
14374    6727,
14375    /* XSRSQRTESP */
14376    6729,
14377    /* XSSQRTDP */
14378    6731,
14379    /* XSSQRTQP */
14380    6733,
14381    /* XSSQRTQPO */
14382    6735,
14383    /* XSSQRTSP */
14384    6737,
14385    /* XSSUBDP */
14386    6739,
14387    /* XSSUBQP */
14388    6742,
14389    /* XSSUBQPO */
14390    6745,
14391    /* XSSUBSP */
14392    6748,
14393    /* XSTDIVDP */
14394    6751,
14395    /* XSTSQRTDP */
14396    6754,
14397    /* XSTSTDCDP */
14398    6756,
14399    /* XSTSTDCQP */
14400    6759,
14401    /* XSTSTDCSP */
14402    6762,
14403    /* XSXEXPDP */
14404    6765,
14405    /* XSXEXPQP */
14406    6767,
14407    /* XSXSIGDP */
14408    6769,
14409    /* XSXSIGQP */
14410    6771,
14411    /* XVABSDP */
14412    6773,
14413    /* XVABSSP */
14414    6775,
14415    /* XVADDDP */
14416    6777,
14417    /* XVADDSP */
14418    6780,
14419    /* XVBF16GER2 */
14420    6783,
14421    /* XVBF16GER2NN */
14422    6786,
14423    /* XVBF16GER2NP */
14424    6790,
14425    /* XVBF16GER2PN */
14426    6794,
14427    /* XVBF16GER2PP */
14428    6798,
14429    /* XVBF16GER2W */
14430    6802,
14431    /* XVBF16GER2WNN */
14432    6805,
14433    /* XVBF16GER2WNP */
14434    6809,
14435    /* XVBF16GER2WPN */
14436    6813,
14437    /* XVBF16GER2WPP */
14438    6817,
14439    /* XVCMPEQDP */
14440    6821,
14441    /* XVCMPEQDP_rec */
14442    6824,
14443    /* XVCMPEQSP */
14444    6827,
14445    /* XVCMPEQSP_rec */
14446    6830,
14447    /* XVCMPGEDP */
14448    6833,
14449    /* XVCMPGEDP_rec */
14450    6836,
14451    /* XVCMPGESP */
14452    6839,
14453    /* XVCMPGESP_rec */
14454    6842,
14455    /* XVCMPGTDP */
14456    6845,
14457    /* XVCMPGTDP_rec */
14458    6848,
14459    /* XVCMPGTSP */
14460    6851,
14461    /* XVCMPGTSP_rec */
14462    6854,
14463    /* XVCPSGNDP */
14464    6857,
14465    /* XVCPSGNSP */
14466    6860,
14467    /* XVCVBF16SPN */
14468    6863,
14469    /* XVCVDPSP */
14470    6865,
14471    /* XVCVDPSXDS */
14472    6867,
14473    /* XVCVDPSXWS */
14474    6869,
14475    /* XVCVDPUXDS */
14476    6871,
14477    /* XVCVDPUXWS */
14478    6873,
14479    /* XVCVHPSP */
14480    6875,
14481    /* XVCVSPBF16 */
14482    6877,
14483    /* XVCVSPDP */
14484    6879,
14485    /* XVCVSPHP */
14486    6881,
14487    /* XVCVSPSXDS */
14488    6883,
14489    /* XVCVSPSXWS */
14490    6885,
14491    /* XVCVSPUXDS */
14492    6887,
14493    /* XVCVSPUXWS */
14494    6889,
14495    /* XVCVSXDDP */
14496    6891,
14497    /* XVCVSXDSP */
14498    6893,
14499    /* XVCVSXWDP */
14500    6895,
14501    /* XVCVSXWSP */
14502    6897,
14503    /* XVCVUXDDP */
14504    6899,
14505    /* XVCVUXDSP */
14506    6901,
14507    /* XVCVUXWDP */
14508    6903,
14509    /* XVCVUXWSP */
14510    6905,
14511    /* XVDIVDP */
14512    6907,
14513    /* XVDIVSP */
14514    6910,
14515    /* XVF16GER2 */
14516    6913,
14517    /* XVF16GER2NN */
14518    6916,
14519    /* XVF16GER2NP */
14520    6920,
14521    /* XVF16GER2PN */
14522    6924,
14523    /* XVF16GER2PP */
14524    6928,
14525    /* XVF16GER2W */
14526    6932,
14527    /* XVF16GER2WNN */
14528    6935,
14529    /* XVF16GER2WNP */
14530    6939,
14531    /* XVF16GER2WPN */
14532    6943,
14533    /* XVF16GER2WPP */
14534    6947,
14535    /* XVF32GER */
14536    6951,
14537    /* XVF32GERNN */
14538    6954,
14539    /* XVF32GERNP */
14540    6958,
14541    /* XVF32GERPN */
14542    6962,
14543    /* XVF32GERPP */
14544    6966,
14545    /* XVF32GERW */
14546    6970,
14547    /* XVF32GERWNN */
14548    6973,
14549    /* XVF32GERWNP */
14550    6977,
14551    /* XVF32GERWPN */
14552    6981,
14553    /* XVF32GERWPP */
14554    6985,
14555    /* XVF64GER */
14556    6989,
14557    /* XVF64GERNN */
14558    6992,
14559    /* XVF64GERNP */
14560    6996,
14561    /* XVF64GERPN */
14562    7000,
14563    /* XVF64GERPP */
14564    7004,
14565    /* XVF64GERW */
14566    7008,
14567    /* XVF64GERWNN */
14568    7011,
14569    /* XVF64GERWNP */
14570    7015,
14571    /* XVF64GERWPN */
14572    7019,
14573    /* XVF64GERWPP */
14574    7023,
14575    /* XVI16GER2 */
14576    7027,
14577    /* XVI16GER2PP */
14578    7030,
14579    /* XVI16GER2S */
14580    7034,
14581    /* XVI16GER2SPP */
14582    7037,
14583    /* XVI16GER2SW */
14584    7041,
14585    /* XVI16GER2SWPP */
14586    7044,
14587    /* XVI16GER2W */
14588    7048,
14589    /* XVI16GER2WPP */
14590    7051,
14591    /* XVI4GER8 */
14592    7055,
14593    /* XVI4GER8PP */
14594    7058,
14595    /* XVI4GER8W */
14596    7062,
14597    /* XVI4GER8WPP */
14598    7065,
14599    /* XVI8GER4 */
14600    7069,
14601    /* XVI8GER4PP */
14602    7072,
14603    /* XVI8GER4SPP */
14604    7076,
14605    /* XVI8GER4W */
14606    7080,
14607    /* XVI8GER4WPP */
14608    7083,
14609    /* XVI8GER4WSPP */
14610    7087,
14611    /* XVIEXPDP */
14612    7091,
14613    /* XVIEXPSP */
14614    7094,
14615    /* XVMADDADP */
14616    7097,
14617    /* XVMADDASP */
14618    7101,
14619    /* XVMADDMDP */
14620    7105,
14621    /* XVMADDMSP */
14622    7109,
14623    /* XVMAXDP */
14624    7113,
14625    /* XVMAXSP */
14626    7116,
14627    /* XVMINDP */
14628    7119,
14629    /* XVMINSP */
14630    7122,
14631    /* XVMSUBADP */
14632    7125,
14633    /* XVMSUBASP */
14634    7129,
14635    /* XVMSUBMDP */
14636    7133,
14637    /* XVMSUBMSP */
14638    7137,
14639    /* XVMULDP */
14640    7141,
14641    /* XVMULSP */
14642    7144,
14643    /* XVNABSDP */
14644    7147,
14645    /* XVNABSSP */
14646    7149,
14647    /* XVNEGDP */
14648    7151,
14649    /* XVNEGSP */
14650    7153,
14651    /* XVNMADDADP */
14652    7155,
14653    /* XVNMADDASP */
14654    7159,
14655    /* XVNMADDMDP */
14656    7163,
14657    /* XVNMADDMSP */
14658    7167,
14659    /* XVNMSUBADP */
14660    7171,
14661    /* XVNMSUBASP */
14662    7175,
14663    /* XVNMSUBMDP */
14664    7179,
14665    /* XVNMSUBMSP */
14666    7183,
14667    /* XVRDPI */
14668    7187,
14669    /* XVRDPIC */
14670    7189,
14671    /* XVRDPIM */
14672    7191,
14673    /* XVRDPIP */
14674    7193,
14675    /* XVRDPIZ */
14676    7195,
14677    /* XVREDP */
14678    7197,
14679    /* XVRESP */
14680    7199,
14681    /* XVRSPI */
14682    7201,
14683    /* XVRSPIC */
14684    7203,
14685    /* XVRSPIM */
14686    7205,
14687    /* XVRSPIP */
14688    7207,
14689    /* XVRSPIZ */
14690    7209,
14691    /* XVRSQRTEDP */
14692    7211,
14693    /* XVRSQRTESP */
14694    7213,
14695    /* XVSQRTDP */
14696    7215,
14697    /* XVSQRTSP */
14698    7217,
14699    /* XVSUBDP */
14700    7219,
14701    /* XVSUBSP */
14702    7222,
14703    /* XVTDIVDP */
14704    7225,
14705    /* XVTDIVSP */
14706    7228,
14707    /* XVTLSBB */
14708    7231,
14709    /* XVTSQRTDP */
14710    7233,
14711    /* XVTSQRTSP */
14712    7235,
14713    /* XVTSTDCDP */
14714    7237,
14715    /* XVTSTDCSP */
14716    7240,
14717    /* XVXEXPDP */
14718    7243,
14719    /* XVXEXPSP */
14720    7245,
14721    /* XVXSIGDP */
14722    7247,
14723    /* XVXSIGSP */
14724    7249,
14725    /* XXBLENDVB */
14726    7251,
14727    /* XXBLENDVD */
14728    7255,
14729    /* XXBLENDVH */
14730    7259,
14731    /* XXBLENDVW */
14732    7263,
14733    /* XXBRD */
14734    7267,
14735    /* XXBRH */
14736    7269,
14737    /* XXBRQ */
14738    7271,
14739    /* XXBRW */
14740    7273,
14741    /* XXEVAL */
14742    7275,
14743    /* XXEXTRACTUW */
14744    7280,
14745    /* XXGENPCVBM */
14746    7283,
14747    /* XXGENPCVDM */
14748    7286,
14749    /* XXGENPCVHM */
14750    7289,
14751    /* XXGENPCVWM */
14752    7292,
14753    /* XXINSERTW */
14754    7295,
14755    /* XXLAND */
14756    7299,
14757    /* XXLANDC */
14758    7302,
14759    /* XXLEQV */
14760    7305,
14761    /* XXLEQVOnes */
14762    7308,
14763    /* XXLNAND */
14764    7309,
14765    /* XXLNOR */
14766    7312,
14767    /* XXLOR */
14768    7315,
14769    /* XXLORC */
14770    7318,
14771    /* XXLORf */
14772    7321,
14773    /* XXLXOR */
14774    7324,
14775    /* XXLXORdpz */
14776    7327,
14777    /* XXLXORspz */
14778    7328,
14779    /* XXLXORz */
14780    7329,
14781    /* XXMFACC */
14782    7330,
14783    /* XXMFACCW */
14784    7332,
14785    /* XXMRGHW */
14786    7334,
14787    /* XXMRGLW */
14788    7337,
14789    /* XXMTACC */
14790    7340,
14791    /* XXMTACCW */
14792    7342,
14793    /* XXPERM */
14794    7344,
14795    /* XXPERMDI */
14796    7348,
14797    /* XXPERMDIs */
14798    7352,
14799    /* XXPERMR */
14800    7355,
14801    /* XXPERMX */
14802    7359,
14803    /* XXSEL */
14804    7364,
14805    /* XXSETACCZ */
14806    7368,
14807    /* XXSETACCZW */
14808    7369,
14809    /* XXSLDWI */
14810    7370,
14811    /* XXSLDWIs */
14812    7374,
14813    /* XXSPLTI32DX */
14814    7377,
14815    /* XXSPLTIB */
14816    7381,
14817    /* XXSPLTIDP */
14818    7383,
14819    /* XXSPLTIW */
14820    7385,
14821    /* XXSPLTW */
14822    7387,
14823    /* XXSPLTWs */
14824    7390,
14825    /* gBC */
14826    7393,
14827    /* gBCA */
14828    7396,
14829    /* gBCAat */
14830    7399,
14831    /* gBCCTR */
14832    7403,
14833    /* gBCCTRL */
14834    7406,
14835    /* gBCL */
14836    7409,
14837    /* gBCLA */
14838    7412,
14839    /* gBCLAat */
14840    7415,
14841    /* gBCLR */
14842    7419,
14843    /* gBCLRL */
14844    7422,
14845    /* gBCLat */
14846    7425,
14847    /* gBCat */
14848    7429,
14849  };
14850
14851  using namespace OpTypes;
14852  const int16_t OpcodeOperandTypes[] = {
14853
14854    /* PHI */
14855    -1,
14856    /* INLINEASM */
14857    /* INLINEASM_BR */
14858    /* CFI_INSTRUCTION */
14859    i32imm,
14860    /* EH_LABEL */
14861    i32imm,
14862    /* GC_LABEL */
14863    i32imm,
14864    /* ANNOTATION_LABEL */
14865    i32imm,
14866    /* KILL */
14867    /* EXTRACT_SUBREG */
14868    -1, -1, i32imm,
14869    /* INSERT_SUBREG */
14870    -1, -1, -1, i32imm,
14871    /* IMPLICIT_DEF */
14872    -1,
14873    /* SUBREG_TO_REG */
14874    -1, -1, -1, i32imm,
14875    /* COPY_TO_REGCLASS */
14876    -1, -1, i32imm,
14877    /* DBG_VALUE */
14878    /* DBG_VALUE_LIST */
14879    /* DBG_INSTR_REF */
14880    /* DBG_PHI */
14881    /* DBG_LABEL */
14882    -1,
14883    /* REG_SEQUENCE */
14884    -1, -1,
14885    /* COPY */
14886    -1, -1,
14887    /* BUNDLE */
14888    /* LIFETIME_START */
14889    i32imm,
14890    /* LIFETIME_END */
14891    i32imm,
14892    /* PSEUDO_PROBE */
14893    i64imm, i64imm, i8imm, i32imm,
14894    /* ARITH_FENCE */
14895    -1, -1,
14896    /* STACKMAP */
14897    i64imm, i32imm,
14898    /* FENTRY_CALL */
14899    /* PATCHPOINT */
14900    -1, i64imm, i32imm, -1, i32imm, i32imm,
14901    /* LOAD_STACK_GUARD */
14902    -1,
14903    /* PREALLOCATED_SETUP */
14904    i32imm,
14905    /* PREALLOCATED_ARG */
14906    -1, i32imm, i32imm,
14907    /* STATEPOINT */
14908    /* LOCAL_ESCAPE */
14909    -1, i32imm,
14910    /* FAULTING_OP */
14911    -1,
14912    /* PATCHABLE_OP */
14913    /* PATCHABLE_FUNCTION_ENTER */
14914    /* PATCHABLE_RET */
14915    /* PATCHABLE_FUNCTION_EXIT */
14916    /* PATCHABLE_TAIL_CALL */
14917    /* PATCHABLE_EVENT_CALL */
14918    -1, -1,
14919    /* PATCHABLE_TYPED_EVENT_CALL */
14920    -1, -1, -1,
14921    /* ICALL_BRANCH_FUNNEL */
14922    /* MEMBARRIER */
14923    /* G_ASSERT_SEXT */
14924    type0, type0, untyped_imm_0,
14925    /* G_ASSERT_ZEXT */
14926    type0, type0, untyped_imm_0,
14927    /* G_ASSERT_ALIGN */
14928    type0, type0, untyped_imm_0,
14929    /* G_ADD */
14930    type0, type0, type0,
14931    /* G_SUB */
14932    type0, type0, type0,
14933    /* G_MUL */
14934    type0, type0, type0,
14935    /* G_SDIV */
14936    type0, type0, type0,
14937    /* G_UDIV */
14938    type0, type0, type0,
14939    /* G_SREM */
14940    type0, type0, type0,
14941    /* G_UREM */
14942    type0, type0, type0,
14943    /* G_SDIVREM */
14944    type0, type0, type0, type0,
14945    /* G_UDIVREM */
14946    type0, type0, type0, type0,
14947    /* G_AND */
14948    type0, type0, type0,
14949    /* G_OR */
14950    type0, type0, type0,
14951    /* G_XOR */
14952    type0, type0, type0,
14953    /* G_IMPLICIT_DEF */
14954    type0,
14955    /* G_PHI */
14956    type0,
14957    /* G_FRAME_INDEX */
14958    type0, -1,
14959    /* G_GLOBAL_VALUE */
14960    type0, -1,
14961    /* G_EXTRACT */
14962    type0, type1, untyped_imm_0,
14963    /* G_UNMERGE_VALUES */
14964    type0, type1,
14965    /* G_INSERT */
14966    type0, type0, type1, untyped_imm_0,
14967    /* G_MERGE_VALUES */
14968    type0, type1,
14969    /* G_BUILD_VECTOR */
14970    type0, type1,
14971    /* G_BUILD_VECTOR_TRUNC */
14972    type0, type1,
14973    /* G_CONCAT_VECTORS */
14974    type0, type1,
14975    /* G_PTRTOINT */
14976    type0, type1,
14977    /* G_INTTOPTR */
14978    type0, type1,
14979    /* G_BITCAST */
14980    type0, type1,
14981    /* G_FREEZE */
14982    type0, type0,
14983    /* G_INTRINSIC_FPTRUNC_ROUND */
14984    type0, type1, i32imm,
14985    /* G_INTRINSIC_TRUNC */
14986    type0, type0,
14987    /* G_INTRINSIC_ROUND */
14988    type0, type0,
14989    /* G_INTRINSIC_LRINT */
14990    type0, type1,
14991    /* G_INTRINSIC_ROUNDEVEN */
14992    type0, type0,
14993    /* G_READCYCLECOUNTER */
14994    type0,
14995    /* G_LOAD */
14996    type0, ptype1,
14997    /* G_SEXTLOAD */
14998    type0, ptype1,
14999    /* G_ZEXTLOAD */
15000    type0, ptype1,
15001    /* G_INDEXED_LOAD */
15002    type0, ptype1, ptype1, type2, -1,
15003    /* G_INDEXED_SEXTLOAD */
15004    type0, ptype1, ptype1, type2, -1,
15005    /* G_INDEXED_ZEXTLOAD */
15006    type0, ptype1, ptype1, type2, -1,
15007    /* G_STORE */
15008    type0, ptype1,
15009    /* G_INDEXED_STORE */
15010    ptype0, type1, ptype0, ptype2, -1,
15011    /* G_ATOMIC_CMPXCHG_WITH_SUCCESS */
15012    type0, type1, type2, type0, type0,
15013    /* G_ATOMIC_CMPXCHG */
15014    type0, ptype1, type0, type0,
15015    /* G_ATOMICRMW_XCHG */
15016    type0, ptype1, type0,
15017    /* G_ATOMICRMW_ADD */
15018    type0, ptype1, type0,
15019    /* G_ATOMICRMW_SUB */
15020    type0, ptype1, type0,
15021    /* G_ATOMICRMW_AND */
15022    type0, ptype1, type0,
15023    /* G_ATOMICRMW_NAND */
15024    type0, ptype1, type0,
15025    /* G_ATOMICRMW_OR */
15026    type0, ptype1, type0,
15027    /* G_ATOMICRMW_XOR */
15028    type0, ptype1, type0,
15029    /* G_ATOMICRMW_MAX */
15030    type0, ptype1, type0,
15031    /* G_ATOMICRMW_MIN */
15032    type0, ptype1, type0,
15033    /* G_ATOMICRMW_UMAX */
15034    type0, ptype1, type0,
15035    /* G_ATOMICRMW_UMIN */
15036    type0, ptype1, type0,
15037    /* G_ATOMICRMW_FADD */
15038    type0, ptype1, type0,
15039    /* G_ATOMICRMW_FSUB */
15040    type0, ptype1, type0,
15041    /* G_ATOMICRMW_FMAX */
15042    type0, ptype1, type0,
15043    /* G_ATOMICRMW_FMIN */
15044    type0, ptype1, type0,
15045    /* G_ATOMICRMW_UINC_WRAP */
15046    type0, ptype1, type0,
15047    /* G_ATOMICRMW_UDEC_WRAP */
15048    type0, ptype1, type0,
15049    /* G_FENCE */
15050    i32imm, i32imm,
15051    /* G_BRCOND */
15052    type0, -1,
15053    /* G_BRINDIRECT */
15054    type0,
15055    /* G_INVOKE_REGION_START */
15056    /* G_INTRINSIC */
15057    -1,
15058    /* G_INTRINSIC_W_SIDE_EFFECTS */
15059    -1,
15060    /* G_ANYEXT */
15061    type0, type1,
15062    /* G_TRUNC */
15063    type0, type1,
15064    /* G_CONSTANT */
15065    type0, -1,
15066    /* G_FCONSTANT */
15067    type0, -1,
15068    /* G_VASTART */
15069    type0,
15070    /* G_VAARG */
15071    type0, type1, -1,
15072    /* G_SEXT */
15073    type0, type1,
15074    /* G_SEXT_INREG */
15075    type0, type0, untyped_imm_0,
15076    /* G_ZEXT */
15077    type0, type1,
15078    /* G_SHL */
15079    type0, type0, type1,
15080    /* G_LSHR */
15081    type0, type0, type1,
15082    /* G_ASHR */
15083    type0, type0, type1,
15084    /* G_FSHL */
15085    type0, type0, type0, type1,
15086    /* G_FSHR */
15087    type0, type0, type0, type1,
15088    /* G_ROTR */
15089    type0, type0, type1,
15090    /* G_ROTL */
15091    type0, type0, type1,
15092    /* G_ICMP */
15093    type0, -1, type1, type1,
15094    /* G_FCMP */
15095    type0, -1, type1, type1,
15096    /* G_SELECT */
15097    type0, type1, type0, type0,
15098    /* G_UADDO */
15099    type0, type1, type0, type0,
15100    /* G_UADDE */
15101    type0, type1, type0, type0, type1,
15102    /* G_USUBO */
15103    type0, type1, type0, type0,
15104    /* G_USUBE */
15105    type0, type1, type0, type0, type1,
15106    /* G_SADDO */
15107    type0, type1, type0, type0,
15108    /* G_SADDE */
15109    type0, type1, type0, type0, type1,
15110    /* G_SSUBO */
15111    type0, type1, type0, type0,
15112    /* G_SSUBE */
15113    type0, type1, type0, type0, type1,
15114    /* G_UMULO */
15115    type0, type1, type0, type0,
15116    /* G_SMULO */
15117    type0, type1, type0, type0,
15118    /* G_UMULH */
15119    type0, type0, type0,
15120    /* G_SMULH */
15121    type0, type0, type0,
15122    /* G_UADDSAT */
15123    type0, type0, type0,
15124    /* G_SADDSAT */
15125    type0, type0, type0,
15126    /* G_USUBSAT */
15127    type0, type0, type0,
15128    /* G_SSUBSAT */
15129    type0, type0, type0,
15130    /* G_USHLSAT */
15131    type0, type0, type1,
15132    /* G_SSHLSAT */
15133    type0, type0, type1,
15134    /* G_SMULFIX */
15135    type0, type0, type0, untyped_imm_0,
15136    /* G_UMULFIX */
15137    type0, type0, type0, untyped_imm_0,
15138    /* G_SMULFIXSAT */
15139    type0, type0, type0, untyped_imm_0,
15140    /* G_UMULFIXSAT */
15141    type0, type0, type0, untyped_imm_0,
15142    /* G_SDIVFIX */
15143    type0, type0, type0, untyped_imm_0,
15144    /* G_UDIVFIX */
15145    type0, type0, type0, untyped_imm_0,
15146    /* G_SDIVFIXSAT */
15147    type0, type0, type0, untyped_imm_0,
15148    /* G_UDIVFIXSAT */
15149    type0, type0, type0, untyped_imm_0,
15150    /* G_FADD */
15151    type0, type0, type0,
15152    /* G_FSUB */
15153    type0, type0, type0,
15154    /* G_FMUL */
15155    type0, type0, type0,
15156    /* G_FMA */
15157    type0, type0, type0, type0,
15158    /* G_FMAD */
15159    type0, type0, type0, type0,
15160    /* G_FDIV */
15161    type0, type0, type0,
15162    /* G_FREM */
15163    type0, type0, type0,
15164    /* G_FPOW */
15165    type0, type0, type0,
15166    /* G_FPOWI */
15167    type0, type0, type1,
15168    /* G_FEXP */
15169    type0, type0,
15170    /* G_FEXP2 */
15171    type0, type0,
15172    /* G_FLOG */
15173    type0, type0,
15174    /* G_FLOG2 */
15175    type0, type0,
15176    /* G_FLOG10 */
15177    type0, type0,
15178    /* G_FNEG */
15179    type0, type0,
15180    /* G_FPEXT */
15181    type0, type1,
15182    /* G_FPTRUNC */
15183    type0, type1,
15184    /* G_FPTOSI */
15185    type0, type1,
15186    /* G_FPTOUI */
15187    type0, type1,
15188    /* G_SITOFP */
15189    type0, type1,
15190    /* G_UITOFP */
15191    type0, type1,
15192    /* G_FABS */
15193    type0, type0,
15194    /* G_FCOPYSIGN */
15195    type0, type0, type1,
15196    /* G_IS_FPCLASS */
15197    type0, type1, -1,
15198    /* G_FCANONICALIZE */
15199    type0, type0,
15200    /* G_FMINNUM */
15201    type0, type0, type0,
15202    /* G_FMAXNUM */
15203    type0, type0, type0,
15204    /* G_FMINNUM_IEEE */
15205    type0, type0, type0,
15206    /* G_FMAXNUM_IEEE */
15207    type0, type0, type0,
15208    /* G_FMINIMUM */
15209    type0, type0, type0,
15210    /* G_FMAXIMUM */
15211    type0, type0, type0,
15212    /* G_PTR_ADD */
15213    ptype0, ptype0, type1,
15214    /* G_PTRMASK */
15215    ptype0, ptype0, type1,
15216    /* G_SMIN */
15217    type0, type0, type0,
15218    /* G_SMAX */
15219    type0, type0, type0,
15220    /* G_UMIN */
15221    type0, type0, type0,
15222    /* G_UMAX */
15223    type0, type0, type0,
15224    /* G_ABS */
15225    type0, type0,
15226    /* G_LROUND */
15227    type0, type1,
15228    /* G_LLROUND */
15229    type0, type1,
15230    /* G_BR */
15231    -1,
15232    /* G_BRJT */
15233    ptype0, -1, type1,
15234    /* G_INSERT_VECTOR_ELT */
15235    type0, type0, type1, type2,
15236    /* G_EXTRACT_VECTOR_ELT */
15237    type0, type1, type2,
15238    /* G_SHUFFLE_VECTOR */
15239    type0, type1, type1, -1,
15240    /* G_CTTZ */
15241    type0, type1,
15242    /* G_CTTZ_ZERO_UNDEF */
15243    type0, type1,
15244    /* G_CTLZ */
15245    type0, type1,
15246    /* G_CTLZ_ZERO_UNDEF */
15247    type0, type1,
15248    /* G_CTPOP */
15249    type0, type1,
15250    /* G_BSWAP */
15251    type0, type0,
15252    /* G_BITREVERSE */
15253    type0, type0,
15254    /* G_FCEIL */
15255    type0, type0,
15256    /* G_FCOS */
15257    type0, type0,
15258    /* G_FSIN */
15259    type0, type0,
15260    /* G_FSQRT */
15261    type0, type0,
15262    /* G_FFLOOR */
15263    type0, type0,
15264    /* G_FRINT */
15265    type0, type0,
15266    /* G_FNEARBYINT */
15267    type0, type0,
15268    /* G_ADDRSPACE_CAST */
15269    type0, type1,
15270    /* G_BLOCK_ADDR */
15271    type0, -1,
15272    /* G_JUMP_TABLE */
15273    type0, -1,
15274    /* G_DYN_STACKALLOC */
15275    ptype0, type1, i32imm,
15276    /* G_STRICT_FADD */
15277    type0, type0, type0,
15278    /* G_STRICT_FSUB */
15279    type0, type0, type0,
15280    /* G_STRICT_FMUL */
15281    type0, type0, type0,
15282    /* G_STRICT_FDIV */
15283    type0, type0, type0,
15284    /* G_STRICT_FREM */
15285    type0, type0, type0,
15286    /* G_STRICT_FMA */
15287    type0, type0, type0, type0,
15288    /* G_STRICT_FSQRT */
15289    type0, type0,
15290    /* G_READ_REGISTER */
15291    type0, -1,
15292    /* G_WRITE_REGISTER */
15293    -1, type0,
15294    /* G_MEMCPY */
15295    ptype0, ptype1, type2, untyped_imm_0,
15296    /* G_MEMCPY_INLINE */
15297    ptype0, ptype1, type2,
15298    /* G_MEMMOVE */
15299    ptype0, ptype1, type2, untyped_imm_0,
15300    /* G_MEMSET */
15301    ptype0, type1, type2, untyped_imm_0,
15302    /* G_BZERO */
15303    ptype0, type1, untyped_imm_0,
15304    /* G_VECREDUCE_SEQ_FADD */
15305    type0, type1, type2,
15306    /* G_VECREDUCE_SEQ_FMUL */
15307    type0, type1, type2,
15308    /* G_VECREDUCE_FADD */
15309    type0, type1,
15310    /* G_VECREDUCE_FMUL */
15311    type0, type1,
15312    /* G_VECREDUCE_FMAX */
15313    type0, type1,
15314    /* G_VECREDUCE_FMIN */
15315    type0, type1,
15316    /* G_VECREDUCE_ADD */
15317    type0, type1,
15318    /* G_VECREDUCE_MUL */
15319    type0, type1,
15320    /* G_VECREDUCE_AND */
15321    type0, type1,
15322    /* G_VECREDUCE_OR */
15323    type0, type1,
15324    /* G_VECREDUCE_XOR */
15325    type0, type1,
15326    /* G_VECREDUCE_SMAX */
15327    type0, type1,
15328    /* G_VECREDUCE_SMIN */
15329    type0, type1,
15330    /* G_VECREDUCE_UMAX */
15331    type0, type1,
15332    /* G_VECREDUCE_UMIN */
15333    type0, type1,
15334    /* G_SBFX */
15335    type0, type0, type1, type1,
15336    /* G_UBFX */
15337    type0, type0, type1, type1,
15338    /* ATOMIC_CMP_SWAP_I128 */
15339    g8prc, g8prc, ptr_rc_nor0, ptr_rc_idx, g8rc, g8rc, g8rc, g8rc,
15340    /* ATOMIC_LOAD_ADD_I128 */
15341    g8prc, g8prc, ptr_rc_nor0, ptr_rc_idx, g8rc, g8rc,
15342    /* ATOMIC_LOAD_AND_I128 */
15343    g8prc, g8prc, ptr_rc_nor0, ptr_rc_idx, g8rc, g8rc,
15344    /* ATOMIC_LOAD_NAND_I128 */
15345    g8prc, g8prc, ptr_rc_nor0, ptr_rc_idx, g8rc, g8rc,
15346    /* ATOMIC_LOAD_OR_I128 */
15347    g8prc, g8prc, ptr_rc_nor0, ptr_rc_idx, g8rc, g8rc,
15348    /* ATOMIC_LOAD_SUB_I128 */
15349    g8prc, g8prc, ptr_rc_nor0, ptr_rc_idx, g8rc, g8rc,
15350    /* ATOMIC_LOAD_XOR_I128 */
15351    g8prc, g8prc, ptr_rc_nor0, ptr_rc_idx, g8rc, g8rc,
15352    /* ATOMIC_SWAP_I128 */
15353    g8prc, g8prc, ptr_rc_nor0, ptr_rc_idx, g8rc, g8rc,
15354    /* BUILD_QUADWORD */
15355    g8prc, g8rc, g8rc,
15356    /* BUILD_UACC */
15357    acc, uacc,
15358    /* CFENCE8 */
15359    g8rc,
15360    /* CLRLSLDI */
15361    g8rc, g8rc, u6imm, u6imm,
15362    /* CLRLSLDI_rec */
15363    g8rc, g8rc, u6imm, u6imm,
15364    /* CLRLSLWI */
15365    gprc, gprc, u5imm, u5imm,
15366    /* CLRLSLWI_rec */
15367    gprc, gprc, u5imm, u5imm,
15368    /* CLRRDI */
15369    g8rc, g8rc, u6imm,
15370    /* CLRRDI_rec */
15371    g8rc, g8rc, u6imm,
15372    /* CLRRWI */
15373    gprc, gprc, u5imm,
15374    /* CLRRWI_rec */
15375    gprc, gprc, u5imm,
15376    /* DCBFL */
15377    ptr_rc_nor0, ptr_rc_idx,
15378    /* DCBFLP */
15379    ptr_rc_nor0, ptr_rc_idx,
15380    /* DCBFPS */
15381    ptr_rc_nor0, ptr_rc_idx,
15382    /* DCBFx */
15383    ptr_rc_nor0, ptr_rc_idx,
15384    /* DCBSTPS */
15385    ptr_rc_nor0, ptr_rc_idx,
15386    /* DCBTCT */
15387    ptr_rc_nor0, ptr_rc_idx, u5imm,
15388    /* DCBTDS */
15389    ptr_rc_nor0, ptr_rc_idx, u5imm,
15390    /* DCBTSTCT */
15391    ptr_rc_nor0, ptr_rc_idx, u5imm,
15392    /* DCBTSTDS */
15393    ptr_rc_nor0, ptr_rc_idx, u5imm,
15394    /* DCBTSTT */
15395    ptr_rc_nor0, ptr_rc_idx,
15396    /* DCBTSTx */
15397    ptr_rc_nor0, ptr_rc_idx,
15398    /* DCBTT */
15399    ptr_rc_nor0, ptr_rc_idx,
15400    /* DCBTx */
15401    ptr_rc_nor0, ptr_rc_idx,
15402    /* DFLOADf32 */
15403    vssrc, dispRIX, ptr_rc_nor0,
15404    /* DFLOADf64 */
15405    vsfrc, dispRIX, ptr_rc_nor0,
15406    /* DFSTOREf32 */
15407    vssrc, dispRIX, ptr_rc_nor0,
15408    /* DFSTOREf64 */
15409    vsfrc, dispRIX, ptr_rc_nor0,
15410    /* EXTLDI */
15411    g8rc, g8rc, u6imm, u6imm,
15412    /* EXTLDI_rec */
15413    g8rc, g8rc, u6imm, u6imm,
15414    /* EXTLWI */
15415    gprc, gprc, u5imm, u5imm,
15416    /* EXTLWI_rec */
15417    gprc, gprc, u5imm, u5imm,
15418    /* EXTRDI */
15419    g8rc, g8rc, u6imm, u6imm,
15420    /* EXTRDI_rec */
15421    g8rc, g8rc, u6imm, u6imm,
15422    /* EXTRWI */
15423    gprc, gprc, u5imm, u5imm,
15424    /* EXTRWI_rec */
15425    gprc, gprc, u5imm, u5imm,
15426    /* INSLWI */
15427    gprc, gprc, u5imm, u5imm,
15428    /* INSLWI_rec */
15429    gprc, gprc, u5imm, u5imm,
15430    /* INSRDI */
15431    g8rc, g8rc, u6imm, u6imm,
15432    /* INSRDI_rec */
15433    g8rc, g8rc, u6imm, u6imm,
15434    /* INSRWI */
15435    gprc, gprc, u5imm, u5imm,
15436    /* INSRWI_rec */
15437    gprc, gprc, u5imm, u5imm,
15438    /* KILL_PAIR */
15439    vsrprc, vsrprc,
15440    /* LAx */
15441    gprc, dispRI, ptr_rc_nor0,
15442    /* LIWAX */
15443    vsfrc, ptr_rc_nor0, ptr_rc_idx,
15444    /* LIWZX */
15445    vsfrc, ptr_rc_nor0, ptr_rc_idx,
15446    /* RLWIMIbm */
15447    g8rc, g8rc, u5imm, i32imm,
15448    /* RLWIMIbm_rec */
15449    g8rc, g8rc, u5imm, i32imm,
15450    /* RLWINMbm */
15451    g8rc, g8rc, u5imm, i32imm,
15452    /* RLWINMbm_rec */
15453    g8rc, g8rc, u5imm, i32imm,
15454    /* RLWNMbm */
15455    g8rc, g8rc, u5imm, i32imm,
15456    /* RLWNMbm_rec */
15457    g8rc, g8rc, u5imm, i32imm,
15458    /* ROTRDI */
15459    g8rc, g8rc, u6imm,
15460    /* ROTRDI_rec */
15461    g8rc, g8rc, u6imm,
15462    /* ROTRWI */
15463    gprc, gprc, u5imm,
15464    /* ROTRWI_rec */
15465    gprc, gprc, u5imm,
15466    /* SLDI */
15467    g8rc, g8rc, u6imm,
15468    /* SLDI_rec */
15469    g8rc, g8rc, u6imm,
15470    /* SLWI */
15471    gprc, gprc, u5imm,
15472    /* SLWI_rec */
15473    gprc, gprc, u5imm,
15474    /* SPILLTOVSR_LD */
15475    spilltovsrrc, dispRIX, ptr_rc_nor0,
15476    /* SPILLTOVSR_LDX */
15477    spilltovsrrc, ptr_rc_nor0, ptr_rc_idx,
15478    /* SPILLTOVSR_ST */
15479    spilltovsrrc, dispRIX, ptr_rc_nor0,
15480    /* SPILLTOVSR_STX */
15481    spilltovsrrc, ptr_rc_nor0, ptr_rc_idx,
15482    /* SRDI */
15483    g8rc, g8rc, u6imm,
15484    /* SRDI_rec */
15485    g8rc, g8rc, u6imm,
15486    /* SRWI */
15487    gprc, gprc, u5imm,
15488    /* SRWI_rec */
15489    gprc, gprc, u5imm,
15490    /* STIWX */
15491    vsfrc, ptr_rc_nor0, ptr_rc_idx,
15492    /* SUBI */
15493    gprc, gprc, s16imm,
15494    /* SUBIC */
15495    gprc, gprc, s16imm,
15496    /* SUBIC_rec */
15497    gprc, gprc, s16imm,
15498    /* SUBIS */
15499    gprc, gprc, s16imm,
15500    /* SUBPCIS */
15501    g8rc, s16imm,
15502    /* XFLOADf32 */
15503    vssrc, ptr_rc_nor0, ptr_rc_idx,
15504    /* XFLOADf64 */
15505    vsfrc, ptr_rc_nor0, ptr_rc_idx,
15506    /* XFSTOREf32 */
15507    vssrc, ptr_rc_nor0, ptr_rc_idx,
15508    /* XFSTOREf64 */
15509    vsfrc, ptr_rc_nor0, ptr_rc_idx,
15510    /* ADD4 */
15511    gprc, gprc, gprc,
15512    /* ADD4O */
15513    gprc, gprc, gprc,
15514    /* ADD4O_rec */
15515    gprc, gprc, gprc,
15516    /* ADD4TLS */
15517    gprc, gprc, tlsreg32,
15518    /* ADD4_rec */
15519    gprc, gprc, gprc,
15520    /* ADD8 */
15521    g8rc, g8rc, g8rc,
15522    /* ADD8O */
15523    g8rc, g8rc, g8rc,
15524    /* ADD8O_rec */
15525    g8rc, g8rc, g8rc,
15526    /* ADD8TLS */
15527    g8rc, g8rc_nox0, tlsreg,
15528    /* ADD8TLS_ */
15529    g8rc, g8rc, tlsreg,
15530    /* ADD8_rec */
15531    g8rc, g8rc, g8rc,
15532    /* ADDC */
15533    gprc, gprc, gprc,
15534    /* ADDC8 */
15535    g8rc, g8rc, g8rc,
15536    /* ADDC8O */
15537    g8rc, g8rc, g8rc,
15538    /* ADDC8O_rec */
15539    g8rc, g8rc, g8rc,
15540    /* ADDC8_rec */
15541    g8rc, g8rc, g8rc,
15542    /* ADDCO */
15543    gprc, gprc, gprc,
15544    /* ADDCO_rec */
15545    gprc, gprc, gprc,
15546    /* ADDC_rec */
15547    gprc, gprc, gprc,
15548    /* ADDE */
15549    gprc, gprc, gprc,
15550    /* ADDE8 */
15551    g8rc, g8rc, g8rc,
15552    /* ADDE8O */
15553    g8rc, g8rc, g8rc,
15554    /* ADDE8O_rec */
15555    g8rc, g8rc, g8rc,
15556    /* ADDE8_rec */
15557    g8rc, g8rc, g8rc,
15558    /* ADDEO */
15559    gprc, gprc, gprc,
15560    /* ADDEO_rec */
15561    gprc, gprc, gprc,
15562    /* ADDEX */
15563    gprc, gprc, gprc, u2imm,
15564    /* ADDEX8 */
15565    g8rc, g8rc, g8rc, u2imm,
15566    /* ADDE_rec */
15567    gprc, gprc, gprc,
15568    /* ADDI */
15569    gprc, gprc_nor0, s16imm,
15570    /* ADDI8 */
15571    g8rc, g8rc_nox0, s16imm64,
15572    /* ADDIC */
15573    gprc, gprc, s16imm,
15574    /* ADDIC8 */
15575    g8rc, g8rc, s16imm64,
15576    /* ADDIC_rec */
15577    gprc, gprc, s16imm,
15578    /* ADDIS */
15579    gprc, gprc_nor0, s17imm,
15580    /* ADDIS8 */
15581    g8rc, g8rc_nox0, s17imm64,
15582    /* ADDISdtprelHA */
15583    g8rc, g8rc_nox0, s16imm64,
15584    /* ADDISdtprelHA32 */
15585    gprc, gprc_nor0, s16imm,
15586    /* ADDISgotTprelHA */
15587    g8rc, g8rc_nox0, s16imm64,
15588    /* ADDIStlsgdHA */
15589    g8rc, g8rc_nox0, s16imm64,
15590    /* ADDIStlsldHA */
15591    g8rc, g8rc_nox0, s16imm64,
15592    /* ADDIStocHA */
15593    gprc, gprc_nor0, i32imm,
15594    /* ADDIStocHA8 */
15595    g8rc, g8rc_nox0, i64imm,
15596    /* ADDIdtprelL */
15597    g8rc, g8rc_nox0, s16imm64,
15598    /* ADDIdtprelL32 */
15599    gprc, gprc_nor0, s16imm,
15600    /* ADDItlsgdL */
15601    g8rc, g8rc_nox0, s16imm64,
15602    /* ADDItlsgdL32 */
15603    gprc, gprc_nor0, s16imm,
15604    /* ADDItlsgdLADDR */
15605    g8rc, g8rc_nox0, s16imm64, tlsgd,
15606    /* ADDItlsgdLADDR32 */
15607    gprc, gprc_nor0, s16imm, tlsgd32,
15608    /* ADDItlsldL */
15609    g8rc, g8rc_nox0, s16imm64,
15610    /* ADDItlsldL32 */
15611    gprc, gprc_nor0, s16imm,
15612    /* ADDItlsldLADDR */
15613    g8rc, g8rc_nox0, s16imm64, tlsgd,
15614    /* ADDItlsldLADDR32 */
15615    gprc, gprc_nor0, s16imm, tlsgd32,
15616    /* ADDItoc */
15617    gprc, i32imm, gprc,
15618    /* ADDItoc8 */
15619    g8rc, i64imm, g8rc_nox0,
15620    /* ADDItocL */
15621    g8rc, g8rc_nox0, i64imm,
15622    /* ADDME */
15623    gprc, gprc,
15624    /* ADDME8 */
15625    g8rc, g8rc,
15626    /* ADDME8O */
15627    g8rc, g8rc,
15628    /* ADDME8O_rec */
15629    g8rc, g8rc,
15630    /* ADDME8_rec */
15631    g8rc, g8rc,
15632    /* ADDMEO */
15633    gprc, gprc,
15634    /* ADDMEO_rec */
15635    gprc, gprc,
15636    /* ADDME_rec */
15637    gprc, gprc,
15638    /* ADDPCIS */
15639    g8rc, i32imm,
15640    /* ADDZE */
15641    gprc, gprc,
15642    /* ADDZE8 */
15643    g8rc, g8rc,
15644    /* ADDZE8O */
15645    g8rc, g8rc,
15646    /* ADDZE8O_rec */
15647    g8rc, g8rc,
15648    /* ADDZE8_rec */
15649    g8rc, g8rc,
15650    /* ADDZEO */
15651    gprc, gprc,
15652    /* ADDZEO_rec */
15653    gprc, gprc,
15654    /* ADDZE_rec */
15655    gprc, gprc,
15656    /* ADJCALLSTACKDOWN */
15657    u16imm, u16imm,
15658    /* ADJCALLSTACKUP */
15659    u16imm, u16imm,
15660    /* AND */
15661    gprc, gprc, gprc,
15662    /* AND8 */
15663    g8rc, g8rc, g8rc,
15664    /* AND8_rec */
15665    g8rc, g8rc, g8rc,
15666    /* ANDC */
15667    gprc, gprc, gprc,
15668    /* ANDC8 */
15669    g8rc, g8rc, g8rc,
15670    /* ANDC8_rec */
15671    g8rc, g8rc, g8rc,
15672    /* ANDC_rec */
15673    gprc, gprc, gprc,
15674    /* ANDI8_rec */
15675    g8rc, g8rc, u16imm64,
15676    /* ANDIS8_rec */
15677    g8rc, g8rc, u16imm64,
15678    /* ANDIS_rec */
15679    gprc, gprc, u16imm,
15680    /* ANDI_rec */
15681    gprc, gprc, u16imm,
15682    /* ANDI_rec_1_EQ_BIT */
15683    crbitrc, gprc,
15684    /* ANDI_rec_1_EQ_BIT8 */
15685    crbitrc, g8rc,
15686    /* ANDI_rec_1_GT_BIT */
15687    crbitrc, gprc,
15688    /* ANDI_rec_1_GT_BIT8 */
15689    crbitrc, g8rc,
15690    /* AND_rec */
15691    gprc, gprc, gprc,
15692    /* ATOMIC_CMP_SWAP_I16 */
15693    gprc, ptr_rc_nor0, ptr_rc_idx, gprc, gprc,
15694    /* ATOMIC_CMP_SWAP_I32 */
15695    gprc, ptr_rc_nor0, ptr_rc_idx, gprc, gprc,
15696    /* ATOMIC_CMP_SWAP_I64 */
15697    g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc, g8rc,
15698    /* ATOMIC_CMP_SWAP_I8 */
15699    gprc, ptr_rc_nor0, ptr_rc_idx, gprc, gprc,
15700    /* ATOMIC_LOAD_ADD_I16 */
15701    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15702    /* ATOMIC_LOAD_ADD_I32 */
15703    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15704    /* ATOMIC_LOAD_ADD_I64 */
15705    g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc,
15706    /* ATOMIC_LOAD_ADD_I8 */
15707    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15708    /* ATOMIC_LOAD_AND_I16 */
15709    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15710    /* ATOMIC_LOAD_AND_I32 */
15711    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15712    /* ATOMIC_LOAD_AND_I64 */
15713    g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc,
15714    /* ATOMIC_LOAD_AND_I8 */
15715    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15716    /* ATOMIC_LOAD_MAX_I16 */
15717    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15718    /* ATOMIC_LOAD_MAX_I32 */
15719    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15720    /* ATOMIC_LOAD_MAX_I64 */
15721    g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc,
15722    /* ATOMIC_LOAD_MAX_I8 */
15723    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15724    /* ATOMIC_LOAD_MIN_I16 */
15725    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15726    /* ATOMIC_LOAD_MIN_I32 */
15727    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15728    /* ATOMIC_LOAD_MIN_I64 */
15729    g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc,
15730    /* ATOMIC_LOAD_MIN_I8 */
15731    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15732    /* ATOMIC_LOAD_NAND_I16 */
15733    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15734    /* ATOMIC_LOAD_NAND_I32 */
15735    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15736    /* ATOMIC_LOAD_NAND_I64 */
15737    g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc,
15738    /* ATOMIC_LOAD_NAND_I8 */
15739    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15740    /* ATOMIC_LOAD_OR_I16 */
15741    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15742    /* ATOMIC_LOAD_OR_I32 */
15743    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15744    /* ATOMIC_LOAD_OR_I64 */
15745    g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc,
15746    /* ATOMIC_LOAD_OR_I8 */
15747    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15748    /* ATOMIC_LOAD_SUB_I16 */
15749    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15750    /* ATOMIC_LOAD_SUB_I32 */
15751    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15752    /* ATOMIC_LOAD_SUB_I64 */
15753    g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc,
15754    /* ATOMIC_LOAD_SUB_I8 */
15755    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15756    /* ATOMIC_LOAD_UMAX_I16 */
15757    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15758    /* ATOMIC_LOAD_UMAX_I32 */
15759    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15760    /* ATOMIC_LOAD_UMAX_I64 */
15761    g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc,
15762    /* ATOMIC_LOAD_UMAX_I8 */
15763    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15764    /* ATOMIC_LOAD_UMIN_I16 */
15765    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15766    /* ATOMIC_LOAD_UMIN_I32 */
15767    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15768    /* ATOMIC_LOAD_UMIN_I64 */
15769    g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc,
15770    /* ATOMIC_LOAD_UMIN_I8 */
15771    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15772    /* ATOMIC_LOAD_XOR_I16 */
15773    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15774    /* ATOMIC_LOAD_XOR_I32 */
15775    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15776    /* ATOMIC_LOAD_XOR_I64 */
15777    g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc,
15778    /* ATOMIC_LOAD_XOR_I8 */
15779    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15780    /* ATOMIC_SWAP_I16 */
15781    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15782    /* ATOMIC_SWAP_I32 */
15783    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15784    /* ATOMIC_SWAP_I64 */
15785    g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc,
15786    /* ATOMIC_SWAP_I8 */
15787    gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
15788    /* ATTN */
15789    /* B */
15790    directbrtarget,
15791    /* BA */
15792    absdirectbrtarget,
15793    /* BC */
15794    crbitrc, condbrtarget,
15795    /* BCC */
15796    i32imm, crrc, condbrtarget,
15797    /* BCCA */
15798    i32imm, crrc, abscondbrtarget,
15799    /* BCCCTR */
15800    i32imm, crrc,
15801    /* BCCCTR8 */
15802    i32imm, crrc,
15803    /* BCCCTRL */
15804    i32imm, crrc,
15805    /* BCCCTRL8 */
15806    i32imm, crrc,
15807    /* BCCL */
15808    i32imm, crrc, condbrtarget,
15809    /* BCCLA */
15810    i32imm, crrc, abscondbrtarget,
15811    /* BCCLR */
15812    i32imm, crrc,
15813    /* BCCLRL */
15814    i32imm, crrc,
15815    /* BCCTR */
15816    crbitrc,
15817    /* BCCTR8 */
15818    crbitrc,
15819    /* BCCTR8n */
15820    crbitrc,
15821    /* BCCTRL */
15822    crbitrc,
15823    /* BCCTRL8 */
15824    crbitrc,
15825    /* BCCTRL8n */
15826    crbitrc,
15827    /* BCCTRLn */
15828    crbitrc,
15829    /* BCCTRn */
15830    crbitrc,
15831    /* BCDADD_rec */
15832    vrrc, vrrc, vrrc, u1imm,
15833    /* BCDCFN_rec */
15834    vrrc, vrrc, u1imm,
15835    /* BCDCFSQ_rec */
15836    vrrc, vrrc, u1imm,
15837    /* BCDCFZ_rec */
15838    vrrc, vrrc, u1imm,
15839    /* BCDCPSGN_rec */
15840    vrrc, vrrc, vrrc,
15841    /* BCDCTN_rec */
15842    vrrc, vrrc,
15843    /* BCDCTSQ_rec */
15844    vrrc, vrrc,
15845    /* BCDCTZ_rec */
15846    vrrc, vrrc, u1imm,
15847    /* BCDSETSGN_rec */
15848    vrrc, vrrc, u1imm,
15849    /* BCDSR_rec */
15850    vrrc, vrrc, vrrc, u1imm,
15851    /* BCDSUB_rec */
15852    vrrc, vrrc, vrrc, u1imm,
15853    /* BCDS_rec */
15854    vrrc, vrrc, vrrc, u1imm,
15855    /* BCDTRUNC_rec */
15856    vrrc, vrrc, vrrc, u1imm,
15857    /* BCDUS_rec */
15858    vrrc, vrrc, vrrc,
15859    /* BCDUTRUNC_rec */
15860    vrrc, vrrc, vrrc,
15861    /* BCL */
15862    crbitrc, condbrtarget,
15863    /* BCLR */
15864    crbitrc,
15865    /* BCLRL */
15866    crbitrc,
15867    /* BCLRLn */
15868    crbitrc,
15869    /* BCLRn */
15870    crbitrc,
15871    /* BCLalways */
15872    condbrtarget,
15873    /* BCLn */
15874    crbitrc, condbrtarget,
15875    /* BCTR */
15876    /* BCTR8 */
15877    /* BCTRL */
15878    /* BCTRL8 */
15879    /* BCTRL8_LDinto_toc */
15880    dispRIX, ptr_rc_nor0,
15881    /* BCTRL8_LDinto_toc_RM */
15882    dispRIX, ptr_rc_nor0,
15883    /* BCTRL8_RM */
15884    /* BCTRL_LWZinto_toc */
15885    dispRI, ptr_rc_nor0,
15886    /* BCTRL_LWZinto_toc_RM */
15887    dispRI, ptr_rc_nor0,
15888    /* BCTRL_RM */
15889    /* BCn */
15890    crbitrc, condbrtarget,
15891    /* BDNZ */
15892    condbrtarget,
15893    /* BDNZ8 */
15894    condbrtarget,
15895    /* BDNZA */
15896    abscondbrtarget,
15897    /* BDNZAm */
15898    abscondbrtarget,
15899    /* BDNZAp */
15900    abscondbrtarget,
15901    /* BDNZL */
15902    condbrtarget,
15903    /* BDNZLA */
15904    abscondbrtarget,
15905    /* BDNZLAm */
15906    abscondbrtarget,
15907    /* BDNZLAp */
15908    abscondbrtarget,
15909    /* BDNZLR */
15910    /* BDNZLR8 */
15911    /* BDNZLRL */
15912    /* BDNZLRLm */
15913    /* BDNZLRLp */
15914    /* BDNZLRm */
15915    /* BDNZLRp */
15916    /* BDNZLm */
15917    condbrtarget,
15918    /* BDNZLp */
15919    condbrtarget,
15920    /* BDNZm */
15921    condbrtarget,
15922    /* BDNZp */
15923    condbrtarget,
15924    /* BDZ */
15925    condbrtarget,
15926    /* BDZ8 */
15927    condbrtarget,
15928    /* BDZA */
15929    abscondbrtarget,
15930    /* BDZAm */
15931    abscondbrtarget,
15932    /* BDZAp */
15933    abscondbrtarget,
15934    /* BDZL */
15935    condbrtarget,
15936    /* BDZLA */
15937    abscondbrtarget,
15938    /* BDZLAm */
15939    abscondbrtarget,
15940    /* BDZLAp */
15941    abscondbrtarget,
15942    /* BDZLR */
15943    /* BDZLR8 */
15944    /* BDZLRL */
15945    /* BDZLRLm */
15946    /* BDZLRLp */
15947    /* BDZLRm */
15948    /* BDZLRp */
15949    /* BDZLm */
15950    condbrtarget,
15951    /* BDZLp */
15952    condbrtarget,
15953    /* BDZm */
15954    condbrtarget,
15955    /* BDZp */
15956    condbrtarget,
15957    /* BL */
15958    calltarget,
15959    /* BL8 */
15960    calltarget,
15961    /* BL8_NOP */
15962    calltarget,
15963    /* BL8_NOP_RM */
15964    calltarget,
15965    /* BL8_NOP_TLS */
15966    calltarget, tlsgd,
15967    /* BL8_NOTOC */
15968    calltarget,
15969    /* BL8_NOTOC_RM */
15970    calltarget,
15971    /* BL8_NOTOC_TLS */
15972    calltarget, tlsgd,
15973    /* BL8_RM */
15974    calltarget,
15975    /* BL8_TLS */
15976    calltarget, tlsgd,
15977    /* BL8_TLS_ */
15978    calltarget, tlsgd,
15979    /* BLA */
15980    abscalltarget,
15981    /* BLA8 */
15982    abscalltarget,
15983    /* BLA8_NOP */
15984    abscalltarget,
15985    /* BLA8_NOP_RM */
15986    abscalltarget,
15987    /* BLA8_RM */
15988    abscalltarget,
15989    /* BLA_RM */
15990    abscalltarget,
15991    /* BLR */
15992    /* BLR8 */
15993    /* BLRL */
15994    /* BL_NOP */
15995    calltarget,
15996    /* BL_NOP_RM */
15997    calltarget,
15998    /* BL_RM */
15999    calltarget,
16000    /* BL_TLS */
16001    calltarget, tlsgd32,
16002    /* BPERMD */
16003    g8rc, g8rc, g8rc,
16004    /* BRD */
16005    g8rc, g8rc,
16006    /* BRH */
16007    gprc, gprc,
16008    /* BRH8 */
16009    g8rc, g8rc,
16010    /* BRINC */
16011    gprc, gprc, gprc,
16012    /* BRW */
16013    gprc, gprc,
16014    /* BRW8 */
16015    g8rc, g8rc,
16016    /* CFUGED */
16017    g8rc, g8rc, g8rc,
16018    /* CLRBHRB */
16019    /* CMPB */
16020    gprc, gprc, gprc,
16021    /* CMPB8 */
16022    g8rc, g8rc, g8rc,
16023    /* CMPD */
16024    crrc, g8rc, g8rc,
16025    /* CMPDI */
16026    crrc, g8rc, s16imm64,
16027    /* CMPEQB */
16028    crrc, g8rc, g8rc,
16029    /* CMPLD */
16030    crrc, g8rc, g8rc,
16031    /* CMPLDI */
16032    crrc, g8rc, u16imm64,
16033    /* CMPLW */
16034    crrc, gprc, gprc,
16035    /* CMPLWI */
16036    crrc, gprc, u16imm,
16037    /* CMPRB */
16038    crrc, u1imm, gprc, gprc,
16039    /* CMPRB8 */
16040    crrc, u1imm, g8rc, g8rc,
16041    /* CMPW */
16042    crrc, gprc, gprc,
16043    /* CMPWI */
16044    crrc, gprc, s16imm,
16045    /* CNTLZD */
16046    g8rc, g8rc,
16047    /* CNTLZDM */
16048    g8rc, g8rc, g8rc,
16049    /* CNTLZD_rec */
16050    g8rc, g8rc,
16051    /* CNTLZW */
16052    gprc, gprc,
16053    /* CNTLZW8 */
16054    g8rc, g8rc,
16055    /* CNTLZW8_rec */
16056    g8rc, g8rc,
16057    /* CNTLZW_rec */
16058    gprc, gprc,
16059    /* CNTTZD */
16060    g8rc, g8rc,
16061    /* CNTTZDM */
16062    g8rc, g8rc, g8rc,
16063    /* CNTTZD_rec */
16064    g8rc, g8rc,
16065    /* CNTTZW */
16066    gprc, gprc,
16067    /* CNTTZW8 */
16068    g8rc, g8rc,
16069    /* CNTTZW8_rec */
16070    g8rc, g8rc,
16071    /* CNTTZW_rec */
16072    gprc, gprc,
16073    /* CP_ABORT */
16074    /* CP_COPY */
16075    gprc, gprc, u1imm,
16076    /* CP_COPY8 */
16077    g8rc, g8rc, u1imm,
16078    /* CP_PASTE8_rec */
16079    g8rc, g8rc, u1imm,
16080    /* CP_PASTE_rec */
16081    gprc, gprc, u1imm,
16082    /* CR6SET */
16083    /* CR6UNSET */
16084    /* CRAND */
16085    crbitrc, crbitrc, crbitrc,
16086    /* CRANDC */
16087    crbitrc, crbitrc, crbitrc,
16088    /* CREQV */
16089    crbitrc, crbitrc, crbitrc,
16090    /* CRNAND */
16091    crbitrc, crbitrc, crbitrc,
16092    /* CRNOR */
16093    crbitrc, crbitrc, crbitrc,
16094    /* CRNOT */
16095    crbitrc, crbitrc,
16096    /* CROR */
16097    crbitrc, crbitrc, crbitrc,
16098    /* CRORC */
16099    crbitrc, crbitrc, crbitrc,
16100    /* CRSET */
16101    crbitrc,
16102    /* CRUNSET */
16103    crbitrc,
16104    /* CRXOR */
16105    crbitrc, crbitrc, crbitrc,
16106    /* CTRL_DEP */
16107    i32imm, crrc, condbrtarget,
16108    /* DARN */
16109    g8rc, u2imm,
16110    /* DCBA */
16111    ptr_rc_nor0, ptr_rc_idx,
16112    /* DCBF */
16113    u3imm, ptr_rc_nor0, ptr_rc_idx,
16114    /* DCBFEP */
16115    ptr_rc_nor0, ptr_rc_idx,
16116    /* DCBI */
16117    ptr_rc_nor0, ptr_rc_idx,
16118    /* DCBST */
16119    ptr_rc_nor0, ptr_rc_idx,
16120    /* DCBSTEP */
16121    ptr_rc_nor0, ptr_rc_idx,
16122    /* DCBT */
16123    u5imm, ptr_rc_nor0, ptr_rc_idx,
16124    /* DCBTEP */
16125    ptr_rc_nor0, ptr_rc_idx, u5imm,
16126    /* DCBTST */
16127    u5imm, ptr_rc_nor0, ptr_rc_idx,
16128    /* DCBTSTEP */
16129    ptr_rc_nor0, ptr_rc_idx, u5imm,
16130    /* DCBZ */
16131    ptr_rc_nor0, ptr_rc_idx,
16132    /* DCBZEP */
16133    ptr_rc_nor0, ptr_rc_idx,
16134    /* DCBZL */
16135    ptr_rc_nor0, ptr_rc_idx,
16136    /* DCBZLEP */
16137    ptr_rc_nor0, ptr_rc_idx,
16138    /* DCCCI */
16139    gprc, gprc,
16140    /* DIVD */
16141    g8rc, g8rc, g8rc,
16142    /* DIVDE */
16143    g8rc, g8rc, g8rc,
16144    /* DIVDEO */
16145    g8rc, g8rc, g8rc,
16146    /* DIVDEO_rec */
16147    g8rc, g8rc, g8rc,
16148    /* DIVDEU */
16149    g8rc, g8rc, g8rc,
16150    /* DIVDEUO */
16151    g8rc, g8rc, g8rc,
16152    /* DIVDEUO_rec */
16153    g8rc, g8rc, g8rc,
16154    /* DIVDEU_rec */
16155    g8rc, g8rc, g8rc,
16156    /* DIVDE_rec */
16157    g8rc, g8rc, g8rc,
16158    /* DIVDO */
16159    g8rc, g8rc, g8rc,
16160    /* DIVDO_rec */
16161    g8rc, g8rc, g8rc,
16162    /* DIVDU */
16163    g8rc, g8rc, g8rc,
16164    /* DIVDUO */
16165    g8rc, g8rc, g8rc,
16166    /* DIVDUO_rec */
16167    g8rc, g8rc, g8rc,
16168    /* DIVDU_rec */
16169    g8rc, g8rc, g8rc,
16170    /* DIVD_rec */
16171    g8rc, g8rc, g8rc,
16172    /* DIVW */
16173    gprc, gprc, gprc,
16174    /* DIVWE */
16175    gprc, gprc, gprc,
16176    /* DIVWEO */
16177    gprc, gprc, gprc,
16178    /* DIVWEO_rec */
16179    gprc, gprc, gprc,
16180    /* DIVWEU */
16181    gprc, gprc, gprc,
16182    /* DIVWEUO */
16183    gprc, gprc, gprc,
16184    /* DIVWEUO_rec */
16185    gprc, gprc, gprc,
16186    /* DIVWEU_rec */
16187    gprc, gprc, gprc,
16188    /* DIVWE_rec */
16189    gprc, gprc, gprc,
16190    /* DIVWO */
16191    gprc, gprc, gprc,
16192    /* DIVWO_rec */
16193    gprc, gprc, gprc,
16194    /* DIVWU */
16195    gprc, gprc, gprc,
16196    /* DIVWUO */
16197    gprc, gprc, gprc,
16198    /* DIVWUO_rec */
16199    gprc, gprc, gprc,
16200    /* DIVWU_rec */
16201    gprc, gprc, gprc,
16202    /* DIVW_rec */
16203    gprc, gprc, gprc,
16204    /* DMMR */
16205    dmr, dmr,
16206    /* DMSETDMRZ */
16207    dmr,
16208    /* DMXOR */
16209    dmr, dmr, dmr,
16210    /* DMXXEXTFDMR256 */
16211    vsrprc, dmrrowp, u2imm,
16212    /* DMXXEXTFDMR512 */
16213    vsrprc, vsrprc, wacc,
16214    /* DMXXEXTFDMR512_HI */
16215    vsrprc, vsrprc, wacc_hi,
16216    /* DMXXINSTFDMR256 */
16217    dmrrowp, vsrprc, u2imm,
16218    /* DMXXINSTFDMR512 */
16219    wacc, vsrprc, vsrprc,
16220    /* DMXXINSTFDMR512_HI */
16221    wacc_hi, vsrprc, vsrprc,
16222    /* DSS */
16223    u5imm,
16224    /* DSSALL */
16225    /* DST */
16226    u5imm, gprc, gprc,
16227    /* DST64 */
16228    u5imm, g8rc, gprc,
16229    /* DSTST */
16230    u5imm, gprc, gprc,
16231    /* DSTST64 */
16232    u5imm, g8rc, gprc,
16233    /* DSTSTT */
16234    u5imm, gprc, gprc,
16235    /* DSTSTT64 */
16236    u5imm, g8rc, gprc,
16237    /* DSTT */
16238    u5imm, gprc, gprc,
16239    /* DSTT64 */
16240    u5imm, g8rc, gprc,
16241    /* DYNALLOC */
16242    gprc, gprc, dispRI, ptr_rc_nor0,
16243    /* DYNALLOC8 */
16244    g8rc, g8rc, dispRI, ptr_rc_nor0,
16245    /* DYNAREAOFFSET */
16246    i32imm, dispRI, ptr_rc_nor0,
16247    /* DYNAREAOFFSET8 */
16248    i64imm, dispRI, ptr_rc_nor0,
16249    /* DecreaseCTR8loop */
16250    crbitrc, i64imm,
16251    /* DecreaseCTRloop */
16252    crbitrc, i32imm,
16253    /* EFDABS */
16254    sperc, sperc,
16255    /* EFDADD */
16256    sperc, sperc, sperc,
16257    /* EFDCFS */
16258    sperc, spe4rc,
16259    /* EFDCFSF */
16260    sperc, spe4rc,
16261    /* EFDCFSI */
16262    sperc, gprc,
16263    /* EFDCFSID */
16264    sperc, gprc,
16265    /* EFDCFUF */
16266    sperc, spe4rc,
16267    /* EFDCFUI */
16268    sperc, gprc,
16269    /* EFDCFUID */
16270    sperc, gprc,
16271    /* EFDCMPEQ */
16272    crrc, sperc, sperc,
16273    /* EFDCMPGT */
16274    crrc, sperc, sperc,
16275    /* EFDCMPLT */
16276    crrc, sperc, sperc,
16277    /* EFDCTSF */
16278    sperc, spe4rc,
16279    /* EFDCTSI */
16280    gprc, sperc,
16281    /* EFDCTSIDZ */
16282    gprc, sperc,
16283    /* EFDCTSIZ */
16284    gprc, sperc,
16285    /* EFDCTUF */
16286    sperc, spe4rc,
16287    /* EFDCTUI */
16288    gprc, sperc,
16289    /* EFDCTUIDZ */
16290    gprc, sperc,
16291    /* EFDCTUIZ */
16292    gprc, sperc,
16293    /* EFDDIV */
16294    sperc, sperc, sperc,
16295    /* EFDMUL */
16296    sperc, sperc, sperc,
16297    /* EFDNABS */
16298    sperc, sperc,
16299    /* EFDNEG */
16300    sperc, sperc,
16301    /* EFDSUB */
16302    sperc, sperc, sperc,
16303    /* EFDTSTEQ */
16304    crrc, sperc, sperc,
16305    /* EFDTSTGT */
16306    crrc, sperc, sperc,
16307    /* EFDTSTLT */
16308    crrc, sperc, sperc,
16309    /* EFSABS */
16310    spe4rc, spe4rc,
16311    /* EFSADD */
16312    spe4rc, spe4rc, spe4rc,
16313    /* EFSCFD */
16314    spe4rc, sperc,
16315    /* EFSCFSF */
16316    spe4rc, spe4rc,
16317    /* EFSCFSI */
16318    spe4rc, gprc,
16319    /* EFSCFUF */
16320    spe4rc, spe4rc,
16321    /* EFSCFUI */
16322    spe4rc, gprc,
16323    /* EFSCMPEQ */
16324    crrc, spe4rc, spe4rc,
16325    /* EFSCMPGT */
16326    crrc, spe4rc, spe4rc,
16327    /* EFSCMPLT */
16328    crrc, spe4rc, spe4rc,
16329    /* EFSCTSF */
16330    spe4rc, spe4rc,
16331    /* EFSCTSI */
16332    gprc, spe4rc,
16333    /* EFSCTSIZ */
16334    gprc, spe4rc,
16335    /* EFSCTUF */
16336    sperc, spe4rc,
16337    /* EFSCTUI */
16338    gprc, spe4rc,
16339    /* EFSCTUIZ */
16340    gprc, spe4rc,
16341    /* EFSDIV */
16342    spe4rc, spe4rc, spe4rc,
16343    /* EFSMUL */
16344    spe4rc, spe4rc, spe4rc,
16345    /* EFSNABS */
16346    spe4rc, spe4rc,
16347    /* EFSNEG */
16348    spe4rc, spe4rc,
16349    /* EFSSUB */
16350    spe4rc, spe4rc, spe4rc,
16351    /* EFSTSTEQ */
16352    crrc, sperc, sperc,
16353    /* EFSTSTGT */
16354    crrc, sperc, sperc,
16355    /* EFSTSTLT */
16356    crrc, sperc, sperc,
16357    /* EH_SjLj_LongJmp32 */
16358    ptr_rc_nor0,
16359    /* EH_SjLj_LongJmp64 */
16360    ptr_rc_nor0,
16361    /* EH_SjLj_SetJmp32 */
16362    gprc, ptr_rc_nor0,
16363    /* EH_SjLj_SetJmp64 */
16364    gprc, ptr_rc_nor0,
16365    /* EH_SjLj_Setup */
16366    directbrtarget,
16367    /* EQV */
16368    gprc, gprc, gprc,
16369    /* EQV8 */
16370    g8rc, g8rc, g8rc,
16371    /* EQV8_rec */
16372    g8rc, g8rc, g8rc,
16373    /* EQV_rec */
16374    gprc, gprc, gprc,
16375    /* EVABS */
16376    sperc, sperc,
16377    /* EVADDIW */
16378    sperc, sperc, u5imm,
16379    /* EVADDSMIAAW */
16380    sperc, sperc,
16381    /* EVADDSSIAAW */
16382    sperc, sperc,
16383    /* EVADDUMIAAW */
16384    sperc, sperc,
16385    /* EVADDUSIAAW */
16386    sperc, sperc,
16387    /* EVADDW */
16388    sperc, sperc, sperc,
16389    /* EVAND */
16390    sperc, sperc, sperc,
16391    /* EVANDC */
16392    sperc, sperc, sperc,
16393    /* EVCMPEQ */
16394    crrc, sperc, sperc,
16395    /* EVCMPGTS */
16396    crrc, sperc, sperc,
16397    /* EVCMPGTU */
16398    crrc, sperc, sperc,
16399    /* EVCMPLTS */
16400    crrc, sperc, sperc,
16401    /* EVCMPLTU */
16402    crrc, sperc, sperc,
16403    /* EVCNTLSW */
16404    sperc, sperc,
16405    /* EVCNTLZW */
16406    sperc, sperc,
16407    /* EVDIVWS */
16408    sperc, sperc, sperc,
16409    /* EVDIVWU */
16410    sperc, sperc, sperc,
16411    /* EVEQV */
16412    sperc, sperc, sperc,
16413    /* EVEXTSB */
16414    sperc, sperc,
16415    /* EVEXTSH */
16416    sperc, sperc,
16417    /* EVFSABS */
16418    sperc, sperc,
16419    /* EVFSADD */
16420    sperc, sperc, sperc,
16421    /* EVFSCFSF */
16422    sperc, sperc,
16423    /* EVFSCFSI */
16424    sperc, sperc,
16425    /* EVFSCFUF */
16426    sperc, sperc,
16427    /* EVFSCFUI */
16428    sperc, sperc,
16429    /* EVFSCMPEQ */
16430    crrc, sperc, sperc,
16431    /* EVFSCMPGT */
16432    crrc, sperc, sperc,
16433    /* EVFSCMPLT */
16434    crrc, sperc, sperc,
16435    /* EVFSCTSF */
16436    sperc, sperc,
16437    /* EVFSCTSI */
16438    sperc, sperc,
16439    /* EVFSCTSIZ */
16440    sperc, sperc,
16441    /* EVFSCTUF */
16442    sperc, sperc,
16443    /* EVFSCTUI */
16444    sperc, sperc,
16445    /* EVFSCTUIZ */
16446    sperc, sperc,
16447    /* EVFSDIV */
16448    sperc, sperc, sperc,
16449    /* EVFSMUL */
16450    sperc, sperc, sperc,
16451    /* EVFSNABS */
16452    sperc, sperc,
16453    /* EVFSNEG */
16454    sperc, sperc,
16455    /* EVFSSUB */
16456    sperc, sperc, sperc,
16457    /* EVFSTSTEQ */
16458    crrc, sperc, sperc,
16459    /* EVFSTSTGT */
16460    crrc, sperc, sperc,
16461    /* EVFSTSTLT */
16462    crrc, sperc, sperc,
16463    /* EVLDD */
16464    sperc, dispSPE8, ptr_rc_nor0,
16465    /* EVLDDX */
16466    sperc, ptr_rc_nor0, ptr_rc_idx,
16467    /* EVLDH */
16468    sperc, dispSPE8, ptr_rc_nor0,
16469    /* EVLDHX */
16470    sperc, ptr_rc_nor0, ptr_rc_idx,
16471    /* EVLDW */
16472    sperc, dispSPE8, ptr_rc_nor0,
16473    /* EVLDWX */
16474    sperc, ptr_rc_nor0, ptr_rc_idx,
16475    /* EVLHHESPLAT */
16476    sperc, dispSPE2, ptr_rc_nor0,
16477    /* EVLHHESPLATX */
16478    sperc, ptr_rc_nor0, ptr_rc_idx,
16479    /* EVLHHOSSPLAT */
16480    sperc, dispSPE2, ptr_rc_nor0,
16481    /* EVLHHOSSPLATX */
16482    sperc, ptr_rc_nor0, ptr_rc_idx,
16483    /* EVLHHOUSPLAT */
16484    sperc, dispSPE2, ptr_rc_nor0,
16485    /* EVLHHOUSPLATX */
16486    sperc, ptr_rc_nor0, ptr_rc_idx,
16487    /* EVLWHE */
16488    sperc, dispSPE4, ptr_rc_nor0,
16489    /* EVLWHEX */
16490    sperc, ptr_rc_nor0, ptr_rc_idx,
16491    /* EVLWHOS */
16492    sperc, dispSPE4, ptr_rc_nor0,
16493    /* EVLWHOSX */
16494    sperc, ptr_rc_nor0, ptr_rc_idx,
16495    /* EVLWHOU */
16496    sperc, dispSPE4, ptr_rc_nor0,
16497    /* EVLWHOUX */
16498    sperc, ptr_rc_nor0, ptr_rc_idx,
16499    /* EVLWHSPLAT */
16500    sperc, dispSPE4, ptr_rc_nor0,
16501    /* EVLWHSPLATX */
16502    sperc, ptr_rc_nor0, ptr_rc_idx,
16503    /* EVLWWSPLAT */
16504    sperc, dispSPE4, ptr_rc_nor0,
16505    /* EVLWWSPLATX */
16506    sperc, ptr_rc_nor0, ptr_rc_idx,
16507    /* EVMERGEHI */
16508    sperc, sperc, sperc,
16509    /* EVMERGEHILO */
16510    sperc, sperc, sperc,
16511    /* EVMERGELO */
16512    sperc, gprc, gprc,
16513    /* EVMERGELOHI */
16514    sperc, sperc, sperc,
16515    /* EVMHEGSMFAA */
16516    sperc, sperc, sperc,
16517    /* EVMHEGSMFAN */
16518    sperc, sperc, sperc,
16519    /* EVMHEGSMIAA */
16520    sperc, sperc, sperc,
16521    /* EVMHEGSMIAN */
16522    sperc, sperc, sperc,
16523    /* EVMHEGUMIAA */
16524    sperc, sperc, sperc,
16525    /* EVMHEGUMIAN */
16526    sperc, sperc, sperc,
16527    /* EVMHESMF */
16528    sperc, sperc, sperc,
16529    /* EVMHESMFA */
16530    sperc, sperc, sperc,
16531    /* EVMHESMFAAW */
16532    sperc, sperc, sperc,
16533    /* EVMHESMFANW */
16534    sperc, sperc, sperc,
16535    /* EVMHESMI */
16536    sperc, sperc, sperc,
16537    /* EVMHESMIA */
16538    sperc, sperc, sperc,
16539    /* EVMHESMIAAW */
16540    sperc, sperc, sperc,
16541    /* EVMHESMIANW */
16542    sperc, sperc, sperc,
16543    /* EVMHESSF */
16544    sperc, sperc, sperc,
16545    /* EVMHESSFA */
16546    sperc, sperc, sperc,
16547    /* EVMHESSFAAW */
16548    sperc, sperc, sperc,
16549    /* EVMHESSFANW */
16550    sperc, sperc, sperc,
16551    /* EVMHESSIAAW */
16552    sperc, sperc, sperc,
16553    /* EVMHESSIANW */
16554    sperc, sperc, sperc,
16555    /* EVMHEUMI */
16556    sperc, sperc, sperc,
16557    /* EVMHEUMIA */
16558    sperc, sperc, sperc,
16559    /* EVMHEUMIAAW */
16560    sperc, sperc, sperc,
16561    /* EVMHEUMIANW */
16562    sperc, sperc, sperc,
16563    /* EVMHEUSIAAW */
16564    sperc, sperc, sperc,
16565    /* EVMHEUSIANW */
16566    sperc, sperc, sperc,
16567    /* EVMHOGSMFAA */
16568    sperc, sperc, sperc,
16569    /* EVMHOGSMFAN */
16570    sperc, sperc, sperc,
16571    /* EVMHOGSMIAA */
16572    sperc, sperc, sperc,
16573    /* EVMHOGSMIAN */
16574    sperc, sperc, sperc,
16575    /* EVMHOGUMIAA */
16576    sperc, sperc, sperc,
16577    /* EVMHOGUMIAN */
16578    sperc, sperc, sperc,
16579    /* EVMHOSMF */
16580    sperc, sperc, sperc,
16581    /* EVMHOSMFA */
16582    sperc, sperc, sperc,
16583    /* EVMHOSMFAAW */
16584    sperc, sperc, sperc,
16585    /* EVMHOSMFANW */
16586    sperc, sperc, sperc,
16587    /* EVMHOSMI */
16588    sperc, sperc, sperc,
16589    /* EVMHOSMIA */
16590    sperc, sperc, sperc,
16591    /* EVMHOSMIAAW */
16592    sperc, sperc, sperc,
16593    /* EVMHOSMIANW */
16594    sperc, sperc, sperc,
16595    /* EVMHOSSF */
16596    sperc, sperc, sperc,
16597    /* EVMHOSSFA */
16598    sperc, sperc, sperc,
16599    /* EVMHOSSFAAW */
16600    sperc, sperc, sperc,
16601    /* EVMHOSSFANW */
16602    sperc, sperc, sperc,
16603    /* EVMHOSSIAAW */
16604    sperc, sperc, sperc,
16605    /* EVMHOSSIANW */
16606    sperc, sperc, sperc,
16607    /* EVMHOUMI */
16608    sperc, sperc, sperc,
16609    /* EVMHOUMIA */
16610    sperc, sperc, sperc,
16611    /* EVMHOUMIAAW */
16612    sperc, sperc, sperc,
16613    /* EVMHOUMIANW */
16614    sperc, sperc, sperc,
16615    /* EVMHOUSIAAW */
16616    sperc, sperc, sperc,
16617    /* EVMHOUSIANW */
16618    sperc, sperc, sperc,
16619    /* EVMRA */
16620    sperc, sperc,
16621    /* EVMWHSMF */
16622    sperc, sperc, sperc,
16623    /* EVMWHSMFA */
16624    sperc, sperc, sperc,
16625    /* EVMWHSMI */
16626    sperc, sperc, sperc,
16627    /* EVMWHSMIA */
16628    sperc, sperc, sperc,
16629    /* EVMWHSSF */
16630    sperc, sperc, sperc,
16631    /* EVMWHSSFA */
16632    sperc, sperc, sperc,
16633    /* EVMWHUMI */
16634    sperc, sperc, sperc,
16635    /* EVMWHUMIA */
16636    sperc, sperc, sperc,
16637    /* EVMWLSMIAAW */
16638    sperc, sperc, sperc,
16639    /* EVMWLSMIANW */
16640    sperc, sperc, sperc,
16641    /* EVMWLSSIAAW */
16642    sperc, sperc, sperc,
16643    /* EVMWLSSIANW */
16644    sperc, sperc, sperc,
16645    /* EVMWLUMI */
16646    sperc, sperc, sperc,
16647    /* EVMWLUMIA */
16648    sperc, sperc, sperc,
16649    /* EVMWLUMIAAW */
16650    sperc, sperc, sperc,
16651    /* EVMWLUMIANW */
16652    sperc, sperc, sperc,
16653    /* EVMWLUSIAAW */
16654    sperc, sperc, sperc,
16655    /* EVMWLUSIANW */
16656    sperc, sperc, sperc,
16657    /* EVMWSMF */
16658    sperc, sperc, sperc,
16659    /* EVMWSMFA */
16660    sperc, sperc, sperc,
16661    /* EVMWSMFAA */
16662    sperc, sperc, sperc,
16663    /* EVMWSMFAN */
16664    sperc, sperc, sperc,
16665    /* EVMWSMI */
16666    sperc, sperc, sperc,
16667    /* EVMWSMIA */
16668    sperc, sperc, sperc,
16669    /* EVMWSMIAA */
16670    sperc, sperc, sperc,
16671    /* EVMWSMIAN */
16672    sperc, sperc, sperc,
16673    /* EVMWSSF */
16674    sperc, sperc, sperc,
16675    /* EVMWSSFA */
16676    sperc, sperc, sperc,
16677    /* EVMWSSFAA */
16678    sperc, sperc, sperc,
16679    /* EVMWSSFAN */
16680    sperc, sperc, sperc,
16681    /* EVMWUMI */
16682    sperc, sperc, sperc,
16683    /* EVMWUMIA */
16684    sperc, sperc, sperc,
16685    /* EVMWUMIAA */
16686    sperc, sperc, sperc,
16687    /* EVMWUMIAN */
16688    sperc, sperc, sperc,
16689    /* EVNAND */
16690    sperc, sperc, sperc,
16691    /* EVNEG */
16692    sperc, sperc,
16693    /* EVNOR */
16694    sperc, sperc, sperc,
16695    /* EVOR */
16696    sperc, sperc, sperc,
16697    /* EVORC */
16698    sperc, sperc, sperc,
16699    /* EVRLW */
16700    sperc, sperc, sperc,
16701    /* EVRLWI */
16702    sperc, sperc, u5imm,
16703    /* EVRNDW */
16704    sperc, sperc,
16705    /* EVSEL */
16706    sperc, sperc, sperc, crrc,
16707    /* EVSLW */
16708    sperc, sperc, sperc,
16709    /* EVSLWI */
16710    sperc, sperc, u5imm,
16711    /* EVSPLATFI */
16712    sperc, s5imm,
16713    /* EVSPLATI */
16714    sperc, s5imm,
16715    /* EVSRWIS */
16716    sperc, sperc, u5imm,
16717    /* EVSRWIU */
16718    sperc, sperc, u5imm,
16719    /* EVSRWS */
16720    sperc, sperc, sperc,
16721    /* EVSRWU */
16722    sperc, sperc, sperc,
16723    /* EVSTDD */
16724    sperc, dispSPE8, ptr_rc_nor0,
16725    /* EVSTDDX */
16726    sperc, ptr_rc_nor0, ptr_rc_idx,
16727    /* EVSTDH */
16728    sperc, dispSPE8, ptr_rc_nor0,
16729    /* EVSTDHX */
16730    sperc, ptr_rc_nor0, ptr_rc_idx,
16731    /* EVSTDW */
16732    sperc, dispSPE8, ptr_rc_nor0,
16733    /* EVSTDWX */
16734    sperc, ptr_rc_nor0, ptr_rc_idx,
16735    /* EVSTWHE */
16736    sperc, dispSPE4, ptr_rc_nor0,
16737    /* EVSTWHEX */
16738    sperc, ptr_rc_nor0, ptr_rc_idx,
16739    /* EVSTWHO */
16740    sperc, dispSPE4, ptr_rc_nor0,
16741    /* EVSTWHOX */
16742    sperc, ptr_rc_nor0, ptr_rc_idx,
16743    /* EVSTWWE */
16744    sperc, dispSPE4, ptr_rc_nor0,
16745    /* EVSTWWEX */
16746    sperc, ptr_rc_nor0, ptr_rc_idx,
16747    /* EVSTWWO */
16748    sperc, dispSPE4, ptr_rc_nor0,
16749    /* EVSTWWOX */
16750    sperc, ptr_rc_nor0, ptr_rc_idx,
16751    /* EVSUBFSMIAAW */
16752    sperc, sperc,
16753    /* EVSUBFSSIAAW */
16754    sperc, sperc,
16755    /* EVSUBFUMIAAW */
16756    sperc, sperc,
16757    /* EVSUBFUSIAAW */
16758    sperc, sperc,
16759    /* EVSUBFW */
16760    sperc, sperc, sperc,
16761    /* EVSUBIFW */
16762    sperc, u5imm, sperc,
16763    /* EVXOR */
16764    sperc, sperc, sperc,
16765    /* EXTSB */
16766    gprc, gprc,
16767    /* EXTSB8 */
16768    g8rc, g8rc,
16769    /* EXTSB8_32_64 */
16770    g8rc, gprc,
16771    /* EXTSB8_rec */
16772    g8rc, g8rc,
16773    /* EXTSB_rec */
16774    gprc, gprc,
16775    /* EXTSH */
16776    gprc, gprc,
16777    /* EXTSH8 */
16778    g8rc, g8rc,
16779    /* EXTSH8_32_64 */
16780    g8rc, gprc,
16781    /* EXTSH8_rec */
16782    g8rc, g8rc,
16783    /* EXTSH_rec */
16784    gprc, gprc,
16785    /* EXTSW */
16786    g8rc, g8rc,
16787    /* EXTSWSLI */
16788    g8rc, g8rc, u6imm,
16789    /* EXTSWSLI_32_64 */
16790    g8rc, gprc, u6imm,
16791    /* EXTSWSLI_32_64_rec */
16792    g8rc, gprc, u6imm,
16793    /* EXTSWSLI_rec */
16794    g8rc, g8rc, u6imm,
16795    /* EXTSW_32 */
16796    gprc, gprc,
16797    /* EXTSW_32_64 */
16798    g8rc, gprc,
16799    /* EXTSW_32_64_rec */
16800    g8rc, gprc,
16801    /* EXTSW_rec */
16802    g8rc, g8rc,
16803    /* EnforceIEIO */
16804    /* FABSD */
16805    f8rc, f8rc,
16806    /* FABSD_rec */
16807    f8rc, f8rc,
16808    /* FABSS */
16809    f4rc, f4rc,
16810    /* FABSS_rec */
16811    f4rc, f4rc,
16812    /* FADD */
16813    f8rc, f8rc, f8rc,
16814    /* FADDS */
16815    f4rc, f4rc, f4rc,
16816    /* FADDS_rec */
16817    f4rc, f4rc, f4rc,
16818    /* FADD_rec */
16819    f8rc, f8rc, f8rc,
16820    /* FADDrtz */
16821    f8rc, f8rc, f8rc,
16822    /* FCFID */
16823    f8rc, f8rc,
16824    /* FCFIDS */
16825    f4rc, f8rc,
16826    /* FCFIDS_rec */
16827    f4rc, f8rc,
16828    /* FCFIDU */
16829    f8rc, f8rc,
16830    /* FCFIDUS */
16831    f4rc, f8rc,
16832    /* FCFIDUS_rec */
16833    f4rc, f8rc,
16834    /* FCFIDU_rec */
16835    f8rc, f8rc,
16836    /* FCFID_rec */
16837    f8rc, f8rc,
16838    /* FCMPOD */
16839    crrc, f8rc, f8rc,
16840    /* FCMPOS */
16841    crrc, f4rc, f4rc,
16842    /* FCMPUD */
16843    crrc, f8rc, f8rc,
16844    /* FCMPUS */
16845    crrc, f4rc, f4rc,
16846    /* FCPSGND */
16847    f8rc, f8rc, f8rc,
16848    /* FCPSGND_rec */
16849    f8rc, f8rc, f8rc,
16850    /* FCPSGNS */
16851    f4rc, f4rc, f4rc,
16852    /* FCPSGNS_rec */
16853    f4rc, f4rc, f4rc,
16854    /* FCTID */
16855    f8rc, f8rc,
16856    /* FCTIDU */
16857    f8rc, f8rc,
16858    /* FCTIDUZ */
16859    f8rc, f8rc,
16860    /* FCTIDUZ_rec */
16861    f8rc, f8rc,
16862    /* FCTIDU_rec */
16863    f8rc, f8rc,
16864    /* FCTIDZ */
16865    f8rc, f8rc,
16866    /* FCTIDZ_rec */
16867    f8rc, f8rc,
16868    /* FCTID_rec */
16869    f8rc, f8rc,
16870    /* FCTIW */
16871    f8rc, f8rc,
16872    /* FCTIWU */
16873    f8rc, f8rc,
16874    /* FCTIWUZ */
16875    f8rc, f8rc,
16876    /* FCTIWUZ_rec */
16877    f8rc, f8rc,
16878    /* FCTIWU_rec */
16879    f8rc, f8rc,
16880    /* FCTIWZ */
16881    f8rc, f8rc,
16882    /* FCTIWZ_rec */
16883    f8rc, f8rc,
16884    /* FCTIW_rec */
16885    f8rc, f8rc,
16886    /* FDIV */
16887    f8rc, f8rc, f8rc,
16888    /* FDIVS */
16889    f4rc, f4rc, f4rc,
16890    /* FDIVS_rec */
16891    f4rc, f4rc, f4rc,
16892    /* FDIV_rec */
16893    f8rc, f8rc, f8rc,
16894    /* FMADD */
16895    f8rc, f8rc, f8rc, f8rc,
16896    /* FMADDS */
16897    f4rc, f4rc, f4rc, f4rc,
16898    /* FMADDS_rec */
16899    f4rc, f4rc, f4rc, f4rc,
16900    /* FMADD_rec */
16901    f8rc, f8rc, f8rc, f8rc,
16902    /* FMR */
16903    f4rc, f4rc,
16904    /* FMR_rec */
16905    f4rc, f4rc,
16906    /* FMSUB */
16907    f8rc, f8rc, f8rc, f8rc,
16908    /* FMSUBS */
16909    f4rc, f4rc, f4rc, f4rc,
16910    /* FMSUBS_rec */
16911    f4rc, f4rc, f4rc, f4rc,
16912    /* FMSUB_rec */
16913    f8rc, f8rc, f8rc, f8rc,
16914    /* FMUL */
16915    f8rc, f8rc, f8rc,
16916    /* FMULS */
16917    f4rc, f4rc, f4rc,
16918    /* FMULS_rec */
16919    f4rc, f4rc, f4rc,
16920    /* FMUL_rec */
16921    f8rc, f8rc, f8rc,
16922    /* FNABSD */
16923    f8rc, f8rc,
16924    /* FNABSD_rec */
16925    f8rc, f8rc,
16926    /* FNABSS */
16927    f4rc, f4rc,
16928    /* FNABSS_rec */
16929    f4rc, f4rc,
16930    /* FNEGD */
16931    f8rc, f8rc,
16932    /* FNEGD_rec */
16933    f8rc, f8rc,
16934    /* FNEGS */
16935    f4rc, f4rc,
16936    /* FNEGS_rec */
16937    f4rc, f4rc,
16938    /* FNMADD */
16939    f8rc, f8rc, f8rc, f8rc,
16940    /* FNMADDS */
16941    f4rc, f4rc, f4rc, f4rc,
16942    /* FNMADDS_rec */
16943    f4rc, f4rc, f4rc, f4rc,
16944    /* FNMADD_rec */
16945    f8rc, f8rc, f8rc, f8rc,
16946    /* FNMSUB */
16947    f8rc, f8rc, f8rc, f8rc,
16948    /* FNMSUBS */
16949    f4rc, f4rc, f4rc, f4rc,
16950    /* FNMSUBS_rec */
16951    f4rc, f4rc, f4rc, f4rc,
16952    /* FNMSUB_rec */
16953    f8rc, f8rc, f8rc, f8rc,
16954    /* FRE */
16955    f8rc, f8rc,
16956    /* FRES */
16957    f4rc, f4rc,
16958    /* FRES_rec */
16959    f4rc, f4rc,
16960    /* FRE_rec */
16961    f8rc, f8rc,
16962    /* FRIMD */
16963    f8rc, f8rc,
16964    /* FRIMD_rec */
16965    f8rc, f8rc,
16966    /* FRIMS */
16967    f4rc, f4rc,
16968    /* FRIMS_rec */
16969    f4rc, f4rc,
16970    /* FRIND */
16971    f8rc, f8rc,
16972    /* FRIND_rec */
16973    f8rc, f8rc,
16974    /* FRINS */
16975    f4rc, f4rc,
16976    /* FRINS_rec */
16977    f4rc, f4rc,
16978    /* FRIPD */
16979    f8rc, f8rc,
16980    /* FRIPD_rec */
16981    f8rc, f8rc,
16982    /* FRIPS */
16983    f4rc, f4rc,
16984    /* FRIPS_rec */
16985    f4rc, f4rc,
16986    /* FRIZD */
16987    f8rc, f8rc,
16988    /* FRIZD_rec */
16989    f8rc, f8rc,
16990    /* FRIZS */
16991    f4rc, f4rc,
16992    /* FRIZS_rec */
16993    f4rc, f4rc,
16994    /* FRSP */
16995    f4rc, f8rc,
16996    /* FRSP_rec */
16997    f4rc, f8rc,
16998    /* FRSQRTE */
16999    f8rc, f8rc,
17000    /* FRSQRTES */
17001    f4rc, f4rc,
17002    /* FRSQRTES_rec */
17003    f4rc, f4rc,
17004    /* FRSQRTE_rec */
17005    f8rc, f8rc,
17006    /* FSELD */
17007    f8rc, f8rc, f8rc, f8rc,
17008    /* FSELD_rec */
17009    f8rc, f8rc, f8rc, f8rc,
17010    /* FSELS */
17011    f4rc, f8rc, f4rc, f4rc,
17012    /* FSELS_rec */
17013    f4rc, f8rc, f4rc, f4rc,
17014    /* FSQRT */
17015    f8rc, f8rc,
17016    /* FSQRTS */
17017    f4rc, f4rc,
17018    /* FSQRTS_rec */
17019    f4rc, f4rc,
17020    /* FSQRT_rec */
17021    f8rc, f8rc,
17022    /* FSUB */
17023    f8rc, f8rc, f8rc,
17024    /* FSUBS */
17025    f4rc, f4rc, f4rc,
17026    /* FSUBS_rec */
17027    f4rc, f4rc, f4rc,
17028    /* FSUB_rec */
17029    f8rc, f8rc, f8rc,
17030    /* FTDIV */
17031    crrc, f8rc, f8rc,
17032    /* FTSQRT */
17033    crrc, f8rc,
17034    /* GETtlsADDR */
17035    g8rc, g8rc, tlsgd,
17036    /* GETtlsADDR32 */
17037    gprc, gprc, tlsgd32,
17038    /* GETtlsADDR32AIX */
17039    gprc, gprc, gprc,
17040    /* GETtlsADDR64AIX */
17041    g8rc, g8rc, g8rc,
17042    /* GETtlsADDRPCREL */
17043    g8rc, g8rc, tlsgd,
17044    /* GETtlsldADDR */
17045    g8rc, g8rc, tlsgd,
17046    /* GETtlsldADDR32 */
17047    gprc, gprc, tlsgd32,
17048    /* GETtlsldADDRPCREL */
17049    g8rc, g8rc, tlsgd,
17050    /* HASHCHK */
17051    gprc, dispRIHash, ptr_rc_nor0,
17052    /* HASHCHK8 */
17053    g8rc, dispRIHash, ptr_rc_nor0,
17054    /* HASHCHKP */
17055    gprc, dispRIHash, ptr_rc_nor0,
17056    /* HASHCHKP8 */
17057    g8rc, dispRIHash, ptr_rc_nor0,
17058    /* HASHST */
17059    gprc, dispRIHash, ptr_rc_nor0,
17060    /* HASHST8 */
17061    g8rc, dispRIHash, ptr_rc_nor0,
17062    /* HASHSTP */
17063    gprc, dispRIHash, ptr_rc_nor0,
17064    /* HASHSTP8 */
17065    g8rc, dispRIHash, ptr_rc_nor0,
17066    /* HRFID */
17067    /* ICBI */
17068    ptr_rc_nor0, ptr_rc_idx,
17069    /* ICBIEP */
17070    ptr_rc_nor0, ptr_rc_idx,
17071    /* ICBLC */
17072    u4imm, ptr_rc_nor0, ptr_rc_idx,
17073    /* ICBLQ */
17074    u4imm, ptr_rc_nor0, ptr_rc_idx,
17075    /* ICBT */
17076    u4imm, ptr_rc_nor0, ptr_rc_idx,
17077    /* ICBTLS */
17078    u4imm, ptr_rc_nor0, ptr_rc_idx,
17079    /* ICCCI */
17080    gprc, gprc,
17081    /* ISEL */
17082    gprc, gprc_nor0, gprc, crbitrc,
17083    /* ISEL8 */
17084    g8rc, g8rc_nox0, g8rc, crbitrc,
17085    /* ISYNC */
17086    /* LA */
17087    gprc, gprc_nor0, s16imm,
17088    /* LA8 */
17089    g8rc, g8rc_nox0, s16imm64,
17090    /* LBARX */
17091    gprc, ptr_rc_nor0, ptr_rc_idx,
17092    /* LBARXL */
17093    gprc, ptr_rc_nor0, ptr_rc_idx,
17094    /* LBEPX */
17095    gprc, ptr_rc_nor0, ptr_rc_idx,
17096    /* LBZ */
17097    gprc, dispRI, ptr_rc_nor0,
17098    /* LBZ8 */
17099    g8rc, dispRI, ptr_rc_nor0,
17100    /* LBZCIX */
17101    gprc, gprc, gprc,
17102    /* LBZU */
17103    gprc, ptr_rc_nor0, dispRI, ptr_rc_nor0,
17104    /* LBZU8 */
17105    g8rc, ptr_rc_nor0, dispRI, ptr_rc_nor0,
17106    /* LBZUX */
17107    gprc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx,
17108    /* LBZUX8 */
17109    g8rc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx,
17110    /* LBZX */
17111    gprc, ptr_rc_nor0, ptr_rc_idx,
17112    /* LBZX8 */
17113    g8rc, ptr_rc_nor0, ptr_rc_idx,
17114    /* LBZXTLS */
17115    g8rc, ptr_rc_nor0, tlsreg,
17116    /* LBZXTLS_ */
17117    g8rc, ptr_rc_nor0, tlsreg,
17118    /* LBZXTLS_32 */
17119    gprc, ptr_rc_nor0, tlsreg,
17120    /* LD */
17121    g8rc, dispRIX, ptr_rc_nor0,
17122    /* LDARX */
17123    g8rc, ptr_rc_nor0, ptr_rc_idx,
17124    /* LDARXL */
17125    g8rc, ptr_rc_nor0, ptr_rc_idx,
17126    /* LDAT */
17127    g8rc, g8rc, u5imm,
17128    /* LDBRX */
17129    g8rc, ptr_rc_nor0, ptr_rc_idx,
17130    /* LDCIX */
17131    gprc, gprc, gprc,
17132    /* LDU */
17133    g8rc, ptr_rc_nor0, dispRIX, ptr_rc_nor0,
17134    /* LDUX */
17135    g8rc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx,
17136    /* LDX */
17137    g8rc, ptr_rc_nor0, ptr_rc_idx,
17138    /* LDXTLS */
17139    g8rc, ptr_rc_nor0, tlsreg,
17140    /* LDXTLS_ */
17141    g8rc, ptr_rc_nor0, tlsreg,
17142    /* LDgotTprelL */
17143    g8rc_nox0, s16imm64, g8rc_nox0,
17144    /* LDgotTprelL32 */
17145    gprc_nor0, s16imm, gprc_nor0,
17146    /* LDtoc */
17147    g8rc, i64imm, g8rc,
17148    /* LDtocBA */
17149    g8rc, i64imm, g8rc,
17150    /* LDtocCPT */
17151    g8rc, i64imm, g8rc,
17152    /* LDtocJTI */
17153    g8rc, i64imm, g8rc,
17154    /* LDtocL */
17155    g8rc, i64imm, g8rc_nox0,
17156    /* LFD */
17157    f8rc, dispRI, ptr_rc_nor0,
17158    /* LFDEPX */
17159    f8rc, ptr_rc_nor0, ptr_rc_idx,
17160    /* LFDU */
17161    f8rc, ptr_rc_nor0, dispRI, ptr_rc_nor0,
17162    /* LFDUX */
17163    f8rc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx,
17164    /* LFDX */
17165    f8rc, ptr_rc_nor0, ptr_rc_idx,
17166    /* LFIWAX */
17167    f8rc, ptr_rc_nor0, ptr_rc_idx,
17168    /* LFIWZX */
17169    f8rc, ptr_rc_nor0, ptr_rc_idx,
17170    /* LFS */
17171    f4rc, dispRI, ptr_rc_nor0,
17172    /* LFSU */
17173    f4rc, ptr_rc_nor0, dispRI, ptr_rc_nor0,
17174    /* LFSUX */
17175    f4rc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx,
17176    /* LFSX */
17177    f4rc, ptr_rc_nor0, ptr_rc_idx,
17178    /* LHA */
17179    gprc, dispRI, ptr_rc_nor0,
17180    /* LHA8 */
17181    g8rc, dispRI, ptr_rc_nor0,
17182    /* LHARX */
17183    gprc, ptr_rc_nor0, ptr_rc_idx,
17184    /* LHARXL */
17185    gprc, ptr_rc_nor0, ptr_rc_idx,
17186    /* LHAU */
17187    gprc, ptr_rc_nor0, dispRI, ptr_rc_nor0,
17188    /* LHAU8 */
17189    g8rc, ptr_rc_nor0, dispRI, ptr_rc_nor0,
17190    /* LHAUX */
17191    gprc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx,
17192    /* LHAUX8 */
17193    g8rc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx,
17194    /* LHAX */
17195    gprc, ptr_rc_nor0, ptr_rc_idx,
17196    /* LHAX8 */
17197    g8rc, ptr_rc_nor0, ptr_rc_idx,
17198    /* LHBRX */
17199    gprc, ptr_rc_nor0, ptr_rc_idx,
17200    /* LHBRX8 */
17201    g8rc, ptr_rc_nor0, ptr_rc_idx,
17202    /* LHEPX */
17203    gprc, ptr_rc_nor0, ptr_rc_idx,
17204    /* LHZ */
17205    gprc, dispRI, ptr_rc_nor0,
17206    /* LHZ8 */
17207    g8rc, dispRI, ptr_rc_nor0,
17208    /* LHZCIX */
17209    gprc, gprc, gprc,
17210    /* LHZU */
17211    gprc, ptr_rc_nor0, dispRI, ptr_rc_nor0,
17212    /* LHZU8 */
17213    g8rc, ptr_rc_nor0, dispRI, ptr_rc_nor0,
17214    /* LHZUX */
17215    gprc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx,
17216    /* LHZUX8 */
17217    g8rc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx,
17218    /* LHZX */
17219    gprc, ptr_rc_nor0, ptr_rc_idx,
17220    /* LHZX8 */
17221    g8rc, ptr_rc_nor0, ptr_rc_idx,
17222    /* LHZXTLS */
17223    g8rc, ptr_rc_nor0, tlsreg,
17224    /* LHZXTLS_ */
17225    g8rc, ptr_rc_nor0, tlsreg,
17226    /* LHZXTLS_32 */
17227    gprc, ptr_rc_nor0, tlsreg,
17228    /* LI */
17229    gprc, s16imm,
17230    /* LI8 */
17231    g8rc, s16imm64,
17232    /* LIS */
17233    gprc, s17imm,
17234    /* LIS8 */
17235    g8rc, s17imm64,
17236    /* LMW */
17237    gprc, dispRI, ptr_rc_nor0,
17238    /* LQ */
17239    g8prc, dispRIX16, ptr_rc_nor0,
17240    /* LQARX */
17241    g8prc, ptr_rc_nor0, ptr_rc_idx,
17242    /* LQARXL */
17243    g8prc, ptr_rc_nor0, ptr_rc_idx,
17244    /* LQX_PSEUDO */
17245    g8prc, ptr_rc_nor0, ptr_rc_idx,
17246    /* LSWI */
17247    gprc, gprc, u5imm,
17248    /* LVEBX */
17249    vrrc, ptr_rc_nor0, ptr_rc_idx,
17250    /* LVEHX */
17251    vrrc, ptr_rc_nor0, ptr_rc_idx,
17252    /* LVEWX */
17253    vrrc, ptr_rc_nor0, ptr_rc_idx,
17254    /* LVSL */
17255    vrrc, ptr_rc_nor0, ptr_rc_idx,
17256    /* LVSR */
17257    vrrc, ptr_rc_nor0, ptr_rc_idx,
17258    /* LVX */
17259    vrrc, ptr_rc_nor0, ptr_rc_idx,
17260    /* LVXL */
17261    vrrc, ptr_rc_nor0, ptr_rc_idx,
17262    /* LWA */
17263    g8rc, dispRIX, ptr_rc_nor0,
17264    /* LWARX */
17265    gprc, ptr_rc_nor0, ptr_rc_idx,
17266    /* LWARXL */
17267    gprc, ptr_rc_nor0, ptr_rc_idx,
17268    /* LWAT */
17269    gprc, gprc, u5imm,
17270    /* LWAUX */
17271    g8rc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx,
17272    /* LWAX */
17273    g8rc, ptr_rc_nor0, ptr_rc_idx,
17274    /* LWAX_32 */
17275    gprc, ptr_rc_nor0, ptr_rc_idx,
17276    /* LWA_32 */
17277    gprc, dispRIX, ptr_rc_nor0,
17278    /* LWBRX */
17279    gprc, ptr_rc_nor0, ptr_rc_idx,
17280    /* LWBRX8 */
17281    g8rc, ptr_rc_nor0, ptr_rc_idx,
17282    /* LWEPX */
17283    gprc, ptr_rc_nor0, ptr_rc_idx,
17284    /* LWZ */
17285    gprc, dispRI, ptr_rc_nor0,
17286    /* LWZ8 */
17287    g8rc, dispRI, ptr_rc_nor0,
17288    /* LWZCIX */
17289    gprc, gprc, gprc,
17290    /* LWZU */
17291    gprc, ptr_rc_nor0, dispRI, ptr_rc_nor0,
17292    /* LWZU8 */
17293    g8rc, ptr_rc_nor0, dispRI, ptr_rc_nor0,
17294    /* LWZUX */
17295    gprc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx,
17296    /* LWZUX8 */
17297    g8rc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx,
17298    /* LWZX */
17299    gprc, ptr_rc_nor0, ptr_rc_idx,
17300    /* LWZX8 */
17301    g8rc, ptr_rc_nor0, ptr_rc_idx,
17302    /* LWZXTLS */
17303    g8rc, ptr_rc_nor0, tlsreg,
17304    /* LWZXTLS_ */
17305    g8rc, ptr_rc_nor0, tlsreg,
17306    /* LWZXTLS_32 */
17307    gprc, ptr_rc_nor0, tlsreg,
17308    /* LWZtoc */
17309    gprc, i32imm, gprc,
17310    /* LWZtocL */
17311    gprc, i32imm, gprc_nor0,
17312    /* LXSD */
17313    vfrc, dispRIX, ptr_rc_nor0,
17314    /* LXSDX */
17315    vsfrc, ptr_rc_nor0, ptr_rc_idx,
17316    /* LXSIBZX */
17317    vsfrc, ptr_rc_nor0, ptr_rc_idx,
17318    /* LXSIHZX */
17319    vsfrc, ptr_rc_nor0, ptr_rc_idx,
17320    /* LXSIWAX */
17321    vsfrc, ptr_rc_nor0, ptr_rc_idx,
17322    /* LXSIWZX */
17323    vsfrc, ptr_rc_nor0, ptr_rc_idx,
17324    /* LXSSP */
17325    vfrc, dispRIX, ptr_rc_nor0,
17326    /* LXSSPX */
17327    vssrc, ptr_rc_nor0, ptr_rc_idx,
17328    /* LXV */
17329    vsrc, dispRIX16, ptr_rc_nor0,
17330    /* LXVB16X */
17331    vsrc, ptr_rc_nor0, ptr_rc_idx,
17332    /* LXVD2X */
17333    vsrc, ptr_rc_nor0, ptr_rc_idx,
17334    /* LXVDSX */
17335    vsrc, ptr_rc_nor0, ptr_rc_idx,
17336    /* LXVH8X */
17337    vsrc, ptr_rc_nor0, ptr_rc_idx,
17338    /* LXVKQ */
17339    vsrc, u5imm,
17340    /* LXVL */
17341    vsrc, ptr_rc_nor0, g8rc,
17342    /* LXVLL */
17343    vsrc, ptr_rc_nor0, g8rc,
17344    /* LXVP */
17345    vsrprc, dispRIX16, ptr_rc_nor0,
17346    /* LXVPRL */
17347    vsrprc, ptr_rc_nor0, g8rc,
17348    /* LXVPRLL */
17349    vsrprc, ptr_rc_nor0, g8rc,
17350    /* LXVPX */
17351    vsrprc, ptr_rc_nor0, ptr_rc_idx,
17352    /* LXVRBX */
17353    vsrc, ptr_rc_nor0, ptr_rc_idx,
17354    /* LXVRDX */
17355    vsrc, ptr_rc_nor0, ptr_rc_idx,
17356    /* LXVRHX */
17357    vsrc, ptr_rc_nor0, ptr_rc_idx,
17358    /* LXVRL */
17359    vsrc, ptr_rc_nor0, g8rc,
17360    /* LXVRLL */
17361    vsrc, ptr_rc_nor0, g8rc,
17362    /* LXVRWX */
17363    vsrc, ptr_rc_nor0, ptr_rc_idx,
17364    /* LXVW4X */
17365    vsrc, ptr_rc_nor0, ptr_rc_idx,
17366    /* LXVWSX */
17367    vsrc, ptr_rc_nor0, ptr_rc_idx,
17368    /* LXVX */
17369    vsrc, ptr_rc_nor0, ptr_rc_idx,
17370    /* MADDHD */
17371    g8rc, g8rc, g8rc, g8rc,
17372    /* MADDHDU */
17373    g8rc, g8rc, g8rc, g8rc,
17374    /* MADDLD */
17375    gprc, gprc, gprc, gprc,
17376    /* MADDLD8 */
17377    g8rc, g8rc, g8rc, g8rc,
17378    /* MBAR */
17379    u5imm,
17380    /* MCRF */
17381    crrc, crrc,
17382    /* MCRFS */
17383    crrc, crrc,
17384    /* MCRXRX */
17385    crrc,
17386    /* MFBHRBE */
17387    gprc, u10imm, u10imm,
17388    /* MFCR */
17389    gprc,
17390    /* MFCR8 */
17391    g8rc,
17392    /* MFCTR */
17393    gprc,
17394    /* MFCTR8 */
17395    g8rc,
17396    /* MFDCR */
17397    gprc, i32imm,
17398    /* MFFS */
17399    f8rc,
17400    /* MFFSCDRN */
17401    f8rc, f8rc,
17402    /* MFFSCDRNI */
17403    f8rc, u3imm,
17404    /* MFFSCE */
17405    f8rc,
17406    /* MFFSCRN */
17407    f8rc, f8rc,
17408    /* MFFSCRNI */
17409    f8rc, u2imm,
17410    /* MFFSL */
17411    f8rc,
17412    /* MFFS_rec */
17413    f8rc,
17414    /* MFLR */
17415    gprc,
17416    /* MFLR8 */
17417    g8rc,
17418    /* MFMSR */
17419    gprc,
17420    /* MFOCRF */
17421    gprc, crbitm,
17422    /* MFOCRF8 */
17423    g8rc, crbitm,
17424    /* MFPMR */
17425    gprc, i32imm,
17426    /* MFSPR */
17427    gprc, i32imm,
17428    /* MFSPR8 */
17429    g8rc, i32imm,
17430    /* MFSR */
17431    gprc, u4imm,
17432    /* MFSRIN */
17433    gprc, gprc,
17434    /* MFTB */
17435    gprc, i32imm,
17436    /* MFTB8 */
17437    g8rc,
17438    /* MFUDSCR */
17439    gprc,
17440    /* MFVRD */
17441    g8rc, vsrc,
17442    /* MFVRSAVE */
17443    gprc,
17444    /* MFVRSAVEv */
17445    gprc, VRSAVERC,
17446    /* MFVRWZ */
17447    gprc, vsrc,
17448    /* MFVSCR */
17449    vrrc,
17450    /* MFVSRD */
17451    g8rc, vsfrc,
17452    /* MFVSRLD */
17453    g8rc, vsrc,
17454    /* MFVSRWZ */
17455    gprc, vsfrc,
17456    /* MODSD */
17457    g8rc, g8rc, g8rc,
17458    /* MODSW */
17459    gprc, gprc, gprc,
17460    /* MODUD */
17461    g8rc, g8rc, g8rc,
17462    /* MODUW */
17463    gprc, gprc, gprc,
17464    /* MSGSYNC */
17465    /* MSYNC */
17466    /* MTCRF */
17467    i32imm, gprc,
17468    /* MTCRF8 */
17469    i32imm, g8rc,
17470    /* MTCTR */
17471    gprc,
17472    /* MTCTR8 */
17473    g8rc,
17474    /* MTCTR8loop */
17475    g8rc,
17476    /* MTCTRloop */
17477    gprc,
17478    /* MTDCR */
17479    gprc, i32imm,
17480    /* MTFSB0 */
17481    u5imm,
17482    /* MTFSB1 */
17483    u5imm,
17484    /* MTFSF */
17485    i32imm, f8rc, u1imm, i32imm,
17486    /* MTFSFI */
17487    u3imm, u4imm, i32imm,
17488    /* MTFSFI_rec */
17489    u3imm, u4imm, u1imm,
17490    /* MTFSFIb */
17491    u3imm, u4imm,
17492    /* MTFSF_rec */
17493    i32imm, f8rc, u1imm, i32imm,
17494    /* MTFSFb */
17495    i32imm, f8rc,
17496    /* MTLR */
17497    gprc,
17498    /* MTLR8 */
17499    g8rc,
17500    /* MTMSR */
17501    gprc, u1imm,
17502    /* MTMSRD */
17503    gprc, u1imm,
17504    /* MTOCRF */
17505    crbitm, gprc,
17506    /* MTOCRF8 */
17507    crbitm, g8rc,
17508    /* MTPMR */
17509    i32imm, gprc,
17510    /* MTSPR */
17511    i32imm, gprc,
17512    /* MTSPR8 */
17513    i32imm, g8rc,
17514    /* MTSR */
17515    gprc, u4imm,
17516    /* MTSRIN */
17517    gprc, gprc,
17518    /* MTUDSCR */
17519    gprc,
17520    /* MTVRD */
17521    vsrc, g8rc,
17522    /* MTVRSAVE */
17523    gprc,
17524    /* MTVRSAVEv */
17525    VRSAVERC, gprc,
17526    /* MTVRWA */
17527    vsrc, gprc,
17528    /* MTVRWZ */
17529    vsrc, gprc,
17530    /* MTVSCR */
17531    vrrc,
17532    /* MTVSRBM */
17533    vrrc, g8rc,
17534    /* MTVSRBMI */
17535    vrrc, u16imm64,
17536    /* MTVSRD */
17537    vsfrc, g8rc,
17538    /* MTVSRDD */
17539    vsrc, g8rc_nox0, g8rc,
17540    /* MTVSRDM */
17541    vrrc, g8rc,
17542    /* MTVSRHM */
17543    vrrc, g8rc,
17544    /* MTVSRQM */
17545    vrrc, g8rc,
17546    /* MTVSRWA */
17547    vsfrc, gprc,
17548    /* MTVSRWM */
17549    vrrc, g8rc,
17550    /* MTVSRWS */
17551    vsrc, gprc,
17552    /* MTVSRWZ */
17553    vsfrc, gprc,
17554    /* MULHD */
17555    g8rc, g8rc, g8rc,
17556    /* MULHDU */
17557    g8rc, g8rc, g8rc,
17558    /* MULHDU_rec */
17559    g8rc, g8rc, g8rc,
17560    /* MULHD_rec */
17561    g8rc, g8rc, g8rc,
17562    /* MULHW */
17563    gprc, gprc, gprc,
17564    /* MULHWU */
17565    gprc, gprc, gprc,
17566    /* MULHWU_rec */
17567    gprc, gprc, gprc,
17568    /* MULHW_rec */
17569    gprc, gprc, gprc,
17570    /* MULLD */
17571    g8rc, g8rc, g8rc,
17572    /* MULLDO */
17573    g8rc, g8rc, g8rc,
17574    /* MULLDO_rec */
17575    g8rc, g8rc, g8rc,
17576    /* MULLD_rec */
17577    g8rc, g8rc, g8rc,
17578    /* MULLI */
17579    gprc, gprc, s16imm,
17580    /* MULLI8 */
17581    g8rc, g8rc, s16imm64,
17582    /* MULLW */
17583    gprc, gprc, gprc,
17584    /* MULLWO */
17585    gprc, gprc, gprc,
17586    /* MULLWO_rec */
17587    gprc, gprc, gprc,
17588    /* MULLW_rec */
17589    gprc, gprc, gprc,
17590    /* MoveGOTtoLR */
17591    /* MovePCtoLR */
17592    /* MovePCtoLR8 */
17593    /* NAND */
17594    gprc, gprc, gprc,
17595    /* NAND8 */
17596    g8rc, g8rc, g8rc,
17597    /* NAND8_rec */
17598    g8rc, g8rc, g8rc,
17599    /* NAND_rec */
17600    gprc, gprc, gprc,
17601    /* NAP */
17602    /* NEG */
17603    gprc, gprc,
17604    /* NEG8 */
17605    g8rc, g8rc,
17606    /* NEG8O */
17607    g8rc, g8rc,
17608    /* NEG8O_rec */
17609    g8rc, g8rc,
17610    /* NEG8_rec */
17611    g8rc, g8rc,
17612    /* NEGO */
17613    gprc, gprc,
17614    /* NEGO_rec */
17615    gprc, gprc,
17616    /* NEG_rec */
17617    gprc, gprc,
17618    /* NOP */
17619    /* NOP_GT_PWR6 */
17620    /* NOP_GT_PWR7 */
17621    /* NOR */
17622    gprc, gprc, gprc,
17623    /* NOR8 */
17624    g8rc, g8rc, g8rc,
17625    /* NOR8_rec */
17626    g8rc, g8rc, g8rc,
17627    /* NOR_rec */
17628    gprc, gprc, gprc,
17629    /* OR */
17630    gprc, gprc, gprc,
17631    /* OR8 */
17632    g8rc, g8rc, g8rc,
17633    /* OR8_rec */
17634    g8rc, g8rc, g8rc,
17635    /* ORC */
17636    gprc, gprc, gprc,
17637    /* ORC8 */
17638    g8rc, g8rc, g8rc,
17639    /* ORC8_rec */
17640    g8rc, g8rc, g8rc,
17641    /* ORC_rec */
17642    gprc, gprc, gprc,
17643    /* ORI */
17644    gprc, gprc, u16imm,
17645    /* ORI8 */
17646    g8rc, g8rc, u16imm64,
17647    /* ORIS */
17648    gprc, gprc, u16imm,
17649    /* ORIS8 */
17650    g8rc, g8rc, u16imm64,
17651    /* OR_rec */
17652    gprc, gprc, gprc,
17653    /* PADDI */
17654    gprc, gprc, s34imm,
17655    /* PADDI8 */
17656    g8rc, g8rc, s34imm,
17657    /* PADDI8pc */
17658    g8rc, immZero, s34imm_pcrel,
17659    /* PADDIdtprel */
17660    g8rc, g8rc_nox0, s16imm64,
17661    /* PADDIpc */
17662    gprc, immZero, s34imm_pcrel,
17663    /* PDEPD */
17664    g8rc, g8rc, g8rc,
17665    /* PEXTD */
17666    g8rc, g8rc, g8rc,
17667    /* PLBZ */
17668    gprc, dispRI34, ptr_rc_nor0,
17669    /* PLBZ8 */
17670    g8rc, dispRI34, ptr_rc_nor0,
17671    /* PLBZ8pc */
17672    g8rc, dispRI34, immZero,
17673    /* PLBZpc */
17674    gprc, dispRI34, immZero,
17675    /* PLD */
17676    g8rc, dispRI34, ptr_rc_nor0,
17677    /* PLDpc */
17678    g8rc, dispRI34, immZero,
17679    /* PLFD */
17680    f8rc, dispRI34, ptr_rc_nor0,
17681    /* PLFDpc */
17682    f8rc, dispRI34, immZero,
17683    /* PLFS */
17684    f4rc, dispRI34, ptr_rc_nor0,
17685    /* PLFSpc */
17686    f4rc, dispRI34, immZero,
17687    /* PLHA */
17688    gprc, dispRI34, ptr_rc_nor0,
17689    /* PLHA8 */
17690    g8rc, dispRI34, ptr_rc_nor0,
17691    /* PLHA8pc */
17692    g8rc, dispRI34, immZero,
17693    /* PLHApc */
17694    gprc, dispRI34, immZero,
17695    /* PLHZ */
17696    gprc, dispRI34, ptr_rc_nor0,
17697    /* PLHZ8 */
17698    g8rc, dispRI34, ptr_rc_nor0,
17699    /* PLHZ8pc */
17700    g8rc, dispRI34, immZero,
17701    /* PLHZpc */
17702    gprc, dispRI34, immZero,
17703    /* PLI */
17704    gprc, s34imm,
17705    /* PLI8 */
17706    g8rc, s34imm,
17707    /* PLWA */
17708    gprc, dispRI34, ptr_rc_nor0,
17709    /* PLWA8 */
17710    g8rc, dispRI34, ptr_rc_nor0,
17711    /* PLWA8pc */
17712    g8rc, dispRI34, immZero,
17713    /* PLWApc */
17714    gprc, dispRI34, immZero,
17715    /* PLWZ */
17716    gprc, dispRI34, ptr_rc_nor0,
17717    /* PLWZ8 */
17718    g8rc, dispRI34, ptr_rc_nor0,
17719    /* PLWZ8pc */
17720    g8rc, dispRI34, immZero,
17721    /* PLWZpc */
17722    gprc, dispRI34, immZero,
17723    /* PLXSD */
17724    vfrc, dispRI34, ptr_rc_nor0,
17725    /* PLXSDpc */
17726    vfrc, dispRI34, immZero,
17727    /* PLXSSP */
17728    vfrc, dispRI34, ptr_rc_nor0,
17729    /* PLXSSPpc */
17730    vfrc, dispRI34, immZero,
17731    /* PLXV */
17732    vsrc, dispRI34, ptr_rc_nor0,
17733    /* PLXVP */
17734    vsrprc, dispRI34, ptr_rc_nor0,
17735    /* PLXVPpc */
17736    vsrprc, dispRI34, immZero,
17737    /* PLXVpc */
17738    vsrc, dispRI34, immZero,
17739    /* PMXVBF16GER2 */
17740    acc, vsrc, vsrc, u4imm, u4imm, u2imm,
17741    /* PMXVBF16GER2NN */
17742    acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm,
17743    /* PMXVBF16GER2NP */
17744    acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm,
17745    /* PMXVBF16GER2PN */
17746    acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm,
17747    /* PMXVBF16GER2PP */
17748    acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm,
17749    /* PMXVBF16GER2W */
17750    wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
17751    /* PMXVBF16GER2WNN */
17752    wacc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
17753    /* PMXVBF16GER2WNP */
17754    wacc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
17755    /* PMXVBF16GER2WPN */
17756    wacc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
17757    /* PMXVBF16GER2WPP */
17758    wacc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
17759    /* PMXVF16GER2 */
17760    acc, vsrc, vsrc, u4imm, u4imm, u2imm,
17761    /* PMXVF16GER2NN */
17762    acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm,
17763    /* PMXVF16GER2NP */
17764    acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm,
17765    /* PMXVF16GER2PN */
17766    acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm,
17767    /* PMXVF16GER2PP */
17768    acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm,
17769    /* PMXVF16GER2W */
17770    wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
17771    /* PMXVF16GER2WNN */
17772    wacc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
17773    /* PMXVF16GER2WNP */
17774    wacc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
17775    /* PMXVF16GER2WPN */
17776    wacc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
17777    /* PMXVF16GER2WPP */
17778    wacc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
17779    /* PMXVF32GER */
17780    acc, vsrc, vsrc, u4imm, u4imm,
17781    /* PMXVF32GERNN */
17782    acc, acc, vsrc, vsrc, u4imm, u4imm,
17783    /* PMXVF32GERNP */
17784    acc, acc, vsrc, vsrc, u4imm, u4imm,
17785    /* PMXVF32GERPN */
17786    acc, acc, vsrc, vsrc, u4imm, u4imm,
17787    /* PMXVF32GERPP */
17788    acc, acc, vsrc, vsrc, u4imm, u4imm,
17789    /* PMXVF32GERW */
17790    wacc, vsrc, vsrc, u4imm, u4imm,
17791    /* PMXVF32GERWNN */
17792    wacc, wacc, vsrc, vsrc, u4imm, u4imm,
17793    /* PMXVF32GERWNP */
17794    wacc, wacc, vsrc, vsrc, u4imm, u4imm,
17795    /* PMXVF32GERWPN */
17796    wacc, wacc, vsrc, vsrc, u4imm, u4imm,
17797    /* PMXVF32GERWPP */
17798    wacc, wacc, vsrc, vsrc, u4imm, u4imm,
17799    /* PMXVF64GER */
17800    acc, vsrpevenrc, vsrc, u4imm, u2imm,
17801    /* PMXVF64GERNN */
17802    acc, acc, vsrpevenrc, vsrc, u4imm, u2imm,
17803    /* PMXVF64GERNP */
17804    acc, acc, vsrpevenrc, vsrc, u4imm, u2imm,
17805    /* PMXVF64GERPN */
17806    acc, acc, vsrpevenrc, vsrc, u4imm, u2imm,
17807    /* PMXVF64GERPP */
17808    acc, acc, vsrpevenrc, vsrc, u4imm, u2imm,
17809    /* PMXVF64GERW */
17810    wacc, vsrpevenrc, vsrc, u4imm, u2imm,
17811    /* PMXVF64GERWNN */
17812    wacc, wacc, vsrpevenrc, vsrc, u4imm, u2imm,
17813    /* PMXVF64GERWNP */
17814    wacc, wacc, vsrpevenrc, vsrc, u4imm, u2imm,
17815    /* PMXVF64GERWPN */
17816    wacc, wacc, vsrpevenrc, vsrc, u4imm, u2imm,
17817    /* PMXVF64GERWPP */
17818    wacc, wacc, vsrpevenrc, vsrc, u4imm, u2imm,
17819    /* PMXVI16GER2 */
17820    acc, vsrc, vsrc, u4imm, u4imm, u2imm,
17821    /* PMXVI16GER2PP */
17822    acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm,
17823    /* PMXVI16GER2S */
17824    acc, vsrc, vsrc, u4imm, u4imm, u2imm,
17825    /* PMXVI16GER2SPP */
17826    acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm,
17827    /* PMXVI16GER2SW */
17828    wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
17829    /* PMXVI16GER2SWPP */
17830    wacc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
17831    /* PMXVI16GER2W */
17832    wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
17833    /* PMXVI16GER2WPP */
17834    acc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
17835    /* PMXVI4GER8 */
17836    acc, vsrc, vsrc, u4imm, u4imm, u8imm,
17837    /* PMXVI4GER8PP */
17838    acc, acc, vsrc, vsrc, u4imm, u4imm, u8imm,
17839    /* PMXVI4GER8W */
17840    wacc, vsrc, vsrc, u4imm, u4imm, u8imm,
17841    /* PMXVI4GER8WPP */
17842    wacc, wacc, vsrc, vsrc, u4imm, u4imm, u8imm,
17843    /* PMXVI8GER4 */
17844    acc, vsrc, vsrc, u4imm, u4imm, u4imm,
17845    /* PMXVI8GER4PP */
17846    acc, acc, vsrc, vsrc, u4imm, u4imm, u4imm,
17847    /* PMXVI8GER4SPP */
17848    acc, acc, vsrc, vsrc, u4imm, u4imm, u4imm,
17849    /* PMXVI8GER4W */
17850    wacc, vsrc, vsrc, u4imm, u4imm, u4imm,
17851    /* PMXVI8GER4WPP */
17852    wacc, wacc, vsrc, vsrc, u4imm, u4imm, u4imm,
17853    /* PMXVI8GER4WSPP */
17854    wacc, wacc, vsrc, vsrc, u4imm, u4imm, u4imm,
17855    /* POPCNTB */
17856    gprc, gprc,
17857    /* POPCNTB8 */
17858    g8rc, g8rc,
17859    /* POPCNTD */
17860    g8rc, g8rc,
17861    /* POPCNTW */
17862    gprc, gprc,
17863    /* PPC32GOT */
17864    gprc,
17865    /* PPC32PICGOT */
17866    gprc, gprc,
17867    /* PREPARE_PROBED_ALLOCA_32 */
17868    gprc, gprc, gprc, dispRI, ptr_rc_nor0,
17869    /* PREPARE_PROBED_ALLOCA_64 */
17870    g8rc, g8rc, g8rc, dispRI, ptr_rc_nor0,
17871    /* PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32 */
17872    gprc, gprc, gprc, dispRI, ptr_rc_nor0,
17873    /* PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64 */
17874    g8rc, g8rc, g8rc, dispRI, ptr_rc_nor0,
17875    /* PROBED_ALLOCA_32 */
17876    gprc, gprc, dispRI, ptr_rc_nor0,
17877    /* PROBED_ALLOCA_64 */
17878    g8rc, g8rc, dispRI, ptr_rc_nor0,
17879    /* PROBED_STACKALLOC_32 */
17880    gprc, gprc, i64imm,
17881    /* PROBED_STACKALLOC_64 */
17882    g8rc, g8rc, i64imm,
17883    /* PSTB */
17884    gprc, dispRI34, ptr_rc_nor0,
17885    /* PSTB8 */
17886    g8rc, dispRI34, ptr_rc_nor0,
17887    /* PSTB8pc */
17888    g8rc, dispRI34, immZero,
17889    /* PSTBpc */
17890    gprc, dispRI34, immZero,
17891    /* PSTD */
17892    g8rc, dispRI34, ptr_rc_nor0,
17893    /* PSTDpc */
17894    g8rc, dispRI34, immZero,
17895    /* PSTFD */
17896    f8rc, dispRI34, ptr_rc_nor0,
17897    /* PSTFDpc */
17898    f8rc, dispRI34, immZero,
17899    /* PSTFS */
17900    f4rc, dispRI34, ptr_rc_nor0,
17901    /* PSTFSpc */
17902    f4rc, dispRI34, immZero,
17903    /* PSTH */
17904    gprc, dispRI34, ptr_rc_nor0,
17905    /* PSTH8 */
17906    g8rc, dispRI34, ptr_rc_nor0,
17907    /* PSTH8pc */
17908    g8rc, dispRI34, immZero,
17909    /* PSTHpc */
17910    gprc, dispRI34, immZero,
17911    /* PSTW */
17912    gprc, dispRI34, ptr_rc_nor0,
17913    /* PSTW8 */
17914    g8rc, dispRI34, ptr_rc_nor0,
17915    /* PSTW8pc */
17916    g8rc, dispRI34, immZero,
17917    /* PSTWpc */
17918    gprc, dispRI34, immZero,
17919    /* PSTXSD */
17920    vfrc, dispRI34, ptr_rc_nor0,
17921    /* PSTXSDpc */
17922    vfrc, dispRI34, immZero,
17923    /* PSTXSSP */
17924    vfrc, dispRI34, ptr_rc_nor0,
17925    /* PSTXSSPpc */
17926    vfrc, dispRI34, immZero,
17927    /* PSTXV */
17928    vsrc, dispRI34, ptr_rc_nor0,
17929    /* PSTXVP */
17930    vsrprc, dispRI34, ptr_rc_nor0,
17931    /* PSTXVPpc */
17932    vsrprc, dispRI34, immZero,
17933    /* PSTXVpc */
17934    vsrc, dispRI34, immZero,
17935    /* PseudoEIEIO */
17936    /* RESTORE_ACC */
17937    acc, dispRIX16, ptr_rc_nor0,
17938    /* RESTORE_CR */
17939    crrc, dispRI, ptr_rc_nor0,
17940    /* RESTORE_CRBIT */
17941    crbitrc, dispRI, ptr_rc_nor0,
17942    /* RESTORE_QUADWORD */
17943    g8prc, dispRIX, ptr_rc_nor0,
17944    /* RESTORE_UACC */
17945    uacc, dispRIX16, ptr_rc_nor0,
17946    /* RESTORE_WACC */
17947    wacc, dispRIX16, ptr_rc_nor0,
17948    /* RFCI */
17949    /* RFDI */
17950    /* RFEBB */
17951    u1imm,
17952    /* RFI */
17953    /* RFID */
17954    /* RFMCI */
17955    /* RLDCL */
17956    g8rc, g8rc, gprc, u6imm,
17957    /* RLDCL_rec */
17958    g8rc, g8rc, gprc, u6imm,
17959    /* RLDCR */
17960    g8rc, g8rc, gprc, u6imm,
17961    /* RLDCR_rec */
17962    g8rc, g8rc, gprc, u6imm,
17963    /* RLDIC */
17964    g8rc, g8rc, u6imm, u6imm,
17965    /* RLDICL */
17966    g8rc, g8rc, u6imm, u6imm,
17967    /* RLDICL_32 */
17968    gprc, gprc, u6imm, u6imm,
17969    /* RLDICL_32_64 */
17970    g8rc, gprc, u6imm, u6imm,
17971    /* RLDICL_32_rec */
17972    gprc, gprc, u6imm, u6imm,
17973    /* RLDICL_rec */
17974    g8rc, g8rc, u6imm, u6imm,
17975    /* RLDICR */
17976    g8rc, g8rc, u6imm, u6imm,
17977    /* RLDICR_32 */
17978    gprc, gprc, u6imm, u6imm,
17979    /* RLDICR_rec */
17980    g8rc, g8rc, u6imm, u6imm,
17981    /* RLDIC_rec */
17982    g8rc, g8rc, u6imm, u6imm,
17983    /* RLDIMI */
17984    g8rc, g8rc, g8rc, u6imm, u6imm,
17985    /* RLDIMI_rec */
17986    g8rc, g8rc, g8rc, u6imm, u6imm,
17987    /* RLWIMI */
17988    gprc, gprc, gprc, u5imm, u5imm, u5imm,
17989    /* RLWIMI8 */
17990    g8rc, g8rc, g8rc, u5imm, u5imm, u5imm,
17991    /* RLWIMI8_rec */
17992    g8rc, g8rc, g8rc, u5imm, u5imm, u5imm,
17993    /* RLWIMI_rec */
17994    gprc, gprc, gprc, u5imm, u5imm, u5imm,
17995    /* RLWINM */
17996    gprc, gprc, u5imm, u5imm, u5imm,
17997    /* RLWINM8 */
17998    g8rc, g8rc, u5imm, u5imm, u5imm,
17999    /* RLWINM8_rec */
18000    g8rc, g8rc, u5imm, u5imm, u5imm,
18001    /* RLWINM_rec */
18002    gprc, gprc, u5imm, u5imm, u5imm,
18003    /* RLWNM */
18004    gprc, gprc, gprc, u5imm, u5imm,
18005    /* RLWNM8 */
18006    g8rc, g8rc, g8rc, u5imm, u5imm,
18007    /* RLWNM8_rec */
18008    g8rc, g8rc, g8rc, u5imm, u5imm,
18009    /* RLWNM_rec */
18010    gprc, gprc, gprc, u5imm, u5imm,
18011    /* ReadTB */
18012    gprc, gprc,
18013    /* SC */
18014    i32imm,
18015    /* SELECT_CC_F16 */
18016    vrrc, crrc, vrrc, vrrc, i32imm,
18017    /* SELECT_CC_F4 */
18018    f4rc, crrc, f4rc, f4rc, i32imm,
18019    /* SELECT_CC_F8 */
18020    f8rc, crrc, f8rc, f8rc, i32imm,
18021    /* SELECT_CC_I4 */
18022    gprc, crrc, gprc_nor0, gprc_nor0, i32imm,
18023    /* SELECT_CC_I8 */
18024    g8rc, crrc, g8rc_nox0, g8rc_nox0, i32imm,
18025    /* SELECT_CC_SPE */
18026    sperc, crrc, sperc, sperc, i32imm,
18027    /* SELECT_CC_SPE4 */
18028    spe4rc, crrc, spe4rc, spe4rc, i32imm,
18029    /* SELECT_CC_VRRC */
18030    vrrc, crrc, vrrc, vrrc, i32imm,
18031    /* SELECT_CC_VSFRC */
18032    f8rc, crrc, f8rc, f8rc, i32imm,
18033    /* SELECT_CC_VSRC */
18034    vsrc, crrc, vsrc, vsrc, i32imm,
18035    /* SELECT_CC_VSSRC */
18036    f4rc, crrc, f4rc, f4rc, i32imm,
18037    /* SELECT_F16 */
18038    vrrc, crbitrc, vrrc, vrrc,
18039    /* SELECT_F4 */
18040    f4rc, crbitrc, f4rc, f4rc,
18041    /* SELECT_F8 */
18042    f8rc, crbitrc, f8rc, f8rc,
18043    /* SELECT_I4 */
18044    gprc, crbitrc, gprc_nor0, gprc_nor0,
18045    /* SELECT_I8 */
18046    g8rc, crbitrc, g8rc_nox0, g8rc_nox0,
18047    /* SELECT_SPE */
18048    sperc, crbitrc, sperc, sperc,
18049    /* SELECT_SPE4 */
18050    spe4rc, crbitrc, spe4rc, spe4rc,
18051    /* SELECT_VRRC */
18052    vrrc, crbitrc, vrrc, vrrc,
18053    /* SELECT_VSFRC */
18054    f8rc, crbitrc, f8rc, f8rc,
18055    /* SELECT_VSRC */
18056    vsrc, crbitrc, vsrc, vsrc,
18057    /* SELECT_VSSRC */
18058    f4rc, crbitrc, f4rc, f4rc,
18059    /* SETB */
18060    gprc, crrc,
18061    /* SETB8 */
18062    g8rc, crrc,
18063    /* SETBC */
18064    gprc, crbitrc,
18065    /* SETBC8 */
18066    g8rc, crbitrc,
18067    /* SETBCR */
18068    gprc, crbitrc,
18069    /* SETBCR8 */
18070    g8rc, crbitrc,
18071    /* SETFLM */
18072    f8rc, f8rc,
18073    /* SETNBC */
18074    gprc, crbitrc,
18075    /* SETNBC8 */
18076    g8rc, crbitrc,
18077    /* SETNBCR */
18078    gprc, crbitrc,
18079    /* SETNBCR8 */
18080    g8rc, crbitrc,
18081    /* SETRND */
18082    f8rc, gprc,
18083    /* SETRNDi */
18084    f8rc, u2imm,
18085    /* SLBFEE_rec */
18086    gprc, gprc,
18087    /* SLBIA */
18088    /* SLBIE */
18089    gprc,
18090    /* SLBIEG */
18091    gprc, gprc,
18092    /* SLBMFEE */
18093    gprc, gprc,
18094    /* SLBMFEV */
18095    gprc, gprc,
18096    /* SLBMTE */
18097    gprc, gprc,
18098    /* SLBSYNC */
18099    /* SLD */
18100    g8rc, g8rc, gprc,
18101    /* SLD_rec */
18102    g8rc, g8rc, gprc,
18103    /* SLW */
18104    gprc, gprc, gprc,
18105    /* SLW8 */
18106    g8rc, g8rc, g8rc,
18107    /* SLW8_rec */
18108    g8rc, g8rc, g8rc,
18109    /* SLW_rec */
18110    gprc, gprc, gprc,
18111    /* SPELWZ */
18112    spe4rc, dispRI, ptr_rc_nor0,
18113    /* SPELWZX */
18114    spe4rc, ptr_rc_nor0, ptr_rc_idx,
18115    /* SPESTW */
18116    spe4rc, dispRI, ptr_rc_nor0,
18117    /* SPESTWX */
18118    spe4rc, ptr_rc_nor0, ptr_rc_idx,
18119    /* SPILL_ACC */
18120    acc, dispRIX16, ptr_rc_nor0,
18121    /* SPILL_CR */
18122    crrc, dispRI, ptr_rc_nor0,
18123    /* SPILL_CRBIT */
18124    crbitrc, dispRI, ptr_rc_nor0,
18125    /* SPILL_QUADWORD */
18126    g8prc, dispRIX, ptr_rc_nor0,
18127    /* SPILL_UACC */
18128    uacc, dispRIX16, ptr_rc_nor0,
18129    /* SPILL_WACC */
18130    wacc, dispRIX16, ptr_rc_nor0,
18131    /* SPLIT_QUADWORD */
18132    g8rc, g8rc, g8prc,
18133    /* SRAD */
18134    g8rc, g8rc, gprc,
18135    /* SRADI */
18136    g8rc, g8rc, u6imm,
18137    /* SRADI_32 */
18138    gprc, gprc, u6imm,
18139    /* SRADI_rec */
18140    g8rc, g8rc, u6imm,
18141    /* SRAD_rec */
18142    g8rc, g8rc, gprc,
18143    /* SRAW */
18144    gprc, gprc, gprc,
18145    /* SRAWI */
18146    gprc, gprc, u5imm,
18147    /* SRAWI_rec */
18148    gprc, gprc, u5imm,
18149    /* SRAW_rec */
18150    gprc, gprc, gprc,
18151    /* SRD */
18152    g8rc, g8rc, gprc,
18153    /* SRD_rec */
18154    g8rc, g8rc, gprc,
18155    /* SRW */
18156    gprc, gprc, gprc,
18157    /* SRW8 */
18158    g8rc, g8rc, g8rc,
18159    /* SRW8_rec */
18160    g8rc, g8rc, g8rc,
18161    /* SRW_rec */
18162    gprc, gprc, gprc,
18163    /* STB */
18164    gprc, dispRI, ptr_rc_nor0,
18165    /* STB8 */
18166    g8rc, dispRI, ptr_rc_nor0,
18167    /* STBCIX */
18168    gprc, gprc, gprc,
18169    /* STBCX */
18170    gprc, ptr_rc_nor0, ptr_rc_idx,
18171    /* STBEPX */
18172    gprc, ptr_rc_nor0, ptr_rc_idx,
18173    /* STBU */
18174    ptr_rc_nor0, gprc, dispRI, ptr_rc_nor0,
18175    /* STBU8 */
18176    ptr_rc_nor0, g8rc, dispRI, ptr_rc_nor0,
18177    /* STBUX */
18178    ptr_rc_nor0, gprc, ptr_rc_nor0, ptr_rc_idx,
18179    /* STBUX8 */
18180    ptr_rc_nor0, g8rc, ptr_rc_nor0, ptr_rc_idx,
18181    /* STBX */
18182    gprc, ptr_rc_nor0, ptr_rc_idx,
18183    /* STBX8 */
18184    g8rc, ptr_rc_nor0, ptr_rc_idx,
18185    /* STBXTLS */
18186    g8rc, ptr_rc_nor0, tlsreg,
18187    /* STBXTLS_ */
18188    g8rc, ptr_rc_nor0, tlsreg,
18189    /* STBXTLS_32 */
18190    gprc, ptr_rc_nor0, tlsreg,
18191    /* STD */
18192    g8rc, dispRIX, ptr_rc_nor0,
18193    /* STDAT */
18194    g8rc, g8rc, u5imm,
18195    /* STDBRX */
18196    g8rc, ptr_rc_nor0, ptr_rc_idx,
18197    /* STDCIX */
18198    gprc, gprc, gprc,
18199    /* STDCX */
18200    g8rc, ptr_rc_nor0, ptr_rc_idx,
18201    /* STDU */
18202    ptr_rc_nor0, g8rc, dispRIX, ptr_rc_nor0,
18203    /* STDUX */
18204    ptr_rc_nor0, g8rc, ptr_rc_nor0, ptr_rc_idx,
18205    /* STDX */
18206    g8rc, ptr_rc_nor0, ptr_rc_idx,
18207    /* STDXTLS */
18208    g8rc, ptr_rc_nor0, tlsreg,
18209    /* STDXTLS_ */
18210    g8rc, ptr_rc_nor0, tlsreg,
18211    /* STFD */
18212    f8rc, dispRI, ptr_rc_nor0,
18213    /* STFDEPX */
18214    f8rc, ptr_rc_nor0, ptr_rc_idx,
18215    /* STFDU */
18216    ptr_rc_nor0, f8rc, dispRI, ptr_rc_nor0,
18217    /* STFDUX */
18218    ptr_rc_nor0, f8rc, ptr_rc_nor0, ptr_rc_idx,
18219    /* STFDX */
18220    f8rc, ptr_rc_nor0, ptr_rc_idx,
18221    /* STFIWX */
18222    f8rc, ptr_rc_nor0, ptr_rc_idx,
18223    /* STFS */
18224    f4rc, dispRI, ptr_rc_nor0,
18225    /* STFSU */
18226    ptr_rc_nor0, f4rc, dispRI, ptr_rc_nor0,
18227    /* STFSUX */
18228    ptr_rc_nor0, f4rc, ptr_rc_nor0, ptr_rc_idx,
18229    /* STFSX */
18230    f4rc, ptr_rc_nor0, ptr_rc_idx,
18231    /* STH */
18232    gprc, dispRI, ptr_rc_nor0,
18233    /* STH8 */
18234    g8rc, dispRI, ptr_rc_nor0,
18235    /* STHBRX */
18236    gprc, ptr_rc_nor0, ptr_rc_idx,
18237    /* STHCIX */
18238    gprc, gprc, gprc,
18239    /* STHCX */
18240    gprc, ptr_rc_nor0, ptr_rc_idx,
18241    /* STHEPX */
18242    gprc, ptr_rc_nor0, ptr_rc_idx,
18243    /* STHU */
18244    ptr_rc_nor0, gprc, dispRI, ptr_rc_nor0,
18245    /* STHU8 */
18246    ptr_rc_nor0, g8rc, dispRI, ptr_rc_nor0,
18247    /* STHUX */
18248    ptr_rc_nor0, gprc, ptr_rc_nor0, ptr_rc_idx,
18249    /* STHUX8 */
18250    ptr_rc_nor0, g8rc, ptr_rc_nor0, ptr_rc_idx,
18251    /* STHX */
18252    gprc, ptr_rc_nor0, ptr_rc_idx,
18253    /* STHX8 */
18254    g8rc, ptr_rc_nor0, ptr_rc_idx,
18255    /* STHXTLS */
18256    g8rc, ptr_rc_nor0, tlsreg,
18257    /* STHXTLS_ */
18258    g8rc, ptr_rc_nor0, tlsreg,
18259    /* STHXTLS_32 */
18260    gprc, ptr_rc_nor0, tlsreg,
18261    /* STMW */
18262    gprc, dispRI, ptr_rc_nor0,
18263    /* STOP */
18264    /* STQ */
18265    g8prc, dispRIX, ptr_rc_nor0,
18266    /* STQCX */
18267    g8prc, ptr_rc_nor0, ptr_rc_idx,
18268    /* STQX_PSEUDO */
18269    g8prc, ptr_rc_nor0, ptr_rc_idx,
18270    /* STSWI */
18271    gprc, gprc, u5imm,
18272    /* STVEBX */
18273    vrrc, ptr_rc_nor0, ptr_rc_idx,
18274    /* STVEHX */
18275    vrrc, ptr_rc_nor0, ptr_rc_idx,
18276    /* STVEWX */
18277    vrrc, ptr_rc_nor0, ptr_rc_idx,
18278    /* STVX */
18279    vrrc, ptr_rc_nor0, ptr_rc_idx,
18280    /* STVXL */
18281    vrrc, ptr_rc_nor0, ptr_rc_idx,
18282    /* STW */
18283    gprc, dispRI, ptr_rc_nor0,
18284    /* STW8 */
18285    g8rc, dispRI, ptr_rc_nor0,
18286    /* STWAT */
18287    gprc, gprc, u5imm,
18288    /* STWBRX */
18289    gprc, ptr_rc_nor0, ptr_rc_idx,
18290    /* STWCIX */
18291    gprc, gprc, gprc,
18292    /* STWCX */
18293    gprc, ptr_rc_nor0, ptr_rc_idx,
18294    /* STWEPX */
18295    gprc, ptr_rc_nor0, ptr_rc_idx,
18296    /* STWU */
18297    ptr_rc_nor0, gprc, dispRI, ptr_rc_nor0,
18298    /* STWU8 */
18299    ptr_rc_nor0, g8rc, dispRI, ptr_rc_nor0,
18300    /* STWUX */
18301    ptr_rc_nor0, gprc, ptr_rc_nor0, ptr_rc_idx,
18302    /* STWUX8 */
18303    ptr_rc_nor0, g8rc, ptr_rc_nor0, ptr_rc_idx,
18304    /* STWX */
18305    gprc, ptr_rc_nor0, ptr_rc_idx,
18306    /* STWX8 */
18307    g8rc, ptr_rc_nor0, ptr_rc_idx,
18308    /* STWXTLS */
18309    g8rc, ptr_rc_nor0, tlsreg,
18310    /* STWXTLS_ */
18311    g8rc, ptr_rc_nor0, tlsreg,
18312    /* STWXTLS_32 */
18313    gprc, ptr_rc_nor0, tlsreg,
18314    /* STXSD */
18315    vfrc, dispRIX, ptr_rc_nor0,
18316    /* STXSDX */
18317    vsfrc, ptr_rc_nor0, ptr_rc_idx,
18318    /* STXSIBX */
18319    vsfrc, ptr_rc_nor0, ptr_rc_idx,
18320    /* STXSIBXv */
18321    vsrc, ptr_rc_nor0, ptr_rc_idx,
18322    /* STXSIHX */
18323    vsfrc, ptr_rc_nor0, ptr_rc_idx,
18324    /* STXSIHXv */
18325    vsrc, ptr_rc_nor0, ptr_rc_idx,
18326    /* STXSIWX */
18327    vsfrc, ptr_rc_nor0, ptr_rc_idx,
18328    /* STXSSP */
18329    vfrc, dispRIX, ptr_rc_nor0,
18330    /* STXSSPX */
18331    vssrc, ptr_rc_nor0, ptr_rc_idx,
18332    /* STXV */
18333    vsrc, dispRIX16, ptr_rc_nor0,
18334    /* STXVB16X */
18335    vsrc, ptr_rc_nor0, ptr_rc_idx,
18336    /* STXVD2X */
18337    vsrc, ptr_rc_nor0, ptr_rc_idx,
18338    /* STXVH8X */
18339    vsrc, ptr_rc_nor0, ptr_rc_idx,
18340    /* STXVL */
18341    vsrc, ptr_rc_nor0, g8rc,
18342    /* STXVLL */
18343    vsrc, ptr_rc_nor0, g8rc,
18344    /* STXVP */
18345    vsrprc, dispRIX16, ptr_rc_nor0,
18346    /* STXVPRL */
18347    vsrprc, ptr_rc_nor0, g8rc,
18348    /* STXVPRLL */
18349    vsrprc, ptr_rc_nor0, g8rc,
18350    /* STXVPX */
18351    vsrprc, ptr_rc_nor0, ptr_rc_idx,
18352    /* STXVRBX */
18353    vsrc, ptr_rc_nor0, ptr_rc_idx,
18354    /* STXVRDX */
18355    vsrc, ptr_rc_nor0, ptr_rc_idx,
18356    /* STXVRHX */
18357    vsrc, ptr_rc_nor0, ptr_rc_idx,
18358    /* STXVRL */
18359    vsrc, ptr_rc_nor0, g8rc,
18360    /* STXVRLL */
18361    vsrc, ptr_rc_nor0, g8rc,
18362    /* STXVRWX */
18363    vsrc, ptr_rc_nor0, ptr_rc_idx,
18364    /* STXVW4X */
18365    vsrc, ptr_rc_nor0, ptr_rc_idx,
18366    /* STXVX */
18367    vsrc, ptr_rc_nor0, ptr_rc_idx,
18368    /* SUBF */
18369    gprc, gprc, gprc,
18370    /* SUBF8 */
18371    g8rc, g8rc, g8rc,
18372    /* SUBF8O */
18373    g8rc, g8rc, g8rc,
18374    /* SUBF8O_rec */
18375    g8rc, g8rc, g8rc,
18376    /* SUBF8_rec */
18377    g8rc, g8rc, g8rc,
18378    /* SUBFC */
18379    gprc, gprc, gprc,
18380    /* SUBFC8 */
18381    g8rc, g8rc, g8rc,
18382    /* SUBFC8O */
18383    g8rc, g8rc, g8rc,
18384    /* SUBFC8O_rec */
18385    g8rc, g8rc, g8rc,
18386    /* SUBFC8_rec */
18387    g8rc, g8rc, g8rc,
18388    /* SUBFCO */
18389    gprc, gprc, gprc,
18390    /* SUBFCO_rec */
18391    gprc, gprc, gprc,
18392    /* SUBFC_rec */
18393    gprc, gprc, gprc,
18394    /* SUBFE */
18395    gprc, gprc, gprc,
18396    /* SUBFE8 */
18397    g8rc, g8rc, g8rc,
18398    /* SUBFE8O */
18399    g8rc, g8rc, g8rc,
18400    /* SUBFE8O_rec */
18401    g8rc, g8rc, g8rc,
18402    /* SUBFE8_rec */
18403    g8rc, g8rc, g8rc,
18404    /* SUBFEO */
18405    gprc, gprc, gprc,
18406    /* SUBFEO_rec */
18407    gprc, gprc, gprc,
18408    /* SUBFE_rec */
18409    gprc, gprc, gprc,
18410    /* SUBFIC */
18411    gprc, gprc, s16imm,
18412    /* SUBFIC8 */
18413    g8rc, g8rc, s16imm64,
18414    /* SUBFME */
18415    gprc, gprc,
18416    /* SUBFME8 */
18417    g8rc, g8rc,
18418    /* SUBFME8O */
18419    g8rc, g8rc,
18420    /* SUBFME8O_rec */
18421    g8rc, g8rc,
18422    /* SUBFME8_rec */
18423    g8rc, g8rc,
18424    /* SUBFMEO */
18425    gprc, gprc,
18426    /* SUBFMEO_rec */
18427    gprc, gprc,
18428    /* SUBFME_rec */
18429    gprc, gprc,
18430    /* SUBFO */
18431    gprc, gprc, gprc,
18432    /* SUBFO_rec */
18433    gprc, gprc, gprc,
18434    /* SUBFUS */
18435    g8rc, g8rc, g8rc, u1imm,
18436    /* SUBFUS_rec */
18437    g8rc, g8rc, g8rc, u1imm,
18438    /* SUBFZE */
18439    gprc, gprc,
18440    /* SUBFZE8 */
18441    g8rc, g8rc,
18442    /* SUBFZE8O */
18443    g8rc, g8rc,
18444    /* SUBFZE8O_rec */
18445    g8rc, g8rc,
18446    /* SUBFZE8_rec */
18447    g8rc, g8rc,
18448    /* SUBFZEO */
18449    gprc, gprc,
18450    /* SUBFZEO_rec */
18451    gprc, gprc,
18452    /* SUBFZE_rec */
18453    gprc, gprc,
18454    /* SUBF_rec */
18455    gprc, gprc, gprc,
18456    /* SYNC */
18457    u2imm,
18458    /* TABORT */
18459    gprc,
18460    /* TABORTDC */
18461    u5imm, gprc, gprc,
18462    /* TABORTDCI */
18463    u5imm, gprc, u5imm,
18464    /* TABORTWC */
18465    u5imm, gprc, gprc,
18466    /* TABORTWCI */
18467    u5imm, gprc, u5imm,
18468    /* TAILB */
18469    calltarget,
18470    /* TAILB8 */
18471    calltarget,
18472    /* TAILBA */
18473    abscalltarget,
18474    /* TAILBA8 */
18475    abscalltarget,
18476    /* TAILBCTR */
18477    /* TAILBCTR8 */
18478    /* TBEGIN */
18479    u1imm,
18480    /* TBEGIN_RET */
18481    gprc, u1imm,
18482    /* TCHECK */
18483    crrc,
18484    /* TCHECK_RET */
18485    gprc,
18486    /* TCRETURNai */
18487    abscalltarget, i32imm,
18488    /* TCRETURNai8 */
18489    abscalltarget, i32imm,
18490    /* TCRETURNdi */
18491    calltarget, i32imm,
18492    /* TCRETURNdi8 */
18493    calltarget, i32imm,
18494    /* TCRETURNri */
18495    CTRRC, i32imm,
18496    /* TCRETURNri8 */
18497    CTRRC8, i32imm,
18498    /* TD */
18499    u5imm, g8rc, g8rc,
18500    /* TDI */
18501    u5imm, g8rc, s16imm,
18502    /* TEND */
18503    u1imm,
18504    /* TLBIA */
18505    /* TLBIE */
18506    gprc, gprc,
18507    /* TLBIEL */
18508    gprc,
18509    /* TLBIVAX */
18510    gprc, gprc,
18511    /* TLBLD */
18512    gprc,
18513    /* TLBLI */
18514    gprc,
18515    /* TLBRE */
18516    /* TLBRE2 */
18517    gprc, gprc, i1imm,
18518    /* TLBSX */
18519    gprc, gprc,
18520    /* TLBSX2 */
18521    gprc, gprc, gprc,
18522    /* TLBSX2D */
18523    gprc, gprc, gprc,
18524    /* TLBSYNC */
18525    /* TLBWE */
18526    /* TLBWE2 */
18527    gprc, gprc, i1imm,
18528    /* TLSGDAIX */
18529    gprc, gprc, gprc,
18530    /* TLSGDAIX8 */
18531    g8rc, g8rc, g8rc,
18532    /* TRAP */
18533    /* TRECHKPT */
18534    /* TRECLAIM */
18535    gprc,
18536    /* TSR */
18537    u1imm,
18538    /* TW */
18539    u5imm, gprc, gprc,
18540    /* TWI */
18541    u5imm, gprc, s16imm,
18542    /* UNENCODED_NOP */
18543    /* UpdateGBR */
18544    gprc, gprc, gprc,
18545    /* VABSDUB */
18546    vrrc, vrrc, vrrc,
18547    /* VABSDUH */
18548    vrrc, vrrc, vrrc,
18549    /* VABSDUW */
18550    vrrc, vrrc, vrrc,
18551    /* VADDCUQ */
18552    vrrc, vrrc, vrrc,
18553    /* VADDCUW */
18554    vrrc, vrrc, vrrc,
18555    /* VADDECUQ */
18556    vrrc, vrrc, vrrc, vrrc,
18557    /* VADDEUQM */
18558    vrrc, vrrc, vrrc, vrrc,
18559    /* VADDFP */
18560    vrrc, vrrc, vrrc,
18561    /* VADDSBS */
18562    vrrc, vrrc, vrrc,
18563    /* VADDSHS */
18564    vrrc, vrrc, vrrc,
18565    /* VADDSWS */
18566    vrrc, vrrc, vrrc,
18567    /* VADDUBM */
18568    vrrc, vrrc, vrrc,
18569    /* VADDUBS */
18570    vrrc, vrrc, vrrc,
18571    /* VADDUDM */
18572    vrrc, vrrc, vrrc,
18573    /* VADDUHM */
18574    vrrc, vrrc, vrrc,
18575    /* VADDUHS */
18576    vrrc, vrrc, vrrc,
18577    /* VADDUQM */
18578    vrrc, vrrc, vrrc,
18579    /* VADDUWM */
18580    vrrc, vrrc, vrrc,
18581    /* VADDUWS */
18582    vrrc, vrrc, vrrc,
18583    /* VAND */
18584    vrrc, vrrc, vrrc,
18585    /* VANDC */
18586    vrrc, vrrc, vrrc,
18587    /* VAVGSB */
18588    vrrc, vrrc, vrrc,
18589    /* VAVGSH */
18590    vrrc, vrrc, vrrc,
18591    /* VAVGSW */
18592    vrrc, vrrc, vrrc,
18593    /* VAVGUB */
18594    vrrc, vrrc, vrrc,
18595    /* VAVGUH */
18596    vrrc, vrrc, vrrc,
18597    /* VAVGUW */
18598    vrrc, vrrc, vrrc,
18599    /* VBPERMD */
18600    vrrc, vrrc, vrrc,
18601    /* VBPERMQ */
18602    vrrc, vrrc, vrrc,
18603    /* VCFSX */
18604    vrrc, u5imm, vrrc,
18605    /* VCFSX_0 */
18606    vrrc, vrrc,
18607    /* VCFUGED */
18608    vrrc, vrrc, vrrc,
18609    /* VCFUX */
18610    vrrc, u5imm, vrrc,
18611    /* VCFUX_0 */
18612    vrrc, vrrc,
18613    /* VCIPHER */
18614    vrrc, vrrc, vrrc,
18615    /* VCIPHERLAST */
18616    vrrc, vrrc, vrrc,
18617    /* VCLRLB */
18618    vrrc, vrrc, gprc,
18619    /* VCLRRB */
18620    vrrc, vrrc, gprc,
18621    /* VCLZB */
18622    vrrc, vrrc,
18623    /* VCLZD */
18624    vrrc, vrrc,
18625    /* VCLZDM */
18626    vrrc, vrrc, vrrc,
18627    /* VCLZH */
18628    vrrc, vrrc,
18629    /* VCLZLSBB */
18630    gprc, vrrc,
18631    /* VCLZW */
18632    vrrc, vrrc,
18633    /* VCMPBFP */
18634    vrrc, vrrc, vrrc,
18635    /* VCMPBFP_rec */
18636    vrrc, vrrc, vrrc,
18637    /* VCMPEQFP */
18638    vrrc, vrrc, vrrc,
18639    /* VCMPEQFP_rec */
18640    vrrc, vrrc, vrrc,
18641    /* VCMPEQUB */
18642    vrrc, vrrc, vrrc,
18643    /* VCMPEQUB_rec */
18644    vrrc, vrrc, vrrc,
18645    /* VCMPEQUD */
18646    vrrc, vrrc, vrrc,
18647    /* VCMPEQUD_rec */
18648    vrrc, vrrc, vrrc,
18649    /* VCMPEQUH */
18650    vrrc, vrrc, vrrc,
18651    /* VCMPEQUH_rec */
18652    vrrc, vrrc, vrrc,
18653    /* VCMPEQUQ */
18654    vrrc, vrrc, vrrc,
18655    /* VCMPEQUQ_rec */
18656    vrrc, vrrc, vrrc,
18657    /* VCMPEQUW */
18658    vrrc, vrrc, vrrc,
18659    /* VCMPEQUW_rec */
18660    vrrc, vrrc, vrrc,
18661    /* VCMPGEFP */
18662    vrrc, vrrc, vrrc,
18663    /* VCMPGEFP_rec */
18664    vrrc, vrrc, vrrc,
18665    /* VCMPGTFP */
18666    vrrc, vrrc, vrrc,
18667    /* VCMPGTFP_rec */
18668    vrrc, vrrc, vrrc,
18669    /* VCMPGTSB */
18670    vrrc, vrrc, vrrc,
18671    /* VCMPGTSB_rec */
18672    vrrc, vrrc, vrrc,
18673    /* VCMPGTSD */
18674    vrrc, vrrc, vrrc,
18675    /* VCMPGTSD_rec */
18676    vrrc, vrrc, vrrc,
18677    /* VCMPGTSH */
18678    vrrc, vrrc, vrrc,
18679    /* VCMPGTSH_rec */
18680    vrrc, vrrc, vrrc,
18681    /* VCMPGTSQ */
18682    vrrc, vrrc, vrrc,
18683    /* VCMPGTSQ_rec */
18684    vrrc, vrrc, vrrc,
18685    /* VCMPGTSW */
18686    vrrc, vrrc, vrrc,
18687    /* VCMPGTSW_rec */
18688    vrrc, vrrc, vrrc,
18689    /* VCMPGTUB */
18690    vrrc, vrrc, vrrc,
18691    /* VCMPGTUB_rec */
18692    vrrc, vrrc, vrrc,
18693    /* VCMPGTUD */
18694    vrrc, vrrc, vrrc,
18695    /* VCMPGTUD_rec */
18696    vrrc, vrrc, vrrc,
18697    /* VCMPGTUH */
18698    vrrc, vrrc, vrrc,
18699    /* VCMPGTUH_rec */
18700    vrrc, vrrc, vrrc,
18701    /* VCMPGTUQ */
18702    vrrc, vrrc, vrrc,
18703    /* VCMPGTUQ_rec */
18704    vrrc, vrrc, vrrc,
18705    /* VCMPGTUW */
18706    vrrc, vrrc, vrrc,
18707    /* VCMPGTUW_rec */
18708    vrrc, vrrc, vrrc,
18709    /* VCMPNEB */
18710    vrrc, vrrc, vrrc,
18711    /* VCMPNEB_rec */
18712    vrrc, vrrc, vrrc,
18713    /* VCMPNEH */
18714    vrrc, vrrc, vrrc,
18715    /* VCMPNEH_rec */
18716    vrrc, vrrc, vrrc,
18717    /* VCMPNEW */
18718    vrrc, vrrc, vrrc,
18719    /* VCMPNEW_rec */
18720    vrrc, vrrc, vrrc,
18721    /* VCMPNEZB */
18722    vrrc, vrrc, vrrc,
18723    /* VCMPNEZB_rec */
18724    vrrc, vrrc, vrrc,
18725    /* VCMPNEZH */
18726    vrrc, vrrc, vrrc,
18727    /* VCMPNEZH_rec */
18728    vrrc, vrrc, vrrc,
18729    /* VCMPNEZW */
18730    vrrc, vrrc, vrrc,
18731    /* VCMPNEZW_rec */
18732    vrrc, vrrc, vrrc,
18733    /* VCMPSQ */
18734    crrc, vrrc, vrrc,
18735    /* VCMPUQ */
18736    crrc, vrrc, vrrc,
18737    /* VCNTMBB */
18738    g8rc, vrrc, u1imm,
18739    /* VCNTMBD */
18740    g8rc, vrrc, u1imm,
18741    /* VCNTMBH */
18742    g8rc, vrrc, u1imm,
18743    /* VCNTMBW */
18744    g8rc, vrrc, u1imm,
18745    /* VCTSXS */
18746    vrrc, u5imm, vrrc,
18747    /* VCTSXS_0 */
18748    vrrc, vrrc,
18749    /* VCTUXS */
18750    vrrc, u5imm, vrrc,
18751    /* VCTUXS_0 */
18752    vrrc, vrrc,
18753    /* VCTZB */
18754    vrrc, vrrc,
18755    /* VCTZD */
18756    vrrc, vrrc,
18757    /* VCTZDM */
18758    vrrc, vrrc, vrrc,
18759    /* VCTZH */
18760    vrrc, vrrc,
18761    /* VCTZLSBB */
18762    gprc, vrrc,
18763    /* VCTZW */
18764    vrrc, vrrc,
18765    /* VDIVESD */
18766    vrrc, vrrc, vrrc,
18767    /* VDIVESQ */
18768    vrrc, vrrc, vrrc,
18769    /* VDIVESW */
18770    vrrc, vrrc, vrrc,
18771    /* VDIVEUD */
18772    vrrc, vrrc, vrrc,
18773    /* VDIVEUQ */
18774    vrrc, vrrc, vrrc,
18775    /* VDIVEUW */
18776    vrrc, vrrc, vrrc,
18777    /* VDIVSD */
18778    vrrc, vrrc, vrrc,
18779    /* VDIVSQ */
18780    vrrc, vrrc, vrrc,
18781    /* VDIVSW */
18782    vrrc, vrrc, vrrc,
18783    /* VDIVUD */
18784    vrrc, vrrc, vrrc,
18785    /* VDIVUQ */
18786    vrrc, vrrc, vrrc,
18787    /* VDIVUW */
18788    vrrc, vrrc, vrrc,
18789    /* VEQV */
18790    vrrc, vrrc, vrrc,
18791    /* VEXPANDBM */
18792    vrrc, vrrc,
18793    /* VEXPANDDM */
18794    vrrc, vrrc,
18795    /* VEXPANDHM */
18796    vrrc, vrrc,
18797    /* VEXPANDQM */
18798    vrrc, vrrc,
18799    /* VEXPANDWM */
18800    vrrc, vrrc,
18801    /* VEXPTEFP */
18802    vrrc, vrrc,
18803    /* VEXTDDVLX */
18804    vrrc, vrrc, vrrc, gprc,
18805    /* VEXTDDVRX */
18806    vrrc, vrrc, vrrc, gprc,
18807    /* VEXTDUBVLX */
18808    vrrc, vrrc, vrrc, gprc,
18809    /* VEXTDUBVRX */
18810    vrrc, vrrc, vrrc, gprc,
18811    /* VEXTDUHVLX */
18812    vrrc, vrrc, vrrc, gprc,
18813    /* VEXTDUHVRX */
18814    vrrc, vrrc, vrrc, gprc,
18815    /* VEXTDUWVLX */
18816    vrrc, vrrc, vrrc, gprc,
18817    /* VEXTDUWVRX */
18818    vrrc, vrrc, vrrc, gprc,
18819    /* VEXTRACTBM */
18820    gprc, vrrc,
18821    /* VEXTRACTD */
18822    vrrc, u4imm, vrrc,
18823    /* VEXTRACTDM */
18824    gprc, vrrc,
18825    /* VEXTRACTHM */
18826    gprc, vrrc,
18827    /* VEXTRACTQM */
18828    gprc, vrrc,
18829    /* VEXTRACTUB */
18830    vrrc, u4imm, vrrc,
18831    /* VEXTRACTUH */
18832    vrrc, u4imm, vrrc,
18833    /* VEXTRACTUW */
18834    vrrc, u4imm, vrrc,
18835    /* VEXTRACTWM */
18836    gprc, vrrc,
18837    /* VEXTSB2D */
18838    vrrc, vrrc,
18839    /* VEXTSB2Ds */
18840    vfrc, vfrc,
18841    /* VEXTSB2W */
18842    vrrc, vrrc,
18843    /* VEXTSB2Ws */
18844    vfrc, vfrc,
18845    /* VEXTSD2Q */
18846    vrrc, vrrc,
18847    /* VEXTSH2D */
18848    vrrc, vrrc,
18849    /* VEXTSH2Ds */
18850    vfrc, vfrc,
18851    /* VEXTSH2W */
18852    vrrc, vrrc,
18853    /* VEXTSH2Ws */
18854    vfrc, vfrc,
18855    /* VEXTSW2D */
18856    vrrc, vrrc,
18857    /* VEXTSW2Ds */
18858    vfrc, vfrc,
18859    /* VEXTUBLX */
18860    g8rc, g8rc, vrrc,
18861    /* VEXTUBRX */
18862    g8rc, g8rc, vrrc,
18863    /* VEXTUHLX */
18864    g8rc, g8rc, vrrc,
18865    /* VEXTUHRX */
18866    g8rc, g8rc, vrrc,
18867    /* VEXTUWLX */
18868    g8rc, g8rc, vrrc,
18869    /* VEXTUWRX */
18870    g8rc, g8rc, vrrc,
18871    /* VGBBD */
18872    vrrc, vrrc,
18873    /* VGNB */
18874    g8rc, vrrc, u3imm,
18875    /* VINSBLX */
18876    vrrc, vrrc, gprc, gprc,
18877    /* VINSBRX */
18878    vrrc, vrrc, gprc, gprc,
18879    /* VINSBVLX */
18880    vrrc, vrrc, gprc, vrrc,
18881    /* VINSBVRX */
18882    vrrc, vrrc, gprc, vrrc,
18883    /* VINSD */
18884    vrrc, vrrc, u4imm, g8rc,
18885    /* VINSDLX */
18886    vrrc, vrrc, g8rc, g8rc,
18887    /* VINSDRX */
18888    vrrc, vrrc, g8rc, g8rc,
18889    /* VINSERTB */
18890    vrrc, vrrc, u4imm, vrrc,
18891    /* VINSERTD */
18892    vrrc, u4imm, vrrc,
18893    /* VINSERTH */
18894    vrrc, vrrc, u4imm, vrrc,
18895    /* VINSERTW */
18896    vrrc, u4imm, vrrc,
18897    /* VINSHLX */
18898    vrrc, vrrc, gprc, gprc,
18899    /* VINSHRX */
18900    vrrc, vrrc, gprc, gprc,
18901    /* VINSHVLX */
18902    vrrc, vrrc, gprc, vrrc,
18903    /* VINSHVRX */
18904    vrrc, vrrc, gprc, vrrc,
18905    /* VINSW */
18906    vrrc, vrrc, u4imm, gprc,
18907    /* VINSWLX */
18908    vrrc, vrrc, gprc, gprc,
18909    /* VINSWRX */
18910    vrrc, vrrc, gprc, gprc,
18911    /* VINSWVLX */
18912    vrrc, vrrc, gprc, vrrc,
18913    /* VINSWVRX */
18914    vrrc, vrrc, gprc, vrrc,
18915    /* VLOGEFP */
18916    vrrc, vrrc,
18917    /* VMADDFP */
18918    vrrc, vrrc, vrrc, vrrc,
18919    /* VMAXFP */
18920    vrrc, vrrc, vrrc,
18921    /* VMAXSB */
18922    vrrc, vrrc, vrrc,
18923    /* VMAXSD */
18924    vrrc, vrrc, vrrc,
18925    /* VMAXSH */
18926    vrrc, vrrc, vrrc,
18927    /* VMAXSW */
18928    vrrc, vrrc, vrrc,
18929    /* VMAXUB */
18930    vrrc, vrrc, vrrc,
18931    /* VMAXUD */
18932    vrrc, vrrc, vrrc,
18933    /* VMAXUH */
18934    vrrc, vrrc, vrrc,
18935    /* VMAXUW */
18936    vrrc, vrrc, vrrc,
18937    /* VMHADDSHS */
18938    vrrc, vrrc, vrrc, vrrc,
18939    /* VMHRADDSHS */
18940    vrrc, vrrc, vrrc, vrrc,
18941    /* VMINFP */
18942    vrrc, vrrc, vrrc,
18943    /* VMINSB */
18944    vrrc, vrrc, vrrc,
18945    /* VMINSD */
18946    vrrc, vrrc, vrrc,
18947    /* VMINSH */
18948    vrrc, vrrc, vrrc,
18949    /* VMINSW */
18950    vrrc, vrrc, vrrc,
18951    /* VMINUB */
18952    vrrc, vrrc, vrrc,
18953    /* VMINUD */
18954    vrrc, vrrc, vrrc,
18955    /* VMINUH */
18956    vrrc, vrrc, vrrc,
18957    /* VMINUW */
18958    vrrc, vrrc, vrrc,
18959    /* VMLADDUHM */
18960    vrrc, vrrc, vrrc, vrrc,
18961    /* VMODSD */
18962    vrrc, vrrc, vrrc,
18963    /* VMODSQ */
18964    vrrc, vrrc, vrrc,
18965    /* VMODSW */
18966    vrrc, vrrc, vrrc,
18967    /* VMODUD */
18968    vrrc, vrrc, vrrc,
18969    /* VMODUQ */
18970    vrrc, vrrc, vrrc,
18971    /* VMODUW */
18972    vrrc, vrrc, vrrc,
18973    /* VMRGEW */
18974    vrrc, vrrc, vrrc,
18975    /* VMRGHB */
18976    vrrc, vrrc, vrrc,
18977    /* VMRGHH */
18978    vrrc, vrrc, vrrc,
18979    /* VMRGHW */
18980    vrrc, vrrc, vrrc,
18981    /* VMRGLB */
18982    vrrc, vrrc, vrrc,
18983    /* VMRGLH */
18984    vrrc, vrrc, vrrc,
18985    /* VMRGLW */
18986    vrrc, vrrc, vrrc,
18987    /* VMRGOW */
18988    vrrc, vrrc, vrrc,
18989    /* VMSUMCUD */
18990    vrrc, vrrc, vrrc, vrrc,
18991    /* VMSUMMBM */
18992    vrrc, vrrc, vrrc, vrrc,
18993    /* VMSUMSHM */
18994    vrrc, vrrc, vrrc, vrrc,
18995    /* VMSUMSHS */
18996    vrrc, vrrc, vrrc, vrrc,
18997    /* VMSUMUBM */
18998    vrrc, vrrc, vrrc, vrrc,
18999    /* VMSUMUDM */
19000    vrrc, vrrc, vrrc, vrrc,
19001    /* VMSUMUHM */
19002    vrrc, vrrc, vrrc, vrrc,
19003    /* VMSUMUHS */
19004    vrrc, vrrc, vrrc, vrrc,
19005    /* VMUL10CUQ */
19006    vrrc, vrrc,
19007    /* VMUL10ECUQ */
19008    vrrc, vrrc, vrrc,
19009    /* VMUL10EUQ */
19010    vrrc, vrrc, vrrc,
19011    /* VMUL10UQ */
19012    vrrc, vrrc,
19013    /* VMULESB */
19014    vrrc, vrrc, vrrc,
19015    /* VMULESD */
19016    vrrc, vrrc, vrrc,
19017    /* VMULESH */
19018    vrrc, vrrc, vrrc,
19019    /* VMULESW */
19020    vrrc, vrrc, vrrc,
19021    /* VMULEUB */
19022    vrrc, vrrc, vrrc,
19023    /* VMULEUD */
19024    vrrc, vrrc, vrrc,
19025    /* VMULEUH */
19026    vrrc, vrrc, vrrc,
19027    /* VMULEUW */
19028    vrrc, vrrc, vrrc,
19029    /* VMULHSD */
19030    vrrc, vrrc, vrrc,
19031    /* VMULHSW */
19032    vrrc, vrrc, vrrc,
19033    /* VMULHUD */
19034    vrrc, vrrc, vrrc,
19035    /* VMULHUW */
19036    vrrc, vrrc, vrrc,
19037    /* VMULLD */
19038    vrrc, vrrc, vrrc,
19039    /* VMULOSB */
19040    vrrc, vrrc, vrrc,
19041    /* VMULOSD */
19042    vrrc, vrrc, vrrc,
19043    /* VMULOSH */
19044    vrrc, vrrc, vrrc,
19045    /* VMULOSW */
19046    vrrc, vrrc, vrrc,
19047    /* VMULOUB */
19048    vrrc, vrrc, vrrc,
19049    /* VMULOUD */
19050    vrrc, vrrc, vrrc,
19051    /* VMULOUH */
19052    vrrc, vrrc, vrrc,
19053    /* VMULOUW */
19054    vrrc, vrrc, vrrc,
19055    /* VMULUWM */
19056    vrrc, vrrc, vrrc,
19057    /* VNAND */
19058    vrrc, vrrc, vrrc,
19059    /* VNCIPHER */
19060    vrrc, vrrc, vrrc,
19061    /* VNCIPHERLAST */
19062    vrrc, vrrc, vrrc,
19063    /* VNEGD */
19064    vrrc, vrrc,
19065    /* VNEGW */
19066    vrrc, vrrc,
19067    /* VNMSUBFP */
19068    vrrc, vrrc, vrrc, vrrc,
19069    /* VNOR */
19070    vrrc, vrrc, vrrc,
19071    /* VOR */
19072    vrrc, vrrc, vrrc,
19073    /* VORC */
19074    vrrc, vrrc, vrrc,
19075    /* VPDEPD */
19076    vrrc, vrrc, vrrc,
19077    /* VPERM */
19078    vrrc, vrrc, vrrc, vrrc,
19079    /* VPERMR */
19080    vrrc, vrrc, vrrc, vrrc,
19081    /* VPERMXOR */
19082    vrrc, vrrc, vrrc, vrrc,
19083    /* VPEXTD */
19084    vrrc, vrrc, vrrc,
19085    /* VPKPX */
19086    vrrc, vrrc, vrrc,
19087    /* VPKSDSS */
19088    vrrc, vrrc, vrrc,
19089    /* VPKSDUS */
19090    vrrc, vrrc, vrrc,
19091    /* VPKSHSS */
19092    vrrc, vrrc, vrrc,
19093    /* VPKSHUS */
19094    vrrc, vrrc, vrrc,
19095    /* VPKSWSS */
19096    vrrc, vrrc, vrrc,
19097    /* VPKSWUS */
19098    vrrc, vrrc, vrrc,
19099    /* VPKUDUM */
19100    vrrc, vrrc, vrrc,
19101    /* VPKUDUS */
19102    vrrc, vrrc, vrrc,
19103    /* VPKUHUM */
19104    vrrc, vrrc, vrrc,
19105    /* VPKUHUS */
19106    vrrc, vrrc, vrrc,
19107    /* VPKUWUM */
19108    vrrc, vrrc, vrrc,
19109    /* VPKUWUS */
19110    vrrc, vrrc, vrrc,
19111    /* VPMSUMB */
19112    vrrc, vrrc, vrrc,
19113    /* VPMSUMD */
19114    vrrc, vrrc, vrrc,
19115    /* VPMSUMH */
19116    vrrc, vrrc, vrrc,
19117    /* VPMSUMW */
19118    vrrc, vrrc, vrrc,
19119    /* VPOPCNTB */
19120    vrrc, vrrc,
19121    /* VPOPCNTD */
19122    vrrc, vrrc,
19123    /* VPOPCNTH */
19124    vrrc, vrrc,
19125    /* VPOPCNTW */
19126    vrrc, vrrc,
19127    /* VPRTYBD */
19128    vrrc, vrrc,
19129    /* VPRTYBQ */
19130    vrrc, vrrc,
19131    /* VPRTYBW */
19132    vrrc, vrrc,
19133    /* VREFP */
19134    vrrc, vrrc,
19135    /* VRFIM */
19136    vrrc, vrrc,
19137    /* VRFIN */
19138    vrrc, vrrc,
19139    /* VRFIP */
19140    vrrc, vrrc,
19141    /* VRFIZ */
19142    vrrc, vrrc,
19143    /* VRLB */
19144    vrrc, vrrc, vrrc,
19145    /* VRLD */
19146    vrrc, vrrc, vrrc,
19147    /* VRLDMI */
19148    vrrc, vrrc, vrrc, vrrc,
19149    /* VRLDNM */
19150    vrrc, vrrc, vrrc,
19151    /* VRLH */
19152    vrrc, vrrc, vrrc,
19153    /* VRLQ */
19154    vrrc, vrrc, vrrc,
19155    /* VRLQMI */
19156    vrrc, vrrc, vrrc, vrrc,
19157    /* VRLQNM */
19158    vrrc, vrrc, vrrc,
19159    /* VRLW */
19160    vrrc, vrrc, vrrc,
19161    /* VRLWMI */
19162    vrrc, vrrc, vrrc, vrrc,
19163    /* VRLWNM */
19164    vrrc, vrrc, vrrc,
19165    /* VRSQRTEFP */
19166    vrrc, vrrc,
19167    /* VSBOX */
19168    vrrc, vrrc,
19169    /* VSEL */
19170    vrrc, vrrc, vrrc, vrrc,
19171    /* VSHASIGMAD */
19172    vrrc, vrrc, u1imm, u4imm,
19173    /* VSHASIGMAW */
19174    vrrc, vrrc, u1imm, u4imm,
19175    /* VSL */
19176    vrrc, vrrc, vrrc,
19177    /* VSLB */
19178    vrrc, vrrc, vrrc,
19179    /* VSLD */
19180    vrrc, vrrc, vrrc,
19181    /* VSLDBI */
19182    vrrc, vrrc, vrrc, u3imm,
19183    /* VSLDOI */
19184    vrrc, vrrc, vrrc, u4imm,
19185    /* VSLH */
19186    vrrc, vrrc, vrrc,
19187    /* VSLO */
19188    vrrc, vrrc, vrrc,
19189    /* VSLQ */
19190    vrrc, vrrc, vrrc,
19191    /* VSLV */
19192    vrrc, vrrc, vrrc,
19193    /* VSLW */
19194    vrrc, vrrc, vrrc,
19195    /* VSPLTB */
19196    vrrc, u5imm, vrrc,
19197    /* VSPLTBs */
19198    vrrc, u5imm, vfrc,
19199    /* VSPLTH */
19200    vrrc, u5imm, vrrc,
19201    /* VSPLTHs */
19202    vrrc, u5imm, vfrc,
19203    /* VSPLTISB */
19204    vrrc, s5imm,
19205    /* VSPLTISH */
19206    vrrc, s5imm,
19207    /* VSPLTISW */
19208    vrrc, s5imm,
19209    /* VSPLTW */
19210    vrrc, u5imm, vrrc,
19211    /* VSR */
19212    vrrc, vrrc, vrrc,
19213    /* VSRAB */
19214    vrrc, vrrc, vrrc,
19215    /* VSRAD */
19216    vrrc, vrrc, vrrc,
19217    /* VSRAH */
19218    vrrc, vrrc, vrrc,
19219    /* VSRAQ */
19220    vrrc, vrrc, vrrc,
19221    /* VSRAW */
19222    vrrc, vrrc, vrrc,
19223    /* VSRB */
19224    vrrc, vrrc, vrrc,
19225    /* VSRD */
19226    vrrc, vrrc, vrrc,
19227    /* VSRDBI */
19228    vrrc, vrrc, vrrc, u3imm,
19229    /* VSRH */
19230    vrrc, vrrc, vrrc,
19231    /* VSRO */
19232    vrrc, vrrc, vrrc,
19233    /* VSRQ */
19234    vrrc, vrrc, vrrc,
19235    /* VSRV */
19236    vrrc, vrrc, vrrc,
19237    /* VSRW */
19238    vrrc, vrrc, vrrc,
19239    /* VSTRIBL */
19240    vrrc, vrrc,
19241    /* VSTRIBL_rec */
19242    vrrc, vrrc,
19243    /* VSTRIBR */
19244    vrrc, vrrc,
19245    /* VSTRIBR_rec */
19246    vrrc, vrrc,
19247    /* VSTRIHL */
19248    vrrc, vrrc,
19249    /* VSTRIHL_rec */
19250    vrrc, vrrc,
19251    /* VSTRIHR */
19252    vrrc, vrrc,
19253    /* VSTRIHR_rec */
19254    vrrc, vrrc,
19255    /* VSUBCUQ */
19256    vrrc, vrrc, vrrc,
19257    /* VSUBCUW */
19258    vrrc, vrrc, vrrc,
19259    /* VSUBECUQ */
19260    vrrc, vrrc, vrrc, vrrc,
19261    /* VSUBEUQM */
19262    vrrc, vrrc, vrrc, vrrc,
19263    /* VSUBFP */
19264    vrrc, vrrc, vrrc,
19265    /* VSUBSBS */
19266    vrrc, vrrc, vrrc,
19267    /* VSUBSHS */
19268    vrrc, vrrc, vrrc,
19269    /* VSUBSWS */
19270    vrrc, vrrc, vrrc,
19271    /* VSUBUBM */
19272    vrrc, vrrc, vrrc,
19273    /* VSUBUBS */
19274    vrrc, vrrc, vrrc,
19275    /* VSUBUDM */
19276    vrrc, vrrc, vrrc,
19277    /* VSUBUHM */
19278    vrrc, vrrc, vrrc,
19279    /* VSUBUHS */
19280    vrrc, vrrc, vrrc,
19281    /* VSUBUQM */
19282    vrrc, vrrc, vrrc,
19283    /* VSUBUWM */
19284    vrrc, vrrc, vrrc,
19285    /* VSUBUWS */
19286    vrrc, vrrc, vrrc,
19287    /* VSUM2SWS */
19288    vrrc, vrrc, vrrc,
19289    /* VSUM4SBS */
19290    vrrc, vrrc, vrrc,
19291    /* VSUM4SHS */
19292    vrrc, vrrc, vrrc,
19293    /* VSUM4UBS */
19294    vrrc, vrrc, vrrc,
19295    /* VSUMSWS */
19296    vrrc, vrrc, vrrc,
19297    /* VUPKHPX */
19298    vrrc, vrrc,
19299    /* VUPKHSB */
19300    vrrc, vrrc,
19301    /* VUPKHSH */
19302    vrrc, vrrc,
19303    /* VUPKHSW */
19304    vrrc, vrrc,
19305    /* VUPKLPX */
19306    vrrc, vrrc,
19307    /* VUPKLSB */
19308    vrrc, vrrc,
19309    /* VUPKLSH */
19310    vrrc, vrrc,
19311    /* VUPKLSW */
19312    vrrc, vrrc,
19313    /* VXOR */
19314    vrrc, vrrc, vrrc,
19315    /* V_SET0 */
19316    vrrc,
19317    /* V_SET0B */
19318    vrrc,
19319    /* V_SET0H */
19320    vrrc,
19321    /* V_SETALLONES */
19322    vrrc,
19323    /* V_SETALLONESB */
19324    vrrc,
19325    /* V_SETALLONESH */
19326    vrrc,
19327    /* WAIT */
19328    u2imm,
19329    /* WRTEE */
19330    gprc,
19331    /* WRTEEI */
19332    i1imm,
19333    /* XOR */
19334    gprc, gprc, gprc,
19335    /* XOR8 */
19336    g8rc, g8rc, g8rc,
19337    /* XOR8_rec */
19338    g8rc, g8rc, g8rc,
19339    /* XORI */
19340    gprc, gprc, u16imm,
19341    /* XORI8 */
19342    g8rc, g8rc, u16imm64,
19343    /* XORIS */
19344    gprc, gprc, u16imm,
19345    /* XORIS8 */
19346    g8rc, g8rc, u16imm64,
19347    /* XOR_rec */
19348    gprc, gprc, gprc,
19349    /* XSABSDP */
19350    vsfrc, vsfrc,
19351    /* XSABSQP */
19352    vrrc, vrrc,
19353    /* XSADDDP */
19354    vsfrc, vsfrc, vsfrc,
19355    /* XSADDQP */
19356    vrrc, vrrc, vrrc,
19357    /* XSADDQPO */
19358    vrrc, vrrc, vrrc,
19359    /* XSADDSP */
19360    vssrc, vssrc, vssrc,
19361    /* XSCMPEQDP */
19362    vsrc, vsfrc, vsfrc,
19363    /* XSCMPEQQP */
19364    vrrc, vrrc, vrrc,
19365    /* XSCMPEXPDP */
19366    crrc, vsfrc, vsfrc,
19367    /* XSCMPEXPQP */
19368    crrc, vrrc, vrrc,
19369    /* XSCMPGEDP */
19370    vsrc, vsfrc, vsfrc,
19371    /* XSCMPGEQP */
19372    vrrc, vrrc, vrrc,
19373    /* XSCMPGTDP */
19374    vsrc, vsfrc, vsfrc,
19375    /* XSCMPGTQP */
19376    vrrc, vrrc, vrrc,
19377    /* XSCMPODP */
19378    crrc, vsfrc, vsfrc,
19379    /* XSCMPOQP */
19380    crrc, vrrc, vrrc,
19381    /* XSCMPUDP */
19382    crrc, vsfrc, vsfrc,
19383    /* XSCMPUQP */
19384    crrc, vrrc, vrrc,
19385    /* XSCPSGNDP */
19386    vsfrc, vsfrc, vsfrc,
19387    /* XSCPSGNQP */
19388    vrrc, vrrc, vrrc,
19389    /* XSCVDPHP */
19390    vsfrc, vsfrc,
19391    /* XSCVDPQP */
19392    vrrc, vfrc,
19393    /* XSCVDPSP */
19394    vsfrc, vsfrc,
19395    /* XSCVDPSPN */
19396    vsrc, vssrc,
19397    /* XSCVDPSXDS */
19398    vsfrc, vsfrc,
19399    /* XSCVDPSXDSs */
19400    vssrc, vssrc,
19401    /* XSCVDPSXWS */
19402    vsfrc, vsfrc,
19403    /* XSCVDPSXWSs */
19404    vssrc, vssrc,
19405    /* XSCVDPUXDS */
19406    vsfrc, vsfrc,
19407    /* XSCVDPUXDSs */
19408    vssrc, vssrc,
19409    /* XSCVDPUXWS */
19410    vsfrc, vsfrc,
19411    /* XSCVDPUXWSs */
19412    vssrc, vssrc,
19413    /* XSCVHPDP */
19414    vsfrc, vsfrc,
19415    /* XSCVQPDP */
19416    vfrc, vrrc,
19417    /* XSCVQPDPO */
19418    vfrc, vrrc,
19419    /* XSCVQPSDZ */
19420    vrrc, vrrc,
19421    /* XSCVQPSQZ */
19422    vrrc, vrrc,
19423    /* XSCVQPSWZ */
19424    vrrc, vrrc,
19425    /* XSCVQPUDZ */
19426    vrrc, vrrc,
19427    /* XSCVQPUQZ */
19428    vrrc, vrrc,
19429    /* XSCVQPUWZ */
19430    vrrc, vrrc,
19431    /* XSCVSDQP */
19432    vrrc, vfrc,
19433    /* XSCVSPDP */
19434    vsfrc, vsfrc,
19435    /* XSCVSPDPN */
19436    vssrc, vsrc,
19437    /* XSCVSQQP */
19438    vrrc, vrrc,
19439    /* XSCVSXDDP */
19440    vsfrc, vsfrc,
19441    /* XSCVSXDSP */
19442    vssrc, vsfrc,
19443    /* XSCVUDQP */
19444    vrrc, vfrc,
19445    /* XSCVUQQP */
19446    vrrc, vrrc,
19447    /* XSCVUXDDP */
19448    vsfrc, vsfrc,
19449    /* XSCVUXDSP */
19450    vssrc, vsfrc,
19451    /* XSDIVDP */
19452    vsfrc, vsfrc, vsfrc,
19453    /* XSDIVQP */
19454    vrrc, vrrc, vrrc,
19455    /* XSDIVQPO */
19456    vrrc, vrrc, vrrc,
19457    /* XSDIVSP */
19458    vssrc, vssrc, vssrc,
19459    /* XSIEXPDP */
19460    vsrc, g8rc, g8rc,
19461    /* XSIEXPQP */
19462    vrrc, vrrc, vsfrc,
19463    /* XSMADDADP */
19464    vsfrc, vsfrc, vsfrc, vsfrc,
19465    /* XSMADDASP */
19466    vssrc, vssrc, vssrc, vssrc,
19467    /* XSMADDMDP */
19468    vsfrc, vsfrc, vsfrc, vsfrc,
19469    /* XSMADDMSP */
19470    vssrc, vssrc, vssrc, vssrc,
19471    /* XSMADDQP */
19472    vrrc, vrrc, vrrc, vrrc,
19473    /* XSMADDQPO */
19474    vrrc, vrrc, vrrc, vrrc,
19475    /* XSMAXCDP */
19476    vsfrc, vsfrc, vsfrc,
19477    /* XSMAXCQP */
19478    vrrc, vrrc, vrrc,
19479    /* XSMAXDP */
19480    vsfrc, vsfrc, vsfrc,
19481    /* XSMAXJDP */
19482    vsrc, vsfrc, vsfrc,
19483    /* XSMINCDP */
19484    vsfrc, vsfrc, vsfrc,
19485    /* XSMINCQP */
19486    vrrc, vrrc, vrrc,
19487    /* XSMINDP */
19488    vsfrc, vsfrc, vsfrc,
19489    /* XSMINJDP */
19490    vsrc, vsfrc, vsfrc,
19491    /* XSMSUBADP */
19492    vsfrc, vsfrc, vsfrc, vsfrc,
19493    /* XSMSUBASP */
19494    vssrc, vssrc, vssrc, vssrc,
19495    /* XSMSUBMDP */
19496    vsfrc, vsfrc, vsfrc, vsfrc,
19497    /* XSMSUBMSP */
19498    vssrc, vssrc, vssrc, vssrc,
19499    /* XSMSUBQP */
19500    vrrc, vrrc, vrrc, vrrc,
19501    /* XSMSUBQPO */
19502    vrrc, vrrc, vrrc, vrrc,
19503    /* XSMULDP */
19504    vsfrc, vsfrc, vsfrc,
19505    /* XSMULQP */
19506    vrrc, vrrc, vrrc,
19507    /* XSMULQPO */
19508    vrrc, vrrc, vrrc,
19509    /* XSMULSP */
19510    vssrc, vssrc, vssrc,
19511    /* XSNABSDP */
19512    vsfrc, vsfrc,
19513    /* XSNABSDPs */
19514    vssrc, vssrc,
19515    /* XSNABSQP */
19516    vrrc, vrrc,
19517    /* XSNEGDP */
19518    vsfrc, vsfrc,
19519    /* XSNEGQP */
19520    vrrc, vrrc,
19521    /* XSNMADDADP */
19522    vsfrc, vsfrc, vsfrc, vsfrc,
19523    /* XSNMADDASP */
19524    vssrc, vssrc, vssrc, vssrc,
19525    /* XSNMADDMDP */
19526    vsfrc, vsfrc, vsfrc, vsfrc,
19527    /* XSNMADDMSP */
19528    vssrc, vssrc, vssrc, vssrc,
19529    /* XSNMADDQP */
19530    vrrc, vrrc, vrrc, vrrc,
19531    /* XSNMADDQPO */
19532    vrrc, vrrc, vrrc, vrrc,
19533    /* XSNMSUBADP */
19534    vsfrc, vsfrc, vsfrc, vsfrc,
19535    /* XSNMSUBASP */
19536    vssrc, vssrc, vssrc, vssrc,
19537    /* XSNMSUBMDP */
19538    vsfrc, vsfrc, vsfrc, vsfrc,
19539    /* XSNMSUBMSP */
19540    vssrc, vssrc, vssrc, vssrc,
19541    /* XSNMSUBQP */
19542    vrrc, vrrc, vrrc, vrrc,
19543    /* XSNMSUBQPO */
19544    vrrc, vrrc, vrrc, vrrc,
19545    /* XSRDPI */
19546    vsfrc, vsfrc,
19547    /* XSRDPIC */
19548    vsfrc, vsfrc,
19549    /* XSRDPIM */
19550    vsfrc, vsfrc,
19551    /* XSRDPIP */
19552    vsfrc, vsfrc,
19553    /* XSRDPIZ */
19554    vsfrc, vsfrc,
19555    /* XSREDP */
19556    vsfrc, vsfrc,
19557    /* XSRESP */
19558    vssrc, vssrc,
19559    /* XSRQPI */
19560    vrrc, u1imm, vrrc, u2imm,
19561    /* XSRQPIX */
19562    vrrc, u1imm, vrrc, u2imm,
19563    /* XSRQPXP */
19564    vrrc, u1imm, vrrc, u2imm,
19565    /* XSRSP */
19566    vssrc, vsfrc,
19567    /* XSRSQRTEDP */
19568    vsfrc, vsfrc,
19569    /* XSRSQRTESP */
19570    vssrc, vssrc,
19571    /* XSSQRTDP */
19572    vsfrc, vsfrc,
19573    /* XSSQRTQP */
19574    vrrc, vrrc,
19575    /* XSSQRTQPO */
19576    vrrc, vrrc,
19577    /* XSSQRTSP */
19578    vssrc, vssrc,
19579    /* XSSUBDP */
19580    vsfrc, vsfrc, vsfrc,
19581    /* XSSUBQP */
19582    vrrc, vrrc, vrrc,
19583    /* XSSUBQPO */
19584    vrrc, vrrc, vrrc,
19585    /* XSSUBSP */
19586    vssrc, vssrc, vssrc,
19587    /* XSTDIVDP */
19588    crrc, vsfrc, vsfrc,
19589    /* XSTSQRTDP */
19590    crrc, vsfrc,
19591    /* XSTSTDCDP */
19592    crrc, u7imm, vsfrc,
19593    /* XSTSTDCQP */
19594    crrc, u7imm, vrrc,
19595    /* XSTSTDCSP */
19596    crrc, u7imm, vsfrc,
19597    /* XSXEXPDP */
19598    g8rc, vsfrc,
19599    /* XSXEXPQP */
19600    vrrc, vrrc,
19601    /* XSXSIGDP */
19602    g8rc, vsfrc,
19603    /* XSXSIGQP */
19604    vrrc, vrrc,
19605    /* XVABSDP */
19606    vsrc, vsrc,
19607    /* XVABSSP */
19608    vsrc, vsrc,
19609    /* XVADDDP */
19610    vsrc, vsrc, vsrc,
19611    /* XVADDSP */
19612    vsrc, vsrc, vsrc,
19613    /* XVBF16GER2 */
19614    acc, vsrc, vsrc,
19615    /* XVBF16GER2NN */
19616    acc, acc, vsrc, vsrc,
19617    /* XVBF16GER2NP */
19618    acc, acc, vsrc, vsrc,
19619    /* XVBF16GER2PN */
19620    acc, acc, vsrc, vsrc,
19621    /* XVBF16GER2PP */
19622    acc, acc, vsrc, vsrc,
19623    /* XVBF16GER2W */
19624    wacc, vsrc, vsrc,
19625    /* XVBF16GER2WNN */
19626    wacc, wacc, vsrc, vsrc,
19627    /* XVBF16GER2WNP */
19628    wacc, wacc, vsrc, vsrc,
19629    /* XVBF16GER2WPN */
19630    wacc, wacc, vsrc, vsrc,
19631    /* XVBF16GER2WPP */
19632    wacc, wacc, vsrc, vsrc,
19633    /* XVCMPEQDP */
19634    vsrc, vsrc, vsrc,
19635    /* XVCMPEQDP_rec */
19636    vsrc, vsrc, vsrc,
19637    /* XVCMPEQSP */
19638    vsrc, vsrc, vsrc,
19639    /* XVCMPEQSP_rec */
19640    vsrc, vsrc, vsrc,
19641    /* XVCMPGEDP */
19642    vsrc, vsrc, vsrc,
19643    /* XVCMPGEDP_rec */
19644    vsrc, vsrc, vsrc,
19645    /* XVCMPGESP */
19646    vsrc, vsrc, vsrc,
19647    /* XVCMPGESP_rec */
19648    vsrc, vsrc, vsrc,
19649    /* XVCMPGTDP */
19650    vsrc, vsrc, vsrc,
19651    /* XVCMPGTDP_rec */
19652    vsrc, vsrc, vsrc,
19653    /* XVCMPGTSP */
19654    vsrc, vsrc, vsrc,
19655    /* XVCMPGTSP_rec */
19656    vsrc, vsrc, vsrc,
19657    /* XVCPSGNDP */
19658    vsrc, vsrc, vsrc,
19659    /* XVCPSGNSP */
19660    vsrc, vsrc, vsrc,
19661    /* XVCVBF16SPN */
19662    vsrc, vsrc,
19663    /* XVCVDPSP */
19664    vsrc, vsrc,
19665    /* XVCVDPSXDS */
19666    vsrc, vsrc,
19667    /* XVCVDPSXWS */
19668    vsrc, vsrc,
19669    /* XVCVDPUXDS */
19670    vsrc, vsrc,
19671    /* XVCVDPUXWS */
19672    vsrc, vsrc,
19673    /* XVCVHPSP */
19674    vsrc, vsrc,
19675    /* XVCVSPBF16 */
19676    vsrc, vsrc,
19677    /* XVCVSPDP */
19678    vsrc, vsrc,
19679    /* XVCVSPHP */
19680    vsrc, vsrc,
19681    /* XVCVSPSXDS */
19682    vsrc, vsrc,
19683    /* XVCVSPSXWS */
19684    vsrc, vsrc,
19685    /* XVCVSPUXDS */
19686    vsrc, vsrc,
19687    /* XVCVSPUXWS */
19688    vsrc, vsrc,
19689    /* XVCVSXDDP */
19690    vsrc, vsrc,
19691    /* XVCVSXDSP */
19692    vsrc, vsrc,
19693    /* XVCVSXWDP */
19694    vsrc, vsrc,
19695    /* XVCVSXWSP */
19696    vsrc, vsrc,
19697    /* XVCVUXDDP */
19698    vsrc, vsrc,
19699    /* XVCVUXDSP */
19700    vsrc, vsrc,
19701    /* XVCVUXWDP */
19702    vsrc, vsrc,
19703    /* XVCVUXWSP */
19704    vsrc, vsrc,
19705    /* XVDIVDP */
19706    vsrc, vsrc, vsrc,
19707    /* XVDIVSP */
19708    vsrc, vsrc, vsrc,
19709    /* XVF16GER2 */
19710    acc, vsrc, vsrc,
19711    /* XVF16GER2NN */
19712    acc, acc, vsrc, vsrc,
19713    /* XVF16GER2NP */
19714    acc, acc, vsrc, vsrc,
19715    /* XVF16GER2PN */
19716    acc, acc, vsrc, vsrc,
19717    /* XVF16GER2PP */
19718    acc, acc, vsrc, vsrc,
19719    /* XVF16GER2W */
19720    wacc, vsrc, vsrc,
19721    /* XVF16GER2WNN */
19722    wacc, wacc, vsrc, vsrc,
19723    /* XVF16GER2WNP */
19724    wacc, wacc, vsrc, vsrc,
19725    /* XVF16GER2WPN */
19726    wacc, wacc, vsrc, vsrc,
19727    /* XVF16GER2WPP */
19728    wacc, wacc, vsrc, vsrc,
19729    /* XVF32GER */
19730    acc, vsrc, vsrc,
19731    /* XVF32GERNN */
19732    acc, acc, vsrc, vsrc,
19733    /* XVF32GERNP */
19734    acc, acc, vsrc, vsrc,
19735    /* XVF32GERPN */
19736    acc, acc, vsrc, vsrc,
19737    /* XVF32GERPP */
19738    acc, acc, vsrc, vsrc,
19739    /* XVF32GERW */
19740    wacc, vsrc, vsrc,
19741    /* XVF32GERWNN */
19742    wacc, wacc, vsrc, vsrc,
19743    /* XVF32GERWNP */
19744    wacc, wacc, vsrc, vsrc,
19745    /* XVF32GERWPN */
19746    wacc, wacc, vsrc, vsrc,
19747    /* XVF32GERWPP */
19748    wacc, wacc, vsrc, vsrc,
19749    /* XVF64GER */
19750    acc, vsrpevenrc, vsrc,
19751    /* XVF64GERNN */
19752    acc, acc, vsrpevenrc, vsrc,
19753    /* XVF64GERNP */
19754    acc, acc, vsrpevenrc, vsrc,
19755    /* XVF64GERPN */
19756    acc, acc, vsrpevenrc, vsrc,
19757    /* XVF64GERPP */
19758    acc, acc, vsrpevenrc, vsrc,
19759    /* XVF64GERW */
19760    wacc, vsrpevenrc, vsrc,
19761    /* XVF64GERWNN */
19762    wacc, wacc, vsrpevenrc, vsrc,
19763    /* XVF64GERWNP */
19764    wacc, wacc, vsrpevenrc, vsrc,
19765    /* XVF64GERWPN */
19766    wacc, wacc, vsrpevenrc, vsrc,
19767    /* XVF64GERWPP */
19768    wacc, wacc, vsrpevenrc, vsrc,
19769    /* XVI16GER2 */
19770    acc, vsrc, vsrc,
19771    /* XVI16GER2PP */
19772    acc, acc, vsrc, vsrc,
19773    /* XVI16GER2S */
19774    acc, vsrc, vsrc,
19775    /* XVI16GER2SPP */
19776    acc, acc, vsrc, vsrc,
19777    /* XVI16GER2SW */
19778    wacc, vsrc, vsrc,
19779    /* XVI16GER2SWPP */
19780    wacc, wacc, vsrc, vsrc,
19781    /* XVI16GER2W */
19782    wacc, vsrc, vsrc,
19783    /* XVI16GER2WPP */
19784    wacc, wacc, vsrc, vsrc,
19785    /* XVI4GER8 */
19786    acc, vsrc, vsrc,
19787    /* XVI4GER8PP */
19788    acc, acc, vsrc, vsrc,
19789    /* XVI4GER8W */
19790    wacc, vsrc, vsrc,
19791    /* XVI4GER8WPP */
19792    wacc, wacc, vsrc, vsrc,
19793    /* XVI8GER4 */
19794    acc, vsrc, vsrc,
19795    /* XVI8GER4PP */
19796    acc, acc, vsrc, vsrc,
19797    /* XVI8GER4SPP */
19798    acc, acc, vsrc, vsrc,
19799    /* XVI8GER4W */
19800    wacc, vsrc, vsrc,
19801    /* XVI8GER4WPP */
19802    wacc, wacc, vsrc, vsrc,
19803    /* XVI8GER4WSPP */
19804    wacc, wacc, vsrc, vsrc,
19805    /* XVIEXPDP */
19806    vsrc, vsrc, vsrc,
19807    /* XVIEXPSP */
19808    vsrc, vsrc, vsrc,
19809    /* XVMADDADP */
19810    vsrc, vsrc, vsrc, vsrc,
19811    /* XVMADDASP */
19812    vsrc, vsrc, vsrc, vsrc,
19813    /* XVMADDMDP */
19814    vsrc, vsrc, vsrc, vsrc,
19815    /* XVMADDMSP */
19816    vsrc, vsrc, vsrc, vsrc,
19817    /* XVMAXDP */
19818    vsrc, vsrc, vsrc,
19819    /* XVMAXSP */
19820    vsrc, vsrc, vsrc,
19821    /* XVMINDP */
19822    vsrc, vsrc, vsrc,
19823    /* XVMINSP */
19824    vsrc, vsrc, vsrc,
19825    /* XVMSUBADP */
19826    vsrc, vsrc, vsrc, vsrc,
19827    /* XVMSUBASP */
19828    vsrc, vsrc, vsrc, vsrc,
19829    /* XVMSUBMDP */
19830    vsrc, vsrc, vsrc, vsrc,
19831    /* XVMSUBMSP */
19832    vsrc, vsrc, vsrc, vsrc,
19833    /* XVMULDP */
19834    vsrc, vsrc, vsrc,
19835    /* XVMULSP */
19836    vsrc, vsrc, vsrc,
19837    /* XVNABSDP */
19838    vsrc, vsrc,
19839    /* XVNABSSP */
19840    vsrc, vsrc,
19841    /* XVNEGDP */
19842    vsrc, vsrc,
19843    /* XVNEGSP */
19844    vsrc, vsrc,
19845    /* XVNMADDADP */
19846    vsrc, vsrc, vsrc, vsrc,
19847    /* XVNMADDASP */
19848    vsrc, vsrc, vsrc, vsrc,
19849    /* XVNMADDMDP */
19850    vsrc, vsrc, vsrc, vsrc,
19851    /* XVNMADDMSP */
19852    vsrc, vsrc, vsrc, vsrc,
19853    /* XVNMSUBADP */
19854    vsrc, vsrc, vsrc, vsrc,
19855    /* XVNMSUBASP */
19856    vsrc, vsrc, vsrc, vsrc,
19857    /* XVNMSUBMDP */
19858    vsrc, vsrc, vsrc, vsrc,
19859    /* XVNMSUBMSP */
19860    vsrc, vsrc, vsrc, vsrc,
19861    /* XVRDPI */
19862    vsrc, vsrc,
19863    /* XVRDPIC */
19864    vsrc, vsrc,
19865    /* XVRDPIM */
19866    vsrc, vsrc,
19867    /* XVRDPIP */
19868    vsrc, vsrc,
19869    /* XVRDPIZ */
19870    vsrc, vsrc,
19871    /* XVREDP */
19872    vsrc, vsrc,
19873    /* XVRESP */
19874    vsrc, vsrc,
19875    /* XVRSPI */
19876    vsrc, vsrc,
19877    /* XVRSPIC */
19878    vsrc, vsrc,
19879    /* XVRSPIM */
19880    vsrc, vsrc,
19881    /* XVRSPIP */
19882    vsrc, vsrc,
19883    /* XVRSPIZ */
19884    vsrc, vsrc,
19885    /* XVRSQRTEDP */
19886    vsrc, vsrc,
19887    /* XVRSQRTESP */
19888    vsrc, vsrc,
19889    /* XVSQRTDP */
19890    vsrc, vsrc,
19891    /* XVSQRTSP */
19892    vsrc, vsrc,
19893    /* XVSUBDP */
19894    vsrc, vsrc, vsrc,
19895    /* XVSUBSP */
19896    vsrc, vsrc, vsrc,
19897    /* XVTDIVDP */
19898    crrc, vsrc, vsrc,
19899    /* XVTDIVSP */
19900    crrc, vsrc, vsrc,
19901    /* XVTLSBB */
19902    crrc, vsrc,
19903    /* XVTSQRTDP */
19904    crrc, vsrc,
19905    /* XVTSQRTSP */
19906    crrc, vsrc,
19907    /* XVTSTDCDP */
19908    vsrc, u7imm, vsrc,
19909    /* XVTSTDCSP */
19910    vsrc, u7imm, vsrc,
19911    /* XVXEXPDP */
19912    vsrc, vsrc,
19913    /* XVXEXPSP */
19914    vsrc, vsrc,
19915    /* XVXSIGDP */
19916    vsrc, vsrc,
19917    /* XVXSIGSP */
19918    vsrc, vsrc,
19919    /* XXBLENDVB */
19920    vsrc, vsrc, vsrc, vsrc,
19921    /* XXBLENDVD */
19922    vsrc, vsrc, vsrc, vsrc,
19923    /* XXBLENDVH */
19924    vsrc, vsrc, vsrc, vsrc,
19925    /* XXBLENDVW */
19926    vsrc, vsrc, vsrc, vsrc,
19927    /* XXBRD */
19928    vsrc, vsrc,
19929    /* XXBRH */
19930    vsrc, vsrc,
19931    /* XXBRQ */
19932    vsrc, vsrc,
19933    /* XXBRW */
19934    vsrc, vsrc,
19935    /* XXEVAL */
19936    vsrc, vsrc, vsrc, vsrc, u8imm,
19937    /* XXEXTRACTUW */
19938    vsfrc, vsrc, u4imm,
19939    /* XXGENPCVBM */
19940    vsrc, vrrc, s5imm,
19941    /* XXGENPCVDM */
19942    vsrc, vrrc, s5imm,
19943    /* XXGENPCVHM */
19944    vsrc, vrrc, s5imm,
19945    /* XXGENPCVWM */
19946    vsrc, vrrc, s5imm,
19947    /* XXINSERTW */
19948    vsrc, vsrc, vsrc, u4imm,
19949    /* XXLAND */
19950    vsrc, vsrc, vsrc,
19951    /* XXLANDC */
19952    vsrc, vsrc, vsrc,
19953    /* XXLEQV */
19954    vsrc, vsrc, vsrc,
19955    /* XXLEQVOnes */
19956    vsrc,
19957    /* XXLNAND */
19958    vsrc, vsrc, vsrc,
19959    /* XXLNOR */
19960    vsrc, vsrc, vsrc,
19961    /* XXLOR */
19962    vsrc, vsrc, vsrc,
19963    /* XXLORC */
19964    vsrc, vsrc, vsrc,
19965    /* XXLORf */
19966    vsfrc, vsfrc, vsfrc,
19967    /* XXLXOR */
19968    vsrc, vsrc, vsrc,
19969    /* XXLXORdpz */
19970    vsfrc,
19971    /* XXLXORspz */
19972    vssrc,
19973    /* XXLXORz */
19974    vsrc,
19975    /* XXMFACC */
19976    acc, acc,
19977    /* XXMFACCW */
19978    wacc, wacc,
19979    /* XXMRGHW */
19980    vsrc, vsrc, vsrc,
19981    /* XXMRGLW */
19982    vsrc, vsrc, vsrc,
19983    /* XXMTACC */
19984    acc, acc,
19985    /* XXMTACCW */
19986    wacc, wacc,
19987    /* XXPERM */
19988    vsrc, vsrc, vsrc, vsrc,
19989    /* XXPERMDI */
19990    vsrc, vsrc, vsrc, u2imm,
19991    /* XXPERMDIs */
19992    vsrc, vsfrc, u2imm,
19993    /* XXPERMR */
19994    vsrc, vsrc, vsrc, vsrc,
19995    /* XXPERMX */
19996    vsrc, vsrc, vsrc, vsrc, u3imm,
19997    /* XXSEL */
19998    vsrc, vsrc, vsrc, vsrc,
19999    /* XXSETACCZ */
20000    acc,
20001    /* XXSETACCZW */
20002    wacc,
20003    /* XXSLDWI */
20004    vsrc, vsrc, vsrc, u2imm,
20005    /* XXSLDWIs */
20006    vsrc, vsfrc, u2imm,
20007    /* XXSPLTI32DX */
20008    vsrc, vsrc, u1imm, i32imm,
20009    /* XXSPLTIB */
20010    vsrc, u8imm,
20011    /* XXSPLTIDP */
20012    vsrc, i32imm,
20013    /* XXSPLTIW */
20014    vsrc, i32imm,
20015    /* XXSPLTW */
20016    vsrc, vsrc, u2imm,
20017    /* XXSPLTWs */
20018    vsrc, vsfrc, u2imm,
20019    /* gBC */
20020    u5imm, crbitrc, condbrtarget,
20021    /* gBCA */
20022    u5imm, crbitrc, abscondbrtarget,
20023    /* gBCAat */
20024    u5imm, atimm, crbitrc, abscondbrtarget,
20025    /* gBCCTR */
20026    u5imm, crbitrc, i32imm,
20027    /* gBCCTRL */
20028    u5imm, crbitrc, i32imm,
20029    /* gBCL */
20030    u5imm, crbitrc, condbrtarget,
20031    /* gBCLA */
20032    u5imm, crbitrc, abscondbrtarget,
20033    /* gBCLAat */
20034    u5imm, atimm, crbitrc, abscondbrtarget,
20035    /* gBCLR */
20036    u5imm, crbitrc, i32imm,
20037    /* gBCLRL */
20038    u5imm, crbitrc, i32imm,
20039    /* gBCLat */
20040    u5imm, atimm, crbitrc, condbrtarget,
20041    /* gBCat */
20042    u5imm, atimm, crbitrc, condbrtarget,
20043  };
20044  return OpcodeOperandTypes[Offsets[Opcode] + OpIdx];
20045}
20046} // end namespace PPC
20047} // end namespace llvm
20048#endif // GET_INSTRINFO_OPERAND_TYPE
20049
20050#ifdef GET_INSTRINFO_MEM_OPERAND_SIZE
20051#undef GET_INSTRINFO_MEM_OPERAND_SIZE
20052namespace llvm {
20053namespace PPC {
20054LLVM_READONLY
20055static int getMemOperandSize(int OpType) {
20056  switch (OpType) {
20057  default: return 0;
20058  }
20059}
20060} // end namespace PPC
20061} // end namespace llvm
20062#endif // GET_INSTRINFO_MEM_OPERAND_SIZE
20063
20064#ifdef GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP
20065#undef GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP
20066namespace llvm {
20067namespace PPC {
20068LLVM_READONLY static unsigned
20069getLogicalOperandSize(uint16_t Opcode, uint16_t LogicalOpIdx) {
20070  return LogicalOpIdx;
20071}
20072LLVM_READONLY static inline unsigned
20073getLogicalOperandIdx(uint16_t Opcode, uint16_t LogicalOpIdx) {
20074  auto S = 0U;
20075  for (auto i = 0U; i < LogicalOpIdx; ++i)
20076    S += getLogicalOperandSize(Opcode, i);
20077  return S;
20078}
20079} // end namespace PPC
20080} // end namespace llvm
20081#endif // GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP
20082
20083#ifdef GET_INSTRINFO_LOGICAL_OPERAND_TYPE_MAP
20084#undef GET_INSTRINFO_LOGICAL_OPERAND_TYPE_MAP
20085namespace llvm {
20086namespace PPC {
20087LLVM_READONLY static int
20088getLogicalOperandType(uint16_t Opcode, uint16_t LogicalOpIdx) {
20089  return -1;
20090}
20091} // end namespace PPC
20092} // end namespace llvm
20093#endif // GET_INSTRINFO_LOGICAL_OPERAND_TYPE_MAP
20094
20095#ifdef GET_INSTRINFO_MC_HELPER_DECLS
20096#undef GET_INSTRINFO_MC_HELPER_DECLS
20097
20098namespace llvm {
20099class MCInst;
20100class FeatureBitset;
20101
20102namespace PPC_MC {
20103
20104void verifyInstructionPredicates(unsigned Opcode, const FeatureBitset &Features);
20105
20106} // end namespace PPC_MC
20107} // end namespace llvm
20108
20109#endif // GET_INSTRINFO_MC_HELPER_DECLS
20110
20111#ifdef GET_INSTRINFO_MC_HELPERS
20112#undef GET_INSTRINFO_MC_HELPERS
20113
20114namespace llvm {
20115namespace PPC_MC {
20116
20117} // end namespace PPC_MC
20118} // end namespace llvm
20119
20120#endif // GET_GENISTRINFO_MC_HELPERS
20121
20122#ifdef ENABLE_INSTR_PREDICATE_VERIFIER
20123#undef ENABLE_INSTR_PREDICATE_VERIFIER
20124#include <sstream>
20125
20126namespace llvm {
20127namespace PPC_MC {
20128
20129// Bits for subtarget features that participate in instruction matching.
20130enum SubtargetFeatureBits : uint8_t {
20131  Feature_ModernAsBit = 0,
20132};
20133
20134#ifndef NDEBUG
20135static const char *SubtargetFeatureNames[] = {
20136  "Feature_ModernAs",
20137  nullptr
20138};
20139
20140#endif // NDEBUG
20141
20142FeatureBitset computeAvailableFeatures(const FeatureBitset &FB) {
20143  FeatureBitset Features;
20144  if (!FB[PPC::AIXOS] || FB[PPC::FeatureModernAIXAs])
20145    Features.set(Feature_ModernAsBit);
20146  return Features;
20147}
20148
20149#ifndef NDEBUG
20150// Feature bitsets.
20151enum : uint8_t {
20152  CEFBS_None,
20153};
20154
20155static constexpr FeatureBitset FeatureBitsets[] = {
20156  {}, // CEFBS_None
20157};
20158#endif // NDEBUG
20159
20160void verifyInstructionPredicates(
20161    unsigned Opcode, const FeatureBitset &Features) {
20162#ifndef NDEBUG
20163  static uint8_t RequiredFeaturesRefs[] = {
20164    CEFBS_None, // PHI = 0
20165    CEFBS_None, // INLINEASM = 1
20166    CEFBS_None, // INLINEASM_BR = 2
20167    CEFBS_None, // CFI_INSTRUCTION = 3
20168    CEFBS_None, // EH_LABEL = 4
20169    CEFBS_None, // GC_LABEL = 5
20170    CEFBS_None, // ANNOTATION_LABEL = 6
20171    CEFBS_None, // KILL = 7
20172    CEFBS_None, // EXTRACT_SUBREG = 8
20173    CEFBS_None, // INSERT_SUBREG = 9
20174    CEFBS_None, // IMPLICIT_DEF = 10
20175    CEFBS_None, // SUBREG_TO_REG = 11
20176    CEFBS_None, // COPY_TO_REGCLASS = 12
20177    CEFBS_None, // DBG_VALUE = 13
20178    CEFBS_None, // DBG_VALUE_LIST = 14
20179    CEFBS_None, // DBG_INSTR_REF = 15
20180    CEFBS_None, // DBG_PHI = 16
20181    CEFBS_None, // DBG_LABEL = 17
20182    CEFBS_None, // REG_SEQUENCE = 18
20183    CEFBS_None, // COPY = 19
20184    CEFBS_None, // BUNDLE = 20
20185    CEFBS_None, // LIFETIME_START = 21
20186    CEFBS_None, // LIFETIME_END = 22
20187    CEFBS_None, // PSEUDO_PROBE = 23
20188    CEFBS_None, // ARITH_FENCE = 24
20189    CEFBS_None, // STACKMAP = 25
20190    CEFBS_None, // FENTRY_CALL = 26
20191    CEFBS_None, // PATCHPOINT = 27
20192    CEFBS_None, // LOAD_STACK_GUARD = 28
20193    CEFBS_None, // PREALLOCATED_SETUP = 29
20194    CEFBS_None, // PREALLOCATED_ARG = 30
20195    CEFBS_None, // STATEPOINT = 31
20196    CEFBS_None, // LOCAL_ESCAPE = 32
20197    CEFBS_None, // FAULTING_OP = 33
20198    CEFBS_None, // PATCHABLE_OP = 34
20199    CEFBS_None, // PATCHABLE_FUNCTION_ENTER = 35
20200    CEFBS_None, // PATCHABLE_RET = 36
20201    CEFBS_None, // PATCHABLE_FUNCTION_EXIT = 37
20202    CEFBS_None, // PATCHABLE_TAIL_CALL = 38
20203    CEFBS_None, // PATCHABLE_EVENT_CALL = 39
20204    CEFBS_None, // PATCHABLE_TYPED_EVENT_CALL = 40
20205    CEFBS_None, // ICALL_BRANCH_FUNNEL = 41
20206    CEFBS_None, // MEMBARRIER = 42
20207    CEFBS_None, // G_ASSERT_SEXT = 43
20208    CEFBS_None, // G_ASSERT_ZEXT = 44
20209    CEFBS_None, // G_ASSERT_ALIGN = 45
20210    CEFBS_None, // G_ADD = 46
20211    CEFBS_None, // G_SUB = 47
20212    CEFBS_None, // G_MUL = 48
20213    CEFBS_None, // G_SDIV = 49
20214    CEFBS_None, // G_UDIV = 50
20215    CEFBS_None, // G_SREM = 51
20216    CEFBS_None, // G_UREM = 52
20217    CEFBS_None, // G_SDIVREM = 53
20218    CEFBS_None, // G_UDIVREM = 54
20219    CEFBS_None, // G_AND = 55
20220    CEFBS_None, // G_OR = 56
20221    CEFBS_None, // G_XOR = 57
20222    CEFBS_None, // G_IMPLICIT_DEF = 58
20223    CEFBS_None, // G_PHI = 59
20224    CEFBS_None, // G_FRAME_INDEX = 60
20225    CEFBS_None, // G_GLOBAL_VALUE = 61
20226    CEFBS_None, // G_EXTRACT = 62
20227    CEFBS_None, // G_UNMERGE_VALUES = 63
20228    CEFBS_None, // G_INSERT = 64
20229    CEFBS_None, // G_MERGE_VALUES = 65
20230    CEFBS_None, // G_BUILD_VECTOR = 66
20231    CEFBS_None, // G_BUILD_VECTOR_TRUNC = 67
20232    CEFBS_None, // G_CONCAT_VECTORS = 68
20233    CEFBS_None, // G_PTRTOINT = 69
20234    CEFBS_None, // G_INTTOPTR = 70
20235    CEFBS_None, // G_BITCAST = 71
20236    CEFBS_None, // G_FREEZE = 72
20237    CEFBS_None, // G_INTRINSIC_FPTRUNC_ROUND = 73
20238    CEFBS_None, // G_INTRINSIC_TRUNC = 74
20239    CEFBS_None, // G_INTRINSIC_ROUND = 75
20240    CEFBS_None, // G_INTRINSIC_LRINT = 76
20241    CEFBS_None, // G_INTRINSIC_ROUNDEVEN = 77
20242    CEFBS_None, // G_READCYCLECOUNTER = 78
20243    CEFBS_None, // G_LOAD = 79
20244    CEFBS_None, // G_SEXTLOAD = 80
20245    CEFBS_None, // G_ZEXTLOAD = 81
20246    CEFBS_None, // G_INDEXED_LOAD = 82
20247    CEFBS_None, // G_INDEXED_SEXTLOAD = 83
20248    CEFBS_None, // G_INDEXED_ZEXTLOAD = 84
20249    CEFBS_None, // G_STORE = 85
20250    CEFBS_None, // G_INDEXED_STORE = 86
20251    CEFBS_None, // G_ATOMIC_CMPXCHG_WITH_SUCCESS = 87
20252    CEFBS_None, // G_ATOMIC_CMPXCHG = 88
20253    CEFBS_None, // G_ATOMICRMW_XCHG = 89
20254    CEFBS_None, // G_ATOMICRMW_ADD = 90
20255    CEFBS_None, // G_ATOMICRMW_SUB = 91
20256    CEFBS_None, // G_ATOMICRMW_AND = 92
20257    CEFBS_None, // G_ATOMICRMW_NAND = 93
20258    CEFBS_None, // G_ATOMICRMW_OR = 94
20259    CEFBS_None, // G_ATOMICRMW_XOR = 95
20260    CEFBS_None, // G_ATOMICRMW_MAX = 96
20261    CEFBS_None, // G_ATOMICRMW_MIN = 97
20262    CEFBS_None, // G_ATOMICRMW_UMAX = 98
20263    CEFBS_None, // G_ATOMICRMW_UMIN = 99
20264    CEFBS_None, // G_ATOMICRMW_FADD = 100
20265    CEFBS_None, // G_ATOMICRMW_FSUB = 101
20266    CEFBS_None, // G_ATOMICRMW_FMAX = 102
20267    CEFBS_None, // G_ATOMICRMW_FMIN = 103
20268    CEFBS_None, // G_ATOMICRMW_UINC_WRAP = 104
20269    CEFBS_None, // G_ATOMICRMW_UDEC_WRAP = 105
20270    CEFBS_None, // G_FENCE = 106
20271    CEFBS_None, // G_BRCOND = 107
20272    CEFBS_None, // G_BRINDIRECT = 108
20273    CEFBS_None, // G_INVOKE_REGION_START = 109
20274    CEFBS_None, // G_INTRINSIC = 110
20275    CEFBS_None, // G_INTRINSIC_W_SIDE_EFFECTS = 111
20276    CEFBS_None, // G_ANYEXT = 112
20277    CEFBS_None, // G_TRUNC = 113
20278    CEFBS_None, // G_CONSTANT = 114
20279    CEFBS_None, // G_FCONSTANT = 115
20280    CEFBS_None, // G_VASTART = 116
20281    CEFBS_None, // G_VAARG = 117
20282    CEFBS_None, // G_SEXT = 118
20283    CEFBS_None, // G_SEXT_INREG = 119
20284    CEFBS_None, // G_ZEXT = 120
20285    CEFBS_None, // G_SHL = 121
20286    CEFBS_None, // G_LSHR = 122
20287    CEFBS_None, // G_ASHR = 123
20288    CEFBS_None, // G_FSHL = 124
20289    CEFBS_None, // G_FSHR = 125
20290    CEFBS_None, // G_ROTR = 126
20291    CEFBS_None, // G_ROTL = 127
20292    CEFBS_None, // G_ICMP = 128
20293    CEFBS_None, // G_FCMP = 129
20294    CEFBS_None, // G_SELECT = 130
20295    CEFBS_None, // G_UADDO = 131
20296    CEFBS_None, // G_UADDE = 132
20297    CEFBS_None, // G_USUBO = 133
20298    CEFBS_None, // G_USUBE = 134
20299    CEFBS_None, // G_SADDO = 135
20300    CEFBS_None, // G_SADDE = 136
20301    CEFBS_None, // G_SSUBO = 137
20302    CEFBS_None, // G_SSUBE = 138
20303    CEFBS_None, // G_UMULO = 139
20304    CEFBS_None, // G_SMULO = 140
20305    CEFBS_None, // G_UMULH = 141
20306    CEFBS_None, // G_SMULH = 142
20307    CEFBS_None, // G_UADDSAT = 143
20308    CEFBS_None, // G_SADDSAT = 144
20309    CEFBS_None, // G_USUBSAT = 145
20310    CEFBS_None, // G_SSUBSAT = 146
20311    CEFBS_None, // G_USHLSAT = 147
20312    CEFBS_None, // G_SSHLSAT = 148
20313    CEFBS_None, // G_SMULFIX = 149
20314    CEFBS_None, // G_UMULFIX = 150
20315    CEFBS_None, // G_SMULFIXSAT = 151
20316    CEFBS_None, // G_UMULFIXSAT = 152
20317    CEFBS_None, // G_SDIVFIX = 153
20318    CEFBS_None, // G_UDIVFIX = 154
20319    CEFBS_None, // G_SDIVFIXSAT = 155
20320    CEFBS_None, // G_UDIVFIXSAT = 156
20321    CEFBS_None, // G_FADD = 157
20322    CEFBS_None, // G_FSUB = 158
20323    CEFBS_None, // G_FMUL = 159
20324    CEFBS_None, // G_FMA = 160
20325    CEFBS_None, // G_FMAD = 161
20326    CEFBS_None, // G_FDIV = 162
20327    CEFBS_None, // G_FREM = 163
20328    CEFBS_None, // G_FPOW = 164
20329    CEFBS_None, // G_FPOWI = 165
20330    CEFBS_None, // G_FEXP = 166
20331    CEFBS_None, // G_FEXP2 = 167
20332    CEFBS_None, // G_FLOG = 168
20333    CEFBS_None, // G_FLOG2 = 169
20334    CEFBS_None, // G_FLOG10 = 170
20335    CEFBS_None, // G_FNEG = 171
20336    CEFBS_None, // G_FPEXT = 172
20337    CEFBS_None, // G_FPTRUNC = 173
20338    CEFBS_None, // G_FPTOSI = 174
20339    CEFBS_None, // G_FPTOUI = 175
20340    CEFBS_None, // G_SITOFP = 176
20341    CEFBS_None, // G_UITOFP = 177
20342    CEFBS_None, // G_FABS = 178
20343    CEFBS_None, // G_FCOPYSIGN = 179
20344    CEFBS_None, // G_IS_FPCLASS = 180
20345    CEFBS_None, // G_FCANONICALIZE = 181
20346    CEFBS_None, // G_FMINNUM = 182
20347    CEFBS_None, // G_FMAXNUM = 183
20348    CEFBS_None, // G_FMINNUM_IEEE = 184
20349    CEFBS_None, // G_FMAXNUM_IEEE = 185
20350    CEFBS_None, // G_FMINIMUM = 186
20351    CEFBS_None, // G_FMAXIMUM = 187
20352    CEFBS_None, // G_PTR_ADD = 188
20353    CEFBS_None, // G_PTRMASK = 189
20354    CEFBS_None, // G_SMIN = 190
20355    CEFBS_None, // G_SMAX = 191
20356    CEFBS_None, // G_UMIN = 192
20357    CEFBS_None, // G_UMAX = 193
20358    CEFBS_None, // G_ABS = 194
20359    CEFBS_None, // G_LROUND = 195
20360    CEFBS_None, // G_LLROUND = 196
20361    CEFBS_None, // G_BR = 197
20362    CEFBS_None, // G_BRJT = 198
20363    CEFBS_None, // G_INSERT_VECTOR_ELT = 199
20364    CEFBS_None, // G_EXTRACT_VECTOR_ELT = 200
20365    CEFBS_None, // G_SHUFFLE_VECTOR = 201
20366    CEFBS_None, // G_CTTZ = 202
20367    CEFBS_None, // G_CTTZ_ZERO_UNDEF = 203
20368    CEFBS_None, // G_CTLZ = 204
20369    CEFBS_None, // G_CTLZ_ZERO_UNDEF = 205
20370    CEFBS_None, // G_CTPOP = 206
20371    CEFBS_None, // G_BSWAP = 207
20372    CEFBS_None, // G_BITREVERSE = 208
20373    CEFBS_None, // G_FCEIL = 209
20374    CEFBS_None, // G_FCOS = 210
20375    CEFBS_None, // G_FSIN = 211
20376    CEFBS_None, // G_FSQRT = 212
20377    CEFBS_None, // G_FFLOOR = 213
20378    CEFBS_None, // G_FRINT = 214
20379    CEFBS_None, // G_FNEARBYINT = 215
20380    CEFBS_None, // G_ADDRSPACE_CAST = 216
20381    CEFBS_None, // G_BLOCK_ADDR = 217
20382    CEFBS_None, // G_JUMP_TABLE = 218
20383    CEFBS_None, // G_DYN_STACKALLOC = 219
20384    CEFBS_None, // G_STRICT_FADD = 220
20385    CEFBS_None, // G_STRICT_FSUB = 221
20386    CEFBS_None, // G_STRICT_FMUL = 222
20387    CEFBS_None, // G_STRICT_FDIV = 223
20388    CEFBS_None, // G_STRICT_FREM = 224
20389    CEFBS_None, // G_STRICT_FMA = 225
20390    CEFBS_None, // G_STRICT_FSQRT = 226
20391    CEFBS_None, // G_READ_REGISTER = 227
20392    CEFBS_None, // G_WRITE_REGISTER = 228
20393    CEFBS_None, // G_MEMCPY = 229
20394    CEFBS_None, // G_MEMCPY_INLINE = 230
20395    CEFBS_None, // G_MEMMOVE = 231
20396    CEFBS_None, // G_MEMSET = 232
20397    CEFBS_None, // G_BZERO = 233
20398    CEFBS_None, // G_VECREDUCE_SEQ_FADD = 234
20399    CEFBS_None, // G_VECREDUCE_SEQ_FMUL = 235
20400    CEFBS_None, // G_VECREDUCE_FADD = 236
20401    CEFBS_None, // G_VECREDUCE_FMUL = 237
20402    CEFBS_None, // G_VECREDUCE_FMAX = 238
20403    CEFBS_None, // G_VECREDUCE_FMIN = 239
20404    CEFBS_None, // G_VECREDUCE_ADD = 240
20405    CEFBS_None, // G_VECREDUCE_MUL = 241
20406    CEFBS_None, // G_VECREDUCE_AND = 242
20407    CEFBS_None, // G_VECREDUCE_OR = 243
20408    CEFBS_None, // G_VECREDUCE_XOR = 244
20409    CEFBS_None, // G_VECREDUCE_SMAX = 245
20410    CEFBS_None, // G_VECREDUCE_SMIN = 246
20411    CEFBS_None, // G_VECREDUCE_UMAX = 247
20412    CEFBS_None, // G_VECREDUCE_UMIN = 248
20413    CEFBS_None, // G_SBFX = 249
20414    CEFBS_None, // G_UBFX = 250
20415    CEFBS_None, // ATOMIC_CMP_SWAP_I128 = 251
20416    CEFBS_None, // ATOMIC_LOAD_ADD_I128 = 252
20417    CEFBS_None, // ATOMIC_LOAD_AND_I128 = 253
20418    CEFBS_None, // ATOMIC_LOAD_NAND_I128 = 254
20419    CEFBS_None, // ATOMIC_LOAD_OR_I128 = 255
20420    CEFBS_None, // ATOMIC_LOAD_SUB_I128 = 256
20421    CEFBS_None, // ATOMIC_LOAD_XOR_I128 = 257
20422    CEFBS_None, // ATOMIC_SWAP_I128 = 258
20423    CEFBS_None, // BUILD_QUADWORD = 259
20424    CEFBS_None, // BUILD_UACC = 260
20425    CEFBS_None, // CFENCE8 = 261
20426    CEFBS_None, // CLRLSLDI = 262
20427    CEFBS_None, // CLRLSLDI_rec = 263
20428    CEFBS_None, // CLRLSLWI = 264
20429    CEFBS_None, // CLRLSLWI_rec = 265
20430    CEFBS_None, // CLRRDI = 266
20431    CEFBS_None, // CLRRDI_rec = 267
20432    CEFBS_None, // CLRRWI = 268
20433    CEFBS_None, // CLRRWI_rec = 269
20434    CEFBS_None, // DCBFL = 270
20435    CEFBS_None, // DCBFLP = 271
20436    CEFBS_None, // DCBFPS = 272
20437    CEFBS_None, // DCBFx = 273
20438    CEFBS_None, // DCBSTPS = 274
20439    CEFBS_None, // DCBTCT = 275
20440    CEFBS_None, // DCBTDS = 276
20441    CEFBS_None, // DCBTSTCT = 277
20442    CEFBS_None, // DCBTSTDS = 278
20443    CEFBS_None, // DCBTSTT = 279
20444    CEFBS_None, // DCBTSTx = 280
20445    CEFBS_None, // DCBTT = 281
20446    CEFBS_None, // DCBTx = 282
20447    CEFBS_None, // DFLOADf32 = 283
20448    CEFBS_None, // DFLOADf64 = 284
20449    CEFBS_None, // DFSTOREf32 = 285
20450    CEFBS_None, // DFSTOREf64 = 286
20451    CEFBS_None, // EXTLDI = 287
20452    CEFBS_None, // EXTLDI_rec = 288
20453    CEFBS_None, // EXTLWI = 289
20454    CEFBS_None, // EXTLWI_rec = 290
20455    CEFBS_None, // EXTRDI = 291
20456    CEFBS_None, // EXTRDI_rec = 292
20457    CEFBS_None, // EXTRWI = 293
20458    CEFBS_None, // EXTRWI_rec = 294
20459    CEFBS_None, // INSLWI = 295
20460    CEFBS_None, // INSLWI_rec = 296
20461    CEFBS_None, // INSRDI = 297
20462    CEFBS_None, // INSRDI_rec = 298
20463    CEFBS_None, // INSRWI = 299
20464    CEFBS_None, // INSRWI_rec = 300
20465    CEFBS_None, // KILL_PAIR = 301
20466    CEFBS_None, // LAx = 302
20467    CEFBS_None, // LIWAX = 303
20468    CEFBS_None, // LIWZX = 304
20469    CEFBS_None, // RLWIMIbm = 305
20470    CEFBS_None, // RLWIMIbm_rec = 306
20471    CEFBS_None, // RLWINMbm = 307
20472    CEFBS_None, // RLWINMbm_rec = 308
20473    CEFBS_None, // RLWNMbm = 309
20474    CEFBS_None, // RLWNMbm_rec = 310
20475    CEFBS_None, // ROTRDI = 311
20476    CEFBS_None, // ROTRDI_rec = 312
20477    CEFBS_None, // ROTRWI = 313
20478    CEFBS_None, // ROTRWI_rec = 314
20479    CEFBS_None, // SLDI = 315
20480    CEFBS_None, // SLDI_rec = 316
20481    CEFBS_None, // SLWI = 317
20482    CEFBS_None, // SLWI_rec = 318
20483    CEFBS_None, // SPILLTOVSR_LD = 319
20484    CEFBS_None, // SPILLTOVSR_LDX = 320
20485    CEFBS_None, // SPILLTOVSR_ST = 321
20486    CEFBS_None, // SPILLTOVSR_STX = 322
20487    CEFBS_None, // SRDI = 323
20488    CEFBS_None, // SRDI_rec = 324
20489    CEFBS_None, // SRWI = 325
20490    CEFBS_None, // SRWI_rec = 326
20491    CEFBS_None, // STIWX = 327
20492    CEFBS_None, // SUBI = 328
20493    CEFBS_None, // SUBIC = 329
20494    CEFBS_None, // SUBIC_rec = 330
20495    CEFBS_None, // SUBIS = 331
20496    CEFBS_None, // SUBPCIS = 332
20497    CEFBS_None, // XFLOADf32 = 333
20498    CEFBS_None, // XFLOADf64 = 334
20499    CEFBS_None, // XFSTOREf32 = 335
20500    CEFBS_None, // XFSTOREf64 = 336
20501    CEFBS_None, // ADD4 = 337
20502    CEFBS_None, // ADD4O = 338
20503    CEFBS_None, // ADD4O_rec = 339
20504    CEFBS_None, // ADD4TLS = 340
20505    CEFBS_None, // ADD4_rec = 341
20506    CEFBS_None, // ADD8 = 342
20507    CEFBS_None, // ADD8O = 343
20508    CEFBS_None, // ADD8O_rec = 344
20509    CEFBS_None, // ADD8TLS = 345
20510    CEFBS_None, // ADD8TLS_ = 346
20511    CEFBS_None, // ADD8_rec = 347
20512    CEFBS_None, // ADDC = 348
20513    CEFBS_None, // ADDC8 = 349
20514    CEFBS_None, // ADDC8O = 350
20515    CEFBS_None, // ADDC8O_rec = 351
20516    CEFBS_None, // ADDC8_rec = 352
20517    CEFBS_None, // ADDCO = 353
20518    CEFBS_None, // ADDCO_rec = 354
20519    CEFBS_None, // ADDC_rec = 355
20520    CEFBS_None, // ADDE = 356
20521    CEFBS_None, // ADDE8 = 357
20522    CEFBS_None, // ADDE8O = 358
20523    CEFBS_None, // ADDE8O_rec = 359
20524    CEFBS_None, // ADDE8_rec = 360
20525    CEFBS_None, // ADDEO = 361
20526    CEFBS_None, // ADDEO_rec = 362
20527    CEFBS_None, // ADDEX = 363
20528    CEFBS_None, // ADDEX8 = 364
20529    CEFBS_None, // ADDE_rec = 365
20530    CEFBS_None, // ADDI = 366
20531    CEFBS_None, // ADDI8 = 367
20532    CEFBS_None, // ADDIC = 368
20533    CEFBS_None, // ADDIC8 = 369
20534    CEFBS_None, // ADDIC_rec = 370
20535    CEFBS_None, // ADDIS = 371
20536    CEFBS_None, // ADDIS8 = 372
20537    CEFBS_None, // ADDISdtprelHA = 373
20538    CEFBS_None, // ADDISdtprelHA32 = 374
20539    CEFBS_None, // ADDISgotTprelHA = 375
20540    CEFBS_None, // ADDIStlsgdHA = 376
20541    CEFBS_None, // ADDIStlsldHA = 377
20542    CEFBS_None, // ADDIStocHA = 378
20543    CEFBS_None, // ADDIStocHA8 = 379
20544    CEFBS_None, // ADDIdtprelL = 380
20545    CEFBS_None, // ADDIdtprelL32 = 381
20546    CEFBS_None, // ADDItlsgdL = 382
20547    CEFBS_None, // ADDItlsgdL32 = 383
20548    CEFBS_None, // ADDItlsgdLADDR = 384
20549    CEFBS_None, // ADDItlsgdLADDR32 = 385
20550    CEFBS_None, // ADDItlsldL = 386
20551    CEFBS_None, // ADDItlsldL32 = 387
20552    CEFBS_None, // ADDItlsldLADDR = 388
20553    CEFBS_None, // ADDItlsldLADDR32 = 389
20554    CEFBS_None, // ADDItoc = 390
20555    CEFBS_None, // ADDItoc8 = 391
20556    CEFBS_None, // ADDItocL = 392
20557    CEFBS_None, // ADDME = 393
20558    CEFBS_None, // ADDME8 = 394
20559    CEFBS_None, // ADDME8O = 395
20560    CEFBS_None, // ADDME8O_rec = 396
20561    CEFBS_None, // ADDME8_rec = 397
20562    CEFBS_None, // ADDMEO = 398
20563    CEFBS_None, // ADDMEO_rec = 399
20564    CEFBS_None, // ADDME_rec = 400
20565    CEFBS_None, // ADDPCIS = 401
20566    CEFBS_None, // ADDZE = 402
20567    CEFBS_None, // ADDZE8 = 403
20568    CEFBS_None, // ADDZE8O = 404
20569    CEFBS_None, // ADDZE8O_rec = 405
20570    CEFBS_None, // ADDZE8_rec = 406
20571    CEFBS_None, // ADDZEO = 407
20572    CEFBS_None, // ADDZEO_rec = 408
20573    CEFBS_None, // ADDZE_rec = 409
20574    CEFBS_None, // ADJCALLSTACKDOWN = 410
20575    CEFBS_None, // ADJCALLSTACKUP = 411
20576    CEFBS_None, // AND = 412
20577    CEFBS_None, // AND8 = 413
20578    CEFBS_None, // AND8_rec = 414
20579    CEFBS_None, // ANDC = 415
20580    CEFBS_None, // ANDC8 = 416
20581    CEFBS_None, // ANDC8_rec = 417
20582    CEFBS_None, // ANDC_rec = 418
20583    CEFBS_None, // ANDI8_rec = 419
20584    CEFBS_None, // ANDIS8_rec = 420
20585    CEFBS_None, // ANDIS_rec = 421
20586    CEFBS_None, // ANDI_rec = 422
20587    CEFBS_None, // ANDI_rec_1_EQ_BIT = 423
20588    CEFBS_None, // ANDI_rec_1_EQ_BIT8 = 424
20589    CEFBS_None, // ANDI_rec_1_GT_BIT = 425
20590    CEFBS_None, // ANDI_rec_1_GT_BIT8 = 426
20591    CEFBS_None, // AND_rec = 427
20592    CEFBS_None, // ATOMIC_CMP_SWAP_I16 = 428
20593    CEFBS_None, // ATOMIC_CMP_SWAP_I32 = 429
20594    CEFBS_None, // ATOMIC_CMP_SWAP_I64 = 430
20595    CEFBS_None, // ATOMIC_CMP_SWAP_I8 = 431
20596    CEFBS_None, // ATOMIC_LOAD_ADD_I16 = 432
20597    CEFBS_None, // ATOMIC_LOAD_ADD_I32 = 433
20598    CEFBS_None, // ATOMIC_LOAD_ADD_I64 = 434
20599    CEFBS_None, // ATOMIC_LOAD_ADD_I8 = 435
20600    CEFBS_None, // ATOMIC_LOAD_AND_I16 = 436
20601    CEFBS_None, // ATOMIC_LOAD_AND_I32 = 437
20602    CEFBS_None, // ATOMIC_LOAD_AND_I64 = 438
20603    CEFBS_None, // ATOMIC_LOAD_AND_I8 = 439
20604    CEFBS_None, // ATOMIC_LOAD_MAX_I16 = 440
20605    CEFBS_None, // ATOMIC_LOAD_MAX_I32 = 441
20606    CEFBS_None, // ATOMIC_LOAD_MAX_I64 = 442
20607    CEFBS_None, // ATOMIC_LOAD_MAX_I8 = 443
20608    CEFBS_None, // ATOMIC_LOAD_MIN_I16 = 444
20609    CEFBS_None, // ATOMIC_LOAD_MIN_I32 = 445
20610    CEFBS_None, // ATOMIC_LOAD_MIN_I64 = 446
20611    CEFBS_None, // ATOMIC_LOAD_MIN_I8 = 447
20612    CEFBS_None, // ATOMIC_LOAD_NAND_I16 = 448
20613    CEFBS_None, // ATOMIC_LOAD_NAND_I32 = 449
20614    CEFBS_None, // ATOMIC_LOAD_NAND_I64 = 450
20615    CEFBS_None, // ATOMIC_LOAD_NAND_I8 = 451
20616    CEFBS_None, // ATOMIC_LOAD_OR_I16 = 452
20617    CEFBS_None, // ATOMIC_LOAD_OR_I32 = 453
20618    CEFBS_None, // ATOMIC_LOAD_OR_I64 = 454
20619    CEFBS_None, // ATOMIC_LOAD_OR_I8 = 455
20620    CEFBS_None, // ATOMIC_LOAD_SUB_I16 = 456
20621    CEFBS_None, // ATOMIC_LOAD_SUB_I32 = 457
20622    CEFBS_None, // ATOMIC_LOAD_SUB_I64 = 458
20623    CEFBS_None, // ATOMIC_LOAD_SUB_I8 = 459
20624    CEFBS_None, // ATOMIC_LOAD_UMAX_I16 = 460
20625    CEFBS_None, // ATOMIC_LOAD_UMAX_I32 = 461
20626    CEFBS_None, // ATOMIC_LOAD_UMAX_I64 = 462
20627    CEFBS_None, // ATOMIC_LOAD_UMAX_I8 = 463
20628    CEFBS_None, // ATOMIC_LOAD_UMIN_I16 = 464
20629    CEFBS_None, // ATOMIC_LOAD_UMIN_I32 = 465
20630    CEFBS_None, // ATOMIC_LOAD_UMIN_I64 = 466
20631    CEFBS_None, // ATOMIC_LOAD_UMIN_I8 = 467
20632    CEFBS_None, // ATOMIC_LOAD_XOR_I16 = 468
20633    CEFBS_None, // ATOMIC_LOAD_XOR_I32 = 469
20634    CEFBS_None, // ATOMIC_LOAD_XOR_I64 = 470
20635    CEFBS_None, // ATOMIC_LOAD_XOR_I8 = 471
20636    CEFBS_None, // ATOMIC_SWAP_I16 = 472
20637    CEFBS_None, // ATOMIC_SWAP_I32 = 473
20638    CEFBS_None, // ATOMIC_SWAP_I64 = 474
20639    CEFBS_None, // ATOMIC_SWAP_I8 = 475
20640    CEFBS_None, // ATTN = 476
20641    CEFBS_None, // B = 477
20642    CEFBS_None, // BA = 478
20643    CEFBS_None, // BC = 479
20644    CEFBS_None, // BCC = 480
20645    CEFBS_None, // BCCA = 481
20646    CEFBS_None, // BCCCTR = 482
20647    CEFBS_None, // BCCCTR8 = 483
20648    CEFBS_None, // BCCCTRL = 484
20649    CEFBS_None, // BCCCTRL8 = 485
20650    CEFBS_None, // BCCL = 486
20651    CEFBS_None, // BCCLA = 487
20652    CEFBS_None, // BCCLR = 488
20653    CEFBS_None, // BCCLRL = 489
20654    CEFBS_None, // BCCTR = 490
20655    CEFBS_None, // BCCTR8 = 491
20656    CEFBS_None, // BCCTR8n = 492
20657    CEFBS_None, // BCCTRL = 493
20658    CEFBS_None, // BCCTRL8 = 494
20659    CEFBS_None, // BCCTRL8n = 495
20660    CEFBS_None, // BCCTRLn = 496
20661    CEFBS_None, // BCCTRn = 497
20662    CEFBS_None, // BCDADD_rec = 498
20663    CEFBS_None, // BCDCFN_rec = 499
20664    CEFBS_None, // BCDCFSQ_rec = 500
20665    CEFBS_None, // BCDCFZ_rec = 501
20666    CEFBS_None, // BCDCPSGN_rec = 502
20667    CEFBS_None, // BCDCTN_rec = 503
20668    CEFBS_None, // BCDCTSQ_rec = 504
20669    CEFBS_None, // BCDCTZ_rec = 505
20670    CEFBS_None, // BCDSETSGN_rec = 506
20671    CEFBS_None, // BCDSR_rec = 507
20672    CEFBS_None, // BCDSUB_rec = 508
20673    CEFBS_None, // BCDS_rec = 509
20674    CEFBS_None, // BCDTRUNC_rec = 510
20675    CEFBS_None, // BCDUS_rec = 511
20676    CEFBS_None, // BCDUTRUNC_rec = 512
20677    CEFBS_None, // BCL = 513
20678    CEFBS_None, // BCLR = 514
20679    CEFBS_None, // BCLRL = 515
20680    CEFBS_None, // BCLRLn = 516
20681    CEFBS_None, // BCLRn = 517
20682    CEFBS_None, // BCLalways = 518
20683    CEFBS_None, // BCLn = 519
20684    CEFBS_None, // BCTR = 520
20685    CEFBS_None, // BCTR8 = 521
20686    CEFBS_None, // BCTRL = 522
20687    CEFBS_None, // BCTRL8 = 523
20688    CEFBS_None, // BCTRL8_LDinto_toc = 524
20689    CEFBS_None, // BCTRL8_LDinto_toc_RM = 525
20690    CEFBS_None, // BCTRL8_RM = 526
20691    CEFBS_None, // BCTRL_LWZinto_toc = 527
20692    CEFBS_None, // BCTRL_LWZinto_toc_RM = 528
20693    CEFBS_None, // BCTRL_RM = 529
20694    CEFBS_None, // BCn = 530
20695    CEFBS_None, // BDNZ = 531
20696    CEFBS_None, // BDNZ8 = 532
20697    CEFBS_None, // BDNZA = 533
20698    CEFBS_None, // BDNZAm = 534
20699    CEFBS_None, // BDNZAp = 535
20700    CEFBS_None, // BDNZL = 536
20701    CEFBS_None, // BDNZLA = 537
20702    CEFBS_None, // BDNZLAm = 538
20703    CEFBS_None, // BDNZLAp = 539
20704    CEFBS_None, // BDNZLR = 540
20705    CEFBS_None, // BDNZLR8 = 541
20706    CEFBS_None, // BDNZLRL = 542
20707    CEFBS_None, // BDNZLRLm = 543
20708    CEFBS_None, // BDNZLRLp = 544
20709    CEFBS_None, // BDNZLRm = 545
20710    CEFBS_None, // BDNZLRp = 546
20711    CEFBS_None, // BDNZLm = 547
20712    CEFBS_None, // BDNZLp = 548
20713    CEFBS_None, // BDNZm = 549
20714    CEFBS_None, // BDNZp = 550
20715    CEFBS_None, // BDZ = 551
20716    CEFBS_None, // BDZ8 = 552
20717    CEFBS_None, // BDZA = 553
20718    CEFBS_None, // BDZAm = 554
20719    CEFBS_None, // BDZAp = 555
20720    CEFBS_None, // BDZL = 556
20721    CEFBS_None, // BDZLA = 557
20722    CEFBS_None, // BDZLAm = 558
20723    CEFBS_None, // BDZLAp = 559
20724    CEFBS_None, // BDZLR = 560
20725    CEFBS_None, // BDZLR8 = 561
20726    CEFBS_None, // BDZLRL = 562
20727    CEFBS_None, // BDZLRLm = 563
20728    CEFBS_None, // BDZLRLp = 564
20729    CEFBS_None, // BDZLRm = 565
20730    CEFBS_None, // BDZLRp = 566
20731    CEFBS_None, // BDZLm = 567
20732    CEFBS_None, // BDZLp = 568
20733    CEFBS_None, // BDZm = 569
20734    CEFBS_None, // BDZp = 570
20735    CEFBS_None, // BL = 571
20736    CEFBS_None, // BL8 = 572
20737    CEFBS_None, // BL8_NOP = 573
20738    CEFBS_None, // BL8_NOP_RM = 574
20739    CEFBS_None, // BL8_NOP_TLS = 575
20740    CEFBS_None, // BL8_NOTOC = 576
20741    CEFBS_None, // BL8_NOTOC_RM = 577
20742    CEFBS_None, // BL8_NOTOC_TLS = 578
20743    CEFBS_None, // BL8_RM = 579
20744    CEFBS_None, // BL8_TLS = 580
20745    CEFBS_None, // BL8_TLS_ = 581
20746    CEFBS_None, // BLA = 582
20747    CEFBS_None, // BLA8 = 583
20748    CEFBS_None, // BLA8_NOP = 584
20749    CEFBS_None, // BLA8_NOP_RM = 585
20750    CEFBS_None, // BLA8_RM = 586
20751    CEFBS_None, // BLA_RM = 587
20752    CEFBS_None, // BLR = 588
20753    CEFBS_None, // BLR8 = 589
20754    CEFBS_None, // BLRL = 590
20755    CEFBS_None, // BL_NOP = 591
20756    CEFBS_None, // BL_NOP_RM = 592
20757    CEFBS_None, // BL_RM = 593
20758    CEFBS_None, // BL_TLS = 594
20759    CEFBS_None, // BPERMD = 595
20760    CEFBS_None, // BRD = 596
20761    CEFBS_None, // BRH = 597
20762    CEFBS_None, // BRH8 = 598
20763    CEFBS_None, // BRINC = 599
20764    CEFBS_None, // BRW = 600
20765    CEFBS_None, // BRW8 = 601
20766    CEFBS_None, // CFUGED = 602
20767    CEFBS_None, // CLRBHRB = 603
20768    CEFBS_None, // CMPB = 604
20769    CEFBS_None, // CMPB8 = 605
20770    CEFBS_None, // CMPD = 606
20771    CEFBS_None, // CMPDI = 607
20772    CEFBS_None, // CMPEQB = 608
20773    CEFBS_None, // CMPLD = 609
20774    CEFBS_None, // CMPLDI = 610
20775    CEFBS_None, // CMPLW = 611
20776    CEFBS_None, // CMPLWI = 612
20777    CEFBS_None, // CMPRB = 613
20778    CEFBS_None, // CMPRB8 = 614
20779    CEFBS_None, // CMPW = 615
20780    CEFBS_None, // CMPWI = 616
20781    CEFBS_None, // CNTLZD = 617
20782    CEFBS_None, // CNTLZDM = 618
20783    CEFBS_None, // CNTLZD_rec = 619
20784    CEFBS_None, // CNTLZW = 620
20785    CEFBS_None, // CNTLZW8 = 621
20786    CEFBS_None, // CNTLZW8_rec = 622
20787    CEFBS_None, // CNTLZW_rec = 623
20788    CEFBS_None, // CNTTZD = 624
20789    CEFBS_None, // CNTTZDM = 625
20790    CEFBS_None, // CNTTZD_rec = 626
20791    CEFBS_None, // CNTTZW = 627
20792    CEFBS_None, // CNTTZW8 = 628
20793    CEFBS_None, // CNTTZW8_rec = 629
20794    CEFBS_None, // CNTTZW_rec = 630
20795    CEFBS_None, // CP_ABORT = 631
20796    CEFBS_None, // CP_COPY = 632
20797    CEFBS_None, // CP_COPY8 = 633
20798    CEFBS_None, // CP_PASTE8_rec = 634
20799    CEFBS_None, // CP_PASTE_rec = 635
20800    CEFBS_None, // CR6SET = 636
20801    CEFBS_None, // CR6UNSET = 637
20802    CEFBS_None, // CRAND = 638
20803    CEFBS_None, // CRANDC = 639
20804    CEFBS_None, // CREQV = 640
20805    CEFBS_None, // CRNAND = 641
20806    CEFBS_None, // CRNOR = 642
20807    CEFBS_None, // CRNOT = 643
20808    CEFBS_None, // CROR = 644
20809    CEFBS_None, // CRORC = 645
20810    CEFBS_None, // CRSET = 646
20811    CEFBS_None, // CRUNSET = 647
20812    CEFBS_None, // CRXOR = 648
20813    CEFBS_None, // CTRL_DEP = 649
20814    CEFBS_None, // DARN = 650
20815    CEFBS_None, // DCBA = 651
20816    CEFBS_None, // DCBF = 652
20817    CEFBS_None, // DCBFEP = 653
20818    CEFBS_None, // DCBI = 654
20819    CEFBS_None, // DCBST = 655
20820    CEFBS_None, // DCBSTEP = 656
20821    CEFBS_None, // DCBT = 657
20822    CEFBS_None, // DCBTEP = 658
20823    CEFBS_None, // DCBTST = 659
20824    CEFBS_None, // DCBTSTEP = 660
20825    CEFBS_None, // DCBZ = 661
20826    CEFBS_None, // DCBZEP = 662
20827    CEFBS_None, // DCBZL = 663
20828    CEFBS_None, // DCBZLEP = 664
20829    CEFBS_None, // DCCCI = 665
20830    CEFBS_None, // DIVD = 666
20831    CEFBS_None, // DIVDE = 667
20832    CEFBS_None, // DIVDEO = 668
20833    CEFBS_None, // DIVDEO_rec = 669
20834    CEFBS_None, // DIVDEU = 670
20835    CEFBS_None, // DIVDEUO = 671
20836    CEFBS_None, // DIVDEUO_rec = 672
20837    CEFBS_None, // DIVDEU_rec = 673
20838    CEFBS_None, // DIVDE_rec = 674
20839    CEFBS_None, // DIVDO = 675
20840    CEFBS_None, // DIVDO_rec = 676
20841    CEFBS_None, // DIVDU = 677
20842    CEFBS_None, // DIVDUO = 678
20843    CEFBS_None, // DIVDUO_rec = 679
20844    CEFBS_None, // DIVDU_rec = 680
20845    CEFBS_None, // DIVD_rec = 681
20846    CEFBS_None, // DIVW = 682
20847    CEFBS_None, // DIVWE = 683
20848    CEFBS_None, // DIVWEO = 684
20849    CEFBS_None, // DIVWEO_rec = 685
20850    CEFBS_None, // DIVWEU = 686
20851    CEFBS_None, // DIVWEUO = 687
20852    CEFBS_None, // DIVWEUO_rec = 688
20853    CEFBS_None, // DIVWEU_rec = 689
20854    CEFBS_None, // DIVWE_rec = 690
20855    CEFBS_None, // DIVWO = 691
20856    CEFBS_None, // DIVWO_rec = 692
20857    CEFBS_None, // DIVWU = 693
20858    CEFBS_None, // DIVWUO = 694
20859    CEFBS_None, // DIVWUO_rec = 695
20860    CEFBS_None, // DIVWU_rec = 696
20861    CEFBS_None, // DIVW_rec = 697
20862    CEFBS_None, // DMMR = 698
20863    CEFBS_None, // DMSETDMRZ = 699
20864    CEFBS_None, // DMXOR = 700
20865    CEFBS_None, // DMXXEXTFDMR256 = 701
20866    CEFBS_None, // DMXXEXTFDMR512 = 702
20867    CEFBS_None, // DMXXEXTFDMR512_HI = 703
20868    CEFBS_None, // DMXXINSTFDMR256 = 704
20869    CEFBS_None, // DMXXINSTFDMR512 = 705
20870    CEFBS_None, // DMXXINSTFDMR512_HI = 706
20871    CEFBS_None, // DSS = 707
20872    CEFBS_None, // DSSALL = 708
20873    CEFBS_None, // DST = 709
20874    CEFBS_None, // DST64 = 710
20875    CEFBS_None, // DSTST = 711
20876    CEFBS_None, // DSTST64 = 712
20877    CEFBS_None, // DSTSTT = 713
20878    CEFBS_None, // DSTSTT64 = 714
20879    CEFBS_None, // DSTT = 715
20880    CEFBS_None, // DSTT64 = 716
20881    CEFBS_None, // DYNALLOC = 717
20882    CEFBS_None, // DYNALLOC8 = 718
20883    CEFBS_None, // DYNAREAOFFSET = 719
20884    CEFBS_None, // DYNAREAOFFSET8 = 720
20885    CEFBS_None, // DecreaseCTR8loop = 721
20886    CEFBS_None, // DecreaseCTRloop = 722
20887    CEFBS_None, // EFDABS = 723
20888    CEFBS_None, // EFDADD = 724
20889    CEFBS_None, // EFDCFS = 725
20890    CEFBS_None, // EFDCFSF = 726
20891    CEFBS_None, // EFDCFSI = 727
20892    CEFBS_None, // EFDCFSID = 728
20893    CEFBS_None, // EFDCFUF = 729
20894    CEFBS_None, // EFDCFUI = 730
20895    CEFBS_None, // EFDCFUID = 731
20896    CEFBS_None, // EFDCMPEQ = 732
20897    CEFBS_None, // EFDCMPGT = 733
20898    CEFBS_None, // EFDCMPLT = 734
20899    CEFBS_None, // EFDCTSF = 735
20900    CEFBS_None, // EFDCTSI = 736
20901    CEFBS_None, // EFDCTSIDZ = 737
20902    CEFBS_None, // EFDCTSIZ = 738
20903    CEFBS_None, // EFDCTUF = 739
20904    CEFBS_None, // EFDCTUI = 740
20905    CEFBS_None, // EFDCTUIDZ = 741
20906    CEFBS_None, // EFDCTUIZ = 742
20907    CEFBS_None, // EFDDIV = 743
20908    CEFBS_None, // EFDMUL = 744
20909    CEFBS_None, // EFDNABS = 745
20910    CEFBS_None, // EFDNEG = 746
20911    CEFBS_None, // EFDSUB = 747
20912    CEFBS_None, // EFDTSTEQ = 748
20913    CEFBS_None, // EFDTSTGT = 749
20914    CEFBS_None, // EFDTSTLT = 750
20915    CEFBS_None, // EFSABS = 751
20916    CEFBS_None, // EFSADD = 752
20917    CEFBS_None, // EFSCFD = 753
20918    CEFBS_None, // EFSCFSF = 754
20919    CEFBS_None, // EFSCFSI = 755
20920    CEFBS_None, // EFSCFUF = 756
20921    CEFBS_None, // EFSCFUI = 757
20922    CEFBS_None, // EFSCMPEQ = 758
20923    CEFBS_None, // EFSCMPGT = 759
20924    CEFBS_None, // EFSCMPLT = 760
20925    CEFBS_None, // EFSCTSF = 761
20926    CEFBS_None, // EFSCTSI = 762
20927    CEFBS_None, // EFSCTSIZ = 763
20928    CEFBS_None, // EFSCTUF = 764
20929    CEFBS_None, // EFSCTUI = 765
20930    CEFBS_None, // EFSCTUIZ = 766
20931    CEFBS_None, // EFSDIV = 767
20932    CEFBS_None, // EFSMUL = 768
20933    CEFBS_None, // EFSNABS = 769
20934    CEFBS_None, // EFSNEG = 770
20935    CEFBS_None, // EFSSUB = 771
20936    CEFBS_None, // EFSTSTEQ = 772
20937    CEFBS_None, // EFSTSTGT = 773
20938    CEFBS_None, // EFSTSTLT = 774
20939    CEFBS_None, // EH_SjLj_LongJmp32 = 775
20940    CEFBS_None, // EH_SjLj_LongJmp64 = 776
20941    CEFBS_None, // EH_SjLj_SetJmp32 = 777
20942    CEFBS_None, // EH_SjLj_SetJmp64 = 778
20943    CEFBS_None, // EH_SjLj_Setup = 779
20944    CEFBS_None, // EQV = 780
20945    CEFBS_None, // EQV8 = 781
20946    CEFBS_None, // EQV8_rec = 782
20947    CEFBS_None, // EQV_rec = 783
20948    CEFBS_None, // EVABS = 784
20949    CEFBS_None, // EVADDIW = 785
20950    CEFBS_None, // EVADDSMIAAW = 786
20951    CEFBS_None, // EVADDSSIAAW = 787
20952    CEFBS_None, // EVADDUMIAAW = 788
20953    CEFBS_None, // EVADDUSIAAW = 789
20954    CEFBS_None, // EVADDW = 790
20955    CEFBS_None, // EVAND = 791
20956    CEFBS_None, // EVANDC = 792
20957    CEFBS_None, // EVCMPEQ = 793
20958    CEFBS_None, // EVCMPGTS = 794
20959    CEFBS_None, // EVCMPGTU = 795
20960    CEFBS_None, // EVCMPLTS = 796
20961    CEFBS_None, // EVCMPLTU = 797
20962    CEFBS_None, // EVCNTLSW = 798
20963    CEFBS_None, // EVCNTLZW = 799
20964    CEFBS_None, // EVDIVWS = 800
20965    CEFBS_None, // EVDIVWU = 801
20966    CEFBS_None, // EVEQV = 802
20967    CEFBS_None, // EVEXTSB = 803
20968    CEFBS_None, // EVEXTSH = 804
20969    CEFBS_None, // EVFSABS = 805
20970    CEFBS_None, // EVFSADD = 806
20971    CEFBS_None, // EVFSCFSF = 807
20972    CEFBS_None, // EVFSCFSI = 808
20973    CEFBS_None, // EVFSCFUF = 809
20974    CEFBS_None, // EVFSCFUI = 810
20975    CEFBS_None, // EVFSCMPEQ = 811
20976    CEFBS_None, // EVFSCMPGT = 812
20977    CEFBS_None, // EVFSCMPLT = 813
20978    CEFBS_None, // EVFSCTSF = 814
20979    CEFBS_None, // EVFSCTSI = 815
20980    CEFBS_None, // EVFSCTSIZ = 816
20981    CEFBS_None, // EVFSCTUF = 817
20982    CEFBS_None, // EVFSCTUI = 818
20983    CEFBS_None, // EVFSCTUIZ = 819
20984    CEFBS_None, // EVFSDIV = 820
20985    CEFBS_None, // EVFSMUL = 821
20986    CEFBS_None, // EVFSNABS = 822
20987    CEFBS_None, // EVFSNEG = 823
20988    CEFBS_None, // EVFSSUB = 824
20989    CEFBS_None, // EVFSTSTEQ = 825
20990    CEFBS_None, // EVFSTSTGT = 826
20991    CEFBS_None, // EVFSTSTLT = 827
20992    CEFBS_None, // EVLDD = 828
20993    CEFBS_None, // EVLDDX = 829
20994    CEFBS_None, // EVLDH = 830
20995    CEFBS_None, // EVLDHX = 831
20996    CEFBS_None, // EVLDW = 832
20997    CEFBS_None, // EVLDWX = 833
20998    CEFBS_None, // EVLHHESPLAT = 834
20999    CEFBS_None, // EVLHHESPLATX = 835
21000    CEFBS_None, // EVLHHOSSPLAT = 836
21001    CEFBS_None, // EVLHHOSSPLATX = 837
21002    CEFBS_None, // EVLHHOUSPLAT = 838
21003    CEFBS_None, // EVLHHOUSPLATX = 839
21004    CEFBS_None, // EVLWHE = 840
21005    CEFBS_None, // EVLWHEX = 841
21006    CEFBS_None, // EVLWHOS = 842
21007    CEFBS_None, // EVLWHOSX = 843
21008    CEFBS_None, // EVLWHOU = 844
21009    CEFBS_None, // EVLWHOUX = 845
21010    CEFBS_None, // EVLWHSPLAT = 846
21011    CEFBS_None, // EVLWHSPLATX = 847
21012    CEFBS_None, // EVLWWSPLAT = 848
21013    CEFBS_None, // EVLWWSPLATX = 849
21014    CEFBS_None, // EVMERGEHI = 850
21015    CEFBS_None, // EVMERGEHILO = 851
21016    CEFBS_None, // EVMERGELO = 852
21017    CEFBS_None, // EVMERGELOHI = 853
21018    CEFBS_None, // EVMHEGSMFAA = 854
21019    CEFBS_None, // EVMHEGSMFAN = 855
21020    CEFBS_None, // EVMHEGSMIAA = 856
21021    CEFBS_None, // EVMHEGSMIAN = 857
21022    CEFBS_None, // EVMHEGUMIAA = 858
21023    CEFBS_None, // EVMHEGUMIAN = 859
21024    CEFBS_None, // EVMHESMF = 860
21025    CEFBS_None, // EVMHESMFA = 861
21026    CEFBS_None, // EVMHESMFAAW = 862
21027    CEFBS_None, // EVMHESMFANW = 863
21028    CEFBS_None, // EVMHESMI = 864
21029    CEFBS_None, // EVMHESMIA = 865
21030    CEFBS_None, // EVMHESMIAAW = 866
21031    CEFBS_None, // EVMHESMIANW = 867
21032    CEFBS_None, // EVMHESSF = 868
21033    CEFBS_None, // EVMHESSFA = 869
21034    CEFBS_None, // EVMHESSFAAW = 870
21035    CEFBS_None, // EVMHESSFANW = 871
21036    CEFBS_None, // EVMHESSIAAW = 872
21037    CEFBS_None, // EVMHESSIANW = 873
21038    CEFBS_None, // EVMHEUMI = 874
21039    CEFBS_None, // EVMHEUMIA = 875
21040    CEFBS_None, // EVMHEUMIAAW = 876
21041    CEFBS_None, // EVMHEUMIANW = 877
21042    CEFBS_None, // EVMHEUSIAAW = 878
21043    CEFBS_None, // EVMHEUSIANW = 879
21044    CEFBS_None, // EVMHOGSMFAA = 880
21045    CEFBS_None, // EVMHOGSMFAN = 881
21046    CEFBS_None, // EVMHOGSMIAA = 882
21047    CEFBS_None, // EVMHOGSMIAN = 883
21048    CEFBS_None, // EVMHOGUMIAA = 884
21049    CEFBS_None, // EVMHOGUMIAN = 885
21050    CEFBS_None, // EVMHOSMF = 886
21051    CEFBS_None, // EVMHOSMFA = 887
21052    CEFBS_None, // EVMHOSMFAAW = 888
21053    CEFBS_None, // EVMHOSMFANW = 889
21054    CEFBS_None, // EVMHOSMI = 890
21055    CEFBS_None, // EVMHOSMIA = 891
21056    CEFBS_None, // EVMHOSMIAAW = 892
21057    CEFBS_None, // EVMHOSMIANW = 893
21058    CEFBS_None, // EVMHOSSF = 894
21059    CEFBS_None, // EVMHOSSFA = 895
21060    CEFBS_None, // EVMHOSSFAAW = 896
21061    CEFBS_None, // EVMHOSSFANW = 897
21062    CEFBS_None, // EVMHOSSIAAW = 898
21063    CEFBS_None, // EVMHOSSIANW = 899
21064    CEFBS_None, // EVMHOUMI = 900
21065    CEFBS_None, // EVMHOUMIA = 901
21066    CEFBS_None, // EVMHOUMIAAW = 902
21067    CEFBS_None, // EVMHOUMIANW = 903
21068    CEFBS_None, // EVMHOUSIAAW = 904
21069    CEFBS_None, // EVMHOUSIANW = 905
21070    CEFBS_None, // EVMRA = 906
21071    CEFBS_None, // EVMWHSMF = 907
21072    CEFBS_None, // EVMWHSMFA = 908
21073    CEFBS_None, // EVMWHSMI = 909
21074    CEFBS_None, // EVMWHSMIA = 910
21075    CEFBS_None, // EVMWHSSF = 911
21076    CEFBS_None, // EVMWHSSFA = 912
21077    CEFBS_None, // EVMWHUMI = 913
21078    CEFBS_None, // EVMWHUMIA = 914
21079    CEFBS_None, // EVMWLSMIAAW = 915
21080    CEFBS_None, // EVMWLSMIANW = 916
21081    CEFBS_None, // EVMWLSSIAAW = 917
21082    CEFBS_None, // EVMWLSSIANW = 918
21083    CEFBS_None, // EVMWLUMI = 919
21084    CEFBS_None, // EVMWLUMIA = 920
21085    CEFBS_None, // EVMWLUMIAAW = 921
21086    CEFBS_None, // EVMWLUMIANW = 922
21087    CEFBS_None, // EVMWLUSIAAW = 923
21088    CEFBS_None, // EVMWLUSIANW = 924
21089    CEFBS_None, // EVMWSMF = 925
21090    CEFBS_None, // EVMWSMFA = 926
21091    CEFBS_None, // EVMWSMFAA = 927
21092    CEFBS_None, // EVMWSMFAN = 928
21093    CEFBS_None, // EVMWSMI = 929
21094    CEFBS_None, // EVMWSMIA = 930
21095    CEFBS_None, // EVMWSMIAA = 931
21096    CEFBS_None, // EVMWSMIAN = 932
21097    CEFBS_None, // EVMWSSF = 933
21098    CEFBS_None, // EVMWSSFA = 934
21099    CEFBS_None, // EVMWSSFAA = 935
21100    CEFBS_None, // EVMWSSFAN = 936
21101    CEFBS_None, // EVMWUMI = 937
21102    CEFBS_None, // EVMWUMIA = 938
21103    CEFBS_None, // EVMWUMIAA = 939
21104    CEFBS_None, // EVMWUMIAN = 940
21105    CEFBS_None, // EVNAND = 941
21106    CEFBS_None, // EVNEG = 942
21107    CEFBS_None, // EVNOR = 943
21108    CEFBS_None, // EVOR = 944
21109    CEFBS_None, // EVORC = 945
21110    CEFBS_None, // EVRLW = 946
21111    CEFBS_None, // EVRLWI = 947
21112    CEFBS_None, // EVRNDW = 948
21113    CEFBS_None, // EVSEL = 949
21114    CEFBS_None, // EVSLW = 950
21115    CEFBS_None, // EVSLWI = 951
21116    CEFBS_None, // EVSPLATFI = 952
21117    CEFBS_None, // EVSPLATI = 953
21118    CEFBS_None, // EVSRWIS = 954
21119    CEFBS_None, // EVSRWIU = 955
21120    CEFBS_None, // EVSRWS = 956
21121    CEFBS_None, // EVSRWU = 957
21122    CEFBS_None, // EVSTDD = 958
21123    CEFBS_None, // EVSTDDX = 959
21124    CEFBS_None, // EVSTDH = 960
21125    CEFBS_None, // EVSTDHX = 961
21126    CEFBS_None, // EVSTDW = 962
21127    CEFBS_None, // EVSTDWX = 963
21128    CEFBS_None, // EVSTWHE = 964
21129    CEFBS_None, // EVSTWHEX = 965
21130    CEFBS_None, // EVSTWHO = 966
21131    CEFBS_None, // EVSTWHOX = 967
21132    CEFBS_None, // EVSTWWE = 968
21133    CEFBS_None, // EVSTWWEX = 969
21134    CEFBS_None, // EVSTWWO = 970
21135    CEFBS_None, // EVSTWWOX = 971
21136    CEFBS_None, // EVSUBFSMIAAW = 972
21137    CEFBS_None, // EVSUBFSSIAAW = 973
21138    CEFBS_None, // EVSUBFUMIAAW = 974
21139    CEFBS_None, // EVSUBFUSIAAW = 975
21140    CEFBS_None, // EVSUBFW = 976
21141    CEFBS_None, // EVSUBIFW = 977
21142    CEFBS_None, // EVXOR = 978
21143    CEFBS_None, // EXTSB = 979
21144    CEFBS_None, // EXTSB8 = 980
21145    CEFBS_None, // EXTSB8_32_64 = 981
21146    CEFBS_None, // EXTSB8_rec = 982
21147    CEFBS_None, // EXTSB_rec = 983
21148    CEFBS_None, // EXTSH = 984
21149    CEFBS_None, // EXTSH8 = 985
21150    CEFBS_None, // EXTSH8_32_64 = 986
21151    CEFBS_None, // EXTSH8_rec = 987
21152    CEFBS_None, // EXTSH_rec = 988
21153    CEFBS_None, // EXTSW = 989
21154    CEFBS_None, // EXTSWSLI = 990
21155    CEFBS_None, // EXTSWSLI_32_64 = 991
21156    CEFBS_None, // EXTSWSLI_32_64_rec = 992
21157    CEFBS_None, // EXTSWSLI_rec = 993
21158    CEFBS_None, // EXTSW_32 = 994
21159    CEFBS_None, // EXTSW_32_64 = 995
21160    CEFBS_None, // EXTSW_32_64_rec = 996
21161    CEFBS_None, // EXTSW_rec = 997
21162    CEFBS_None, // EnforceIEIO = 998
21163    CEFBS_None, // FABSD = 999
21164    CEFBS_None, // FABSD_rec = 1000
21165    CEFBS_None, // FABSS = 1001
21166    CEFBS_None, // FABSS_rec = 1002
21167    CEFBS_None, // FADD = 1003
21168    CEFBS_None, // FADDS = 1004
21169    CEFBS_None, // FADDS_rec = 1005
21170    CEFBS_None, // FADD_rec = 1006
21171    CEFBS_None, // FADDrtz = 1007
21172    CEFBS_None, // FCFID = 1008
21173    CEFBS_None, // FCFIDS = 1009
21174    CEFBS_None, // FCFIDS_rec = 1010
21175    CEFBS_None, // FCFIDU = 1011
21176    CEFBS_None, // FCFIDUS = 1012
21177    CEFBS_None, // FCFIDUS_rec = 1013
21178    CEFBS_None, // FCFIDU_rec = 1014
21179    CEFBS_None, // FCFID_rec = 1015
21180    CEFBS_None, // FCMPOD = 1016
21181    CEFBS_None, // FCMPOS = 1017
21182    CEFBS_None, // FCMPUD = 1018
21183    CEFBS_None, // FCMPUS = 1019
21184    CEFBS_None, // FCPSGND = 1020
21185    CEFBS_None, // FCPSGND_rec = 1021
21186    CEFBS_None, // FCPSGNS = 1022
21187    CEFBS_None, // FCPSGNS_rec = 1023
21188    CEFBS_None, // FCTID = 1024
21189    CEFBS_None, // FCTIDU = 1025
21190    CEFBS_None, // FCTIDUZ = 1026
21191    CEFBS_None, // FCTIDUZ_rec = 1027
21192    CEFBS_None, // FCTIDU_rec = 1028
21193    CEFBS_None, // FCTIDZ = 1029
21194    CEFBS_None, // FCTIDZ_rec = 1030
21195    CEFBS_None, // FCTID_rec = 1031
21196    CEFBS_None, // FCTIW = 1032
21197    CEFBS_None, // FCTIWU = 1033
21198    CEFBS_None, // FCTIWUZ = 1034
21199    CEFBS_None, // FCTIWUZ_rec = 1035
21200    CEFBS_None, // FCTIWU_rec = 1036
21201    CEFBS_None, // FCTIWZ = 1037
21202    CEFBS_None, // FCTIWZ_rec = 1038
21203    CEFBS_None, // FCTIW_rec = 1039
21204    CEFBS_None, // FDIV = 1040
21205    CEFBS_None, // FDIVS = 1041
21206    CEFBS_None, // FDIVS_rec = 1042
21207    CEFBS_None, // FDIV_rec = 1043
21208    CEFBS_None, // FMADD = 1044
21209    CEFBS_None, // FMADDS = 1045
21210    CEFBS_None, // FMADDS_rec = 1046
21211    CEFBS_None, // FMADD_rec = 1047
21212    CEFBS_None, // FMR = 1048
21213    CEFBS_None, // FMR_rec = 1049
21214    CEFBS_None, // FMSUB = 1050
21215    CEFBS_None, // FMSUBS = 1051
21216    CEFBS_None, // FMSUBS_rec = 1052
21217    CEFBS_None, // FMSUB_rec = 1053
21218    CEFBS_None, // FMUL = 1054
21219    CEFBS_None, // FMULS = 1055
21220    CEFBS_None, // FMULS_rec = 1056
21221    CEFBS_None, // FMUL_rec = 1057
21222    CEFBS_None, // FNABSD = 1058
21223    CEFBS_None, // FNABSD_rec = 1059
21224    CEFBS_None, // FNABSS = 1060
21225    CEFBS_None, // FNABSS_rec = 1061
21226    CEFBS_None, // FNEGD = 1062
21227    CEFBS_None, // FNEGD_rec = 1063
21228    CEFBS_None, // FNEGS = 1064
21229    CEFBS_None, // FNEGS_rec = 1065
21230    CEFBS_None, // FNMADD = 1066
21231    CEFBS_None, // FNMADDS = 1067
21232    CEFBS_None, // FNMADDS_rec = 1068
21233    CEFBS_None, // FNMADD_rec = 1069
21234    CEFBS_None, // FNMSUB = 1070
21235    CEFBS_None, // FNMSUBS = 1071
21236    CEFBS_None, // FNMSUBS_rec = 1072
21237    CEFBS_None, // FNMSUB_rec = 1073
21238    CEFBS_None, // FRE = 1074
21239    CEFBS_None, // FRES = 1075
21240    CEFBS_None, // FRES_rec = 1076
21241    CEFBS_None, // FRE_rec = 1077
21242    CEFBS_None, // FRIMD = 1078
21243    CEFBS_None, // FRIMD_rec = 1079
21244    CEFBS_None, // FRIMS = 1080
21245    CEFBS_None, // FRIMS_rec = 1081
21246    CEFBS_None, // FRIND = 1082
21247    CEFBS_None, // FRIND_rec = 1083
21248    CEFBS_None, // FRINS = 1084
21249    CEFBS_None, // FRINS_rec = 1085
21250    CEFBS_None, // FRIPD = 1086
21251    CEFBS_None, // FRIPD_rec = 1087
21252    CEFBS_None, // FRIPS = 1088
21253    CEFBS_None, // FRIPS_rec = 1089
21254    CEFBS_None, // FRIZD = 1090
21255    CEFBS_None, // FRIZD_rec = 1091
21256    CEFBS_None, // FRIZS = 1092
21257    CEFBS_None, // FRIZS_rec = 1093
21258    CEFBS_None, // FRSP = 1094
21259    CEFBS_None, // FRSP_rec = 1095
21260    CEFBS_None, // FRSQRTE = 1096
21261    CEFBS_None, // FRSQRTES = 1097
21262    CEFBS_None, // FRSQRTES_rec = 1098
21263    CEFBS_None, // FRSQRTE_rec = 1099
21264    CEFBS_None, // FSELD = 1100
21265    CEFBS_None, // FSELD_rec = 1101
21266    CEFBS_None, // FSELS = 1102
21267    CEFBS_None, // FSELS_rec = 1103
21268    CEFBS_None, // FSQRT = 1104
21269    CEFBS_None, // FSQRTS = 1105
21270    CEFBS_None, // FSQRTS_rec = 1106
21271    CEFBS_None, // FSQRT_rec = 1107
21272    CEFBS_None, // FSUB = 1108
21273    CEFBS_None, // FSUBS = 1109
21274    CEFBS_None, // FSUBS_rec = 1110
21275    CEFBS_None, // FSUB_rec = 1111
21276    CEFBS_None, // FTDIV = 1112
21277    CEFBS_None, // FTSQRT = 1113
21278    CEFBS_None, // GETtlsADDR = 1114
21279    CEFBS_None, // GETtlsADDR32 = 1115
21280    CEFBS_None, // GETtlsADDR32AIX = 1116
21281    CEFBS_None, // GETtlsADDR64AIX = 1117
21282    CEFBS_None, // GETtlsADDRPCREL = 1118
21283    CEFBS_None, // GETtlsldADDR = 1119
21284    CEFBS_None, // GETtlsldADDR32 = 1120
21285    CEFBS_None, // GETtlsldADDRPCREL = 1121
21286    CEFBS_None, // HASHCHK = 1122
21287    CEFBS_None, // HASHCHK8 = 1123
21288    CEFBS_None, // HASHCHKP = 1124
21289    CEFBS_None, // HASHCHKP8 = 1125
21290    CEFBS_None, // HASHST = 1126
21291    CEFBS_None, // HASHST8 = 1127
21292    CEFBS_None, // HASHSTP = 1128
21293    CEFBS_None, // HASHSTP8 = 1129
21294    CEFBS_None, // HRFID = 1130
21295    CEFBS_None, // ICBI = 1131
21296    CEFBS_None, // ICBIEP = 1132
21297    CEFBS_None, // ICBLC = 1133
21298    CEFBS_None, // ICBLQ = 1134
21299    CEFBS_None, // ICBT = 1135
21300    CEFBS_None, // ICBTLS = 1136
21301    CEFBS_None, // ICCCI = 1137
21302    CEFBS_None, // ISEL = 1138
21303    CEFBS_None, // ISEL8 = 1139
21304    CEFBS_None, // ISYNC = 1140
21305    CEFBS_None, // LA = 1141
21306    CEFBS_None, // LA8 = 1142
21307    CEFBS_None, // LBARX = 1143
21308    CEFBS_None, // LBARXL = 1144
21309    CEFBS_None, // LBEPX = 1145
21310    CEFBS_None, // LBZ = 1146
21311    CEFBS_None, // LBZ8 = 1147
21312    CEFBS_None, // LBZCIX = 1148
21313    CEFBS_None, // LBZU = 1149
21314    CEFBS_None, // LBZU8 = 1150
21315    CEFBS_None, // LBZUX = 1151
21316    CEFBS_None, // LBZUX8 = 1152
21317    CEFBS_None, // LBZX = 1153
21318    CEFBS_None, // LBZX8 = 1154
21319    CEFBS_None, // LBZXTLS = 1155
21320    CEFBS_None, // LBZXTLS_ = 1156
21321    CEFBS_None, // LBZXTLS_32 = 1157
21322    CEFBS_None, // LD = 1158
21323    CEFBS_None, // LDARX = 1159
21324    CEFBS_None, // LDARXL = 1160
21325    CEFBS_None, // LDAT = 1161
21326    CEFBS_None, // LDBRX = 1162
21327    CEFBS_None, // LDCIX = 1163
21328    CEFBS_None, // LDU = 1164
21329    CEFBS_None, // LDUX = 1165
21330    CEFBS_None, // LDX = 1166
21331    CEFBS_None, // LDXTLS = 1167
21332    CEFBS_None, // LDXTLS_ = 1168
21333    CEFBS_None, // LDgotTprelL = 1169
21334    CEFBS_None, // LDgotTprelL32 = 1170
21335    CEFBS_None, // LDtoc = 1171
21336    CEFBS_None, // LDtocBA = 1172
21337    CEFBS_None, // LDtocCPT = 1173
21338    CEFBS_None, // LDtocJTI = 1174
21339    CEFBS_None, // LDtocL = 1175
21340    CEFBS_None, // LFD = 1176
21341    CEFBS_None, // LFDEPX = 1177
21342    CEFBS_None, // LFDU = 1178
21343    CEFBS_None, // LFDUX = 1179
21344    CEFBS_None, // LFDX = 1180
21345    CEFBS_None, // LFIWAX = 1181
21346    CEFBS_None, // LFIWZX = 1182
21347    CEFBS_None, // LFS = 1183
21348    CEFBS_None, // LFSU = 1184
21349    CEFBS_None, // LFSUX = 1185
21350    CEFBS_None, // LFSX = 1186
21351    CEFBS_None, // LHA = 1187
21352    CEFBS_None, // LHA8 = 1188
21353    CEFBS_None, // LHARX = 1189
21354    CEFBS_None, // LHARXL = 1190
21355    CEFBS_None, // LHAU = 1191
21356    CEFBS_None, // LHAU8 = 1192
21357    CEFBS_None, // LHAUX = 1193
21358    CEFBS_None, // LHAUX8 = 1194
21359    CEFBS_None, // LHAX = 1195
21360    CEFBS_None, // LHAX8 = 1196
21361    CEFBS_None, // LHBRX = 1197
21362    CEFBS_None, // LHBRX8 = 1198
21363    CEFBS_None, // LHEPX = 1199
21364    CEFBS_None, // LHZ = 1200
21365    CEFBS_None, // LHZ8 = 1201
21366    CEFBS_None, // LHZCIX = 1202
21367    CEFBS_None, // LHZU = 1203
21368    CEFBS_None, // LHZU8 = 1204
21369    CEFBS_None, // LHZUX = 1205
21370    CEFBS_None, // LHZUX8 = 1206
21371    CEFBS_None, // LHZX = 1207
21372    CEFBS_None, // LHZX8 = 1208
21373    CEFBS_None, // LHZXTLS = 1209
21374    CEFBS_None, // LHZXTLS_ = 1210
21375    CEFBS_None, // LHZXTLS_32 = 1211
21376    CEFBS_None, // LI = 1212
21377    CEFBS_None, // LI8 = 1213
21378    CEFBS_None, // LIS = 1214
21379    CEFBS_None, // LIS8 = 1215
21380    CEFBS_None, // LMW = 1216
21381    CEFBS_None, // LQ = 1217
21382    CEFBS_None, // LQARX = 1218
21383    CEFBS_None, // LQARXL = 1219
21384    CEFBS_None, // LQX_PSEUDO = 1220
21385    CEFBS_None, // LSWI = 1221
21386    CEFBS_None, // LVEBX = 1222
21387    CEFBS_None, // LVEHX = 1223
21388    CEFBS_None, // LVEWX = 1224
21389    CEFBS_None, // LVSL = 1225
21390    CEFBS_None, // LVSR = 1226
21391    CEFBS_None, // LVX = 1227
21392    CEFBS_None, // LVXL = 1228
21393    CEFBS_None, // LWA = 1229
21394    CEFBS_None, // LWARX = 1230
21395    CEFBS_None, // LWARXL = 1231
21396    CEFBS_None, // LWAT = 1232
21397    CEFBS_None, // LWAUX = 1233
21398    CEFBS_None, // LWAX = 1234
21399    CEFBS_None, // LWAX_32 = 1235
21400    CEFBS_None, // LWA_32 = 1236
21401    CEFBS_None, // LWBRX = 1237
21402    CEFBS_None, // LWBRX8 = 1238
21403    CEFBS_None, // LWEPX = 1239
21404    CEFBS_None, // LWZ = 1240
21405    CEFBS_None, // LWZ8 = 1241
21406    CEFBS_None, // LWZCIX = 1242
21407    CEFBS_None, // LWZU = 1243
21408    CEFBS_None, // LWZU8 = 1244
21409    CEFBS_None, // LWZUX = 1245
21410    CEFBS_None, // LWZUX8 = 1246
21411    CEFBS_None, // LWZX = 1247
21412    CEFBS_None, // LWZX8 = 1248
21413    CEFBS_None, // LWZXTLS = 1249
21414    CEFBS_None, // LWZXTLS_ = 1250
21415    CEFBS_None, // LWZXTLS_32 = 1251
21416    CEFBS_None, // LWZtoc = 1252
21417    CEFBS_None, // LWZtocL = 1253
21418    CEFBS_None, // LXSD = 1254
21419    CEFBS_None, // LXSDX = 1255
21420    CEFBS_None, // LXSIBZX = 1256
21421    CEFBS_None, // LXSIHZX = 1257
21422    CEFBS_None, // LXSIWAX = 1258
21423    CEFBS_None, // LXSIWZX = 1259
21424    CEFBS_None, // LXSSP = 1260
21425    CEFBS_None, // LXSSPX = 1261
21426    CEFBS_None, // LXV = 1262
21427    CEFBS_None, // LXVB16X = 1263
21428    CEFBS_None, // LXVD2X = 1264
21429    CEFBS_None, // LXVDSX = 1265
21430    CEFBS_None, // LXVH8X = 1266
21431    CEFBS_None, // LXVKQ = 1267
21432    CEFBS_None, // LXVL = 1268
21433    CEFBS_None, // LXVLL = 1269
21434    CEFBS_None, // LXVP = 1270
21435    CEFBS_None, // LXVPRL = 1271
21436    CEFBS_None, // LXVPRLL = 1272
21437    CEFBS_None, // LXVPX = 1273
21438    CEFBS_None, // LXVRBX = 1274
21439    CEFBS_None, // LXVRDX = 1275
21440    CEFBS_None, // LXVRHX = 1276
21441    CEFBS_None, // LXVRL = 1277
21442    CEFBS_None, // LXVRLL = 1278
21443    CEFBS_None, // LXVRWX = 1279
21444    CEFBS_None, // LXVW4X = 1280
21445    CEFBS_None, // LXVWSX = 1281
21446    CEFBS_None, // LXVX = 1282
21447    CEFBS_None, // MADDHD = 1283
21448    CEFBS_None, // MADDHDU = 1284
21449    CEFBS_None, // MADDLD = 1285
21450    CEFBS_None, // MADDLD8 = 1286
21451    CEFBS_None, // MBAR = 1287
21452    CEFBS_None, // MCRF = 1288
21453    CEFBS_None, // MCRFS = 1289
21454    CEFBS_None, // MCRXRX = 1290
21455    CEFBS_None, // MFBHRBE = 1291
21456    CEFBS_None, // MFCR = 1292
21457    CEFBS_None, // MFCR8 = 1293
21458    CEFBS_None, // MFCTR = 1294
21459    CEFBS_None, // MFCTR8 = 1295
21460    CEFBS_None, // MFDCR = 1296
21461    CEFBS_None, // MFFS = 1297
21462    CEFBS_None, // MFFSCDRN = 1298
21463    CEFBS_None, // MFFSCDRNI = 1299
21464    CEFBS_None, // MFFSCE = 1300
21465    CEFBS_None, // MFFSCRN = 1301
21466    CEFBS_None, // MFFSCRNI = 1302
21467    CEFBS_None, // MFFSL = 1303
21468    CEFBS_None, // MFFS_rec = 1304
21469    CEFBS_None, // MFLR = 1305
21470    CEFBS_None, // MFLR8 = 1306
21471    CEFBS_None, // MFMSR = 1307
21472    CEFBS_None, // MFOCRF = 1308
21473    CEFBS_None, // MFOCRF8 = 1309
21474    CEFBS_None, // MFPMR = 1310
21475    CEFBS_None, // MFSPR = 1311
21476    CEFBS_None, // MFSPR8 = 1312
21477    CEFBS_None, // MFSR = 1313
21478    CEFBS_None, // MFSRIN = 1314
21479    CEFBS_None, // MFTB = 1315
21480    CEFBS_None, // MFTB8 = 1316
21481    CEFBS_None, // MFUDSCR = 1317
21482    CEFBS_None, // MFVRD = 1318
21483    CEFBS_None, // MFVRSAVE = 1319
21484    CEFBS_None, // MFVRSAVEv = 1320
21485    CEFBS_None, // MFVRWZ = 1321
21486    CEFBS_None, // MFVSCR = 1322
21487    CEFBS_None, // MFVSRD = 1323
21488    CEFBS_None, // MFVSRLD = 1324
21489    CEFBS_None, // MFVSRWZ = 1325
21490    CEFBS_None, // MODSD = 1326
21491    CEFBS_None, // MODSW = 1327
21492    CEFBS_None, // MODUD = 1328
21493    CEFBS_None, // MODUW = 1329
21494    CEFBS_None, // MSGSYNC = 1330
21495    CEFBS_None, // MSYNC = 1331
21496    CEFBS_None, // MTCRF = 1332
21497    CEFBS_None, // MTCRF8 = 1333
21498    CEFBS_None, // MTCTR = 1334
21499    CEFBS_None, // MTCTR8 = 1335
21500    CEFBS_None, // MTCTR8loop = 1336
21501    CEFBS_None, // MTCTRloop = 1337
21502    CEFBS_None, // MTDCR = 1338
21503    CEFBS_None, // MTFSB0 = 1339
21504    CEFBS_None, // MTFSB1 = 1340
21505    CEFBS_None, // MTFSF = 1341
21506    CEFBS_None, // MTFSFI = 1342
21507    CEFBS_None, // MTFSFI_rec = 1343
21508    CEFBS_None, // MTFSFIb = 1344
21509    CEFBS_None, // MTFSF_rec = 1345
21510    CEFBS_None, // MTFSFb = 1346
21511    CEFBS_None, // MTLR = 1347
21512    CEFBS_None, // MTLR8 = 1348
21513    CEFBS_None, // MTMSR = 1349
21514    CEFBS_None, // MTMSRD = 1350
21515    CEFBS_None, // MTOCRF = 1351
21516    CEFBS_None, // MTOCRF8 = 1352
21517    CEFBS_None, // MTPMR = 1353
21518    CEFBS_None, // MTSPR = 1354
21519    CEFBS_None, // MTSPR8 = 1355
21520    CEFBS_None, // MTSR = 1356
21521    CEFBS_None, // MTSRIN = 1357
21522    CEFBS_None, // MTUDSCR = 1358
21523    CEFBS_None, // MTVRD = 1359
21524    CEFBS_None, // MTVRSAVE = 1360
21525    CEFBS_None, // MTVRSAVEv = 1361
21526    CEFBS_None, // MTVRWA = 1362
21527    CEFBS_None, // MTVRWZ = 1363
21528    CEFBS_None, // MTVSCR = 1364
21529    CEFBS_None, // MTVSRBM = 1365
21530    CEFBS_None, // MTVSRBMI = 1366
21531    CEFBS_None, // MTVSRD = 1367
21532    CEFBS_None, // MTVSRDD = 1368
21533    CEFBS_None, // MTVSRDM = 1369
21534    CEFBS_None, // MTVSRHM = 1370
21535    CEFBS_None, // MTVSRQM = 1371
21536    CEFBS_None, // MTVSRWA = 1372
21537    CEFBS_None, // MTVSRWM = 1373
21538    CEFBS_None, // MTVSRWS = 1374
21539    CEFBS_None, // MTVSRWZ = 1375
21540    CEFBS_None, // MULHD = 1376
21541    CEFBS_None, // MULHDU = 1377
21542    CEFBS_None, // MULHDU_rec = 1378
21543    CEFBS_None, // MULHD_rec = 1379
21544    CEFBS_None, // MULHW = 1380
21545    CEFBS_None, // MULHWU = 1381
21546    CEFBS_None, // MULHWU_rec = 1382
21547    CEFBS_None, // MULHW_rec = 1383
21548    CEFBS_None, // MULLD = 1384
21549    CEFBS_None, // MULLDO = 1385
21550    CEFBS_None, // MULLDO_rec = 1386
21551    CEFBS_None, // MULLD_rec = 1387
21552    CEFBS_None, // MULLI = 1388
21553    CEFBS_None, // MULLI8 = 1389
21554    CEFBS_None, // MULLW = 1390
21555    CEFBS_None, // MULLWO = 1391
21556    CEFBS_None, // MULLWO_rec = 1392
21557    CEFBS_None, // MULLW_rec = 1393
21558    CEFBS_None, // MoveGOTtoLR = 1394
21559    CEFBS_None, // MovePCtoLR = 1395
21560    CEFBS_None, // MovePCtoLR8 = 1396
21561    CEFBS_None, // NAND = 1397
21562    CEFBS_None, // NAND8 = 1398
21563    CEFBS_None, // NAND8_rec = 1399
21564    CEFBS_None, // NAND_rec = 1400
21565    CEFBS_None, // NAP = 1401
21566    CEFBS_None, // NEG = 1402
21567    CEFBS_None, // NEG8 = 1403
21568    CEFBS_None, // NEG8O = 1404
21569    CEFBS_None, // NEG8O_rec = 1405
21570    CEFBS_None, // NEG8_rec = 1406
21571    CEFBS_None, // NEGO = 1407
21572    CEFBS_None, // NEGO_rec = 1408
21573    CEFBS_None, // NEG_rec = 1409
21574    CEFBS_None, // NOP = 1410
21575    CEFBS_None, // NOP_GT_PWR6 = 1411
21576    CEFBS_None, // NOP_GT_PWR7 = 1412
21577    CEFBS_None, // NOR = 1413
21578    CEFBS_None, // NOR8 = 1414
21579    CEFBS_None, // NOR8_rec = 1415
21580    CEFBS_None, // NOR_rec = 1416
21581    CEFBS_None, // OR = 1417
21582    CEFBS_None, // OR8 = 1418
21583    CEFBS_None, // OR8_rec = 1419
21584    CEFBS_None, // ORC = 1420
21585    CEFBS_None, // ORC8 = 1421
21586    CEFBS_None, // ORC8_rec = 1422
21587    CEFBS_None, // ORC_rec = 1423
21588    CEFBS_None, // ORI = 1424
21589    CEFBS_None, // ORI8 = 1425
21590    CEFBS_None, // ORIS = 1426
21591    CEFBS_None, // ORIS8 = 1427
21592    CEFBS_None, // OR_rec = 1428
21593    CEFBS_None, // PADDI = 1429
21594    CEFBS_None, // PADDI8 = 1430
21595    CEFBS_None, // PADDI8pc = 1431
21596    CEFBS_None, // PADDIdtprel = 1432
21597    CEFBS_None, // PADDIpc = 1433
21598    CEFBS_None, // PDEPD = 1434
21599    CEFBS_None, // PEXTD = 1435
21600    CEFBS_None, // PLBZ = 1436
21601    CEFBS_None, // PLBZ8 = 1437
21602    CEFBS_None, // PLBZ8pc = 1438
21603    CEFBS_None, // PLBZpc = 1439
21604    CEFBS_None, // PLD = 1440
21605    CEFBS_None, // PLDpc = 1441
21606    CEFBS_None, // PLFD = 1442
21607    CEFBS_None, // PLFDpc = 1443
21608    CEFBS_None, // PLFS = 1444
21609    CEFBS_None, // PLFSpc = 1445
21610    CEFBS_None, // PLHA = 1446
21611    CEFBS_None, // PLHA8 = 1447
21612    CEFBS_None, // PLHA8pc = 1448
21613    CEFBS_None, // PLHApc = 1449
21614    CEFBS_None, // PLHZ = 1450
21615    CEFBS_None, // PLHZ8 = 1451
21616    CEFBS_None, // PLHZ8pc = 1452
21617    CEFBS_None, // PLHZpc = 1453
21618    CEFBS_None, // PLI = 1454
21619    CEFBS_None, // PLI8 = 1455
21620    CEFBS_None, // PLWA = 1456
21621    CEFBS_None, // PLWA8 = 1457
21622    CEFBS_None, // PLWA8pc = 1458
21623    CEFBS_None, // PLWApc = 1459
21624    CEFBS_None, // PLWZ = 1460
21625    CEFBS_None, // PLWZ8 = 1461
21626    CEFBS_None, // PLWZ8pc = 1462
21627    CEFBS_None, // PLWZpc = 1463
21628    CEFBS_None, // PLXSD = 1464
21629    CEFBS_None, // PLXSDpc = 1465
21630    CEFBS_None, // PLXSSP = 1466
21631    CEFBS_None, // PLXSSPpc = 1467
21632    CEFBS_None, // PLXV = 1468
21633    CEFBS_None, // PLXVP = 1469
21634    CEFBS_None, // PLXVPpc = 1470
21635    CEFBS_None, // PLXVpc = 1471
21636    CEFBS_None, // PMXVBF16GER2 = 1472
21637    CEFBS_None, // PMXVBF16GER2NN = 1473
21638    CEFBS_None, // PMXVBF16GER2NP = 1474
21639    CEFBS_None, // PMXVBF16GER2PN = 1475
21640    CEFBS_None, // PMXVBF16GER2PP = 1476
21641    CEFBS_None, // PMXVBF16GER2W = 1477
21642    CEFBS_None, // PMXVBF16GER2WNN = 1478
21643    CEFBS_None, // PMXVBF16GER2WNP = 1479
21644    CEFBS_None, // PMXVBF16GER2WPN = 1480
21645    CEFBS_None, // PMXVBF16GER2WPP = 1481
21646    CEFBS_None, // PMXVF16GER2 = 1482
21647    CEFBS_None, // PMXVF16GER2NN = 1483
21648    CEFBS_None, // PMXVF16GER2NP = 1484
21649    CEFBS_None, // PMXVF16GER2PN = 1485
21650    CEFBS_None, // PMXVF16GER2PP = 1486
21651    CEFBS_None, // PMXVF16GER2W = 1487
21652    CEFBS_None, // PMXVF16GER2WNN = 1488
21653    CEFBS_None, // PMXVF16GER2WNP = 1489
21654    CEFBS_None, // PMXVF16GER2WPN = 1490
21655    CEFBS_None, // PMXVF16GER2WPP = 1491
21656    CEFBS_None, // PMXVF32GER = 1492
21657    CEFBS_None, // PMXVF32GERNN = 1493
21658    CEFBS_None, // PMXVF32GERNP = 1494
21659    CEFBS_None, // PMXVF32GERPN = 1495
21660    CEFBS_None, // PMXVF32GERPP = 1496
21661    CEFBS_None, // PMXVF32GERW = 1497
21662    CEFBS_None, // PMXVF32GERWNN = 1498
21663    CEFBS_None, // PMXVF32GERWNP = 1499
21664    CEFBS_None, // PMXVF32GERWPN = 1500
21665    CEFBS_None, // PMXVF32GERWPP = 1501
21666    CEFBS_None, // PMXVF64GER = 1502
21667    CEFBS_None, // PMXVF64GERNN = 1503
21668    CEFBS_None, // PMXVF64GERNP = 1504
21669    CEFBS_None, // PMXVF64GERPN = 1505
21670    CEFBS_None, // PMXVF64GERPP = 1506
21671    CEFBS_None, // PMXVF64GERW = 1507
21672    CEFBS_None, // PMXVF64GERWNN = 1508
21673    CEFBS_None, // PMXVF64GERWNP = 1509
21674    CEFBS_None, // PMXVF64GERWPN = 1510
21675    CEFBS_None, // PMXVF64GERWPP = 1511
21676    CEFBS_None, // PMXVI16GER2 = 1512
21677    CEFBS_None, // PMXVI16GER2PP = 1513
21678    CEFBS_None, // PMXVI16GER2S = 1514
21679    CEFBS_None, // PMXVI16GER2SPP = 1515
21680    CEFBS_None, // PMXVI16GER2SW = 1516
21681    CEFBS_None, // PMXVI16GER2SWPP = 1517
21682    CEFBS_None, // PMXVI16GER2W = 1518
21683    CEFBS_None, // PMXVI16GER2WPP = 1519
21684    CEFBS_None, // PMXVI4GER8 = 1520
21685    CEFBS_None, // PMXVI4GER8PP = 1521
21686    CEFBS_None, // PMXVI4GER8W = 1522
21687    CEFBS_None, // PMXVI4GER8WPP = 1523
21688    CEFBS_None, // PMXVI8GER4 = 1524
21689    CEFBS_None, // PMXVI8GER4PP = 1525
21690    CEFBS_None, // PMXVI8GER4SPP = 1526
21691    CEFBS_None, // PMXVI8GER4W = 1527
21692    CEFBS_None, // PMXVI8GER4WPP = 1528
21693    CEFBS_None, // PMXVI8GER4WSPP = 1529
21694    CEFBS_None, // POPCNTB = 1530
21695    CEFBS_None, // POPCNTB8 = 1531
21696    CEFBS_None, // POPCNTD = 1532
21697    CEFBS_None, // POPCNTW = 1533
21698    CEFBS_None, // PPC32GOT = 1534
21699    CEFBS_None, // PPC32PICGOT = 1535
21700    CEFBS_None, // PREPARE_PROBED_ALLOCA_32 = 1536
21701    CEFBS_None, // PREPARE_PROBED_ALLOCA_64 = 1537
21702    CEFBS_None, // PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32 = 1538
21703    CEFBS_None, // PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64 = 1539
21704    CEFBS_None, // PROBED_ALLOCA_32 = 1540
21705    CEFBS_None, // PROBED_ALLOCA_64 = 1541
21706    CEFBS_None, // PROBED_STACKALLOC_32 = 1542
21707    CEFBS_None, // PROBED_STACKALLOC_64 = 1543
21708    CEFBS_None, // PSTB = 1544
21709    CEFBS_None, // PSTB8 = 1545
21710    CEFBS_None, // PSTB8pc = 1546
21711    CEFBS_None, // PSTBpc = 1547
21712    CEFBS_None, // PSTD = 1548
21713    CEFBS_None, // PSTDpc = 1549
21714    CEFBS_None, // PSTFD = 1550
21715    CEFBS_None, // PSTFDpc = 1551
21716    CEFBS_None, // PSTFS = 1552
21717    CEFBS_None, // PSTFSpc = 1553
21718    CEFBS_None, // PSTH = 1554
21719    CEFBS_None, // PSTH8 = 1555
21720    CEFBS_None, // PSTH8pc = 1556
21721    CEFBS_None, // PSTHpc = 1557
21722    CEFBS_None, // PSTW = 1558
21723    CEFBS_None, // PSTW8 = 1559
21724    CEFBS_None, // PSTW8pc = 1560
21725    CEFBS_None, // PSTWpc = 1561
21726    CEFBS_None, // PSTXSD = 1562
21727    CEFBS_None, // PSTXSDpc = 1563
21728    CEFBS_None, // PSTXSSP = 1564
21729    CEFBS_None, // PSTXSSPpc = 1565
21730    CEFBS_None, // PSTXV = 1566
21731    CEFBS_None, // PSTXVP = 1567
21732    CEFBS_None, // PSTXVPpc = 1568
21733    CEFBS_None, // PSTXVpc = 1569
21734    CEFBS_None, // PseudoEIEIO = 1570
21735    CEFBS_None, // RESTORE_ACC = 1571
21736    CEFBS_None, // RESTORE_CR = 1572
21737    CEFBS_None, // RESTORE_CRBIT = 1573
21738    CEFBS_None, // RESTORE_QUADWORD = 1574
21739    CEFBS_None, // RESTORE_UACC = 1575
21740    CEFBS_None, // RESTORE_WACC = 1576
21741    CEFBS_None, // RFCI = 1577
21742    CEFBS_None, // RFDI = 1578
21743    CEFBS_None, // RFEBB = 1579
21744    CEFBS_None, // RFI = 1580
21745    CEFBS_None, // RFID = 1581
21746    CEFBS_None, // RFMCI = 1582
21747    CEFBS_None, // RLDCL = 1583
21748    CEFBS_None, // RLDCL_rec = 1584
21749    CEFBS_None, // RLDCR = 1585
21750    CEFBS_None, // RLDCR_rec = 1586
21751    CEFBS_None, // RLDIC = 1587
21752    CEFBS_None, // RLDICL = 1588
21753    CEFBS_None, // RLDICL_32 = 1589
21754    CEFBS_None, // RLDICL_32_64 = 1590
21755    CEFBS_None, // RLDICL_32_rec = 1591
21756    CEFBS_None, // RLDICL_rec = 1592
21757    CEFBS_None, // RLDICR = 1593
21758    CEFBS_None, // RLDICR_32 = 1594
21759    CEFBS_None, // RLDICR_rec = 1595
21760    CEFBS_None, // RLDIC_rec = 1596
21761    CEFBS_None, // RLDIMI = 1597
21762    CEFBS_None, // RLDIMI_rec = 1598
21763    CEFBS_None, // RLWIMI = 1599
21764    CEFBS_None, // RLWIMI8 = 1600
21765    CEFBS_None, // RLWIMI8_rec = 1601
21766    CEFBS_None, // RLWIMI_rec = 1602
21767    CEFBS_None, // RLWINM = 1603
21768    CEFBS_None, // RLWINM8 = 1604
21769    CEFBS_None, // RLWINM8_rec = 1605
21770    CEFBS_None, // RLWINM_rec = 1606
21771    CEFBS_None, // RLWNM = 1607
21772    CEFBS_None, // RLWNM8 = 1608
21773    CEFBS_None, // RLWNM8_rec = 1609
21774    CEFBS_None, // RLWNM_rec = 1610
21775    CEFBS_None, // ReadTB = 1611
21776    CEFBS_None, // SC = 1612
21777    CEFBS_None, // SELECT_CC_F16 = 1613
21778    CEFBS_None, // SELECT_CC_F4 = 1614
21779    CEFBS_None, // SELECT_CC_F8 = 1615
21780    CEFBS_None, // SELECT_CC_I4 = 1616
21781    CEFBS_None, // SELECT_CC_I8 = 1617
21782    CEFBS_None, // SELECT_CC_SPE = 1618
21783    CEFBS_None, // SELECT_CC_SPE4 = 1619
21784    CEFBS_None, // SELECT_CC_VRRC = 1620
21785    CEFBS_None, // SELECT_CC_VSFRC = 1621
21786    CEFBS_None, // SELECT_CC_VSRC = 1622
21787    CEFBS_None, // SELECT_CC_VSSRC = 1623
21788    CEFBS_None, // SELECT_F16 = 1624
21789    CEFBS_None, // SELECT_F4 = 1625
21790    CEFBS_None, // SELECT_F8 = 1626
21791    CEFBS_None, // SELECT_I4 = 1627
21792    CEFBS_None, // SELECT_I8 = 1628
21793    CEFBS_None, // SELECT_SPE = 1629
21794    CEFBS_None, // SELECT_SPE4 = 1630
21795    CEFBS_None, // SELECT_VRRC = 1631
21796    CEFBS_None, // SELECT_VSFRC = 1632
21797    CEFBS_None, // SELECT_VSRC = 1633
21798    CEFBS_None, // SELECT_VSSRC = 1634
21799    CEFBS_None, // SETB = 1635
21800    CEFBS_None, // SETB8 = 1636
21801    CEFBS_None, // SETBC = 1637
21802    CEFBS_None, // SETBC8 = 1638
21803    CEFBS_None, // SETBCR = 1639
21804    CEFBS_None, // SETBCR8 = 1640
21805    CEFBS_None, // SETFLM = 1641
21806    CEFBS_None, // SETNBC = 1642
21807    CEFBS_None, // SETNBC8 = 1643
21808    CEFBS_None, // SETNBCR = 1644
21809    CEFBS_None, // SETNBCR8 = 1645
21810    CEFBS_None, // SETRND = 1646
21811    CEFBS_None, // SETRNDi = 1647
21812    CEFBS_None, // SLBFEE_rec = 1648
21813    CEFBS_None, // SLBIA = 1649
21814    CEFBS_None, // SLBIE = 1650
21815    CEFBS_None, // SLBIEG = 1651
21816    CEFBS_None, // SLBMFEE = 1652
21817    CEFBS_None, // SLBMFEV = 1653
21818    CEFBS_None, // SLBMTE = 1654
21819    CEFBS_None, // SLBSYNC = 1655
21820    CEFBS_None, // SLD = 1656
21821    CEFBS_None, // SLD_rec = 1657
21822    CEFBS_None, // SLW = 1658
21823    CEFBS_None, // SLW8 = 1659
21824    CEFBS_None, // SLW8_rec = 1660
21825    CEFBS_None, // SLW_rec = 1661
21826    CEFBS_None, // SPELWZ = 1662
21827    CEFBS_None, // SPELWZX = 1663
21828    CEFBS_None, // SPESTW = 1664
21829    CEFBS_None, // SPESTWX = 1665
21830    CEFBS_None, // SPILL_ACC = 1666
21831    CEFBS_None, // SPILL_CR = 1667
21832    CEFBS_None, // SPILL_CRBIT = 1668
21833    CEFBS_None, // SPILL_QUADWORD = 1669
21834    CEFBS_None, // SPILL_UACC = 1670
21835    CEFBS_None, // SPILL_WACC = 1671
21836    CEFBS_None, // SPLIT_QUADWORD = 1672
21837    CEFBS_None, // SRAD = 1673
21838    CEFBS_None, // SRADI = 1674
21839    CEFBS_None, // SRADI_32 = 1675
21840    CEFBS_None, // SRADI_rec = 1676
21841    CEFBS_None, // SRAD_rec = 1677
21842    CEFBS_None, // SRAW = 1678
21843    CEFBS_None, // SRAWI = 1679
21844    CEFBS_None, // SRAWI_rec = 1680
21845    CEFBS_None, // SRAW_rec = 1681
21846    CEFBS_None, // SRD = 1682
21847    CEFBS_None, // SRD_rec = 1683
21848    CEFBS_None, // SRW = 1684
21849    CEFBS_None, // SRW8 = 1685
21850    CEFBS_None, // SRW8_rec = 1686
21851    CEFBS_None, // SRW_rec = 1687
21852    CEFBS_None, // STB = 1688
21853    CEFBS_None, // STB8 = 1689
21854    CEFBS_None, // STBCIX = 1690
21855    CEFBS_None, // STBCX = 1691
21856    CEFBS_None, // STBEPX = 1692
21857    CEFBS_None, // STBU = 1693
21858    CEFBS_None, // STBU8 = 1694
21859    CEFBS_None, // STBUX = 1695
21860    CEFBS_None, // STBUX8 = 1696
21861    CEFBS_None, // STBX = 1697
21862    CEFBS_None, // STBX8 = 1698
21863    CEFBS_None, // STBXTLS = 1699
21864    CEFBS_None, // STBXTLS_ = 1700
21865    CEFBS_None, // STBXTLS_32 = 1701
21866    CEFBS_None, // STD = 1702
21867    CEFBS_None, // STDAT = 1703
21868    CEFBS_None, // STDBRX = 1704
21869    CEFBS_None, // STDCIX = 1705
21870    CEFBS_None, // STDCX = 1706
21871    CEFBS_None, // STDU = 1707
21872    CEFBS_None, // STDUX = 1708
21873    CEFBS_None, // STDX = 1709
21874    CEFBS_None, // STDXTLS = 1710
21875    CEFBS_None, // STDXTLS_ = 1711
21876    CEFBS_None, // STFD = 1712
21877    CEFBS_None, // STFDEPX = 1713
21878    CEFBS_None, // STFDU = 1714
21879    CEFBS_None, // STFDUX = 1715
21880    CEFBS_None, // STFDX = 1716
21881    CEFBS_None, // STFIWX = 1717
21882    CEFBS_None, // STFS = 1718
21883    CEFBS_None, // STFSU = 1719
21884    CEFBS_None, // STFSUX = 1720
21885    CEFBS_None, // STFSX = 1721
21886    CEFBS_None, // STH = 1722
21887    CEFBS_None, // STH8 = 1723
21888    CEFBS_None, // STHBRX = 1724
21889    CEFBS_None, // STHCIX = 1725
21890    CEFBS_None, // STHCX = 1726
21891    CEFBS_None, // STHEPX = 1727
21892    CEFBS_None, // STHU = 1728
21893    CEFBS_None, // STHU8 = 1729
21894    CEFBS_None, // STHUX = 1730
21895    CEFBS_None, // STHUX8 = 1731
21896    CEFBS_None, // STHX = 1732
21897    CEFBS_None, // STHX8 = 1733
21898    CEFBS_None, // STHXTLS = 1734
21899    CEFBS_None, // STHXTLS_ = 1735
21900    CEFBS_None, // STHXTLS_32 = 1736
21901    CEFBS_None, // STMW = 1737
21902    CEFBS_None, // STOP = 1738
21903    CEFBS_None, // STQ = 1739
21904    CEFBS_None, // STQCX = 1740
21905    CEFBS_None, // STQX_PSEUDO = 1741
21906    CEFBS_None, // STSWI = 1742
21907    CEFBS_None, // STVEBX = 1743
21908    CEFBS_None, // STVEHX = 1744
21909    CEFBS_None, // STVEWX = 1745
21910    CEFBS_None, // STVX = 1746
21911    CEFBS_None, // STVXL = 1747
21912    CEFBS_None, // STW = 1748
21913    CEFBS_None, // STW8 = 1749
21914    CEFBS_None, // STWAT = 1750
21915    CEFBS_None, // STWBRX = 1751
21916    CEFBS_None, // STWCIX = 1752
21917    CEFBS_None, // STWCX = 1753
21918    CEFBS_None, // STWEPX = 1754
21919    CEFBS_None, // STWU = 1755
21920    CEFBS_None, // STWU8 = 1756
21921    CEFBS_None, // STWUX = 1757
21922    CEFBS_None, // STWUX8 = 1758
21923    CEFBS_None, // STWX = 1759
21924    CEFBS_None, // STWX8 = 1760
21925    CEFBS_None, // STWXTLS = 1761
21926    CEFBS_None, // STWXTLS_ = 1762
21927    CEFBS_None, // STWXTLS_32 = 1763
21928    CEFBS_None, // STXSD = 1764
21929    CEFBS_None, // STXSDX = 1765
21930    CEFBS_None, // STXSIBX = 1766
21931    CEFBS_None, // STXSIBXv = 1767
21932    CEFBS_None, // STXSIHX = 1768
21933    CEFBS_None, // STXSIHXv = 1769
21934    CEFBS_None, // STXSIWX = 1770
21935    CEFBS_None, // STXSSP = 1771
21936    CEFBS_None, // STXSSPX = 1772
21937    CEFBS_None, // STXV = 1773
21938    CEFBS_None, // STXVB16X = 1774
21939    CEFBS_None, // STXVD2X = 1775
21940    CEFBS_None, // STXVH8X = 1776
21941    CEFBS_None, // STXVL = 1777
21942    CEFBS_None, // STXVLL = 1778
21943    CEFBS_None, // STXVP = 1779
21944    CEFBS_None, // STXVPRL = 1780
21945    CEFBS_None, // STXVPRLL = 1781
21946    CEFBS_None, // STXVPX = 1782
21947    CEFBS_None, // STXVRBX = 1783
21948    CEFBS_None, // STXVRDX = 1784
21949    CEFBS_None, // STXVRHX = 1785
21950    CEFBS_None, // STXVRL = 1786
21951    CEFBS_None, // STXVRLL = 1787
21952    CEFBS_None, // STXVRWX = 1788
21953    CEFBS_None, // STXVW4X = 1789
21954    CEFBS_None, // STXVX = 1790
21955    CEFBS_None, // SUBF = 1791
21956    CEFBS_None, // SUBF8 = 1792
21957    CEFBS_None, // SUBF8O = 1793
21958    CEFBS_None, // SUBF8O_rec = 1794
21959    CEFBS_None, // SUBF8_rec = 1795
21960    CEFBS_None, // SUBFC = 1796
21961    CEFBS_None, // SUBFC8 = 1797
21962    CEFBS_None, // SUBFC8O = 1798
21963    CEFBS_None, // SUBFC8O_rec = 1799
21964    CEFBS_None, // SUBFC8_rec = 1800
21965    CEFBS_None, // SUBFCO = 1801
21966    CEFBS_None, // SUBFCO_rec = 1802
21967    CEFBS_None, // SUBFC_rec = 1803
21968    CEFBS_None, // SUBFE = 1804
21969    CEFBS_None, // SUBFE8 = 1805
21970    CEFBS_None, // SUBFE8O = 1806
21971    CEFBS_None, // SUBFE8O_rec = 1807
21972    CEFBS_None, // SUBFE8_rec = 1808
21973    CEFBS_None, // SUBFEO = 1809
21974    CEFBS_None, // SUBFEO_rec = 1810
21975    CEFBS_None, // SUBFE_rec = 1811
21976    CEFBS_None, // SUBFIC = 1812
21977    CEFBS_None, // SUBFIC8 = 1813
21978    CEFBS_None, // SUBFME = 1814
21979    CEFBS_None, // SUBFME8 = 1815
21980    CEFBS_None, // SUBFME8O = 1816
21981    CEFBS_None, // SUBFME8O_rec = 1817
21982    CEFBS_None, // SUBFME8_rec = 1818
21983    CEFBS_None, // SUBFMEO = 1819
21984    CEFBS_None, // SUBFMEO_rec = 1820
21985    CEFBS_None, // SUBFME_rec = 1821
21986    CEFBS_None, // SUBFO = 1822
21987    CEFBS_None, // SUBFO_rec = 1823
21988    CEFBS_None, // SUBFUS = 1824
21989    CEFBS_None, // SUBFUS_rec = 1825
21990    CEFBS_None, // SUBFZE = 1826
21991    CEFBS_None, // SUBFZE8 = 1827
21992    CEFBS_None, // SUBFZE8O = 1828
21993    CEFBS_None, // SUBFZE8O_rec = 1829
21994    CEFBS_None, // SUBFZE8_rec = 1830
21995    CEFBS_None, // SUBFZEO = 1831
21996    CEFBS_None, // SUBFZEO_rec = 1832
21997    CEFBS_None, // SUBFZE_rec = 1833
21998    CEFBS_None, // SUBF_rec = 1834
21999    CEFBS_None, // SYNC = 1835
22000    CEFBS_None, // TABORT = 1836
22001    CEFBS_None, // TABORTDC = 1837
22002    CEFBS_None, // TABORTDCI = 1838
22003    CEFBS_None, // TABORTWC = 1839
22004    CEFBS_None, // TABORTWCI = 1840
22005    CEFBS_None, // TAILB = 1841
22006    CEFBS_None, // TAILB8 = 1842
22007    CEFBS_None, // TAILBA = 1843
22008    CEFBS_None, // TAILBA8 = 1844
22009    CEFBS_None, // TAILBCTR = 1845
22010    CEFBS_None, // TAILBCTR8 = 1846
22011    CEFBS_None, // TBEGIN = 1847
22012    CEFBS_None, // TBEGIN_RET = 1848
22013    CEFBS_None, // TCHECK = 1849
22014    CEFBS_None, // TCHECK_RET = 1850
22015    CEFBS_None, // TCRETURNai = 1851
22016    CEFBS_None, // TCRETURNai8 = 1852
22017    CEFBS_None, // TCRETURNdi = 1853
22018    CEFBS_None, // TCRETURNdi8 = 1854
22019    CEFBS_None, // TCRETURNri = 1855
22020    CEFBS_None, // TCRETURNri8 = 1856
22021    CEFBS_None, // TD = 1857
22022    CEFBS_None, // TDI = 1858
22023    CEFBS_None, // TEND = 1859
22024    CEFBS_None, // TLBIA = 1860
22025    CEFBS_None, // TLBIE = 1861
22026    CEFBS_None, // TLBIEL = 1862
22027    CEFBS_None, // TLBIVAX = 1863
22028    CEFBS_None, // TLBLD = 1864
22029    CEFBS_None, // TLBLI = 1865
22030    CEFBS_None, // TLBRE = 1866
22031    CEFBS_None, // TLBRE2 = 1867
22032    CEFBS_None, // TLBSX = 1868
22033    CEFBS_None, // TLBSX2 = 1869
22034    CEFBS_None, // TLBSX2D = 1870
22035    CEFBS_None, // TLBSYNC = 1871
22036    CEFBS_None, // TLBWE = 1872
22037    CEFBS_None, // TLBWE2 = 1873
22038    CEFBS_None, // TLSGDAIX = 1874
22039    CEFBS_None, // TLSGDAIX8 = 1875
22040    CEFBS_None, // TRAP = 1876
22041    CEFBS_None, // TRECHKPT = 1877
22042    CEFBS_None, // TRECLAIM = 1878
22043    CEFBS_None, // TSR = 1879
22044    CEFBS_None, // TW = 1880
22045    CEFBS_None, // TWI = 1881
22046    CEFBS_None, // UNENCODED_NOP = 1882
22047    CEFBS_None, // UpdateGBR = 1883
22048    CEFBS_None, // VABSDUB = 1884
22049    CEFBS_None, // VABSDUH = 1885
22050    CEFBS_None, // VABSDUW = 1886
22051    CEFBS_None, // VADDCUQ = 1887
22052    CEFBS_None, // VADDCUW = 1888
22053    CEFBS_None, // VADDECUQ = 1889
22054    CEFBS_None, // VADDEUQM = 1890
22055    CEFBS_None, // VADDFP = 1891
22056    CEFBS_None, // VADDSBS = 1892
22057    CEFBS_None, // VADDSHS = 1893
22058    CEFBS_None, // VADDSWS = 1894
22059    CEFBS_None, // VADDUBM = 1895
22060    CEFBS_None, // VADDUBS = 1896
22061    CEFBS_None, // VADDUDM = 1897
22062    CEFBS_None, // VADDUHM = 1898
22063    CEFBS_None, // VADDUHS = 1899
22064    CEFBS_None, // VADDUQM = 1900
22065    CEFBS_None, // VADDUWM = 1901
22066    CEFBS_None, // VADDUWS = 1902
22067    CEFBS_None, // VAND = 1903
22068    CEFBS_None, // VANDC = 1904
22069    CEFBS_None, // VAVGSB = 1905
22070    CEFBS_None, // VAVGSH = 1906
22071    CEFBS_None, // VAVGSW = 1907
22072    CEFBS_None, // VAVGUB = 1908
22073    CEFBS_None, // VAVGUH = 1909
22074    CEFBS_None, // VAVGUW = 1910
22075    CEFBS_None, // VBPERMD = 1911
22076    CEFBS_None, // VBPERMQ = 1912
22077    CEFBS_None, // VCFSX = 1913
22078    CEFBS_None, // VCFSX_0 = 1914
22079    CEFBS_None, // VCFUGED = 1915
22080    CEFBS_None, // VCFUX = 1916
22081    CEFBS_None, // VCFUX_0 = 1917
22082    CEFBS_None, // VCIPHER = 1918
22083    CEFBS_None, // VCIPHERLAST = 1919
22084    CEFBS_None, // VCLRLB = 1920
22085    CEFBS_None, // VCLRRB = 1921
22086    CEFBS_None, // VCLZB = 1922
22087    CEFBS_None, // VCLZD = 1923
22088    CEFBS_None, // VCLZDM = 1924
22089    CEFBS_None, // VCLZH = 1925
22090    CEFBS_None, // VCLZLSBB = 1926
22091    CEFBS_None, // VCLZW = 1927
22092    CEFBS_None, // VCMPBFP = 1928
22093    CEFBS_None, // VCMPBFP_rec = 1929
22094    CEFBS_None, // VCMPEQFP = 1930
22095    CEFBS_None, // VCMPEQFP_rec = 1931
22096    CEFBS_None, // VCMPEQUB = 1932
22097    CEFBS_None, // VCMPEQUB_rec = 1933
22098    CEFBS_None, // VCMPEQUD = 1934
22099    CEFBS_None, // VCMPEQUD_rec = 1935
22100    CEFBS_None, // VCMPEQUH = 1936
22101    CEFBS_None, // VCMPEQUH_rec = 1937
22102    CEFBS_None, // VCMPEQUQ = 1938
22103    CEFBS_None, // VCMPEQUQ_rec = 1939
22104    CEFBS_None, // VCMPEQUW = 1940
22105    CEFBS_None, // VCMPEQUW_rec = 1941
22106    CEFBS_None, // VCMPGEFP = 1942
22107    CEFBS_None, // VCMPGEFP_rec = 1943
22108    CEFBS_None, // VCMPGTFP = 1944
22109    CEFBS_None, // VCMPGTFP_rec = 1945
22110    CEFBS_None, // VCMPGTSB = 1946
22111    CEFBS_None, // VCMPGTSB_rec = 1947
22112    CEFBS_None, // VCMPGTSD = 1948
22113    CEFBS_None, // VCMPGTSD_rec = 1949
22114    CEFBS_None, // VCMPGTSH = 1950
22115    CEFBS_None, // VCMPGTSH_rec = 1951
22116    CEFBS_None, // VCMPGTSQ = 1952
22117    CEFBS_None, // VCMPGTSQ_rec = 1953
22118    CEFBS_None, // VCMPGTSW = 1954
22119    CEFBS_None, // VCMPGTSW_rec = 1955
22120    CEFBS_None, // VCMPGTUB = 1956
22121    CEFBS_None, // VCMPGTUB_rec = 1957
22122    CEFBS_None, // VCMPGTUD = 1958
22123    CEFBS_None, // VCMPGTUD_rec = 1959
22124    CEFBS_None, // VCMPGTUH = 1960
22125    CEFBS_None, // VCMPGTUH_rec = 1961
22126    CEFBS_None, // VCMPGTUQ = 1962
22127    CEFBS_None, // VCMPGTUQ_rec = 1963
22128    CEFBS_None, // VCMPGTUW = 1964
22129    CEFBS_None, // VCMPGTUW_rec = 1965
22130    CEFBS_None, // VCMPNEB = 1966
22131    CEFBS_None, // VCMPNEB_rec = 1967
22132    CEFBS_None, // VCMPNEH = 1968
22133    CEFBS_None, // VCMPNEH_rec = 1969
22134    CEFBS_None, // VCMPNEW = 1970
22135    CEFBS_None, // VCMPNEW_rec = 1971
22136    CEFBS_None, // VCMPNEZB = 1972
22137    CEFBS_None, // VCMPNEZB_rec = 1973
22138    CEFBS_None, // VCMPNEZH = 1974
22139    CEFBS_None, // VCMPNEZH_rec = 1975
22140    CEFBS_None, // VCMPNEZW = 1976
22141    CEFBS_None, // VCMPNEZW_rec = 1977
22142    CEFBS_None, // VCMPSQ = 1978
22143    CEFBS_None, // VCMPUQ = 1979
22144    CEFBS_None, // VCNTMBB = 1980
22145    CEFBS_None, // VCNTMBD = 1981
22146    CEFBS_None, // VCNTMBH = 1982
22147    CEFBS_None, // VCNTMBW = 1983
22148    CEFBS_None, // VCTSXS = 1984
22149    CEFBS_None, // VCTSXS_0 = 1985
22150    CEFBS_None, // VCTUXS = 1986
22151    CEFBS_None, // VCTUXS_0 = 1987
22152    CEFBS_None, // VCTZB = 1988
22153    CEFBS_None, // VCTZD = 1989
22154    CEFBS_None, // VCTZDM = 1990
22155    CEFBS_None, // VCTZH = 1991
22156    CEFBS_None, // VCTZLSBB = 1992
22157    CEFBS_None, // VCTZW = 1993
22158    CEFBS_None, // VDIVESD = 1994
22159    CEFBS_None, // VDIVESQ = 1995
22160    CEFBS_None, // VDIVESW = 1996
22161    CEFBS_None, // VDIVEUD = 1997
22162    CEFBS_None, // VDIVEUQ = 1998
22163    CEFBS_None, // VDIVEUW = 1999
22164    CEFBS_None, // VDIVSD = 2000
22165    CEFBS_None, // VDIVSQ = 2001
22166    CEFBS_None, // VDIVSW = 2002
22167    CEFBS_None, // VDIVUD = 2003
22168    CEFBS_None, // VDIVUQ = 2004
22169    CEFBS_None, // VDIVUW = 2005
22170    CEFBS_None, // VEQV = 2006
22171    CEFBS_None, // VEXPANDBM = 2007
22172    CEFBS_None, // VEXPANDDM = 2008
22173    CEFBS_None, // VEXPANDHM = 2009
22174    CEFBS_None, // VEXPANDQM = 2010
22175    CEFBS_None, // VEXPANDWM = 2011
22176    CEFBS_None, // VEXPTEFP = 2012
22177    CEFBS_None, // VEXTDDVLX = 2013
22178    CEFBS_None, // VEXTDDVRX = 2014
22179    CEFBS_None, // VEXTDUBVLX = 2015
22180    CEFBS_None, // VEXTDUBVRX = 2016
22181    CEFBS_None, // VEXTDUHVLX = 2017
22182    CEFBS_None, // VEXTDUHVRX = 2018
22183    CEFBS_None, // VEXTDUWVLX = 2019
22184    CEFBS_None, // VEXTDUWVRX = 2020
22185    CEFBS_None, // VEXTRACTBM = 2021
22186    CEFBS_None, // VEXTRACTD = 2022
22187    CEFBS_None, // VEXTRACTDM = 2023
22188    CEFBS_None, // VEXTRACTHM = 2024
22189    CEFBS_None, // VEXTRACTQM = 2025
22190    CEFBS_None, // VEXTRACTUB = 2026
22191    CEFBS_None, // VEXTRACTUH = 2027
22192    CEFBS_None, // VEXTRACTUW = 2028
22193    CEFBS_None, // VEXTRACTWM = 2029
22194    CEFBS_None, // VEXTSB2D = 2030
22195    CEFBS_None, // VEXTSB2Ds = 2031
22196    CEFBS_None, // VEXTSB2W = 2032
22197    CEFBS_None, // VEXTSB2Ws = 2033
22198    CEFBS_None, // VEXTSD2Q = 2034
22199    CEFBS_None, // VEXTSH2D = 2035
22200    CEFBS_None, // VEXTSH2Ds = 2036
22201    CEFBS_None, // VEXTSH2W = 2037
22202    CEFBS_None, // VEXTSH2Ws = 2038
22203    CEFBS_None, // VEXTSW2D = 2039
22204    CEFBS_None, // VEXTSW2Ds = 2040
22205    CEFBS_None, // VEXTUBLX = 2041
22206    CEFBS_None, // VEXTUBRX = 2042
22207    CEFBS_None, // VEXTUHLX = 2043
22208    CEFBS_None, // VEXTUHRX = 2044
22209    CEFBS_None, // VEXTUWLX = 2045
22210    CEFBS_None, // VEXTUWRX = 2046
22211    CEFBS_None, // VGBBD = 2047
22212    CEFBS_None, // VGNB = 2048
22213    CEFBS_None, // VINSBLX = 2049
22214    CEFBS_None, // VINSBRX = 2050
22215    CEFBS_None, // VINSBVLX = 2051
22216    CEFBS_None, // VINSBVRX = 2052
22217    CEFBS_None, // VINSD = 2053
22218    CEFBS_None, // VINSDLX = 2054
22219    CEFBS_None, // VINSDRX = 2055
22220    CEFBS_None, // VINSERTB = 2056
22221    CEFBS_None, // VINSERTD = 2057
22222    CEFBS_None, // VINSERTH = 2058
22223    CEFBS_None, // VINSERTW = 2059
22224    CEFBS_None, // VINSHLX = 2060
22225    CEFBS_None, // VINSHRX = 2061
22226    CEFBS_None, // VINSHVLX = 2062
22227    CEFBS_None, // VINSHVRX = 2063
22228    CEFBS_None, // VINSW = 2064
22229    CEFBS_None, // VINSWLX = 2065
22230    CEFBS_None, // VINSWRX = 2066
22231    CEFBS_None, // VINSWVLX = 2067
22232    CEFBS_None, // VINSWVRX = 2068
22233    CEFBS_None, // VLOGEFP = 2069
22234    CEFBS_None, // VMADDFP = 2070
22235    CEFBS_None, // VMAXFP = 2071
22236    CEFBS_None, // VMAXSB = 2072
22237    CEFBS_None, // VMAXSD = 2073
22238    CEFBS_None, // VMAXSH = 2074
22239    CEFBS_None, // VMAXSW = 2075
22240    CEFBS_None, // VMAXUB = 2076
22241    CEFBS_None, // VMAXUD = 2077
22242    CEFBS_None, // VMAXUH = 2078
22243    CEFBS_None, // VMAXUW = 2079
22244    CEFBS_None, // VMHADDSHS = 2080
22245    CEFBS_None, // VMHRADDSHS = 2081
22246    CEFBS_None, // VMINFP = 2082
22247    CEFBS_None, // VMINSB = 2083
22248    CEFBS_None, // VMINSD = 2084
22249    CEFBS_None, // VMINSH = 2085
22250    CEFBS_None, // VMINSW = 2086
22251    CEFBS_None, // VMINUB = 2087
22252    CEFBS_None, // VMINUD = 2088
22253    CEFBS_None, // VMINUH = 2089
22254    CEFBS_None, // VMINUW = 2090
22255    CEFBS_None, // VMLADDUHM = 2091
22256    CEFBS_None, // VMODSD = 2092
22257    CEFBS_None, // VMODSQ = 2093
22258    CEFBS_None, // VMODSW = 2094
22259    CEFBS_None, // VMODUD = 2095
22260    CEFBS_None, // VMODUQ = 2096
22261    CEFBS_None, // VMODUW = 2097
22262    CEFBS_None, // VMRGEW = 2098
22263    CEFBS_None, // VMRGHB = 2099
22264    CEFBS_None, // VMRGHH = 2100
22265    CEFBS_None, // VMRGHW = 2101
22266    CEFBS_None, // VMRGLB = 2102
22267    CEFBS_None, // VMRGLH = 2103
22268    CEFBS_None, // VMRGLW = 2104
22269    CEFBS_None, // VMRGOW = 2105
22270    CEFBS_None, // VMSUMCUD = 2106
22271    CEFBS_None, // VMSUMMBM = 2107
22272    CEFBS_None, // VMSUMSHM = 2108
22273    CEFBS_None, // VMSUMSHS = 2109
22274    CEFBS_None, // VMSUMUBM = 2110
22275    CEFBS_None, // VMSUMUDM = 2111
22276    CEFBS_None, // VMSUMUHM = 2112
22277    CEFBS_None, // VMSUMUHS = 2113
22278    CEFBS_None, // VMUL10CUQ = 2114
22279    CEFBS_None, // VMUL10ECUQ = 2115
22280    CEFBS_None, // VMUL10EUQ = 2116
22281    CEFBS_None, // VMUL10UQ = 2117
22282    CEFBS_None, // VMULESB = 2118
22283    CEFBS_None, // VMULESD = 2119
22284    CEFBS_None, // VMULESH = 2120
22285    CEFBS_None, // VMULESW = 2121
22286    CEFBS_None, // VMULEUB = 2122
22287    CEFBS_None, // VMULEUD = 2123
22288    CEFBS_None, // VMULEUH = 2124
22289    CEFBS_None, // VMULEUW = 2125
22290    CEFBS_None, // VMULHSD = 2126
22291    CEFBS_None, // VMULHSW = 2127
22292    CEFBS_None, // VMULHUD = 2128
22293    CEFBS_None, // VMULHUW = 2129
22294    CEFBS_None, // VMULLD = 2130
22295    CEFBS_None, // VMULOSB = 2131
22296    CEFBS_None, // VMULOSD = 2132
22297    CEFBS_None, // VMULOSH = 2133
22298    CEFBS_None, // VMULOSW = 2134
22299    CEFBS_None, // VMULOUB = 2135
22300    CEFBS_None, // VMULOUD = 2136
22301    CEFBS_None, // VMULOUH = 2137
22302    CEFBS_None, // VMULOUW = 2138
22303    CEFBS_None, // VMULUWM = 2139
22304    CEFBS_None, // VNAND = 2140
22305    CEFBS_None, // VNCIPHER = 2141
22306    CEFBS_None, // VNCIPHERLAST = 2142
22307    CEFBS_None, // VNEGD = 2143
22308    CEFBS_None, // VNEGW = 2144
22309    CEFBS_None, // VNMSUBFP = 2145
22310    CEFBS_None, // VNOR = 2146
22311    CEFBS_None, // VOR = 2147
22312    CEFBS_None, // VORC = 2148
22313    CEFBS_None, // VPDEPD = 2149
22314    CEFBS_None, // VPERM = 2150
22315    CEFBS_None, // VPERMR = 2151
22316    CEFBS_None, // VPERMXOR = 2152
22317    CEFBS_None, // VPEXTD = 2153
22318    CEFBS_None, // VPKPX = 2154
22319    CEFBS_None, // VPKSDSS = 2155
22320    CEFBS_None, // VPKSDUS = 2156
22321    CEFBS_None, // VPKSHSS = 2157
22322    CEFBS_None, // VPKSHUS = 2158
22323    CEFBS_None, // VPKSWSS = 2159
22324    CEFBS_None, // VPKSWUS = 2160
22325    CEFBS_None, // VPKUDUM = 2161
22326    CEFBS_None, // VPKUDUS = 2162
22327    CEFBS_None, // VPKUHUM = 2163
22328    CEFBS_None, // VPKUHUS = 2164
22329    CEFBS_None, // VPKUWUM = 2165
22330    CEFBS_None, // VPKUWUS = 2166
22331    CEFBS_None, // VPMSUMB = 2167
22332    CEFBS_None, // VPMSUMD = 2168
22333    CEFBS_None, // VPMSUMH = 2169
22334    CEFBS_None, // VPMSUMW = 2170
22335    CEFBS_None, // VPOPCNTB = 2171
22336    CEFBS_None, // VPOPCNTD = 2172
22337    CEFBS_None, // VPOPCNTH = 2173
22338    CEFBS_None, // VPOPCNTW = 2174
22339    CEFBS_None, // VPRTYBD = 2175
22340    CEFBS_None, // VPRTYBQ = 2176
22341    CEFBS_None, // VPRTYBW = 2177
22342    CEFBS_None, // VREFP = 2178
22343    CEFBS_None, // VRFIM = 2179
22344    CEFBS_None, // VRFIN = 2180
22345    CEFBS_None, // VRFIP = 2181
22346    CEFBS_None, // VRFIZ = 2182
22347    CEFBS_None, // VRLB = 2183
22348    CEFBS_None, // VRLD = 2184
22349    CEFBS_None, // VRLDMI = 2185
22350    CEFBS_None, // VRLDNM = 2186
22351    CEFBS_None, // VRLH = 2187
22352    CEFBS_None, // VRLQ = 2188
22353    CEFBS_None, // VRLQMI = 2189
22354    CEFBS_None, // VRLQNM = 2190
22355    CEFBS_None, // VRLW = 2191
22356    CEFBS_None, // VRLWMI = 2192
22357    CEFBS_None, // VRLWNM = 2193
22358    CEFBS_None, // VRSQRTEFP = 2194
22359    CEFBS_None, // VSBOX = 2195
22360    CEFBS_None, // VSEL = 2196
22361    CEFBS_None, // VSHASIGMAD = 2197
22362    CEFBS_None, // VSHASIGMAW = 2198
22363    CEFBS_None, // VSL = 2199
22364    CEFBS_None, // VSLB = 2200
22365    CEFBS_None, // VSLD = 2201
22366    CEFBS_None, // VSLDBI = 2202
22367    CEFBS_None, // VSLDOI = 2203
22368    CEFBS_None, // VSLH = 2204
22369    CEFBS_None, // VSLO = 2205
22370    CEFBS_None, // VSLQ = 2206
22371    CEFBS_None, // VSLV = 2207
22372    CEFBS_None, // VSLW = 2208
22373    CEFBS_None, // VSPLTB = 2209
22374    CEFBS_None, // VSPLTBs = 2210
22375    CEFBS_None, // VSPLTH = 2211
22376    CEFBS_None, // VSPLTHs = 2212
22377    CEFBS_None, // VSPLTISB = 2213
22378    CEFBS_None, // VSPLTISH = 2214
22379    CEFBS_None, // VSPLTISW = 2215
22380    CEFBS_None, // VSPLTW = 2216
22381    CEFBS_None, // VSR = 2217
22382    CEFBS_None, // VSRAB = 2218
22383    CEFBS_None, // VSRAD = 2219
22384    CEFBS_None, // VSRAH = 2220
22385    CEFBS_None, // VSRAQ = 2221
22386    CEFBS_None, // VSRAW = 2222
22387    CEFBS_None, // VSRB = 2223
22388    CEFBS_None, // VSRD = 2224
22389    CEFBS_None, // VSRDBI = 2225
22390    CEFBS_None, // VSRH = 2226
22391    CEFBS_None, // VSRO = 2227
22392    CEFBS_None, // VSRQ = 2228
22393    CEFBS_None, // VSRV = 2229
22394    CEFBS_None, // VSRW = 2230
22395    CEFBS_None, // VSTRIBL = 2231
22396    CEFBS_None, // VSTRIBL_rec = 2232
22397    CEFBS_None, // VSTRIBR = 2233
22398    CEFBS_None, // VSTRIBR_rec = 2234
22399    CEFBS_None, // VSTRIHL = 2235
22400    CEFBS_None, // VSTRIHL_rec = 2236
22401    CEFBS_None, // VSTRIHR = 2237
22402    CEFBS_None, // VSTRIHR_rec = 2238
22403    CEFBS_None, // VSUBCUQ = 2239
22404    CEFBS_None, // VSUBCUW = 2240
22405    CEFBS_None, // VSUBECUQ = 2241
22406    CEFBS_None, // VSUBEUQM = 2242
22407    CEFBS_None, // VSUBFP = 2243
22408    CEFBS_None, // VSUBSBS = 2244
22409    CEFBS_None, // VSUBSHS = 2245
22410    CEFBS_None, // VSUBSWS = 2246
22411    CEFBS_None, // VSUBUBM = 2247
22412    CEFBS_None, // VSUBUBS = 2248
22413    CEFBS_None, // VSUBUDM = 2249
22414    CEFBS_None, // VSUBUHM = 2250
22415    CEFBS_None, // VSUBUHS = 2251
22416    CEFBS_None, // VSUBUQM = 2252
22417    CEFBS_None, // VSUBUWM = 2253
22418    CEFBS_None, // VSUBUWS = 2254
22419    CEFBS_None, // VSUM2SWS = 2255
22420    CEFBS_None, // VSUM4SBS = 2256
22421    CEFBS_None, // VSUM4SHS = 2257
22422    CEFBS_None, // VSUM4UBS = 2258
22423    CEFBS_None, // VSUMSWS = 2259
22424    CEFBS_None, // VUPKHPX = 2260
22425    CEFBS_None, // VUPKHSB = 2261
22426    CEFBS_None, // VUPKHSH = 2262
22427    CEFBS_None, // VUPKHSW = 2263
22428    CEFBS_None, // VUPKLPX = 2264
22429    CEFBS_None, // VUPKLSB = 2265
22430    CEFBS_None, // VUPKLSH = 2266
22431    CEFBS_None, // VUPKLSW = 2267
22432    CEFBS_None, // VXOR = 2268
22433    CEFBS_None, // V_SET0 = 2269
22434    CEFBS_None, // V_SET0B = 2270
22435    CEFBS_None, // V_SET0H = 2271
22436    CEFBS_None, // V_SETALLONES = 2272
22437    CEFBS_None, // V_SETALLONESB = 2273
22438    CEFBS_None, // V_SETALLONESH = 2274
22439    CEFBS_None, // WAIT = 2275
22440    CEFBS_None, // WRTEE = 2276
22441    CEFBS_None, // WRTEEI = 2277
22442    CEFBS_None, // XOR = 2278
22443    CEFBS_None, // XOR8 = 2279
22444    CEFBS_None, // XOR8_rec = 2280
22445    CEFBS_None, // XORI = 2281
22446    CEFBS_None, // XORI8 = 2282
22447    CEFBS_None, // XORIS = 2283
22448    CEFBS_None, // XORIS8 = 2284
22449    CEFBS_None, // XOR_rec = 2285
22450    CEFBS_None, // XSABSDP = 2286
22451    CEFBS_None, // XSABSQP = 2287
22452    CEFBS_None, // XSADDDP = 2288
22453    CEFBS_None, // XSADDQP = 2289
22454    CEFBS_None, // XSADDQPO = 2290
22455    CEFBS_None, // XSADDSP = 2291
22456    CEFBS_None, // XSCMPEQDP = 2292
22457    CEFBS_None, // XSCMPEQQP = 2293
22458    CEFBS_None, // XSCMPEXPDP = 2294
22459    CEFBS_None, // XSCMPEXPQP = 2295
22460    CEFBS_None, // XSCMPGEDP = 2296
22461    CEFBS_None, // XSCMPGEQP = 2297
22462    CEFBS_None, // XSCMPGTDP = 2298
22463    CEFBS_None, // XSCMPGTQP = 2299
22464    CEFBS_None, // XSCMPODP = 2300
22465    CEFBS_None, // XSCMPOQP = 2301
22466    CEFBS_None, // XSCMPUDP = 2302
22467    CEFBS_None, // XSCMPUQP = 2303
22468    CEFBS_None, // XSCPSGNDP = 2304
22469    CEFBS_None, // XSCPSGNQP = 2305
22470    CEFBS_None, // XSCVDPHP = 2306
22471    CEFBS_None, // XSCVDPQP = 2307
22472    CEFBS_None, // XSCVDPSP = 2308
22473    CEFBS_None, // XSCVDPSPN = 2309
22474    CEFBS_None, // XSCVDPSXDS = 2310
22475    CEFBS_None, // XSCVDPSXDSs = 2311
22476    CEFBS_None, // XSCVDPSXWS = 2312
22477    CEFBS_None, // XSCVDPSXWSs = 2313
22478    CEFBS_None, // XSCVDPUXDS = 2314
22479    CEFBS_None, // XSCVDPUXDSs = 2315
22480    CEFBS_None, // XSCVDPUXWS = 2316
22481    CEFBS_None, // XSCVDPUXWSs = 2317
22482    CEFBS_None, // XSCVHPDP = 2318
22483    CEFBS_None, // XSCVQPDP = 2319
22484    CEFBS_None, // XSCVQPDPO = 2320
22485    CEFBS_None, // XSCVQPSDZ = 2321
22486    CEFBS_None, // XSCVQPSQZ = 2322
22487    CEFBS_None, // XSCVQPSWZ = 2323
22488    CEFBS_None, // XSCVQPUDZ = 2324
22489    CEFBS_None, // XSCVQPUQZ = 2325
22490    CEFBS_None, // XSCVQPUWZ = 2326
22491    CEFBS_None, // XSCVSDQP = 2327
22492    CEFBS_None, // XSCVSPDP = 2328
22493    CEFBS_None, // XSCVSPDPN = 2329
22494    CEFBS_None, // XSCVSQQP = 2330
22495    CEFBS_None, // XSCVSXDDP = 2331
22496    CEFBS_None, // XSCVSXDSP = 2332
22497    CEFBS_None, // XSCVUDQP = 2333
22498    CEFBS_None, // XSCVUQQP = 2334
22499    CEFBS_None, // XSCVUXDDP = 2335
22500    CEFBS_None, // XSCVUXDSP = 2336
22501    CEFBS_None, // XSDIVDP = 2337
22502    CEFBS_None, // XSDIVQP = 2338
22503    CEFBS_None, // XSDIVQPO = 2339
22504    CEFBS_None, // XSDIVSP = 2340
22505    CEFBS_None, // XSIEXPDP = 2341
22506    CEFBS_None, // XSIEXPQP = 2342
22507    CEFBS_None, // XSMADDADP = 2343
22508    CEFBS_None, // XSMADDASP = 2344
22509    CEFBS_None, // XSMADDMDP = 2345
22510    CEFBS_None, // XSMADDMSP = 2346
22511    CEFBS_None, // XSMADDQP = 2347
22512    CEFBS_None, // XSMADDQPO = 2348
22513    CEFBS_None, // XSMAXCDP = 2349
22514    CEFBS_None, // XSMAXCQP = 2350
22515    CEFBS_None, // XSMAXDP = 2351
22516    CEFBS_None, // XSMAXJDP = 2352
22517    CEFBS_None, // XSMINCDP = 2353
22518    CEFBS_None, // XSMINCQP = 2354
22519    CEFBS_None, // XSMINDP = 2355
22520    CEFBS_None, // XSMINJDP = 2356
22521    CEFBS_None, // XSMSUBADP = 2357
22522    CEFBS_None, // XSMSUBASP = 2358
22523    CEFBS_None, // XSMSUBMDP = 2359
22524    CEFBS_None, // XSMSUBMSP = 2360
22525    CEFBS_None, // XSMSUBQP = 2361
22526    CEFBS_None, // XSMSUBQPO = 2362
22527    CEFBS_None, // XSMULDP = 2363
22528    CEFBS_None, // XSMULQP = 2364
22529    CEFBS_None, // XSMULQPO = 2365
22530    CEFBS_None, // XSMULSP = 2366
22531    CEFBS_None, // XSNABSDP = 2367
22532    CEFBS_None, // XSNABSDPs = 2368
22533    CEFBS_None, // XSNABSQP = 2369
22534    CEFBS_None, // XSNEGDP = 2370
22535    CEFBS_None, // XSNEGQP = 2371
22536    CEFBS_None, // XSNMADDADP = 2372
22537    CEFBS_None, // XSNMADDASP = 2373
22538    CEFBS_None, // XSNMADDMDP = 2374
22539    CEFBS_None, // XSNMADDMSP = 2375
22540    CEFBS_None, // XSNMADDQP = 2376
22541    CEFBS_None, // XSNMADDQPO = 2377
22542    CEFBS_None, // XSNMSUBADP = 2378
22543    CEFBS_None, // XSNMSUBASP = 2379
22544    CEFBS_None, // XSNMSUBMDP = 2380
22545    CEFBS_None, // XSNMSUBMSP = 2381
22546    CEFBS_None, // XSNMSUBQP = 2382
22547    CEFBS_None, // XSNMSUBQPO = 2383
22548    CEFBS_None, // XSRDPI = 2384
22549    CEFBS_None, // XSRDPIC = 2385
22550    CEFBS_None, // XSRDPIM = 2386
22551    CEFBS_None, // XSRDPIP = 2387
22552    CEFBS_None, // XSRDPIZ = 2388
22553    CEFBS_None, // XSREDP = 2389
22554    CEFBS_None, // XSRESP = 2390
22555    CEFBS_None, // XSRQPI = 2391
22556    CEFBS_None, // XSRQPIX = 2392
22557    CEFBS_None, // XSRQPXP = 2393
22558    CEFBS_None, // XSRSP = 2394
22559    CEFBS_None, // XSRSQRTEDP = 2395
22560    CEFBS_None, // XSRSQRTESP = 2396
22561    CEFBS_None, // XSSQRTDP = 2397
22562    CEFBS_None, // XSSQRTQP = 2398
22563    CEFBS_None, // XSSQRTQPO = 2399
22564    CEFBS_None, // XSSQRTSP = 2400
22565    CEFBS_None, // XSSUBDP = 2401
22566    CEFBS_None, // XSSUBQP = 2402
22567    CEFBS_None, // XSSUBQPO = 2403
22568    CEFBS_None, // XSSUBSP = 2404
22569    CEFBS_None, // XSTDIVDP = 2405
22570    CEFBS_None, // XSTSQRTDP = 2406
22571    CEFBS_None, // XSTSTDCDP = 2407
22572    CEFBS_None, // XSTSTDCQP = 2408
22573    CEFBS_None, // XSTSTDCSP = 2409
22574    CEFBS_None, // XSXEXPDP = 2410
22575    CEFBS_None, // XSXEXPQP = 2411
22576    CEFBS_None, // XSXSIGDP = 2412
22577    CEFBS_None, // XSXSIGQP = 2413
22578    CEFBS_None, // XVABSDP = 2414
22579    CEFBS_None, // XVABSSP = 2415
22580    CEFBS_None, // XVADDDP = 2416
22581    CEFBS_None, // XVADDSP = 2417
22582    CEFBS_None, // XVBF16GER2 = 2418
22583    CEFBS_None, // XVBF16GER2NN = 2419
22584    CEFBS_None, // XVBF16GER2NP = 2420
22585    CEFBS_None, // XVBF16GER2PN = 2421
22586    CEFBS_None, // XVBF16GER2PP = 2422
22587    CEFBS_None, // XVBF16GER2W = 2423
22588    CEFBS_None, // XVBF16GER2WNN = 2424
22589    CEFBS_None, // XVBF16GER2WNP = 2425
22590    CEFBS_None, // XVBF16GER2WPN = 2426
22591    CEFBS_None, // XVBF16GER2WPP = 2427
22592    CEFBS_None, // XVCMPEQDP = 2428
22593    CEFBS_None, // XVCMPEQDP_rec = 2429
22594    CEFBS_None, // XVCMPEQSP = 2430
22595    CEFBS_None, // XVCMPEQSP_rec = 2431
22596    CEFBS_None, // XVCMPGEDP = 2432
22597    CEFBS_None, // XVCMPGEDP_rec = 2433
22598    CEFBS_None, // XVCMPGESP = 2434
22599    CEFBS_None, // XVCMPGESP_rec = 2435
22600    CEFBS_None, // XVCMPGTDP = 2436
22601    CEFBS_None, // XVCMPGTDP_rec = 2437
22602    CEFBS_None, // XVCMPGTSP = 2438
22603    CEFBS_None, // XVCMPGTSP_rec = 2439
22604    CEFBS_None, // XVCPSGNDP = 2440
22605    CEFBS_None, // XVCPSGNSP = 2441
22606    CEFBS_None, // XVCVBF16SPN = 2442
22607    CEFBS_None, // XVCVDPSP = 2443
22608    CEFBS_None, // XVCVDPSXDS = 2444
22609    CEFBS_None, // XVCVDPSXWS = 2445
22610    CEFBS_None, // XVCVDPUXDS = 2446
22611    CEFBS_None, // XVCVDPUXWS = 2447
22612    CEFBS_None, // XVCVHPSP = 2448
22613    CEFBS_None, // XVCVSPBF16 = 2449
22614    CEFBS_None, // XVCVSPDP = 2450
22615    CEFBS_None, // XVCVSPHP = 2451
22616    CEFBS_None, // XVCVSPSXDS = 2452
22617    CEFBS_None, // XVCVSPSXWS = 2453
22618    CEFBS_None, // XVCVSPUXDS = 2454
22619    CEFBS_None, // XVCVSPUXWS = 2455
22620    CEFBS_None, // XVCVSXDDP = 2456
22621    CEFBS_None, // XVCVSXDSP = 2457
22622    CEFBS_None, // XVCVSXWDP = 2458
22623    CEFBS_None, // XVCVSXWSP = 2459
22624    CEFBS_None, // XVCVUXDDP = 2460
22625    CEFBS_None, // XVCVUXDSP = 2461
22626    CEFBS_None, // XVCVUXWDP = 2462
22627    CEFBS_None, // XVCVUXWSP = 2463
22628    CEFBS_None, // XVDIVDP = 2464
22629    CEFBS_None, // XVDIVSP = 2465
22630    CEFBS_None, // XVF16GER2 = 2466
22631    CEFBS_None, // XVF16GER2NN = 2467
22632    CEFBS_None, // XVF16GER2NP = 2468
22633    CEFBS_None, // XVF16GER2PN = 2469
22634    CEFBS_None, // XVF16GER2PP = 2470
22635    CEFBS_None, // XVF16GER2W = 2471
22636    CEFBS_None, // XVF16GER2WNN = 2472
22637    CEFBS_None, // XVF16GER2WNP = 2473
22638    CEFBS_None, // XVF16GER2WPN = 2474
22639    CEFBS_None, // XVF16GER2WPP = 2475
22640    CEFBS_None, // XVF32GER = 2476
22641    CEFBS_None, // XVF32GERNN = 2477
22642    CEFBS_None, // XVF32GERNP = 2478
22643    CEFBS_None, // XVF32GERPN = 2479
22644    CEFBS_None, // XVF32GERPP = 2480
22645    CEFBS_None, // XVF32GERW = 2481
22646    CEFBS_None, // XVF32GERWNN = 2482
22647    CEFBS_None, // XVF32GERWNP = 2483
22648    CEFBS_None, // XVF32GERWPN = 2484
22649    CEFBS_None, // XVF32GERWPP = 2485
22650    CEFBS_None, // XVF64GER = 2486
22651    CEFBS_None, // XVF64GERNN = 2487
22652    CEFBS_None, // XVF64GERNP = 2488
22653    CEFBS_None, // XVF64GERPN = 2489
22654    CEFBS_None, // XVF64GERPP = 2490
22655    CEFBS_None, // XVF64GERW = 2491
22656    CEFBS_None, // XVF64GERWNN = 2492
22657    CEFBS_None, // XVF64GERWNP = 2493
22658    CEFBS_None, // XVF64GERWPN = 2494
22659    CEFBS_None, // XVF64GERWPP = 2495
22660    CEFBS_None, // XVI16GER2 = 2496
22661    CEFBS_None, // XVI16GER2PP = 2497
22662    CEFBS_None, // XVI16GER2S = 2498
22663    CEFBS_None, // XVI16GER2SPP = 2499
22664    CEFBS_None, // XVI16GER2SW = 2500
22665    CEFBS_None, // XVI16GER2SWPP = 2501
22666    CEFBS_None, // XVI16GER2W = 2502
22667    CEFBS_None, // XVI16GER2WPP = 2503
22668    CEFBS_None, // XVI4GER8 = 2504
22669    CEFBS_None, // XVI4GER8PP = 2505
22670    CEFBS_None, // XVI4GER8W = 2506
22671    CEFBS_None, // XVI4GER8WPP = 2507
22672    CEFBS_None, // XVI8GER4 = 2508
22673    CEFBS_None, // XVI8GER4PP = 2509
22674    CEFBS_None, // XVI8GER4SPP = 2510
22675    CEFBS_None, // XVI8GER4W = 2511
22676    CEFBS_None, // XVI8GER4WPP = 2512
22677    CEFBS_None, // XVI8GER4WSPP = 2513
22678    CEFBS_None, // XVIEXPDP = 2514
22679    CEFBS_None, // XVIEXPSP = 2515
22680    CEFBS_None, // XVMADDADP = 2516
22681    CEFBS_None, // XVMADDASP = 2517
22682    CEFBS_None, // XVMADDMDP = 2518
22683    CEFBS_None, // XVMADDMSP = 2519
22684    CEFBS_None, // XVMAXDP = 2520
22685    CEFBS_None, // XVMAXSP = 2521
22686    CEFBS_None, // XVMINDP = 2522
22687    CEFBS_None, // XVMINSP = 2523
22688    CEFBS_None, // XVMSUBADP = 2524
22689    CEFBS_None, // XVMSUBASP = 2525
22690    CEFBS_None, // XVMSUBMDP = 2526
22691    CEFBS_None, // XVMSUBMSP = 2527
22692    CEFBS_None, // XVMULDP = 2528
22693    CEFBS_None, // XVMULSP = 2529
22694    CEFBS_None, // XVNABSDP = 2530
22695    CEFBS_None, // XVNABSSP = 2531
22696    CEFBS_None, // XVNEGDP = 2532
22697    CEFBS_None, // XVNEGSP = 2533
22698    CEFBS_None, // XVNMADDADP = 2534
22699    CEFBS_None, // XVNMADDASP = 2535
22700    CEFBS_None, // XVNMADDMDP = 2536
22701    CEFBS_None, // XVNMADDMSP = 2537
22702    CEFBS_None, // XVNMSUBADP = 2538
22703    CEFBS_None, // XVNMSUBASP = 2539
22704    CEFBS_None, // XVNMSUBMDP = 2540
22705    CEFBS_None, // XVNMSUBMSP = 2541
22706    CEFBS_None, // XVRDPI = 2542
22707    CEFBS_None, // XVRDPIC = 2543
22708    CEFBS_None, // XVRDPIM = 2544
22709    CEFBS_None, // XVRDPIP = 2545
22710    CEFBS_None, // XVRDPIZ = 2546
22711    CEFBS_None, // XVREDP = 2547
22712    CEFBS_None, // XVRESP = 2548
22713    CEFBS_None, // XVRSPI = 2549
22714    CEFBS_None, // XVRSPIC = 2550
22715    CEFBS_None, // XVRSPIM = 2551
22716    CEFBS_None, // XVRSPIP = 2552
22717    CEFBS_None, // XVRSPIZ = 2553
22718    CEFBS_None, // XVRSQRTEDP = 2554
22719    CEFBS_None, // XVRSQRTESP = 2555
22720    CEFBS_None, // XVSQRTDP = 2556
22721    CEFBS_None, // XVSQRTSP = 2557
22722    CEFBS_None, // XVSUBDP = 2558
22723    CEFBS_None, // XVSUBSP = 2559
22724    CEFBS_None, // XVTDIVDP = 2560
22725    CEFBS_None, // XVTDIVSP = 2561
22726    CEFBS_None, // XVTLSBB = 2562
22727    CEFBS_None, // XVTSQRTDP = 2563
22728    CEFBS_None, // XVTSQRTSP = 2564
22729    CEFBS_None, // XVTSTDCDP = 2565
22730    CEFBS_None, // XVTSTDCSP = 2566
22731    CEFBS_None, // XVXEXPDP = 2567
22732    CEFBS_None, // XVXEXPSP = 2568
22733    CEFBS_None, // XVXSIGDP = 2569
22734    CEFBS_None, // XVXSIGSP = 2570
22735    CEFBS_None, // XXBLENDVB = 2571
22736    CEFBS_None, // XXBLENDVD = 2572
22737    CEFBS_None, // XXBLENDVH = 2573
22738    CEFBS_None, // XXBLENDVW = 2574
22739    CEFBS_None, // XXBRD = 2575
22740    CEFBS_None, // XXBRH = 2576
22741    CEFBS_None, // XXBRQ = 2577
22742    CEFBS_None, // XXBRW = 2578
22743    CEFBS_None, // XXEVAL = 2579
22744    CEFBS_None, // XXEXTRACTUW = 2580
22745    CEFBS_None, // XXGENPCVBM = 2581
22746    CEFBS_None, // XXGENPCVDM = 2582
22747    CEFBS_None, // XXGENPCVHM = 2583
22748    CEFBS_None, // XXGENPCVWM = 2584
22749    CEFBS_None, // XXINSERTW = 2585
22750    CEFBS_None, // XXLAND = 2586
22751    CEFBS_None, // XXLANDC = 2587
22752    CEFBS_None, // XXLEQV = 2588
22753    CEFBS_None, // XXLEQVOnes = 2589
22754    CEFBS_None, // XXLNAND = 2590
22755    CEFBS_None, // XXLNOR = 2591
22756    CEFBS_None, // XXLOR = 2592
22757    CEFBS_None, // XXLORC = 2593
22758    CEFBS_None, // XXLORf = 2594
22759    CEFBS_None, // XXLXOR = 2595
22760    CEFBS_None, // XXLXORdpz = 2596
22761    CEFBS_None, // XXLXORspz = 2597
22762    CEFBS_None, // XXLXORz = 2598
22763    CEFBS_None, // XXMFACC = 2599
22764    CEFBS_None, // XXMFACCW = 2600
22765    CEFBS_None, // XXMRGHW = 2601
22766    CEFBS_None, // XXMRGLW = 2602
22767    CEFBS_None, // XXMTACC = 2603
22768    CEFBS_None, // XXMTACCW = 2604
22769    CEFBS_None, // XXPERM = 2605
22770    CEFBS_None, // XXPERMDI = 2606
22771    CEFBS_None, // XXPERMDIs = 2607
22772    CEFBS_None, // XXPERMR = 2608
22773    CEFBS_None, // XXPERMX = 2609
22774    CEFBS_None, // XXSEL = 2610
22775    CEFBS_None, // XXSETACCZ = 2611
22776    CEFBS_None, // XXSETACCZW = 2612
22777    CEFBS_None, // XXSLDWI = 2613
22778    CEFBS_None, // XXSLDWIs = 2614
22779    CEFBS_None, // XXSPLTI32DX = 2615
22780    CEFBS_None, // XXSPLTIB = 2616
22781    CEFBS_None, // XXSPLTIDP = 2617
22782    CEFBS_None, // XXSPLTIW = 2618
22783    CEFBS_None, // XXSPLTW = 2619
22784    CEFBS_None, // XXSPLTWs = 2620
22785    CEFBS_None, // gBC = 2621
22786    CEFBS_None, // gBCA = 2622
22787    CEFBS_None, // gBCAat = 2623
22788    CEFBS_None, // gBCCTR = 2624
22789    CEFBS_None, // gBCCTRL = 2625
22790    CEFBS_None, // gBCL = 2626
22791    CEFBS_None, // gBCLA = 2627
22792    CEFBS_None, // gBCLAat = 2628
22793    CEFBS_None, // gBCLR = 2629
22794    CEFBS_None, // gBCLRL = 2630
22795    CEFBS_None, // gBCLat = 2631
22796    CEFBS_None, // gBCat = 2632
22797  };
22798
22799  assert(Opcode < 2633);
22800  FeatureBitset AvailableFeatures = computeAvailableFeatures(Features);
22801  const FeatureBitset &RequiredFeatures = FeatureBitsets[RequiredFeaturesRefs[Opcode]];
22802  FeatureBitset MissingFeatures =
22803      (AvailableFeatures & RequiredFeatures) ^
22804      RequiredFeatures;
22805  if (MissingFeatures.any()) {
22806    std::ostringstream Msg;
22807    Msg << "Attempting to emit " << &PPCInstrNameData[PPCInstrNameIndices[Opcode]]
22808        << " instruction but the ";
22809    for (unsigned i = 0, e = MissingFeatures.size(); i != e; ++i)
22810      if (MissingFeatures.test(i))
22811        Msg << SubtargetFeatureNames[i] << " ";
22812    Msg << "predicate(s) are not met";
22813    report_fatal_error(Msg.str().c_str());
22814  }
22815#endif // NDEBUG
22816}
22817} // end namespace PPC_MC
22818} // end namespace llvm
22819#endif // ENABLE_INSTR_PREDICATE_VERIFIER
22820
22821#ifdef GET_INSTRMAP_INFO
22822#undef GET_INSTRMAP_INFO
22823namespace llvm {
22824
22825namespace PPC {
22826
22827enum IsVSXFMAAlt {
22828	IsVSXFMAAlt_1
22829};
22830
22831enum RC {
22832	RC_0,
22833	RC_1
22834};
22835
22836// getAltVSXFMAOpcode
22837LLVM_READONLY
22838int getAltVSXFMAOpcode(uint16_t Opcode) {
22839static const uint16_t getAltVSXFMAOpcodeTable[][2] = {
22840  { PPC::XSMADDADP, PPC::XSMADDMDP },
22841  { PPC::XSMADDASP, PPC::XSMADDMSP },
22842  { PPC::XSMSUBADP, PPC::XSMSUBMDP },
22843  { PPC::XSMSUBASP, PPC::XSMSUBMSP },
22844  { PPC::XSNMADDADP, PPC::XSNMADDMDP },
22845  { PPC::XSNMADDASP, PPC::XSNMADDMSP },
22846  { PPC::XSNMSUBADP, PPC::XSNMSUBMDP },
22847  { PPC::XSNMSUBASP, PPC::XSNMSUBMSP },
22848  { PPC::XVMADDADP, PPC::XVMADDMDP },
22849  { PPC::XVMADDASP, PPC::XVMADDMSP },
22850  { PPC::XVMSUBADP, PPC::XVMSUBMDP },
22851  { PPC::XVMSUBASP, PPC::XVMSUBMSP },
22852  { PPC::XVNMADDADP, PPC::XVNMADDMDP },
22853  { PPC::XVNMADDASP, PPC::XVNMADDMSP },
22854  { PPC::XVNMSUBADP, PPC::XVNMSUBMDP },
22855  { PPC::XVNMSUBASP, PPC::XVNMSUBMSP },
22856}; // End of getAltVSXFMAOpcodeTable
22857
22858  unsigned mid;
22859  unsigned start = 0;
22860  unsigned end = 16;
22861  while (start < end) {
22862    mid = start + (end - start) / 2;
22863    if (Opcode == getAltVSXFMAOpcodeTable[mid][0]) {
22864      break;
22865    }
22866    if (Opcode < getAltVSXFMAOpcodeTable[mid][0])
22867      end = mid;
22868    else
22869      start = mid + 1;
22870  }
22871  if (start == end)
22872    return -1; // Instruction doesn't exist in this table.
22873
22874  return getAltVSXFMAOpcodeTable[mid][1];
22875}
22876
22877// getNonRecordFormOpcode
22878LLVM_READONLY
22879int getNonRecordFormOpcode(uint16_t Opcode) {
22880static const uint16_t getNonRecordFormOpcodeTable[][2] = {
22881  { PPC::ADD4O_rec, PPC::ADD4O },
22882  { PPC::ADD4_rec, PPC::ADD4 },
22883  { PPC::ADD8O_rec, PPC::ADD8O },
22884  { PPC::ADD8_rec, PPC::ADD8 },
22885  { PPC::ADDC8O_rec, PPC::ADDC8O },
22886  { PPC::ADDC8_rec, PPC::ADDC8 },
22887  { PPC::ADDCO_rec, PPC::ADDCO },
22888  { PPC::ADDC_rec, PPC::ADDC },
22889  { PPC::ADDE8O_rec, PPC::ADDE8O },
22890  { PPC::ADDE8_rec, PPC::ADDE8 },
22891  { PPC::ADDEO_rec, PPC::ADDEO },
22892  { PPC::ADDE_rec, PPC::ADDE },
22893  { PPC::ADDIC_rec, PPC::ADDIC },
22894  { PPC::ADDME8O_rec, PPC::ADDME8O },
22895  { PPC::ADDME8_rec, PPC::ADDME8 },
22896  { PPC::ADDMEO_rec, PPC::ADDMEO },
22897  { PPC::ADDME_rec, PPC::ADDME },
22898  { PPC::ADDZE8O_rec, PPC::ADDZE8O },
22899  { PPC::ADDZE8_rec, PPC::ADDZE8 },
22900  { PPC::ADDZEO_rec, PPC::ADDZEO },
22901  { PPC::ADDZE_rec, PPC::ADDZE },
22902  { PPC::AND8_rec, PPC::AND8 },
22903  { PPC::ANDC8_rec, PPC::ANDC8 },
22904  { PPC::ANDC_rec, PPC::ANDC },
22905  { PPC::AND_rec, PPC::AND },
22906  { PPC::CNTLZD_rec, PPC::CNTLZD },
22907  { PPC::CNTLZW8_rec, PPC::CNTLZW8 },
22908  { PPC::CNTLZW_rec, PPC::CNTLZW },
22909  { PPC::CNTTZD_rec, PPC::CNTTZD },
22910  { PPC::CNTTZW8_rec, PPC::CNTTZW8 },
22911  { PPC::CNTTZW_rec, PPC::CNTTZW },
22912  { PPC::DIVDEO_rec, PPC::DIVDEO },
22913  { PPC::DIVDEUO_rec, PPC::DIVDEUO },
22914  { PPC::DIVDEU_rec, PPC::DIVDEU },
22915  { PPC::DIVDE_rec, PPC::DIVDE },
22916  { PPC::DIVDO_rec, PPC::DIVDO },
22917  { PPC::DIVDUO_rec, PPC::DIVDUO },
22918  { PPC::DIVDU_rec, PPC::DIVDU },
22919  { PPC::DIVD_rec, PPC::DIVD },
22920  { PPC::DIVWEO_rec, PPC::DIVWEO },
22921  { PPC::DIVWEUO_rec, PPC::DIVWEUO },
22922  { PPC::DIVWEU_rec, PPC::DIVWEU },
22923  { PPC::DIVWE_rec, PPC::DIVWE },
22924  { PPC::DIVWO_rec, PPC::DIVWO },
22925  { PPC::DIVWUO_rec, PPC::DIVWUO },
22926  { PPC::DIVWU_rec, PPC::DIVWU },
22927  { PPC::DIVW_rec, PPC::DIVW },
22928  { PPC::EQV8_rec, PPC::EQV8 },
22929  { PPC::EQV_rec, PPC::EQV },
22930  { PPC::EXTSB8_rec, PPC::EXTSB8 },
22931  { PPC::EXTSB_rec, PPC::EXTSB },
22932  { PPC::EXTSH8_rec, PPC::EXTSH8 },
22933  { PPC::EXTSH_rec, PPC::EXTSH },
22934  { PPC::EXTSWSLI_32_64_rec, PPC::EXTSWSLI_32_64 },
22935  { PPC::EXTSWSLI_rec, PPC::EXTSWSLI },
22936  { PPC::EXTSW_32_64_rec, PPC::EXTSW_32_64 },
22937  { PPC::EXTSW_rec, PPC::EXTSW },
22938  { PPC::FABSD_rec, PPC::FABSD },
22939  { PPC::FABSS_rec, PPC::FABSS },
22940  { PPC::FADDS_rec, PPC::FADDS },
22941  { PPC::FADD_rec, PPC::FADD },
22942  { PPC::FCFIDS_rec, PPC::FCFIDS },
22943  { PPC::FCFIDUS_rec, PPC::FCFIDUS },
22944  { PPC::FCFIDU_rec, PPC::FCFIDU },
22945  { PPC::FCFID_rec, PPC::FCFID },
22946  { PPC::FCPSGND_rec, PPC::FCPSGND },
22947  { PPC::FCPSGNS_rec, PPC::FCPSGNS },
22948  { PPC::FCTIDUZ_rec, PPC::FCTIDUZ },
22949  { PPC::FCTIDU_rec, PPC::FCTIDU },
22950  { PPC::FCTIDZ_rec, PPC::FCTIDZ },
22951  { PPC::FCTID_rec, PPC::FCTID },
22952  { PPC::FCTIWUZ_rec, PPC::FCTIWUZ },
22953  { PPC::FCTIWU_rec, PPC::FCTIWU },
22954  { PPC::FCTIWZ_rec, PPC::FCTIWZ },
22955  { PPC::FCTIW_rec, PPC::FCTIW },
22956  { PPC::FDIVS_rec, PPC::FDIVS },
22957  { PPC::FDIV_rec, PPC::FDIV },
22958  { PPC::FMADDS_rec, PPC::FMADDS },
22959  { PPC::FMADD_rec, PPC::FMADD },
22960  { PPC::FMR_rec, PPC::FMR },
22961  { PPC::FMSUBS_rec, PPC::FMSUBS },
22962  { PPC::FMSUB_rec, PPC::FMSUB },
22963  { PPC::FMULS_rec, PPC::FMULS },
22964  { PPC::FMUL_rec, PPC::FMUL },
22965  { PPC::FNABSD_rec, PPC::FNABSD },
22966  { PPC::FNABSS_rec, PPC::FNABSS },
22967  { PPC::FNEGD_rec, PPC::FNEGD },
22968  { PPC::FNEGS_rec, PPC::FNEGS },
22969  { PPC::FNMADDS_rec, PPC::FNMADDS },
22970  { PPC::FNMADD_rec, PPC::FNMADD },
22971  { PPC::FNMSUBS_rec, PPC::FNMSUBS },
22972  { PPC::FNMSUB_rec, PPC::FNMSUB },
22973  { PPC::FRES_rec, PPC::FRES },
22974  { PPC::FRE_rec, PPC::FRE },
22975  { PPC::FRIMD_rec, PPC::FRIMD },
22976  { PPC::FRIMS_rec, PPC::FRIMS },
22977  { PPC::FRIND_rec, PPC::FRIND },
22978  { PPC::FRINS_rec, PPC::FRINS },
22979  { PPC::FRIPD_rec, PPC::FRIPD },
22980  { PPC::FRIPS_rec, PPC::FRIPS },
22981  { PPC::FRIZD_rec, PPC::FRIZD },
22982  { PPC::FRIZS_rec, PPC::FRIZS },
22983  { PPC::FRSP_rec, PPC::FRSP },
22984  { PPC::FRSQRTES_rec, PPC::FRSQRTES },
22985  { PPC::FRSQRTE_rec, PPC::FRSQRTE },
22986  { PPC::FSELD_rec, PPC::FSELD },
22987  { PPC::FSELS_rec, PPC::FSELS },
22988  { PPC::FSQRTS_rec, PPC::FSQRTS },
22989  { PPC::FSQRT_rec, PPC::FSQRT },
22990  { PPC::FSUBS_rec, PPC::FSUBS },
22991  { PPC::FSUB_rec, PPC::FSUB },
22992  { PPC::MULHDU_rec, PPC::MULHDU },
22993  { PPC::MULHD_rec, PPC::MULHD },
22994  { PPC::MULHWU_rec, PPC::MULHWU },
22995  { PPC::MULHW_rec, PPC::MULHW },
22996  { PPC::MULLDO_rec, PPC::MULLDO },
22997  { PPC::MULLD_rec, PPC::MULLD },
22998  { PPC::MULLWO_rec, PPC::MULLWO },
22999  { PPC::MULLW_rec, PPC::MULLW },
23000  { PPC::NAND8_rec, PPC::NAND8 },
23001  { PPC::NAND_rec, PPC::NAND },
23002  { PPC::NEG8O_rec, PPC::NEG8O },
23003  { PPC::NEG8_rec, PPC::NEG8 },
23004  { PPC::NEGO_rec, PPC::NEGO },
23005  { PPC::NEG_rec, PPC::NEG },
23006  { PPC::NOR8_rec, PPC::NOR8 },
23007  { PPC::NOR_rec, PPC::NOR },
23008  { PPC::OR8_rec, PPC::OR8 },
23009  { PPC::ORC8_rec, PPC::ORC8 },
23010  { PPC::ORC_rec, PPC::ORC },
23011  { PPC::OR_rec, PPC::OR },
23012  { PPC::RLDCL_rec, PPC::RLDCL },
23013  { PPC::RLDCR_rec, PPC::RLDCR },
23014  { PPC::RLDICL_32_rec, PPC::RLDICL_32 },
23015  { PPC::RLDICL_rec, PPC::RLDICL },
23016  { PPC::RLDICR_rec, PPC::RLDICR },
23017  { PPC::RLDIC_rec, PPC::RLDIC },
23018  { PPC::RLDIMI_rec, PPC::RLDIMI },
23019  { PPC::RLWIMI8_rec, PPC::RLWIMI8 },
23020  { PPC::RLWIMI_rec, PPC::RLWIMI },
23021  { PPC::RLWINM8_rec, PPC::RLWINM8 },
23022  { PPC::RLWINM_rec, PPC::RLWINM },
23023  { PPC::RLWNM8_rec, PPC::RLWNM8 },
23024  { PPC::RLWNM_rec, PPC::RLWNM },
23025  { PPC::SLD_rec, PPC::SLD },
23026  { PPC::SLW8_rec, PPC::SLW8 },
23027  { PPC::SLW_rec, PPC::SLW },
23028  { PPC::SRADI_rec, PPC::SRADI },
23029  { PPC::SRAD_rec, PPC::SRAD },
23030  { PPC::SRAWI_rec, PPC::SRAWI },
23031  { PPC::SRAW_rec, PPC::SRAW },
23032  { PPC::SRD_rec, PPC::SRD },
23033  { PPC::SRW8_rec, PPC::SRW8 },
23034  { PPC::SRW_rec, PPC::SRW },
23035  { PPC::SUBF8O_rec, PPC::SUBF8O },
23036  { PPC::SUBF8_rec, PPC::SUBF8 },
23037  { PPC::SUBFC8O_rec, PPC::SUBFC8O },
23038  { PPC::SUBFC8_rec, PPC::SUBFC8 },
23039  { PPC::SUBFCO_rec, PPC::SUBFCO },
23040  { PPC::SUBFC_rec, PPC::SUBFC },
23041  { PPC::SUBFE8O_rec, PPC::SUBFE8O },
23042  { PPC::SUBFE8_rec, PPC::SUBFE8 },
23043  { PPC::SUBFEO_rec, PPC::SUBFEO },
23044  { PPC::SUBFE_rec, PPC::SUBFE },
23045  { PPC::SUBFME8O_rec, PPC::SUBFME8O },
23046  { PPC::SUBFME8_rec, PPC::SUBFME8 },
23047  { PPC::SUBFMEO_rec, PPC::SUBFMEO },
23048  { PPC::SUBFME_rec, PPC::SUBFME },
23049  { PPC::SUBFO_rec, PPC::SUBFO },
23050  { PPC::SUBFUS_rec, PPC::SUBFUS },
23051  { PPC::SUBFZE8O_rec, PPC::SUBFZE8O },
23052  { PPC::SUBFZE8_rec, PPC::SUBFZE8 },
23053  { PPC::SUBFZEO_rec, PPC::SUBFZEO },
23054  { PPC::SUBFZE_rec, PPC::SUBFZE },
23055  { PPC::SUBF_rec, PPC::SUBF },
23056  { PPC::VSTRIBL_rec, PPC::VSTRIBL },
23057  { PPC::VSTRIBR_rec, PPC::VSTRIBR },
23058  { PPC::VSTRIHL_rec, PPC::VSTRIHL },
23059  { PPC::VSTRIHR_rec, PPC::VSTRIHR },
23060  { PPC::XOR8_rec, PPC::XOR8 },
23061  { PPC::XOR_rec, PPC::XOR },
23062}; // End of getNonRecordFormOpcodeTable
23063
23064  unsigned mid;
23065  unsigned start = 0;
23066  unsigned end = 181;
23067  while (start < end) {
23068    mid = start + (end - start) / 2;
23069    if (Opcode == getNonRecordFormOpcodeTable[mid][0]) {
23070      break;
23071    }
23072    if (Opcode < getNonRecordFormOpcodeTable[mid][0])
23073      end = mid;
23074    else
23075      start = mid + 1;
23076  }
23077  if (start == end)
23078    return -1; // Instruction doesn't exist in this table.
23079
23080  return getNonRecordFormOpcodeTable[mid][1];
23081}
23082
23083// getRecordFormOpcode
23084LLVM_READONLY
23085int getRecordFormOpcode(uint16_t Opcode) {
23086static const uint16_t getRecordFormOpcodeTable[][2] = {
23087  { PPC::ADD4, PPC::ADD4_rec },
23088  { PPC::ADD4O, PPC::ADD4O_rec },
23089  { PPC::ADD8, PPC::ADD8_rec },
23090  { PPC::ADD8O, PPC::ADD8O_rec },
23091  { PPC::ADDC, PPC::ADDC_rec },
23092  { PPC::ADDC8, PPC::ADDC8_rec },
23093  { PPC::ADDC8O, PPC::ADDC8O_rec },
23094  { PPC::ADDCO, PPC::ADDCO_rec },
23095  { PPC::ADDE, PPC::ADDE_rec },
23096  { PPC::ADDE8, PPC::ADDE8_rec },
23097  { PPC::ADDE8O, PPC::ADDE8O_rec },
23098  { PPC::ADDEO, PPC::ADDEO_rec },
23099  { PPC::ADDIC, PPC::ADDIC_rec },
23100  { PPC::ADDME, PPC::ADDME_rec },
23101  { PPC::ADDME8, PPC::ADDME8_rec },
23102  { PPC::ADDME8O, PPC::ADDME8O_rec },
23103  { PPC::ADDMEO, PPC::ADDMEO_rec },
23104  { PPC::ADDZE, PPC::ADDZE_rec },
23105  { PPC::ADDZE8, PPC::ADDZE8_rec },
23106  { PPC::ADDZE8O, PPC::ADDZE8O_rec },
23107  { PPC::ADDZEO, PPC::ADDZEO_rec },
23108  { PPC::AND, PPC::AND_rec },
23109  { PPC::AND8, PPC::AND8_rec },
23110  { PPC::ANDC, PPC::ANDC_rec },
23111  { PPC::ANDC8, PPC::ANDC8_rec },
23112  { PPC::CNTLZD, PPC::CNTLZD_rec },
23113  { PPC::CNTLZW, PPC::CNTLZW_rec },
23114  { PPC::CNTLZW8, PPC::CNTLZW8_rec },
23115  { PPC::CNTTZD, PPC::CNTTZD_rec },
23116  { PPC::CNTTZW, PPC::CNTTZW_rec },
23117  { PPC::CNTTZW8, PPC::CNTTZW8_rec },
23118  { PPC::DIVD, PPC::DIVD_rec },
23119  { PPC::DIVDE, PPC::DIVDE_rec },
23120  { PPC::DIVDEO, PPC::DIVDEO_rec },
23121  { PPC::DIVDEU, PPC::DIVDEU_rec },
23122  { PPC::DIVDEUO, PPC::DIVDEUO_rec },
23123  { PPC::DIVDO, PPC::DIVDO_rec },
23124  { PPC::DIVDU, PPC::DIVDU_rec },
23125  { PPC::DIVDUO, PPC::DIVDUO_rec },
23126  { PPC::DIVW, PPC::DIVW_rec },
23127  { PPC::DIVWE, PPC::DIVWE_rec },
23128  { PPC::DIVWEO, PPC::DIVWEO_rec },
23129  { PPC::DIVWEU, PPC::DIVWEU_rec },
23130  { PPC::DIVWEUO, PPC::DIVWEUO_rec },
23131  { PPC::DIVWO, PPC::DIVWO_rec },
23132  { PPC::DIVWU, PPC::DIVWU_rec },
23133  { PPC::DIVWUO, PPC::DIVWUO_rec },
23134  { PPC::EQV, PPC::EQV_rec },
23135  { PPC::EQV8, PPC::EQV8_rec },
23136  { PPC::EXTSB, PPC::EXTSB_rec },
23137  { PPC::EXTSB8, PPC::EXTSB8_rec },
23138  { PPC::EXTSH, PPC::EXTSH_rec },
23139  { PPC::EXTSH8, PPC::EXTSH8_rec },
23140  { PPC::EXTSW, PPC::EXTSW_rec },
23141  { PPC::EXTSWSLI, PPC::EXTSWSLI_rec },
23142  { PPC::EXTSWSLI_32_64, PPC::EXTSWSLI_32_64_rec },
23143  { PPC::EXTSW_32_64, PPC::EXTSW_32_64_rec },
23144  { PPC::FABSD, PPC::FABSD_rec },
23145  { PPC::FABSS, PPC::FABSS_rec },
23146  { PPC::FADD, PPC::FADD_rec },
23147  { PPC::FADDS, PPC::FADDS_rec },
23148  { PPC::FCFID, PPC::FCFID_rec },
23149  { PPC::FCFIDS, PPC::FCFIDS_rec },
23150  { PPC::FCFIDU, PPC::FCFIDU_rec },
23151  { PPC::FCFIDUS, PPC::FCFIDUS_rec },
23152  { PPC::FCPSGND, PPC::FCPSGND_rec },
23153  { PPC::FCPSGNS, PPC::FCPSGNS_rec },
23154  { PPC::FCTID, PPC::FCTID_rec },
23155  { PPC::FCTIDU, PPC::FCTIDU_rec },
23156  { PPC::FCTIDUZ, PPC::FCTIDUZ_rec },
23157  { PPC::FCTIDZ, PPC::FCTIDZ_rec },
23158  { PPC::FCTIW, PPC::FCTIW_rec },
23159  { PPC::FCTIWU, PPC::FCTIWU_rec },
23160  { PPC::FCTIWUZ, PPC::FCTIWUZ_rec },
23161  { PPC::FCTIWZ, PPC::FCTIWZ_rec },
23162  { PPC::FDIV, PPC::FDIV_rec },
23163  { PPC::FDIVS, PPC::FDIVS_rec },
23164  { PPC::FMADD, PPC::FMADD_rec },
23165  { PPC::FMADDS, PPC::FMADDS_rec },
23166  { PPC::FMR, PPC::FMR_rec },
23167  { PPC::FMSUB, PPC::FMSUB_rec },
23168  { PPC::FMSUBS, PPC::FMSUBS_rec },
23169  { PPC::FMUL, PPC::FMUL_rec },
23170  { PPC::FMULS, PPC::FMULS_rec },
23171  { PPC::FNABSD, PPC::FNABSD_rec },
23172  { PPC::FNABSS, PPC::FNABSS_rec },
23173  { PPC::FNEGD, PPC::FNEGD_rec },
23174  { PPC::FNEGS, PPC::FNEGS_rec },
23175  { PPC::FNMADD, PPC::FNMADD_rec },
23176  { PPC::FNMADDS, PPC::FNMADDS_rec },
23177  { PPC::FNMSUB, PPC::FNMSUB_rec },
23178  { PPC::FNMSUBS, PPC::FNMSUBS_rec },
23179  { PPC::FRE, PPC::FRE_rec },
23180  { PPC::FRES, PPC::FRES_rec },
23181  { PPC::FRIMD, PPC::FRIMD_rec },
23182  { PPC::FRIMS, PPC::FRIMS_rec },
23183  { PPC::FRIND, PPC::FRIND_rec },
23184  { PPC::FRINS, PPC::FRINS_rec },
23185  { PPC::FRIPD, PPC::FRIPD_rec },
23186  { PPC::FRIPS, PPC::FRIPS_rec },
23187  { PPC::FRIZD, PPC::FRIZD_rec },
23188  { PPC::FRIZS, PPC::FRIZS_rec },
23189  { PPC::FRSP, PPC::FRSP_rec },
23190  { PPC::FRSQRTE, PPC::FRSQRTE_rec },
23191  { PPC::FRSQRTES, PPC::FRSQRTES_rec },
23192  { PPC::FSELD, PPC::FSELD_rec },
23193  { PPC::FSELS, PPC::FSELS_rec },
23194  { PPC::FSQRT, PPC::FSQRT_rec },
23195  { PPC::FSQRTS, PPC::FSQRTS_rec },
23196  { PPC::FSUB, PPC::FSUB_rec },
23197  { PPC::FSUBS, PPC::FSUBS_rec },
23198  { PPC::MULHD, PPC::MULHD_rec },
23199  { PPC::MULHDU, PPC::MULHDU_rec },
23200  { PPC::MULHW, PPC::MULHW_rec },
23201  { PPC::MULHWU, PPC::MULHWU_rec },
23202  { PPC::MULLD, PPC::MULLD_rec },
23203  { PPC::MULLDO, PPC::MULLDO_rec },
23204  { PPC::MULLW, PPC::MULLW_rec },
23205  { PPC::MULLWO, PPC::MULLWO_rec },
23206  { PPC::NAND, PPC::NAND_rec },
23207  { PPC::NAND8, PPC::NAND8_rec },
23208  { PPC::NEG, PPC::NEG_rec },
23209  { PPC::NEG8, PPC::NEG8_rec },
23210  { PPC::NEG8O, PPC::NEG8O_rec },
23211  { PPC::NEGO, PPC::NEGO_rec },
23212  { PPC::NOR, PPC::NOR_rec },
23213  { PPC::NOR8, PPC::NOR8_rec },
23214  { PPC::OR, PPC::OR_rec },
23215  { PPC::OR8, PPC::OR8_rec },
23216  { PPC::ORC, PPC::ORC_rec },
23217  { PPC::ORC8, PPC::ORC8_rec },
23218  { PPC::RLDCL, PPC::RLDCL_rec },
23219  { PPC::RLDCR, PPC::RLDCR_rec },
23220  { PPC::RLDIC, PPC::RLDIC_rec },
23221  { PPC::RLDICL, PPC::RLDICL_rec },
23222  { PPC::RLDICL_32, PPC::RLDICL_32_rec },
23223  { PPC::RLDICR, PPC::RLDICR_rec },
23224  { PPC::RLDIMI, PPC::RLDIMI_rec },
23225  { PPC::RLWIMI, PPC::RLWIMI_rec },
23226  { PPC::RLWIMI8, PPC::RLWIMI8_rec },
23227  { PPC::RLWINM, PPC::RLWINM_rec },
23228  { PPC::RLWINM8, PPC::RLWINM8_rec },
23229  { PPC::RLWNM, PPC::RLWNM_rec },
23230  { PPC::RLWNM8, PPC::RLWNM8_rec },
23231  { PPC::SLD, PPC::SLD_rec },
23232  { PPC::SLW, PPC::SLW_rec },
23233  { PPC::SLW8, PPC::SLW8_rec },
23234  { PPC::SRAD, PPC::SRAD_rec },
23235  { PPC::SRADI, PPC::SRADI_rec },
23236  { PPC::SRAW, PPC::SRAW_rec },
23237  { PPC::SRAWI, PPC::SRAWI_rec },
23238  { PPC::SRD, PPC::SRD_rec },
23239  { PPC::SRW, PPC::SRW_rec },
23240  { PPC::SRW8, PPC::SRW8_rec },
23241  { PPC::SUBF, PPC::SUBF_rec },
23242  { PPC::SUBF8, PPC::SUBF8_rec },
23243  { PPC::SUBF8O, PPC::SUBF8O_rec },
23244  { PPC::SUBFC, PPC::SUBFC_rec },
23245  { PPC::SUBFC8, PPC::SUBFC8_rec },
23246  { PPC::SUBFC8O, PPC::SUBFC8O_rec },
23247  { PPC::SUBFCO, PPC::SUBFCO_rec },
23248  { PPC::SUBFE, PPC::SUBFE_rec },
23249  { PPC::SUBFE8, PPC::SUBFE8_rec },
23250  { PPC::SUBFE8O, PPC::SUBFE8O_rec },
23251  { PPC::SUBFEO, PPC::SUBFEO_rec },
23252  { PPC::SUBFME, PPC::SUBFME_rec },
23253  { PPC::SUBFME8, PPC::SUBFME8_rec },
23254  { PPC::SUBFME8O, PPC::SUBFME8O_rec },
23255  { PPC::SUBFMEO, PPC::SUBFMEO_rec },
23256  { PPC::SUBFO, PPC::SUBFO_rec },
23257  { PPC::SUBFUS, PPC::SUBFUS_rec },
23258  { PPC::SUBFZE, PPC::SUBFZE_rec },
23259  { PPC::SUBFZE8, PPC::SUBFZE8_rec },
23260  { PPC::SUBFZE8O, PPC::SUBFZE8O_rec },
23261  { PPC::SUBFZEO, PPC::SUBFZEO_rec },
23262  { PPC::VSTRIBL, PPC::VSTRIBL_rec },
23263  { PPC::VSTRIBR, PPC::VSTRIBR_rec },
23264  { PPC::VSTRIHL, PPC::VSTRIHL_rec },
23265  { PPC::VSTRIHR, PPC::VSTRIHR_rec },
23266  { PPC::XOR, PPC::XOR_rec },
23267  { PPC::XOR8, PPC::XOR8_rec },
23268}; // End of getRecordFormOpcodeTable
23269
23270  unsigned mid;
23271  unsigned start = 0;
23272  unsigned end = 181;
23273  while (start < end) {
23274    mid = start + (end - start) / 2;
23275    if (Opcode == getRecordFormOpcodeTable[mid][0]) {
23276      break;
23277    }
23278    if (Opcode < getRecordFormOpcodeTable[mid][0])
23279      end = mid;
23280    else
23281      start = mid + 1;
23282  }
23283  if (start == end)
23284    return -1; // Instruction doesn't exist in this table.
23285
23286  return getRecordFormOpcodeTable[mid][1];
23287}
23288
23289} // end namespace PPC
23290} // end namespace llvm
23291#endif // GET_INSTRMAP_INFO
23292
23293