1 /*
2 * Copyright (C) 2023 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #include "berberis/backend/x86_64/liveness_analyzer.h"
18
19 #include "berberis/backend/x86_64/machine_ir.h"
20 #include "berberis/backend/x86_64/vreg_bit_set.h"
21 #include "berberis/base/algorithm.h"
22
23 namespace berberis {
24
25 namespace x86_64 {
26
Run()27 void LivenessAnalyzer::Run() {
28 // IR must not change between analyzer construction and run.
29 CHECK_EQ(machine_ir_->NumBasicBlocks(), live_in_.size());
30 CHECK_EQ(machine_ir_->NumVReg(), NumVReg());
31 // Copy the original list in reverse order to foster faster liveness
32 // propagation from successors to predecessors.
33 // TODO(b/179708579): For better post order approximation need to implement an
34 // analog of BackwardDataFlowWorkList from High-level IR.
35 MachineBasicBlockList worklist(machine_ir_->bb_list().rbegin(),
36 machine_ir_->bb_list().rend(),
37 ArenaAllocator<MachineBasicBlock*>(machine_ir_->arena()));
38 while (!worklist.empty()) {
39 auto* bb = worklist.back();
40 worklist.pop_back();
41 if (VisitBasicBlock(bb)) {
42 // Since there is a change we need to process preds again.
43 for (auto edge : bb->in_edges()) {
44 auto* pred_bb = edge->src();
45 if (!Contains(worklist, pred_bb)) {
46 worklist.push_back(pred_bb);
47 }
48 }
49 }
50 }
51 }
52
53 // Updates live-ins for the basic block. Returns whether there was any change.
VisitBasicBlock(const MachineBasicBlock * bb)54 bool LivenessAnalyzer::VisitBasicBlock(const MachineBasicBlock* bb) {
55 bool changed = false;
56
57 // Compute liveness at the end of basic block.
58 // Exit blocks have all regs dead - the default value for Liveness.
59 VRegBitSet running_liveness(NumVReg(), machine_ir_->arena());
60 for (auto edge : bb->out_edges()) {
61 running_liveness |= live_in_.at(edge->dst()->id());
62 }
63
64 // Traverse instructions backward, updating liveness.
65 for (auto insn_it = bb->insn_list().rbegin(); insn_it != bb->insn_list().rend(); ++insn_it) {
66 const MachineInsn* insn = *insn_it;
67 // Same reg can be def and use, so process all defs first.
68 for (int i = 0; i < insn->NumRegOperands(); ++i) {
69 if (insn->RegAt(i).IsVReg() && insn->RegKindAt(i).IsDef()) {
70 running_liveness.Reset(insn->RegAt(i));
71 }
72 }
73 for (int i = 0; i < insn->NumRegOperands(); ++i) {
74 if (insn->RegAt(i).IsVReg() && insn->RegKindAt(i).IsInput()) {
75 running_liveness.Set(insn->RegAt(i));
76 }
77 }
78 }
79
80 if (live_in_[bb->id()] != running_liveness) {
81 live_in_[bb->id()] = running_liveness;
82 changed = true;
83 }
84
85 return changed;
86 }
87
88 } // namespace x86_64
89
90 } // namespace berberis
91