| /external/coreboot/src/soc/intel/baytrail/ |
| D | iosf.c | 7 static inline void write_iosf_reg(int reg, uint32_t value) in write_iosf_reg()
12 static inline uint32_t read_iosf_reg(int reg) in read_iosf_reg()
18 uint32_t iosf_read_port(uint32_t cr, int reg) in iosf_read_port()
26 void iosf_write_port(uint32_t cr, int reg, uint32_t val) in iosf_write_port()
39 uint32_t iosf_bunit_read(int reg) in iosf_bunit_read()
44 void iosf_bunit_write(int reg, uint32_t val) in iosf_bunit_write()
49 uint32_t iosf_dunit_read(int reg) in iosf_dunit_read()
54 uint32_t iosf_dunit_ch0_read(int reg) in iosf_dunit_ch0_read()
59 uint32_t iosf_dunit_ch1_read(int reg) in iosf_dunit_ch1_read()
66 void iosf_dunit_write(int reg, uint32_t val) in iosf_dunit_write()
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| /external/coreboot/src/soc/amd/common/block/include/amdblocks/ |
| D | acpimmio.h | 98 static inline uint8_t smi_read8(uint8_t reg) in smi_read8()
103 static inline uint16_t smi_read16(uint8_t reg) in smi_read16()
108 static inline uint32_t smi_read32(uint8_t reg) in smi_read32()
113 static inline void smi_write8(uint8_t reg, uint8_t value) in smi_write8()
118 static inline void smi_write16(uint8_t reg, uint16_t value) in smi_write16()
123 static inline void smi_write32(uint8_t reg, uint32_t value) in smi_write32()
128 static inline uint8_t pm_read8(uint8_t reg) in pm_read8()
133 static inline uint16_t pm_read16(uint8_t reg) in pm_read16()
138 static inline uint32_t pm_read32(uint8_t reg) in pm_read32()
143 static inline void pm_write8(uint8_t reg, uint8_t value) in pm_write8()
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| /external/coreboot/src/soc/intel/braswell/ |
| D | iosf.c | 8 static inline void write_iosf_reg(int reg, uint32_t value) in write_iosf_reg()
13 static inline uint32_t read_iosf_reg(int reg) in read_iosf_reg()
19 static uint32_t iosf_read_port(uint32_t cr, int reg) in iosf_read_port()
27 static void iosf_write_port(uint32_t cr, int reg, uint32_t val) in iosf_write_port()
40 uint32_t iosf_bunit_read(int reg) in iosf_bunit_read()
45 void iosf_bunit_write(int reg, uint32_t val) in iosf_bunit_write()
50 uint32_t iosf_punit_read(int reg) in iosf_punit_read()
55 void iosf_punit_write(int reg, uint32_t val) in iosf_punit_write()
60 uint32_t iosf_score_read(int reg) in iosf_score_read()
65 void iosf_score_write(int reg, uint32_t val) in iosf_score_write()
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| /external/coreboot/src/soc/samsung/exynos5420/ |
| D | dp_lowlevel.c | 42 u32 reg; in exynos_dp_enable_video_input() local
56 u32 reg; in exynos_dp_disable_video_bist() local
64 u32 reg; in exynos_dp_enable_video_mute() local
76 u32 reg; in exynos_dp_init_analog_param() local
177 u32 reg; in exynos_dp_enable_sw_func() local
190 u32 reg; in exynos_dp_set_analog_power_down() local
243 u32 reg; in exynos_dp_get_pll_lock_status() local
255 u32 reg; in exynos_dp_set_pll_power() local
270 u32 reg; in exynos_dp_init_analog_func() local
319 u32 reg; in exynos_dp_init_hpd() local
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_build_pm4.h | 60 #define radeon_set_reg_seq(reg, num, idx, prefix_name, packet, reset_filter_cam) do { \ argument
66 #define radeon_set_reg(reg, idx, value, prefix_name, packet) do { \ argument
71 #define radeon_opt_set_reg(reg, reg_enum, idx, value, prefix_name, packet) do { \ argument
82 #define radeon_opt_set_reg2(reg, reg_enum, v1, v2, prefix_name, packet) do { \ argument
98 #define radeon_opt_set_reg3(reg, reg_enum, v1, v2, v3, prefix_name, packet) do { \ argument
117 #define radeon_opt_set_reg4(reg, reg_enum, v1, v2, v3, v4, prefix_name, packet) do { \ argument
139 #define radeon_opt_set_reg5(reg, reg_enum, v1, v2, v3, v4, v5, prefix_name, packet) do { \ argument
164 #define radeon_opt_set_reg6(reg, reg_enum, v1, v2, v3, v4, v5, v6, prefix_name, packet) do { \ argument
192 #define radeon_opt_set_regn(reg, values, saved_values, num, prefix_name, packet) do { \ argument
201 #define radeon_set_config_reg(reg, value) \ argument
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| /external/libffi/include/ |
| D | ffi_cfi.h | 14 # define cfi_def_cfa(reg, off) .cfi_def_cfa reg, off argument
15 # define cfi_def_cfa_register(reg) .cfi_def_cfa_register reg argument
18 # define cfi_offset(reg, off) .cfi_offset reg, off argument
19 # define cfi_rel_offset(reg, off) .cfi_rel_offset reg, off argument
21 # define cfi_return_column(reg) .cfi_return_column reg argument
22 # define cfi_restore(reg) .cfi_restore reg argument
23 # define cfi_same_value(reg) .cfi_same_value reg argument
24 # define cfi_undefined(reg) .cfi_undefined reg argument
36 # define cfi_def_cfa(reg, off) argument
37 # define cfi_def_cfa_register(reg) argument
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| /external/coreboot/src/arch/x86/include/arch/ |
| D | pci_io_cfg.h | 16 uint32_t pci_io_encode_addr(pci_devfn_t dev, uint16_t reg) in pci_io_encode_addr()
30 uint8_t pci_io_read_config8(pci_devfn_t dev, uint16_t reg) in pci_io_read_config8()
38 uint16_t pci_io_read_config16(pci_devfn_t dev, uint16_t reg) in pci_io_read_config16()
46 uint32_t pci_io_read_config32(pci_devfn_t dev, uint16_t reg) in pci_io_read_config32()
54 void pci_io_write_config8(pci_devfn_t dev, uint16_t reg, uint8_t value) in pci_io_write_config8()
62 void pci_io_write_config16(pci_devfn_t dev, uint16_t reg, uint16_t value) in pci_io_write_config16()
70 void pci_io_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value) in pci_io_write_config32()
85 uint8_t pci_s_read_config8(pci_devfn_t dev, uint16_t reg) in pci_s_read_config8()
91 uint16_t pci_s_read_config16(pci_devfn_t dev, uint16_t reg) in pci_s_read_config16()
97 uint32_t pci_s_read_config32(pci_devfn_t dev, uint16_t reg) in pci_s_read_config32()
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| /external/trusty/arm-trusted-firmware/include/lib/el3_runtime/ |
| D | context_el2.h | 223 #define read_el2_ctx_common(ctx, reg) (((ctx)->common).reg) argument
225 #define write_el2_ctx_common(ctx, reg, val) ((((ctx)->common).reg) \ argument
228 #define write_el2_ctx_sysreg128(ctx, reg, val) ((((ctx)->common).reg) \ argument
232 #define read_el2_ctx_mte2(ctx, reg) (((ctx)->mte2).reg) argument
233 #define write_el2_ctx_mte2(ctx, reg, val) ((((ctx)->mte2).reg) \ argument
236 #define read_el2_ctx_mte2(ctx, reg) ULL(0) argument
237 #define write_el2_ctx_mte2(ctx, reg, val) argument
241 #define read_el2_ctx_fgt(ctx, reg) (((ctx)->fgt).reg) argument
242 #define write_el2_ctx_fgt(ctx, reg, val) ((((ctx)->fgt).reg) \ argument
245 #define read_el2_ctx_fgt(ctx, reg) ULL(0) argument
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| D | context_el1.h | 192 #define read_el1_ctx_common(ctx, reg) (((ctx)->common).reg) argument
194 #define write_el1_ctx_common(ctx, reg, val) ((((ctx)->common).reg) \ argument
198 #define read_el1_ctx_arch_timer(ctx, reg) (((ctx)->arch_timer).reg) argument
199 #define write_el1_ctx_arch_timer(ctx, reg, val) ((((ctx)->arch_timer).reg) \ argument
202 #define read_el1_ctx_arch_timer(ctx, reg) ULL(0) argument
203 #define write_el1_ctx_arch_timer(ctx, reg, val) argument
207 #define read_el1_ctx_aarch32(ctx, reg) (((ctx)->el1_aarch32).reg) argument
208 #define write_el1_ctx_aarch32(ctx, reg, val) ((((ctx)->el1_aarch32).reg) \ argument
211 #define read_el1_ctx_aarch32(ctx, reg) ULL(0) argument
212 #define write_el1_ctx_aarch32(ctx, reg, val) argument
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| /external/coreboot/src/soc/samsung/exynos5250/ |
| D | dp-reg.c | 18 u32 reg; in s5p_dp_reset() local
94 u32 reg; in s5p_dp_get_pll_lock_status() local
105 u32 reg; in s5p_dp_init_analog_func() local
139 u32 reg; in s5p_dp_init_aux() local
166 int reg; in s5p_dp_start_aux_transaction() local
204 u32 reg; in s5p_dp_write_byte_to_dpcd() local
251 u32 reg; in s5p_dp_read_byte_from_dpcd() local
298 u32 reg; in s5p_dp_init_video() local
321 u32 reg; in s5p_dp_set_video_color_format() local
342 u32 reg; in s5p_dp_is_slave_video_stream_clock_on() local
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| /external/tensorflow/tensorflow/lite/kernels/internal/optimized/ |
| D | depthwiseconv_uint8_transitional.h | 40 inline void util_vst1_u8(uint8* data_addr, uint8x8_t reg) { in util_vst1_u8()
43 inline void util_vst1_x8(uint8* data_addr, int8x8_t reg) { in util_vst1_x8()
46 inline void util_vst1_x8(int8* data_addr, int8x8_t reg) { in util_vst1_x8()
54 #define vst1_lane_s8x4(dst, reg, lane_num) \ argument
58 #define vst1_lane_u8x4(dst, reg, lane_num) \ argument
62 #define vst1q_lane_s8x4(dst, reg, lane_num) \ argument
66 #define vst1q_lane_u8x4(dst, reg, lane_num) \ argument
74 #define vld1q_lane_s8x8(src, reg, lane_num) \ argument
77 #define vld1_lane_8x4(src, reg, lane_num) \ argument
80 #define vld1q_lane_8x4(src, reg, lane_num) \ argument
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| /external/coreboot/src/include/device/ |
| D | pci_ops.h | 47 u8 pci_read_config8(const struct device *dev, u16 reg) in pci_read_config8()
53 u16 pci_read_config16(const struct device *dev, u16 reg) in pci_read_config16()
59 u32 pci_read_config32(const struct device *dev, u16 reg) in pci_read_config32()
65 void pci_write_config8(const struct device *dev, u16 reg, u8 val) in pci_write_config8()
71 void pci_write_config16(const struct device *dev, u16 reg, u16 val) in pci_write_config16()
77 void pci_write_config32(const struct device *dev, u16 reg, u32 val) in pci_write_config32()
86 void pci_update_config8(pci_devfn_t dev, u16 reg, u8 mask, u8 or) in pci_update_config8()
102 void pci_update_config16(pci_devfn_t dev, u16 reg, u16 mask, u16 or) in pci_update_config16()
118 void pci_update_config32(pci_devfn_t dev, u16 reg, u32 mask, u32 or) in pci_update_config32()
134 void pci_and_config8(pci_devfn_t dev, u16 reg, u8 andmask) in pci_and_config8()
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| D | pci_mmio_cfg.h | 67 uint8_t pci_s_read_config8(pci_devfn_t dev, uint16_t reg) in pci_s_read_config8()
73 uint16_t pci_s_read_config16(pci_devfn_t dev, uint16_t reg) in pci_s_read_config16()
79 uint32_t pci_s_read_config32(pci_devfn_t dev, uint16_t reg) in pci_s_read_config32()
85 void pci_s_write_config8(pci_devfn_t dev, uint16_t reg, uint8_t value) in pci_s_write_config8()
91 void pci_s_write_config16(pci_devfn_t dev, uint16_t reg, uint16_t value) in pci_s_write_config16()
97 void pci_s_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value) in pci_s_write_config32()
109 uint8_t *pci_mmio_config8_addr(pci_devfn_t dev, uint16_t reg) in pci_mmio_config8_addr()
115 uint16_t *pci_mmio_config16_addr(pci_devfn_t dev, uint16_t reg) in pci_mmio_config16_addr()
121 uint32_t *pci_mmio_config32_addr(pci_devfn_t dev, uint16_t reg) in pci_mmio_config32_addr()
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| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| D | tgsi_sanity.c | 67 scan_register_key(const scan_register *reg) in scan_register_key()
77 fill_scan_register1d(scan_register *reg, in fill_scan_register1d()
87 fill_scan_register2d(scan_register *reg, in fill_scan_register2d()
98 scan_register_dst(scan_register *reg, in scan_register_dst()
116 scan_register_src(scan_register *reg, in scan_register_src()
136 scan_register *reg = MALLOC(sizeof(scan_register)); in create_scan_register_src() local
145 scan_register *reg = MALLOC(sizeof(scan_register)); in create_scan_register_dst() local
204 const scan_register *reg) in is_register_declared()
221 scan_register *reg = (scan_register *)cso_hash_iter_data(iter); in is_any_register_declared() local
233 scan_register *reg) in is_register_used()
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| /external/virglrenderer/src/gallium/auxiliary/tgsi/ |
| D | tgsi_sanity.c | 66 scan_register_key(const scan_register *reg) in scan_register_key()
76 fill_scan_register1d(scan_register *reg, in fill_scan_register1d()
86 fill_scan_register2d(scan_register *reg, in fill_scan_register2d()
96 scan_register_dst(scan_register *reg, in scan_register_dst()
114 scan_register_src(scan_register *reg, in scan_register_src()
134 scan_register *reg = MALLOC(sizeof(scan_register)); in create_scan_register_src() local
143 scan_register *reg = MALLOC(sizeof(scan_register)); in create_scan_register_dst() local
202 const scan_register *reg) in is_register_declared()
219 scan_register *reg = (scan_register *)cso_hash_iter_data(iter); in is_any_register_declared() local
231 scan_register *reg) in is_register_used()
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| /external/mesa3d/src/amd/vulkan/ |
| D | radv_cs.h | 30 radeon_set_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num, unsigned idx, unsigned bas… in radeon_set_reg_seq()
40 radeon_set_config_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_config_reg_seq()
47 radeon_set_config_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_config_reg()
54 radeon_set_context_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_context_reg_seq()
61 radeon_set_context_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_context_reg()
68 radeon_set_context_reg_idx(struct radeon_cmdbuf *cs, unsigned reg, unsigned idx, unsigned value) in radeon_set_context_reg_idx()
76 radeon_set_sh_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_sh_reg_seq()
83 radeon_set_sh_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_sh_reg()
90 radeon_set_sh_reg_idx(const struct radeon_info *info, struct radeon_cmdbuf *cs, unsigned reg, unsig… in radeon_set_sh_reg_idx()
105 radeon_set_uconfig_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_uconfig_reg_seq()
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| /external/google-breakpad/src/common/ |
| D | dwarf_cfi_to_module.cc | 206 unsigned reg = i; in RegisterName() local
218 void DwarfCFIToModule::Record(Module::Address address, int reg, in Record()
238 bool DwarfCFIToModule::UndefinedRule(uint64_t address, int reg) { in UndefinedRule()
244 bool DwarfCFIToModule::SameValueRule(uint64_t address, int reg) { in SameValueRule()
251 bool DwarfCFIToModule::OffsetRule(uint64_t address, int reg, in OffsetRule()
259 bool DwarfCFIToModule::ValOffsetRule(uint64_t address, int reg, in ValOffsetRule()
267 bool DwarfCFIToModule::RegisterRule(uint64_t address, int reg, in RegisterRule()
275 bool DwarfCFIToModule::ExpressionRule(uint64_t address, int reg, in ExpressionRule()
282 bool DwarfCFIToModule::ValExpressionRule(uint64_t address, int reg, in ValExpressionRule()
298 void DwarfCFIToModule::Reporter::UnnamedRegister(size_t offset, int reg) { in UnnamedRegister()
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| /external/coreboot/payloads/libpayload/drivers/ |
| D | pci_io_ops.c | 33 u8 pci_read_config8(pcidev_t dev, u16 reg) in pci_read_config8()
39 u16 pci_read_config16(pcidev_t dev, u16 reg) in pci_read_config16()
45 u32 pci_read_config32(pcidev_t dev, u16 reg) in pci_read_config32()
51 void pci_write_config8(pcidev_t dev, u16 reg, u8 val) in pci_write_config8()
57 void pci_write_config16(pcidev_t dev, u16 reg, u16 val) in pci_write_config16()
63 void pci_write_config32(pcidev_t dev, u16 reg, u32 val) in pci_write_config32()
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| /external/coreboot/src/soc/amd/common/block/spi/ |
| D | fch_spi_util.c | 28 uint8_t spi_read8(uint8_t reg) in spi_read8()
33 uint16_t spi_read16(uint8_t reg) in spi_read16()
38 uint32_t spi_read32(uint8_t reg) in spi_read32()
43 void spi_write8(uint8_t reg, uint8_t val) in spi_write8()
48 void spi_write16(uint8_t reg, uint16_t val) in spi_write16()
53 void spi_write32(uint8_t reg, uint32_t val) in spi_write32()
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| /external/coreboot/src/soc/amd/common/block/acpimmio/ |
| D | pm_io_access_util.c | 26 uint8_t pm_io_read8(uint8_t reg) in pm_io_read8()
32 uint16_t pm_io_read16(uint8_t reg) in pm_io_read16()
37 uint32_t pm_io_read32(uint8_t reg) in pm_io_read32()
42 void pm_io_write8(uint8_t reg, uint8_t value) in pm_io_write8()
48 void pm_io_write16(uint8_t reg, uint16_t value) in pm_io_write16()
55 void pm_io_write32(uint8_t reg, uint32_t value) in pm_io_write32()
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| /external/compiler-rt/lib/sanitizer_common/ |
| D | sanitizer_asm.h | 27 # define CFI_REL_OFFSET(reg, n) .cfi_rel_offset reg, n argument
28 # define CFI_OFFSET(reg, n) .cfi_offset reg, n argument
29 # define CFI_DEF_CFA_REGISTER(reg) .cfi_def_cfa_register reg argument
30 # define CFI_DEF_CFA(reg, n) .cfi_def_cfa reg, n argument
31 # define CFI_RESTORE(reg) .cfi_restore reg argument
39 # define CFI_REL_OFFSET(reg, n) argument
40 # define CFI_OFFSET(reg, n) argument
41 # define CFI_DEF_CFA_REGISTER(reg) argument
42 # define CFI_DEF_CFA(reg, n) argument
43 # define CFI_RESTORE(reg) argument
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| /external/coreboot/src/soc/cavium/cn81xx/ |
| D | bootblock_custom.S | 36 #define ENDIAN_CONVERT64(reg) rev reg, reg argument
37 #define ENDIAN_CONVERT32(reg) rev reg, reg argument
38 #define ENDIAN_CONVERT16(reg) rev16 reg, reg argument
41 #define ENDIAN_CONVERT64(reg) argument
42 #define ENDIAN_CONVERT32(reg) argument
43 #define ENDIAN_CONVERT16(reg) argument
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | r600_cs.h | 109 static inline void radeon_set_config_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_config_reg_seq()
117 static inline void radeon_set_config_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_config_reg()
123 static inline void radeon_set_context_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_context_reg_seq()
131 static inline void radeon_set_context_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_context_reg()
138 unsigned reg, unsigned idx, in radeon_set_context_reg_idx()
148 static inline void radeon_set_sh_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_sh_reg_seq()
156 static inline void radeon_set_sh_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_sh_reg()
162 static inline void radeon_set_uconfig_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_uconfig_reg_seq()
170 static inline void radeon_set_uconfig_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_uconfig_reg()
177 unsigned reg, unsigned idx, in radeon_set_uconfig_reg_idx()
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| /external/trusty/arm-trusted-firmware/drivers/cadence/nand/ |
| D | cdns_nand.c | 33 uint32_t reg = 0U; in cdns_nand_wait_idle() local
44 uint32_t reg = 0U; in cdns_nand_wait_thread_ready() local
57 uint32_t reg = 0U; in cdns_nand_last_opr_status() local
100 uint32_t reg = (CNF_WORK_MODE_PIO << CNF_CMDREG0_CT); in cdns_nand_set_feature() local
122 uint32_t reg = (CNF_WORK_MODE_PIO << CNF_CMDREG0_CT); in cdns_nand_reset() local
140 uint32_t reg = mmio_read_32(CNF_MINICTRL(DLL_PHY_CTRL)); in cdns_nand_set_opr_mode() local
211 uint32_t reg = 0U; in cdns_nand_update_dev_info() local
255 uint32_t reg = 0U; in cdns_nand_host_init() local
308 uint32_t reg = (CNF_WORK_MODE_PIO << CNF_CMDREG0_CT); in cdns_nand_erase() local
370 uint32_t reg = (CNF_WORK_MODE_PIO << CNF_CMDREG0_CT); in cdns_nand_read_page() local
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| /external/mesa3d/src/intel/compiler/elk/ |
| D | elk_ir_vec4.h | 56 retype(src_reg reg, enum elk_reg_type type) in retype()
65 add_byte_offset(elk_backend_reg *reg, unsigned bytes) in add_byte_offset()
99 byte_offset(src_reg reg, unsigned bytes) in byte_offset()
106 offset(src_reg reg, unsigned width, unsigned delta) in offset()
114 horiz_offset(src_reg reg, unsigned delta) in horiz_offset()
124 swizzle(src_reg reg, unsigned swizzle) in swizzle()
135 negate(src_reg reg) in negate()
143 is_uniform(const src_reg ®) in is_uniform()
173 retype(dst_reg reg, enum elk_reg_type type) in retype()
180 byte_offset(dst_reg reg, unsigned bytes) in byte_offset()
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