| /external/mesa3d/src/gallium/drivers/r600/sfn/ |
| D | sfn_shader_gs.cpp | 57 auto write_mask = nir_intrinsic_write_mask(instr); in process_store_output() local
71 auto write_mask = nir_intrinsic_write_mask(instr); in process_store_output() local
218 uint32_t write_mask = nir_intrinsic_write_mask(instr); in store_output() local
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| D | sfn_shader_vs.cpp | 180 uint32_t write_mask = 0; in emit_varying_pos() local
257 int write_mask = nir_intrinsic_write_mask(&intr) << store_info.frac; in emit_varying_param() local
433 int write_mask = in do_scan_instruction() local
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| D | sfn_shader_tess.cpp | 171 auto write_mask = nir_intrinsic_write_mask(intr); in do_scan_instruction() local
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| D | sfn_instr_export.h | 95 int write_mask() const { return m_writemask; } in write_mask() function
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| /external/mesa3d/src/amd/common/nir/ |
| D | ac_nir_prerast_utils.c | 129 unsigned write_mask = nir_intrinsic_write_mask(intrin); in ac_nir_gather_prerast_store_output_info() local
181 unsigned write_mask) in export()
195 unsigned write_mask = BITFIELD_MASK(prim->num_components); in ac_nir_export_primitive() local
283 unsigned write_mask = 0; in ac_nir_export_position() local
404 uint32_t write_mask = 0; in ac_nir_export_parameters() local
433 uint32_t write_mask = 0; in ac_nir_export_parameters() local
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| D | ac_nir_lower_ps_late.c | 156 unsigned write_mask = nir_intrinsic_write_mask(intrin); in gather_ps_store_output() local
253 unsigned write_mask = 0; in emit_ps_mrtz_export() local
356 unsigned write_mask = 0; in emit_ps_color_export() local
542 uint32_t write_mask = mrt0_write_mask & mrt1_write_mask; in emit_ps_dual_src_blend_swizzle() local
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| D | ac_nir_helpers.h | 20 #define AC_NIR_STORE_IO(b, store_val, const_offset, write_mask, hi_16bit, func, ...) \ argument
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| /external/mesa3d/src/compiler/nir/ |
| D | nir_lower_vec_to_regs.c | 37 unsigned write_mask = 0; in insert_store() local
132 nir_component_mask_t write_mask = 0; in try_coalesce() local
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| D | nir_opt_shrink_stores.c | 84 unsigned write_mask = nir_intrinsic_write_mask(instr); in opt_shrink_store_instr() local
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| D | nir_opt_copy_prop_vars.c | 130 nir_component_mask_t write_mask = nir_intrinsic_write_mask(intrin); in value_equals_store_src() local
477 unsigned write_mask, in lookup_entry_and_kill_aliases_copy_array()
505 unsigned write_mask, in lookup_entry_and_kill_aliases()
566 unsigned write_mask) in kill_aliases()
577 unsigned write_mask) in get_entry_and_kill_aliases()
616 unsigned base_index, unsigned write_mask) in value_set_from_value()
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| D | nir_opt_large_constants.c | 74 nir_component_mask_t write_mask, in write_const_values()
201 nir_component_mask_t write_mask, in handle_constant_store()
400 nir_component_mask_t write_mask = 0; in nir_opt_large_constants() local
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| D | nir_lower_reg_intrinsics_to_ssa.c | 93 unsigned write_mask = nir_intrinsic_write_mask(store); in rewrite_store() local
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| D | nir_legacy.h | 64 nir_component_mask_t write_mask; member
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| D | nir_opt_undef.c | 166 unsigned write_mask = nir_intrinsic_write_mask(intrin); in opt_undef_store() local
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| D | nir_lower_locals_to_regs.c | 255 unsigned write_mask = nir_intrinsic_write_mask(intrin); in lower_locals_to_regs_block() local
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| /external/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
| D | ir2_cp.c | 125 unsigned write_mask = 0; in cp_export() local
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| /external/coreboot/src/security/intel/stm/ |
| D | StmPlatformResource.c | 85 uint64_t write_mask; member
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| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| D | tgsi_util.c | 78 uint8_t write_mask, in tgsi_util_get_src_usage_mask()
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| /external/virglrenderer/src/gallium/auxiliary/tgsi/ |
| D | tgsi_util.c | 176 unsigned write_mask = inst->Dst[0].Register.WriteMask; in tgsi_util_get_inst_usage_mask() local
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| /external/mesa3d/src/gallium/drivers/i915/ |
| D | i915_fpc_optimize.c | 152 is_unswizzled(struct i915_full_src_register *r, unsigned write_mask) in is_unswizzled()
188 unsigned write_mask, unsigned neutral) in set_neutral_element_swizzle()
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| /external/mesa3d/src/asahi/lib/ |
| D | agx_nir_lower_tilebuffer.c | 49 unsigned write_mask) in store_tilebuffer()
284 uint16_t write_mask = (uint16_t)BITFIELD_MASK(comps); in tib_impl() local
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| /external/rust/android-crates-io/crates/vulkano/src/pipeline/graphics/ |
| D | depth_stencil.rs | 195 pub write_mask: StateMode<u32>, field
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| /external/mesa3d/src/compiler/glsl/ |
| D | glsl_to_nir.cpp | 1551 ir_constant *write_mask = ((ir_instruction *)param)->as_constant(); in visit() local
1599 ir_constant *write_mask = ((ir_instruction *)param)->as_constant(); in visit() local
1802 unsigned write_mask = ir->write_mask; in visit() local
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| /external/crosvm/hypervisor/src/kvm/ |
| D | riscv64.rs | 128 let write_mask = unsafe { run.__bindgen_anon_1.riscv_csr.write_mask }; in handle_vm_exit_arch() localVariable
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| /external/mesa3d/src/gallium/auxiliary/nir/ |
| D | nir_to_tgsi.c | 240 ntt_64bit_write_mask(unsigned write_mask) in ntt_64bit_write_mask()
734 unsigned write_mask; in ntt_output_decl() local
1146 uint32_t write_mask = BITFIELD_MASK(num_components); in ntt_setup_registers() local
1298 ntt_swizzle_for_write_mask(struct ureg_src src, uint32_t write_mask) in ntt_swizzle_for_write_mask()
1372 unsigned write_mask = chased.write_mask; in ntt_get_alu_dest() local
2101 unsigned write_mask = nir_intrinsic_write_mask(instr); in ntt_emit_mem() local
2408 uint32_t write_mask = BITSET_MASK(instr->def.num_components); in ntt_emit_load_sysval() local
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