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/external/python/cpython3/Modules/_hacl/include/krml/
DFStar_UInt128_Verified.h30 lit.low = a.low + b.low; in FStar_UInt128_add()
31 lit.high = a.high + b.high + FStar_UInt128_carry(a.low + b.low, b.low); in FStar_UInt128_add()
39 lit.low = a.low + b.low; in FStar_UInt128_add_underspec()
40 lit.high = a.high + b.high + FStar_UInt128_carry(a.low + b.low, b.low); in FStar_UInt128_add_underspec()
48 lit.low = a.low + b.low; in FStar_UInt128_add_mod()
49 lit.high = a.high + b.high + FStar_UInt128_carry(a.low + b.low, b.low); in FStar_UInt128_add_mod()
57 lit.low = a.low - b.low; in FStar_UInt128_sub()
58 lit.high = a.high - b.high - FStar_UInt128_carry(a.low, a.low - b.low); in FStar_UInt128_sub()
66 lit.low = a.low - b.low; in FStar_UInt128_sub_underspec()
67 lit.high = a.high - b.high - FStar_UInt128_carry(a.low, a.low - b.low); in FStar_UInt128_sub_underspec()
[all …]
/external/clang/test/CodeGen/
Daarch64-neon-vcombine.c7 // CHECK-LABEL: define <16 x i8> @test_vcombine_s8(<8 x i8> %low, <8 x i8> %high) #0 {
8 // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> %low, <8 x i8> %high, <16 x i32> <i32 0, i32…
10 int8x16_t test_vcombine_s8(int8x8_t low, int8x8_t high) { in test_vcombine_s8() argument
11 return vcombine_s8(low, high); in test_vcombine_s8()
14 // CHECK-LABEL: define <8 x i16> @test_vcombine_s16(<4 x i16> %low, <4 x i16> %high) #0 {
15 // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> %low, <4 x i16> %high, <8 x i32> <i32 0, i3…
17 int16x8_t test_vcombine_s16(int16x4_t low, int16x4_t high) { in test_vcombine_s16() argument
18 return vcombine_s16(low, high); in test_vcombine_s16()
21 // CHECK-LABEL: define <4 x i32> @test_vcombine_s32(<2 x i32> %low, <2 x i32> %high) #0 {
22 // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i32> %low, <2 x i32> %high, <4 x i32> <i32 0, i3…
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/external/eigen/unsupported/Eigen/CXX11/src/Tensor/
DTensorUInt128.h32 template <typename HIGH = uint64_t, typename LOW = uint64_t>
36 LOW low; member
40 …nsorUInt128(const TensorUInt128<OTHER_HIGH, OTHER_LOW>& other) : high(other.high), low(other.low) { in TensorUInt128()
42 EIGEN_STATIC_ASSERT(sizeof(OTHER_LOW) <= sizeof(LOW), YOU_MADE_A_PROGRAMMING_MISTAKE); in TensorUInt128()
49 EIGEN_STATIC_ASSERT(sizeof(OTHER_LOW) <= sizeof(LOW), YOU_MADE_A_PROGRAMMING_MISTAKE);
51 low = other.low;
57 explicit TensorUInt128(const T& x) : high(0), low(x) { in TensorUInt128()
63 TensorUInt128(HIGH y, LOW x) : high(y), low(x) { } in TensorUInt128()
65 EIGEN_DEVICE_FUNC EIGEN_ALWAYS_INLINE operator LOW() const { in LOW() function
66 return low; in LOW()
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/external/openthread/third_party/mbedtls/repo/3rdparty/everest/library/kremlib/
DFStar_UInt128_extracted.c17 return projectee.low; in FStar_UInt128___proj__Mkuint128__item__low()
38 flat = { a.low + b.low, a.high + b.high + FStar_UInt128_carry(a.low + b.low, b.low) }; in FStar_UInt128_add()
46 flat = { a.low + b.low, a.high + b.high + FStar_UInt128_carry(a.low + b.low, b.low) }; in FStar_UInt128_add_underspec()
53 flat = { a.low + b.low, a.high + b.high + FStar_UInt128_carry(a.low + b.low, b.low) }; in FStar_UInt128_add_mod()
60 flat = { a.low - b.low, a.high - b.high - FStar_UInt128_carry(a.low, a.low - b.low) }; in FStar_UInt128_sub()
68 flat = { a.low - b.low, a.high - b.high - FStar_UInt128_carry(a.low, a.low - b.low) }; in FStar_UInt128_sub_underspec()
76 flat = { a.low - b.low, a.high - b.high - FStar_UInt128_carry(a.low, a.low - b.low) }; in FStar_UInt128_sub_mod_impl()
87 FStar_UInt128_uint128 flat = { a.low & b.low, a.high & b.high }; in FStar_UInt128_logand()
93 FStar_UInt128_uint128 flat = { a.low ^ b.low, a.high ^ b.high }; in FStar_UInt128_logxor()
99 FStar_UInt128_uint128 flat = { a.low | b.low, a.high | b.high }; in FStar_UInt128_logor()
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/external/mbedtls/3rdparty/everest/library/kremlib/
DFStar_UInt128_extracted.c17 return projectee.low; in FStar_UInt128___proj__Mkuint128__item__low()
38 flat = { a.low + b.low, a.high + b.high + FStar_UInt128_carry(a.low + b.low, b.low) }; in FStar_UInt128_add()
46 flat = { a.low + b.low, a.high + b.high + FStar_UInt128_carry(a.low + b.low, b.low) }; in FStar_UInt128_add_underspec()
53 flat = { a.low + b.low, a.high + b.high + FStar_UInt128_carry(a.low + b.low, b.low) }; in FStar_UInt128_add_mod()
60 flat = { a.low - b.low, a.high - b.high - FStar_UInt128_carry(a.low, a.low - b.low) }; in FStar_UInt128_sub()
68 flat = { a.low - b.low, a.high - b.high - FStar_UInt128_carry(a.low, a.low - b.low) }; in FStar_UInt128_sub_underspec()
76 flat = { a.low - b.low, a.high - b.high - FStar_UInt128_carry(a.low, a.low - b.low) }; in FStar_UInt128_sub_mod_impl()
87 FStar_UInt128_uint128 flat = { a.low & b.low, a.high & b.high }; in FStar_UInt128_logand()
93 FStar_UInt128_uint128 flat = { a.low ^ b.low, a.high ^ b.high }; in FStar_UInt128_logxor()
99 FStar_UInt128_uint128 flat = { a.low | b.low, a.high | b.high }; in FStar_UInt128_logor()
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/external/mesa3d/src/freedreno/afuc/
Dafuc.xml102 <field name="SPECIALREG" low="0" high="4" type="#specialsrc"/>
107 <field name="REG" low="0" high="4" type="#reg"/>
121 <field name="SPECIALREG" low="0" high="4" type="#specialdst"/>
126 <field name="REG" low="0" high="4" type="#reg"/>
156 <pattern low="5" high="7">xxx</pattern>
158 <field name="XMOV" low="9" high="10" type="#xmov"/>
159 <field name="DST" low="11" high="15" type="#dst"/>
160 <field name="SRC2" low="16" high="20" type="#src"/>
161 <field name="SRC1" low="21" high="25" type="#src"/>
162 <pattern low="27" high="31">10011</pattern>
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/external/mesa3d/src/etnaviv/isa/
Detnaviv.xml121 <field name="AMODE" low="0" high="2" type="#reg_addressing_mode"/>
122 <field name="REG" low="3" high="9" type="uint"/>
123 <field name="COMPS" low="10" high="13" type="#wrmask"/>
134 <field name="COND" low="6" high="10" type="#cond"/>
138 <field name="TYPE_BIT01" low="94" high="95" type="int"/>
188 <field name="SWIZ_X" low="0" high="1" type="#swiz"/>
189 <field name="SWIZ_Y" low="2" high="3" type="#swiz"/>
190 <field name="SWIZ_Z" low="4" high="5" type="#swiz"/>
191 <field name="SWIZ_W" low="6" high="7" type="#swiz"/>
211 <field name="DST" low="13" high="26" type="#instruction-dst">
[all …]
/external/mesa3d/src/freedreno/isa/
Dir3-cat0.xml37 <field name="IMMED" low="0" high="31" type="branch"/>
39 <field name="REPEAT" low="40" high="42" type="#rptN"/>
45 <pattern low="61" high="63">000</pattern> <!-- cat0 -->
61 <pattern low="32" high="36">xxxxx</pattern>
62 <pattern low="37" high="39">000</pattern> <!-- BRTYPE -->
63 <pattern low="45" high="47">000</pattern> <!-- src1 -->
64 <pattern low="52" high="54">000</pattern> <!-- src0 -->
68 <pattern low="49" high="51">xx0</pattern> <!-- OPC_HI -->
69 <pattern low="55" high="58">0000</pattern> <!-- OPC -->
73 <pattern low="49" high="51">xx0</pattern> <!-- OPC_HI -->
[all …]
Dir3-cat6.xml44 <field name="OFFSET" low="0" high="7" type="uint"/>
52 <field name="OFFSET" low="0" high="7" type="uoffset"/>
69 <pattern low="61" high="63">110</pattern> <!-- cat6 -->
78 <field name="TYPE" low="49" high="51" type="#type"/>
84 <field low="14" high="21" name="SRC1" type="#cat6-src-const-or-gpr">
88 <field low="24" high="26" name="SIZE" type="uint"/>
89 <pattern low="27" high="31">00xxx</pattern>
90 <field low="32" high="39" name="DST" type="#reg-gpr"/>
92 <pattern low="52" high="53">00</pattern>
93 <pattern low="54" high="58">00000</pattern> <!-- OPC -->
[all …]
Dir3-cat2.xml32 <field name="DST" low="32" high="39" type="#reg-gpr"/>
33 <field name="REPEAT" low="40" high="41" type="#rptN"/>
51 <pattern low="61" high="63">010</pattern> <!-- cat2 -->
79 <field name="SRC1" low="0" high="15" type="#multisrc">
87 <pattern low="16" high="31">xxxxxxxxxxxxxxxx</pattern>
88 <pattern low="48" high="50">xxx</pattern> <!-- COND -->
89 <field name="SRC1" low="0" high="15" type="#multisrc">
103 <field name="SRC1" low="0" high="15" type="#multisrc">
107 <field name="SRC2" low="16" high="31" type="#multisrc">
115 <field name="SRC1" low="0" high="15" type="#multisrc">
[all …]
Dir3-cat1.xml42 <field name="OFFSET" low="0" high="7" type="uint"/>
51 <field name="OFFSET" low="0" high="7" type="uint"/>
56 <field name="DST" low="0" high="7" type="#reg-gpr"/>
74 <field name="ROUND" low="55" high="56" type="#round"/>
77 <pattern low="61" high="63">001</pattern> <!-- cat1 -->
106 <field name="DST_TYPE" low="46" high="48" type="#type"/>
107 <field name="SRC_TYPE" low="50" high="52" type="#type"/>
123 <assert low="32" high="39">11110100</assert> <!-- DST==a0.x -->
124 <assert low="46" high="48">100</assert> <!-- DST_TYPE==s16 -->
125 <assert low="50" high="52">100</assert> <!-- SRC_TYPE==s16 -->
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/external/pytorch/torch/distributions/
Duniform.py18 ``[low, high)``.
28 low (float or Tensor): lower range (inclusive).
33 "low": constraints.dependent(is_discrete=False, event_dim=0),
40 return (self.high + self.low) / 2
48 return (self.high - self.low) / 12**0.5
52 return (self.high - self.low).pow(2) / 12
54 def __init__(self, low, high, validate_args=None): argument
55 self.low, self.high = broadcast_all(low, high)
57 if isinstance(low, Number) and isinstance(high, Number):
60 batch_shape = self.low.size()
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/external/compiler-rt/lib/builtins/
Dudivmodti4.c47 *rem = n.s.low % d.s.low; in __udivmodti4()
48 return n.s.low / d.s.low; in __udivmodti4()
55 *rem = n.s.low; in __udivmodti4()
59 if (d.s.low == 0) in __udivmodti4()
68 *rem = n.s.high % d.s.low; in __udivmodti4()
69 return n.s.high / d.s.low; in __udivmodti4()
72 if (n.s.low == 0) in __udivmodti4()
81 r.s.low = 0; in __udivmodti4()
94 r.s.low = n.s.low; in __udivmodti4()
115 q.s.low = 0; in __udivmodti4()
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Dudivmoddi4.c45 *rem = n.s.low % d.s.low; in __udivmoddi4()
46 return n.s.low / d.s.low; in __udivmoddi4()
53 *rem = n.s.low; in __udivmoddi4()
57 if (d.s.low == 0) in __udivmoddi4()
66 *rem = n.s.high % d.s.low; in __udivmoddi4()
67 return n.s.high / d.s.low; in __udivmoddi4()
70 if (n.s.low == 0) in __udivmoddi4()
79 r.s.low = 0; in __udivmoddi4()
92 r.s.low = n.s.low; in __udivmoddi4()
113 q.s.low = 0; in __udivmoddi4()
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/external/trusty/arm-trusted-firmware/lib/compiler-rt/builtins/
Dudivmoddi4.c44 *rem = n.s.low % d.s.low; in __udivmoddi4()
45 return n.s.low / d.s.low; in __udivmoddi4()
51 *rem = n.s.low; in __udivmoddi4()
55 if (d.s.low == 0) { in __udivmoddi4()
61 *rem = n.s.high % d.s.low; in __udivmoddi4()
62 return n.s.high / d.s.low; in __udivmoddi4()
65 if (n.s.low == 0) { in __udivmoddi4()
71 r.s.low = 0; in __udivmoddi4()
81 r.s.low = n.s.low; in __udivmoddi4()
100 q.s.low = 0; in __udivmoddi4()
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/external/selinux/libsepol/src/
Dport_record.c9 /* Low - High range. Same for single ports. */
10 int low, high; member
20 /* Low - High range. Same for single ports. */
21 int low, high; member
29 int low, int high, int proto, in sepol_port_key_create() argument
41 tmp_key->low = low; in sepol_port_key_create()
51 int *low, int *high, int *proto) in sepol_port_key_unpack() argument
54 *low = key->low; in sepol_port_key_unpack()
66 (handle, port->low, port->high, port->proto, key_ptr) < 0) { in sepol_port_key_extract()
70 port->low, port->high); in sepol_port_key_extract()
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/external/renderscript-intrinsics-replacement-toolkit/renderscript-toolkit/src/main/cpp/
DUtils.h93 inline int4 clamp(int4 amount, int low, int high) { in clamp() argument
95 r.x = amount.x < low ? low : (amount.x > high ? high : amount.x); in clamp()
96 r.y = amount.y < low ? low : (amount.y > high ? high : amount.y); in clamp()
97 r.z = amount.z < low ? low : (amount.z > high ? high : amount.z); in clamp()
98 r.w = amount.w < low ? low : (amount.w > high ? high : amount.w); in clamp()
102 inline float4 clamp(float4 amount, float low, float high) { in clamp() argument
104 r.x = amount.x < low ? low : (amount.x > high ? high : amount.x); in clamp()
105 r.y = amount.y < low ? low : (amount.y > high ? high : amount.y); in clamp()
106 r.z = amount.z < low ? low : (amount.z > high ? high : amount.z); in clamp()
107 r.w = amount.w < low ? low : (amount.w > high ? high : amount.w); in clamp()
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/external/rust/android-crates-io/crates/glam/src/features/
Dimpl_rand.rs38 let low = *low_b.borrow(); localVariable
41 if low.x >= high.x || low.y >= high.y {
46 x_gen: $uniform::new(low.x, high.x)?,
47 y_gen: $uniform::new(low.y, high.y)?,
56 let low = *low_b.borrow(); localVariable
59 if low.x >= high.x || low.y >= high.y {
64 x_gen: $uniform::new_inclusive(low.x, high.x)?,
65 y_gen: $uniform::new_inclusive(low.y, high.y)?,
82 let low = *low_b.borrow(); localVariable
85 if low.x >= high.x || low.y >= high.y {
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/external/pytorch/torch/testing/
D_creation.py35 def _uniform_random_(t: torch.Tensor, low: float, high: float) -> torch.Tensor:
38 if high - low >= torch.finfo(t.dtype).max:
39 return t.uniform_(low / 2, high / 2).mul_(2)
41 return t.uniform_(low, high)
48 low: Optional[float] = None,
56 values uniformly drawn from ``[low, high)``.
58 …If :attr:`low` or :attr:`high` are specified and are outside the range of the :attr:`dtype`'s repr…
60 …If ``None``, then the following table describes the default values for :attr:`low` and :attr:`high…
64 | ``dtype`` | ``low`` | ``high`` |
81 …low (Optional[Number]): Sets the lower limit (inclusive) of the given range. If a number is provid…
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/external/sdv/vsomeip/third_party/boost/numeric/interval/include/boost/numeric/interval/
Dinterval.hpp96 interval(const T& l, const T& u, bool): low(l), up(u) {} in interval()
105 : low(r.lower()), up(r.upper()) in interval_holder()
108 if (checking2::is_empty(low, up)) in interval_holder()
112 const T& low; member
130 T low; member in boost::numeric::interval
136 low(static_cast<T>(0)), up(static_cast<T>(0)) in interval()
140 interval<T, Policies>::interval(T const &v): low(v), up(v) in interval()
151 low = rnd.conv_down(v); in interval()
162 low = rnd.conv_down(l); in interval()
168 interval<T, Policies>::interval(T const &l, T const &u): low(l), up(u) in interval()
[all …]
/external/eigen/test/
Dnullary.cpp37 void check_extremity_accuracy(const VectorType &v, const typename VectorType::Scalar &low, const ty… in check_extremity_accuracy() argument
52 …Scalar ref = (low*RealScalar(size-i-1))/RealScalar(size-1) + (high*RealScalar(i))/RealScalar(size-… in check_extremity_accuracy()
56 …((v(i)-ref)/ref) << " ; required precision: " << prec << " ; range: " << low << "," << high << "… in check_extremity_accuracy()
57 …VERIFY(internal::isApprox(v(i), (low*RealScalar(size-i-1))/RealScalar(size-1) + (high*RealScalar(i… in check_extremity_accuracy()
72 Scalar low = (size == 1 ? high : internal::random<Scalar>(-500,500)); in testVectorType() local
73 if (numext::real(low)>numext::real(high)) std::swap(low,high); in testVectorType()
75 // check low==high in testVectorType()
77 low = high; in testVectorType()
78 // check abs(low) >> abs(high) in testVectorType()
80 …low = -internal::random<Scalar>(1,2) * RealScalar(std::pow(RealScalar(10),std::numeric_limits<Real… in testVectorType()
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/external/sg3_utils/debian/
Dchangelog1 sg3-utils (1.48-0.1) unstable; urgency=low
7 sg3-utils (1.47-0.1) unstable; urgency=low
13 sg3-utils (1.46-0.1) unstable; urgency=low
19 sg3-utils (1.45-0.1) unstable; urgency=low
25 sg3-utils (1.44-0.1) unstable; urgency=low
31 sg3-utils (1.43-0.1) unstable; urgency=low
37 sg3-utils (1.42-0.1) unstable; urgency=low
43 sg3-utils (1.41-0.1) unstable; urgency=low
49 sg3-utils (1.40-0.1) unstable; urgency=low
55 sg3-utils (1.39-0.1) unstable; urgency=low
[all …]
/external/mesa3d/src/freedreno/registers/adreno/
Da3xx.xml799 <bitfield name="NUM_USER_CLIP_PLANES" low="26" high="28" type="uint"/>
802 <bitfield name="HORZ" low="0" high="9" type="uint"/>
803 <bitfield name="VERT" low="10" high="19" type="uint"/>
812 <bitfield name="MIN" low="0" high="15" type="ufixed" radix="4"/>
813 <bitfield name="MAX" low="16" high="31" type="ufixed" radix="4"/>
817 <bitfield name="VAL" low="0" high="23" type="fixed" radix="20"/>
827 <bitfield name="LINEHALFWIDTH" low="3" high="10" radix="2" type="fixed"/>
832 <bitfield name="RENDER_MODE" low="4" high="7" type="a3xx_render_mode"/>
833 <bitfield name="MSAA_SAMPLES" low="8" high="11" type="a3xx_msaa_samples"/>
834 <bitfield name="RASTER_MODE" low="12" high="15"/>
[all …]
/external/llvm/test/CodeGen/SystemZ/
Dinsert-06.ll1 ; Test insertions of i32s into the low half of an i64.
11 %low = zext i32 %b to i64
13 %res = or i64 %high, %low
23 %low = zext i32 %b to i64
25 %res = or i64 %low, %high
35 %low = and i64 %b, 4294967295
37 %res = or i64 %high, %low
47 %low = and i64 %b, 4294967295
49 %res = or i64 %low, %high
53 ; Unary operations can be done directly into the low half.
[all …]
/external/tensorflow/tensorflow/python/ops/distributions/
Duniform.py34 """Uniform distribution with `low` and `high` parameters.
47 - `low = a`,
53 The parameters `low` and `high` must be shaped in a way that supports
54 broadcasting (e.g., `high - low` is a valid operation).
60 u1 = Uniform(low=3.0, high=4.0) # a single uniform distribution [3, 4]
61 u2 = Uniform(low=[1.0, 2.0],
63 u3 = Uniform(low=[[1.0, 2.0],
71 u1 = Uniform(low=3.0, high=[5.0, 6.0, 7.0]) # 3 distributions
85 low=0., argument
93 low: Floating point tensor, lower boundary of the output interval. Must
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12345678910>>...435