| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/M68k/ |
| D | M68kRegisterInfo.cpp | 49 StackPtr = M68k::SP; in M68kRegisterInfo()
187 BasePtr = (FIndex < 0 ? FramePtr : StackPtr); in eliminateFrameIndex()
189 BasePtr = StackPtr; in eliminateFrameIndex()
191 BasePtr = (TFI->hasFP(MF) ? FramePtr : StackPtr); in eliminateFrameIndex()
207 if (BasePtr == StackPtr) in eliminateFrameIndex()
264 return TFI->hasFP(MF) ? FramePtr : StackPtr; in getFrameRegister()
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| D | M68kFrameLowering.cpp | 40 StackPtr = TRI->getStackRegister(); in M68kFrameLowering()
361 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr) in emitSPUpdate()
362 .addReg(StackPtr) in emitSPUpdate()
403 if (Opc == M68k::ADD32ai && PI->getOperand(0).getReg() == StackPtr) { in mergeSPUpdates()
404 assert(PI->getOperand(1).getReg() == StackPtr); in mergeSPUpdates()
409 } else if (Opc == M68k::SUB32ai && PI->getOperand(0).getReg() == StackPtr) { in mergeSPUpdates()
410 assert(PI->getOperand(1).getReg() == StackPtr); in mergeSPUpdates()
431 MachineInstrBuilder MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr) in BuildStackAdjustment()
432 .addReg(StackPtr) in BuildStackAdjustment()
608 BuildStackAlignAND(MBB, MBBI, DL, StackPtr, MaxAlign); in emitPrologue()
[all …]
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| D | M68kRegisterInfo.h | 34 unsigned StackPtr; variable
108 unsigned getStackRegister() const { return StackPtr; } in getStackRegister()
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/X86/ |
| D | X86DynAllocaExpander.cpp | 62 unsigned StackPtr = 0; member in __anon49528daf0111::X86DynAllocaExpander
182 } else if (MI.modifiesRegister(StackPtr, TRI)) { in computeLowerings()
246 TII->get(getSubOpcode(Is64BitAlloca, Amount)), StackPtr) in lower()
247 .addReg(StackPtr) in lower()
264 TII->get(Is64BitAlloca ? X86::SUB64rr : X86::SUB32rr), StackPtr) in lower()
265 .addReg(StackPtr) in lower()
288 StackPtr = TRI->getStackRegister(); in runOnMachineFunction()
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| D | X86FrameLowering.cpp | 58 StackPtr = TRI->getStackRegister(); in X86FrameLowering()
259 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(AddSubRROpc), StackPtr) in emitSPUpdate()
260 .addReg(StackPtr) in emitSPUpdate()
287 .addReg(StackPtr); in emitSPUpdate()
292 StackPtr, false, 0); in emitSPUpdate()
294 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rm), StackPtr), in emitSPUpdate()
295 StackPtr, false, 0); in emitSPUpdate()
360 StackPtr), in BuildStackAdjustment()
361 StackPtr, false, Offset); in BuildStackAdjustment()
367 MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr) in BuildStackAdjustment()
[all …]
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| D | X86RegisterInfo.h | 40 unsigned StackPtr; variable
150 Register getStackRegister() const { return StackPtr; } in getStackRegister()
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| D | X86CallFrameOptimization.cpp | 383 Register StackPtr = RegInfo.getStackRegister(); in collectCallInfo() local
395 J->getOperand(1).getReg() == StackPtr) { in collectCallInfo()
398 StackPtr = Context.SPCopy->getOperand(0).getReg(); in collectCallInfo()
428 (I->getOperand(X86::AddrBaseReg).getReg() != StackPtr) || in collectCallInfo()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86WinAllocaExpander.cpp | 61 unsigned StackPtr = 0; member in __anona18bc3ec0111::X86WinAllocaExpander
181 } else if (MI.modifiesRegister(StackPtr, TRI)) { in computeLowerings()
239 TII->get(getSubOpcode(Is64BitAlloca, Amount)), StackPtr) in lower()
240 .addReg(StackPtr) in lower()
257 TII->get(Is64BitAlloca ? X86::SUB64rr : X86::SUB32rr), StackPtr) in lower()
258 .addReg(StackPtr) in lower()
281 StackPtr = TRI->getStackRegister(); in runOnMachineFunction()
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| D | X86RegisterInfo.h | 40 unsigned StackPtr; variable
139 Register getStackRegister() const { return StackPtr; } in getStackRegister()
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| D | X86FrameLowering.cpp | 48 StackPtr = TRI->getStackRegister(); in X86FrameLowering()
278 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(AddSubRROpc), StackPtr) in emitSPUpdate()
279 .addReg(StackPtr) in emitSPUpdate()
306 .addReg(StackPtr); in emitSPUpdate()
311 StackPtr, false, 0); in emitSPUpdate()
313 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rm), StackPtr), in emitSPUpdate()
314 StackPtr, false, 0); in emitSPUpdate()
379 StackPtr), in BuildStackAdjustment()
380 StackPtr, false, Offset); in BuildStackAdjustment()
386 MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr) in BuildStackAdjustment()
[all …]
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| D | X86CallFrameOptimization.cpp | 383 Register StackPtr = RegInfo.getStackRegister(); in collectCallInfo() local
395 J->getOperand(1).getReg() == StackPtr) { in collectCallInfo()
398 StackPtr = Context.SPCopy->getOperand(0).getReg(); in collectCallInfo()
428 (I->getOperand(X86::AddrBaseReg).getReg() != StackPtr) || in collectCallInfo()
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| D | X86RegisterInfo.cpp | 64 StackPtr = Use64BitReg ? X86::RSP : X86::ESP; in X86RegisterInfo()
69 StackPtr = X86::ESP; in X86RegisterInfo()
767 if (BasePtr == StackPtr) in eliminateFrameIndex()
797 return TFI->hasFP(MF) ? FramePtr : StackPtr; in getFrameRegister()
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| /external/giflib/ |
| D | dgif_lib.c | 838 Private->StackPtr = 0; /* No pixels on the pixel stack. */ in DGifSetupDecompress()
860 int j, CrntCode, EOFCode, ClearCode, CrntPrefix, LastCode, StackPtr; in DGifDecompressLine() local
865 StackPtr = Private->StackPtr; in DGifDecompressLine()
873 if (StackPtr > LZ_MAX_CODE) { in DGifDecompressLine()
877 if (StackPtr != 0) { in DGifDecompressLine()
880 while (StackPtr != 0 && i < LineLen) { in DGifDecompressLine()
881 Line[i++] = Stack[--StackPtr]; in DGifDecompressLine()
932 2] = Stack[StackPtr++] = in DGifDecompressLine()
938 2] = Stack[StackPtr++] = in DGifDecompressLine()
952 while (StackPtr < LZ_MAX_CODE && in DGifDecompressLine()
[all …]
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| D | gif_lib_private.h | 50 StackPtr, /* For character stack (see below). */ member
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| /external/llvm/lib/Target/X86/ |
| D | X86WinAllocaExpander.cpp | 62 unsigned StackPtr; member in __anonb881718a0111::X86WinAllocaExpander
185 } else if (MI.modifiesRegister(StackPtr, TRI)) { in computeLowerings()
236 BuildMI(*MBB, I, DL, TII->get(getSubOpcode(Is64Bit, Amount)), StackPtr) in lower()
237 .addReg(StackPtr) in lower()
277 StackPtr = TRI->getStackRegister(); in runOnMachineFunction()
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| D | X86RegisterInfo.cpp | 70 StackPtr = Use64BitReg ? X86::RSP : X86::ESP; in X86RegisterInfo()
75 StackPtr = X86::ESP; in X86RegisterInfo()
591 BasePtr = (FrameIndex < 0 ? FramePtr : StackPtr); in eliminateFrameIndex()
593 BasePtr = StackPtr; in eliminateFrameIndex()
595 BasePtr = (TFI->hasFP(MF) ? FramePtr : StackPtr); in eliminateFrameIndex()
630 if (BasePtr == StackPtr) in eliminateFrameIndex()
659 return TFI->hasFP(MF) ? FramePtr : StackPtr; in getFrameRegister()
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| D | X86RegisterInfo.h | 41 unsigned StackPtr; variable
134 unsigned getStackRegister() const { return StackPtr; } in getStackRegister()
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| D | X86FrameLowering.cpp | 49 StackPtr = TRI->getStackRegister(); in X86FrameLowering()
277 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr) in emitSPUpdate()
278 .addReg(StackPtr) in emitSPUpdate()
351 StackPtr), in BuildStackAdjustment()
352 StackPtr, false, Offset); in BuildStackAdjustment()
358 MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr) in BuildStackAdjustment()
359 .addReg(StackPtr) in BuildStackAdjustment()
387 PI->getOperand(0).getReg() == StackPtr){ in mergeSPUpdates()
388 assert(PI->getOperand(1).getReg() == StackPtr); in mergeSPUpdates()
393 PI->getOperand(0).getReg() == StackPtr && in mergeSPUpdates()
[all …]
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| D | X86CallFrameOptimization.cpp | 349 unsigned StackPtr = RegInfo.getStackRegister(); in collectCallInfo() local
354 I->getOperand(1).getReg() == StackPtr) { in collectCallInfo()
356 StackPtr = Context.SPCopy->getOperand(0).getReg(); in collectCallInfo()
386 (I->getOperand(X86::AddrBaseReg).getReg() != StackPtr) || in collectCallInfo()
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| /external/rust/android-crates-io/crates/libfuzzer-sys/libfuzzer/ |
| D | FuzzerUtilFuchsia.cpp | 345 uintptr_t StackPtr = in CrashHandler() local
348 __unsanitized_memcpy(reinterpret_cast<void *>(StackPtr), &GeneralRegisters, in CrashHandler()
350 GeneralRegisters.rsp = StackPtr; in CrashHandler()
355 uintptr_t StackPtr = in CrashHandler() local
357 __unsanitized_memcpy(reinterpret_cast<void *>(StackPtr), &GeneralRegisters, in CrashHandler()
359 GeneralRegisters.sp = StackPtr; in CrashHandler()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeTypesGeneric.cpp | 167 SDValue StackPtr = DAG.CreateStackTemporary(InVT, Alignment); in ExpandRes_BITCAST() local
168 int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex(); in ExpandRes_BITCAST()
173 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, InOp, StackPtr, PtrInfo, in ExpandRes_BITCAST()
177 Lo = DAG.getLoad(NOutVT, dl, Store, StackPtr, PtrInfo, in ExpandRes_BITCAST()
182 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr, in ExpandRes_BITCAST()
184 StackPtr.getValueType())); in ExpandRes_BITCAST()
187 Hi = DAG.getLoad(NOutVT, dl, Store, StackPtr, in ExpandRes_BITCAST()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeTypesGeneric.cpp | 159 SDValue StackPtr = DAG.CreateStackTemporary(InVT, Alignment); in ExpandRes_BITCAST() local
160 int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex(); in ExpandRes_BITCAST()
165 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, InOp, StackPtr, PtrInfo); in ExpandRes_BITCAST()
168 Lo = DAG.getLoad(NOutVT, dl, Store, StackPtr, PtrInfo); in ExpandRes_BITCAST()
172 StackPtr = DAG.getMemBasePlusOffset(StackPtr, IncrementSize, dl); in ExpandRes_BITCAST()
175 Hi = DAG.getLoad(NOutVT, dl, Store, StackPtr, in ExpandRes_BITCAST()
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeTypesGeneric.cpp | 165 SDValue StackPtr = DAG.CreateStackTemporary(InVT.getStoreSize(), Align); in ExpandRes_BITCAST() local
166 int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex(); in ExpandRes_BITCAST()
171 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, InOp, StackPtr, PtrInfo); in ExpandRes_BITCAST()
174 Lo = DAG.getLoad(NOutVT, dl, Store, StackPtr, PtrInfo, NOutAlign); in ExpandRes_BITCAST()
178 StackPtr = in ExpandRes_BITCAST()
179 DAG.getMemBasePlusOffset(StackPtr, TypeSize::Fixed(IncrementSize), dl); in ExpandRes_BITCAST()
182 Hi = DAG.getLoad(NOutVT, dl, Store, StackPtr, in ExpandRes_BITCAST()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/ |
| D | ARCISelLowering.cpp | 260 SDValue StackPtr; in LowerCall() local
289 if (!StackPtr.getNode()) in LowerCall()
290 StackPtr = DAG.getCopyFromReg(Chain, dl, ARC::SP, in LowerCall()
295 ISD::ADD, dl, getPointerTy(DAG.getDataLayout()), StackPtr, SOffset); in LowerCall()
400 SDValue StackPtr = DAG.getRegister(ARC::SP, MVT::i32); in lowerCallResult() local
401 SDValue SpLoc = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, in lowerCallResult()
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| /external/llvm/lib/CodeGen/ |
| D | SjLjEHPrepare.cpp | 389 Value *StackPtr = Builder.CreateConstGEP2_32(doubleUnderJBufTy, JBufPtr, 0, 2, in setupEntryBlockAndCallSites() local
393 Builder.CreateStore(Val, StackPtr, /*isVolatile=*/true); in setupEntryBlockAndCallSites()
448 Instruction *StoreStackAddr = new StoreInst(StackAddr, StackPtr, true); in setupEntryBlockAndCallSites()
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