1 // Auto-generated file. Do not edit!
2 // Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <arm_neon.h>
13
14 #include <xnnpack/common.h>
15 #include <xnnpack/raddstoreexpminusmax.h>
16
17
18 extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
19
xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x12_acc3(size_t elements,const float * input,const float * max,float * output,float * sum,const union xnn_f32_expminus_params params[restrict XNN_MIN_ELEMENTS (1)])20 void xnn_f32_raddstoreexpminusmax_ukernel__neon_rr2_lut64_p2_x12_acc3(
21 size_t elements,
22 const float* input,
23 const float* max,
24 float* output,
25 float* sum,
26 const union xnn_f32_expminus_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
27 {
28 assert(elements % sizeof(float) == 0);
29
30 const float32x4_t vi_max = vld1q_dup_f32(max);
31 const float32x4_t vlog2e = vld1q_dup_f32(¶ms->neon_rr2_lut64_p2.log2e);
32 const float32x4_t vmagic_bias = vld1q_dup_f32(¶ms->neon_rr2_lut64_p2.magic_bias);
33 const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
34 const float32x4_t vminus_ln2_hi = vld1q_dup_f32(¶ms->neon_rr2_lut64_p2.minus_ln2_hi);
35 const float32x4_t vminus_ln2_lo = vld1q_dup_f32(¶ms->neon_rr2_lut64_p2.minus_ln2_lo);
36 const float32x4_t vc2 = vld1q_dup_f32(¶ms->neon_rr2_lut64_p2.c2);
37 const float32x4_t vdenorm_cutoff = vld1q_dup_f32(¶ms->neon_rr2_lut64_p2.denorm_cutoff);
38
39 float32x4_t vacc0 = vmovq_n_f32(0.0f);
40 float32x4_t vacc1 = vmovq_n_f32(0.0f);
41 float32x4_t vacc2 = vmovq_n_f32(0.0f);
42 for (; elements >= 12 * sizeof(float); elements -= 12 * sizeof(float)) {
43 const float32x4_t vi0123 = vld1q_f32(input); input += 4;
44 const float32x4_t vi4567 = vld1q_f32(input); input += 4;
45 const float32x4_t vi89AB = vld1q_f32(input); input += 4;
46
47 const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
48 const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
49 const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
50
51 float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e);
52 float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e);
53 float32x4_t vn89AB = vmlaq_f32(vmagic_bias, vx89AB, vlog2e);
54
55 const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
56 const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
57 const int32x4_t ve89AB = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn89AB), vmovq_n_s32(INT32_C(0x3F))), 17);
58
59 const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
60 const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
61 const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
62 const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
63 const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
64 const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
65 const uint64x2_t vidx89AB = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn89AB), vindex_mask));
66 const uint64_t vidx89 = vgetq_lane_u64(vidx89AB, 0);
67 const uint64_t vidxAB = vgetq_lane_u64(vidx89AB, 1);
68
69 float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
70 float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
71 float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
72 float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
73 float32x2_t vl89 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx89]);
74 float32x2_t vlAB = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxAB]);
75
76 vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
77 vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
78 const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
79 vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
80 vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
81 const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
82 vl89 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx89 >> 32)], vl89, 1);
83 vlAB = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxAB >> 32)], vlAB, 1);
84 const float32x4_t vl89AB = vcombine_f32(vl89, vlAB);
85
86 const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
87 const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
88 const float32x4_t vs89AB = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl89AB), ve89AB));
89
90 vn0123 = vsubq_f32(vn0123, vmagic_bias);
91 vn4567 = vsubq_f32(vn4567, vmagic_bias);
92 vn89AB = vsubq_f32(vn89AB, vmagic_bias);
93
94 float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_hi);
95 float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_hi);
96 float32x4_t vt89AB = vmlaq_f32(vx89AB, vn89AB, vminus_ln2_hi);
97
98 vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_lo);
99 vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_lo);
100 vt89AB = vmlaq_f32(vt89AB, vn89AB, vminus_ln2_lo);
101
102 float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
103 float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
104 float32x4_t vp89AB = vmulq_f32(vt89AB, vc2);
105
106 vp0123 = vmlaq_f32(vt0123, vt0123, vp0123);
107 vp4567 = vmlaq_f32(vt4567, vt4567, vp4567);
108 vp89AB = vmlaq_f32(vt89AB, vt89AB, vp89AB);
109
110 float32x4_t vf0123 = vmlaq_f32(vs0123, vs0123, vp0123);
111 float32x4_t vf4567 = vmlaq_f32(vs4567, vs4567, vp4567);
112 float32x4_t vf89AB = vmlaq_f32(vs89AB, vs89AB, vp89AB);
113
114 vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
115 vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
116 vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
117
118 vst1q_f32(output, vf0123); output += 4;
119 vst1q_f32(output, vf4567); output += 4;
120 vst1q_f32(output, vf89AB); output += 4;
121
122 vacc0 = vaddq_f32(vacc0, vf0123);
123 vacc1 = vaddq_f32(vacc1, vf4567);
124 vacc2 = vaddq_f32(vacc2, vf89AB);
125 }
126 vacc0 = vaddq_f32(vacc0, vacc1);
127 vacc0 = vaddq_f32(vacc0, vacc2);
128
129 float32x4_t vacc = vacc0;
130 for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
131 const float32x4_t vi = vld1q_f32(input); input += 4;
132
133 const float32x4_t vx = vsubq_f32(vi, vi_max);
134
135 float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
136
137 const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
138
139 const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
140 const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
141 const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
142 float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
143 float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
144 vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
145 vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
146 const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
147 const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
148
149 vn = vsubq_f32(vn, vmagic_bias);
150
151 float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
152 vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
153
154 float32x4_t vp = vmulq_f32(vt, vc2);
155 vp = vmlaq_f32(vt, vt, vp);
156
157 float32x4_t vf = vmlaq_f32(vs, vs, vp);
158
159 vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
160
161 vst1q_f32(output, vf); output += 4;
162
163 vacc = vaddq_f32(vacc, vf);
164 }
165 #if XNN_ARCH_ARM64
166 float vacc_lo = vaddvq_f32(vacc);
167 #else
168 float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
169 #endif
170 if (elements != 0) {
171 assert(elements >= 1 * sizeof(float));
172 assert(elements <= 3 * sizeof(float));
173 const float32x4_t vi = vld1q_f32(input); input += 4;
174
175 const float32x4_t vx = vsubq_f32(vi, vi_max);
176
177 float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e);
178
179 const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
180
181 const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
182 const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
183 const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
184 float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
185 float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
186 vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
187 vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
188 const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
189 const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
190
191 vn = vsubq_f32(vn, vmagic_bias);
192
193 float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_hi);
194 vt = vmlaq_f32(vt, vn, vminus_ln2_lo);
195
196 float32x4_t vp = vmulq_f32(vt, vc2);
197 vp = vmlaq_f32(vt, vt, vp);
198
199 float32x4_t vf = vmlaq_f32(vs, vs, vp);
200
201 vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
202
203 float32x2_t vf_lo = vget_low_f32(vf);
204 if (elements & (2 * sizeof(float))) {
205 vst1_f32(output, vf_lo); output += 2;
206
207 #if XNN_ARCH_ARM64
208 vacc_lo += vaddv_f32(vf_lo);
209 #else
210 vacc_lo = vadd_f32(vacc_lo, vf_lo);
211 #endif
212
213 vf_lo = vget_high_f32(vf);
214 }
215 if (elements & (1 * sizeof(float))) {
216 vst1_lane_f32(output, vf_lo, 0);
217
218 #if XNN_ARCH_ARM64
219 vacc_lo += vget_lane_f32(vf_lo, 0);
220 #else
221 vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
222 #endif
223 }
224 }
225 #if XNN_ARCH_ARM64
226 *sum = vacc_lo;
227 #else
228 vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
229 #endif
230 }
231