1# Copyright 2022 Google LLC 2# 3# This source code is licensed under the BSD-style license found in the 4# LICENSE file in the root directory of this source tree. 5 6# ARM NEON 7- name: xnn_qu8_vlrelu_ukernel__neon_x8 8 init: xnn_init_qu8_lrelu_neon_params 9- name: xnn_qu8_vlrelu_ukernel__neon_x16 10 init: xnn_init_qu8_lrelu_neon_params 11- name: xnn_qu8_vlrelu_ukernel__neon_x32 12 init: xnn_init_qu8_lrelu_neon_params 13 14# x86 SSE2 15- name: xnn_qu8_vlrelu_ukernel__sse2_x16 16 init: xnn_init_qu8_lrelu_sse2_params 17- name: xnn_qu8_vlrelu_ukernel__sse2_x32 18 init: xnn_init_qu8_lrelu_sse2_params 19 20# x86 SSSE3 21- name: xnn_qu8_vlrelu_ukernel__ssse3_x16 22 init: xnn_init_qu8_lrelu_sse2_params 23- name: xnn_qu8_vlrelu_ukernel__ssse3_x32 24 init: xnn_init_qu8_lrelu_sse2_params 25 26# x86 SSE4.1 27- name: xnn_qu8_vlrelu_ukernel__sse41_x8 28 init: xnn_init_qu8_lrelu_sse2_params 29- name: xnn_qu8_vlrelu_ukernel__sse41_x16 30 init: xnn_init_qu8_lrelu_sse2_params 31- name: xnn_qu8_vlrelu_ukernel__sse41_x32 32 init: xnn_init_qu8_lrelu_sse2_params 33 34# x86 AVX 35- name: xnn_qu8_vlrelu_ukernel__avx_x8 36 init: xnn_init_qu8_lrelu_avx_params 37- name: xnn_qu8_vlrelu_ukernel__avx_x16 38 init: xnn_init_qu8_lrelu_avx_params 39- name: xnn_qu8_vlrelu_ukernel__avx_x32 40 init: xnn_init_qu8_lrelu_avx_params 41 42# x86 AVX2 43- name: xnn_qu8_vlrelu_ukernel__avx2_x16 44 init: xnn_init_qu8_lrelu_avx2_params 45- name: xnn_qu8_vlrelu_ukernel__avx2_x32 46 init: xnn_init_qu8_lrelu_avx2_params 47- name: xnn_qu8_vlrelu_ukernel__avx2_x64 48 init: xnn_init_qu8_lrelu_avx2_params 49 50# WAsm SIMD (ARM-optimized) 51- name: xnn_qu8_vlrelu_ukernel__wasmsimd_arm_x16 52 init: xnn_init_qu8_lrelu_wasmsimd_arm_params 53- name: xnn_qu8_vlrelu_ukernel__wasmsimd_arm_x32 54 init: xnn_init_qu8_lrelu_wasmsimd_arm_params 55 56# WAsm SIMD (x86-optimized) 57- name: xnn_qu8_vlrelu_ukernel__wasmsimd_x86_x8 58 init: xnn_init_qu8_lrelu_wasmsimd_x86_params 59- name: xnn_qu8_vlrelu_ukernel__wasmsimd_x86_x16 60 init: xnn_init_qu8_lrelu_wasmsimd_x86_params 61- name: xnn_qu8_vlrelu_ukernel__wasmsimd_x86_x32 62 init: xnn_init_qu8_lrelu_wasmsimd_x86_params 63 64# WAsm Relaxed SIMD (ARM-optimized) 65- name: xnn_qu8_vlrelu_ukernel__wasmrelaxedsimd_arm_x16 66 init: xnn_init_qu8_lrelu_wasmsimd_arm_params 67- name: xnn_qu8_vlrelu_ukernel__wasmrelaxedsimd_arm_x32 68 init: xnn_init_qu8_lrelu_wasmsimd_arm_params 69 70# WAsm Relaxed SIMD (x86-optimized) 71- name: xnn_qu8_vlrelu_ukernel__wasmrelaxedsimd_x86_x8 72 init: xnn_init_qu8_lrelu_wasmsimd_x86_params 73- name: xnn_qu8_vlrelu_ukernel__wasmrelaxedsimd_x86_x16 74 init: xnn_init_qu8_lrelu_wasmsimd_x86_params 75- name: xnn_qu8_vlrelu_ukernel__wasmrelaxedsimd_x86_x32 76 init: xnn_init_qu8_lrelu_wasmsimd_x86_params 77 78# ARMv6 SIMD 79- name: xnn_qu8_vlrelu_ukernel__armsimd32_x4 80 init: xnn_init_qu8_lrelu_armsimd32_params 81- name: xnn_qu8_vlrelu_ukernel__armsimd32_x8 82 init: xnn_init_qu8_lrelu_armsimd32_params 83 84# Scalar (select) 85- name: xnn_qu8_vlrelu_ukernel__scalar_select_x1 86 init: xnn_init_qu8_lrelu_scalar_select_params 87- name: xnn_qu8_vlrelu_ukernel__scalar_select_x2 88 init: xnn_init_qu8_lrelu_scalar_select_params 89- name: xnn_qu8_vlrelu_ukernel__scalar_select_x4 90 init: xnn_init_qu8_lrelu_scalar_select_params 91 92# Scalar (and+xor) 93- name: xnn_qu8_vlrelu_ukernel__scalar_andxor_x1 94 init: xnn_init_qu8_lrelu_scalar_andxor_params 95- name: xnn_qu8_vlrelu_ukernel__scalar_andxor_x2 96 init: xnn_init_qu8_lrelu_scalar_andxor_params 97- name: xnn_qu8_vlrelu_ukernel__scalar_andxor_x4 98 init: xnn_init_qu8_lrelu_scalar_andxor_params 99