1# 2# Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Use the GICv2 driver on QEMU by default 8QEMU_USE_GIC_DRIVER := QEMU_GICV2 9 10ifeq (${ARM_ARCH_MAJOR},7) 11# ARMv7 Qemu support in trusted firmware expects the Cortex-A15 model. 12# Qemu Cortex-A15 model does not implement the virtualization extension. 13# For this reason, we cannot set ARM_CORTEX_A15=yes and must define all 14# the ARMv7 build directives. 15MARCH32_DIRECTIVE := -mcpu=cortex-a15 16$(eval $(call add_define,ARMV7_SUPPORTS_LARGE_PAGE_ADDRESSING)) 17$(eval $(call add_define,ARMV7_SUPPORTS_GENERIC_TIMER)) 18$(eval $(call add_define,ARMV7_SUPPORTS_VFP)) 19# Qemu expects a BL32 boot stage. 20NEED_BL32 := yes 21endif # ARMv7 22 23ifeq (${SPD},opteed) 24add-lib-optee := yes 25endif 26ifeq ($(AARCH32_SP),optee) 27add-lib-optee := yes 28endif 29 30include lib/libfdt/libfdt.mk 31 32ifeq ($(NEED_BL32),yes) 33$(eval $(call add_define,QEMU_LOAD_BL32)) 34endif 35 36PLAT_QEMU_PATH := plat/qemu/qemu 37PLAT_QEMU_COMMON_PATH := plat/qemu/common 38PLAT_INCLUDES := -Iinclude/plat/arm/common/ \ 39 -I${PLAT_QEMU_COMMON_PATH}/include \ 40 -I${PLAT_QEMU_PATH}/include \ 41 -Iinclude/common/tbbr 42 43ifeq (${ARM_ARCH_MAJOR},8) 44PLAT_INCLUDES += -Iinclude/plat/arm/common/${ARCH} 45endif 46 47PLAT_BL_COMMON_SOURCES := ${PLAT_QEMU_COMMON_PATH}/qemu_common.c \ 48 ${PLAT_QEMU_COMMON_PATH}/qemu_console.c \ 49 drivers/arm/pl011/${ARCH}/pl011_console.S 50 51include lib/xlat_tables_v2/xlat_tables.mk 52PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 53 54ifneq (${TRUSTED_BOARD_BOOT},0) 55 56 include drivers/auth/mbedtls/mbedtls_crypto.mk 57 include drivers/auth/mbedtls/mbedtls_x509.mk 58 59 AUTH_SOURCES := drivers/auth/auth_mod.c \ 60 drivers/auth/crypto_mod.c \ 61 drivers/auth/img_parser_mod.c \ 62 drivers/auth/tbbr/tbbr_cot_common.c 63 64 BL1_SOURCES += ${AUTH_SOURCES} \ 65 bl1/tbbr/tbbr_img_desc.c \ 66 plat/common/tbbr/plat_tbbr.c \ 67 ${PLAT_QEMU_COMMON_PATH}/qemu_trusted_boot.c \ 68 $(PLAT_QEMU_COMMON_PATH)/qemu_rotpk.S \ 69 drivers/auth/tbbr/tbbr_cot_bl1.c 70 71 BL2_SOURCES += ${AUTH_SOURCES} \ 72 plat/common/tbbr/plat_tbbr.c \ 73 ${PLAT_QEMU_COMMON_PATH}/qemu_trusted_boot.c \ 74 $(PLAT_QEMU_COMMON_PATH)/qemu_rotpk.S \ 75 drivers/auth/tbbr/tbbr_cot_bl2.c 76 77 ROT_KEY = $(BUILD_PLAT)/rot_key.pem 78 ROTPK_HASH = $(BUILD_PLAT)/rotpk_sha256.bin 79 80 $(eval $(call add_define_val,ROTPK_HASH,'"$(ROTPK_HASH)"')) 81 82 $(BUILD_PLAT)/bl1/qemu_rotpk.o: $(ROTPK_HASH) 83 $(BUILD_PLAT)/bl2/qemu_rotpk.o: $(ROTPK_HASH) 84 85 certificates: $(ROT_KEY) 86 87 $(ROT_KEY): | $(BUILD_PLAT) 88 @echo " OPENSSL $@" 89 $(Q)openssl genrsa 2048 > $@ 2>/dev/null 90 91 $(ROTPK_HASH): $(ROT_KEY) 92 @echo " OPENSSL $@" 93 $(Q)openssl rsa -in $< -pubout -outform DER 2>/dev/null |\ 94 openssl dgst -sha256 -binary > $@ 2>/dev/null 95endif 96 97BL1_SOURCES += drivers/io/io_semihosting.c \ 98 drivers/io/io_storage.c \ 99 drivers/io/io_fip.c \ 100 drivers/io/io_memmap.c \ 101 lib/semihosting/semihosting.c \ 102 lib/semihosting/${ARCH}/semihosting_call.S \ 103 ${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \ 104 ${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \ 105 ${PLAT_QEMU_COMMON_PATH}/qemu_bl1_setup.c 106 107ifeq (${ARM_ARCH_MAJOR},8) 108BL1_SOURCES += lib/cpus/aarch64/aem_generic.S \ 109 lib/cpus/aarch64/cortex_a53.S \ 110 lib/cpus/aarch64/cortex_a57.S \ 111 lib/cpus/aarch64/cortex_a72.S \ 112 lib/cpus/aarch64/qemu_max.S \ 113 114else 115BL1_SOURCES += lib/cpus/${ARCH}/cortex_a15.S 116endif 117 118BL2_SOURCES += drivers/io/io_semihosting.c \ 119 drivers/io/io_storage.c \ 120 drivers/io/io_fip.c \ 121 drivers/io/io_memmap.c \ 122 lib/semihosting/semihosting.c \ 123 lib/semihosting/${ARCH}/semihosting_call.S \ 124 ${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \ 125 ${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \ 126 ${PLAT_QEMU_COMMON_PATH}/qemu_bl2_setup.c \ 127 ${PLAT_QEMU_COMMON_PATH}/qemu_bl2_mem_params_desc.c \ 128 ${PLAT_QEMU_COMMON_PATH}/qemu_image_load.c \ 129 common/fdt_fixup.c \ 130 common/desc_image_load.c 131 132ifeq ($(add-lib-optee),yes) 133BL2_SOURCES += lib/optee/optee_utils.c 134endif 135 136ifneq (${DECRYPTION_SUPPORT},none) 137BL1_SOURCES += drivers/io/io_encrypted.c 138BL2_SOURCES += drivers/io/io_encrypted.c 139endif 140 141# Include GICv2 driver files 142include drivers/arm/gic/v2/gicv2.mk 143QEMU_GICV2_SOURCES := ${GICV2_SOURCES} \ 144 plat/common/plat_gicv2.c \ 145 ${PLAT_QEMU_COMMON_PATH}/qemu_gicv2.c 146 147# Include GICv3 driver files 148include drivers/arm/gic/v3/gicv3.mk 149 150QEMU_GICV3_SOURCES := ${GICV3_SOURCES} \ 151 plat/common/plat_gicv3.c \ 152 ${PLAT_QEMU_COMMON_PATH}/qemu_gicv3.c 153 154ifeq (${QEMU_USE_GIC_DRIVER}, QEMU_GICV2) 155QEMU_GIC_SOURCES := ${QEMU_GICV2_SOURCES} 156else ifeq (${QEMU_USE_GIC_DRIVER}, QEMU_GICV3) 157QEMU_GIC_SOURCES := ${QEMU_GICV3_SOURCES} 158else 159$(error "Incorrect GIC driver chosen for QEMU platform") 160endif 161 162ifeq (${ARM_ARCH_MAJOR},8) 163BL31_SOURCES += lib/cpus/aarch64/aem_generic.S \ 164 lib/cpus/aarch64/cortex_a53.S \ 165 lib/cpus/aarch64/cortex_a57.S \ 166 lib/cpus/aarch64/cortex_a72.S \ 167 lib/cpus/aarch64/qemu_max.S \ 168 lib/semihosting/semihosting.c \ 169 lib/semihosting/${ARCH}/semihosting_call.S \ 170 plat/common/plat_psci_common.c \ 171 drivers/arm/pl061/pl061_gpio.c \ 172 drivers/gpio/gpio.c \ 173 ${PLAT_QEMU_COMMON_PATH}/qemu_pm.c \ 174 ${PLAT_QEMU_COMMON_PATH}/topology.c \ 175 ${PLAT_QEMU_COMMON_PATH}/aarch64/plat_helpers.S \ 176 ${PLAT_QEMU_COMMON_PATH}/qemu_bl31_setup.c \ 177 ${QEMU_GIC_SOURCES} 178endif 179 180# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images 181# in the FIP if the platform requires. 182ifneq ($(BL32_EXTRA1),) 183ifneq (${DECRYPTION_SUPPORT},none) 184$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1,,$(ENCRYPT_BL32))) 185else 186$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1)) 187endif 188endif 189ifneq ($(BL32_EXTRA2),) 190ifneq (${DECRYPTION_SUPPORT},none) 191$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2,,$(ENCRYPT_BL32))) 192else 193$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2)) 194endif 195endif 196 197SEPARATE_CODE_AND_RODATA := 1 198ENABLE_STACK_PROTECTOR := 0 199ifneq ($(ENABLE_STACK_PROTECTOR), 0) 200 PLAT_BL_COMMON_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_stack_protector.c 201endif 202 203BL32_RAM_LOCATION := tdram 204ifeq (${BL32_RAM_LOCATION}, tsram) 205 BL32_RAM_LOCATION_ID = SEC_SRAM_ID 206else ifeq (${BL32_RAM_LOCATION}, tdram) 207 BL32_RAM_LOCATION_ID = SEC_DRAM_ID 208else 209 $(error "Unsupported BL32_RAM_LOCATION value") 210endif 211 212# Process flags 213$(eval $(call add_define,BL32_RAM_LOCATION_ID)) 214 215# Don't have the Linux kernel as a BL33 image by default 216ARM_LINUX_KERNEL_AS_BL33 := 0 217$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33)) 218$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33)) 219 220ARM_PRELOADED_DTB_BASE := PLAT_QEMU_DT_BASE 221$(eval $(call add_define,ARM_PRELOADED_DTB_BASE)) 222 223# Do not enable SVE 224ENABLE_SVE_FOR_NS := 0 225