• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 /* Copyright 2018 The BoringSSL Authors
2  *
3  * Permission to use, copy, modify, and/or distribute this software for any
4  * purpose with or without fee is hereby granted, provided that the above
5  * copyright notice and this permission notice appear in all copies.
6  *
7  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
8  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
9  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
10  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
11  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
12  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
13  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */
14 
15 #include "cpu_arm_linux.h"
16 
17 #include <string.h>
18 
19 #include <gtest/gtest.h>
20 
21 
22 namespace {
23 
TEST(ARMLinuxTest,CPUInfo)24 TEST(ARMLinuxTest, CPUInfo) {
25   struct CPUInfoTest {
26     const char *cpuinfo;
27     unsigned long hwcap2;
28   } kTests[] = {
29       // Nexus 4 from https://crbug.com/341598#c43
30       {
31           "Processor       : ARMv7 Processor rev 2 (v7l)\n"
32           "processor       : 0\n"
33           "BogoMIPS        : 13.53\n"
34           "\n"
35           "processor       : 1\n"
36           "BogoMIPS        : 13.53\n"
37           "\n"
38           "processor       : 2\n"
39           "BogoMIPS        : 13.53\n"
40           "\n"
41           "processor       : 3\n"
42           "BogoMIPS        : 13.53\n"
43           "\n"
44           "Features        : swp half thumb fastmult vfp edsp neon vfpv3 tls "
45           "vfpv4 \n"
46           "CPU implementer : 0x51\n"
47           "CPU architecture: 7\n"
48           "CPU variant     : 0x0\n"
49           "CPU part        : 0x06f\n"
50           "CPU revision    : 2\n"
51           "\n"
52           "Hardware        : QCT APQ8064 MAKO\n"
53           "Revision        : 000b\n"
54           "Serial          : 0000000000000000\n",
55           0,
56       },
57       // Pixel 2 (truncated slightly)
58       {
59           "Processor       : AArch64 Processor rev 1 (aarch64)\n"
60           "processor       : 0\n"
61           "BogoMIPS        : 38.00\n"
62           "Features        : fp asimd evtstrm aes pmull sha1 sha2 crc32\n"
63           "CPU implementer : 0x51\n"
64           "CPU architecture: 8\n"
65           "CPU variant     : 0xa\n"
66           "CPU part        : 0x801\n"
67           "CPU revision    : 4\n"
68           "\n"
69           "processor       : 1\n"
70           "BogoMIPS        : 38.00\n"
71           "Features        : fp asimd evtstrm aes pmull sha1 sha2 crc32\n"
72           "CPU implementer : 0x51\n"
73           "CPU architecture: 8\n"
74           "CPU variant     : 0xa\n"
75           "CPU part        : 0x801\n"
76           "CPU revision    : 4\n"
77           "\n"
78           "processor       : 2\n"
79           "BogoMIPS        : 38.00\n"
80           "Features        : fp asimd evtstrm aes pmull sha1 sha2 crc32\n"
81           "CPU implementer : 0x51\n"
82           "CPU architecture: 8\n"
83           "CPU variant     : 0xa\n"
84           "CPU part        : 0x801\n"
85           "CPU revision    : 4\n"
86           "\n"
87           "processor       : 3\n"
88           "BogoMIPS        : 38.00\n"
89           "Features        : fp asimd evtstrm aes pmull sha1 sha2 crc32\n"
90           "CPU implementer : 0x51\n"
91           "CPU architecture: 8\n"
92           "CPU variant     : 0xa\n"
93           "CPU part        : 0x801\n"
94           "CPU revision    : 4\n"
95           // (Extra processors omitted.)
96           "\n"
97           "Hardware        : Qualcomm Technologies, Inc MSM8998\n",
98           HWCAP2_AES | HWCAP2_PMULL | HWCAP2_SHA1 | HWCAP2_SHA2,
99       },
100       // Garbage should be tolerated.
101       {
102           "Blah blah blah this is definitely an ARM CPU",
103           0,
104       },
105       // A hypothetical ARMv8 CPU without crc32 (and thus no trailing space
106       // after the last crypto entry).
107       {
108           "Features        : aes pmull sha1 sha2\n"
109           "CPU architecture: 8\n",
110           HWCAP2_AES | HWCAP2_PMULL | HWCAP2_SHA1 | HWCAP2_SHA2,
111       },
112       // Various combinations of ARMv8 flags.
113       {
114           "Features        : aes sha1 sha2\n"
115           "CPU architecture: 8\n",
116           HWCAP2_AES | HWCAP2_SHA1 | HWCAP2_SHA2,
117       },
118       {
119           "Features        : pmull sha2\n"
120           "CPU architecture: 8\n",
121           HWCAP2_PMULL | HWCAP2_SHA2,
122       },
123       {
124           "Features        : aes aes   aes not_aes aes aes \n"
125           "CPU architecture: 8\n",
126           HWCAP2_AES,
127       },
128       {
129           "Features        : \n"
130           "CPU architecture: 8\n",
131           0,
132       },
133       {
134           "Features        : nothing\n"
135           "CPU architecture: 8\n",
136           0,
137       },
138       // If opening /proc/cpuinfo fails, we process the empty string.
139       {
140           "",
141           0,
142       },
143   };
144 
145   for (const auto &t : kTests) {
146     SCOPED_TRACE(t.cpuinfo);
147     STRING_PIECE sp = {t.cpuinfo, strlen(t.cpuinfo)};
148     EXPECT_EQ(t.hwcap2, crypto_get_arm_hwcap2_from_cpuinfo(&sp));
149   }
150 }
151 
152 }  // namespace
153