1# HP Pro 3500 Series 2 3This page describes how to run coreboot on the [Pro 3500 Series] 4desktop from [HP]. 5 6## State 7 8All peripherals should work. Automatic fan control as well as S3 are 9working. The board was tested to boot Linux and Windows. EHCI debug 10is untested. When using MrChromebox edk2 with secure boot build in, the 11board will hang on each boot for about 20 seconds before continuing. 12With disabled ME, the SuperIO will not get CPU temperatures via PECI and 13therefore the automatic fan control will not increase the fan speed. 14 15## Flashing coreboot 16 17```{eval-rst} 18+---------------------+-------------------------+ 19| Type | Value | 20+=====================+=========================+ 21| Socketed flash | No | 22+---------------------+-------------------------+ 23| Model | W25Q64FVSIG | 24+---------------------+-------------------------+ 25| Size | 8 MiB | 26+---------------------+-------------------------+ 27| In circuit flashing | Yes | 28+---------------------+-------------------------+ 29| Package | SOIC-8 | 30+---------------------+-------------------------+ 31| Write protection | See below | 32+---------------------+-------------------------+ 33| Dual BIOS feature | No | 34+---------------------+-------------------------+ 35| Internal flashing | Yes | 36+---------------------+-------------------------+ 37``` 38 39### Flash layout 40The original layout of the flash should look like this: 41``` 4200000000:00000fff fd 4300400000:007fffff bios 4400001000:003fffff me 4500fff000:00000fff gbe 4600fff000:00000fff pd 47``` 48 49### Internal programming 50 51The SPI flash can be accessed using [flashrom] (although it reports as 52"N25Q064..3E", it works fine). 53 54With a missing FDO jumper, `fd` region is read-only, `bios` region is 55read-write and `me` region is locked. Vendor firmware will additionally 56protect the flash chip. After shorting the FDO jumper (E2) full 57read-write access is granted. 58 59Do **NOT shutdown** the operating system **after flashing** coreboot 60from the vendor firmware! This will brick your device because the bios 61region will be modified on shutdown. Cut the AC power or do a restart 62from the OS. 63 64**Position of FDO jumper (E2) close to the F_USB3** 65![][pro_3500_jumper] 66 67[pro_3500_jumper]: pro_3500_series_jumper.avif 68 69### External programming 70 71External programming with an SPI adapter and [flashrom] does work, but 72it powers the whole southbridge complex. The average current will be 73400mA but spikes may be higher. Connect the power to the flash or the 74programming header next to the flash otherwise programming is unstable. 75The supply needs to quickly reach 3V3 or else the chip is also unstable 76until cleanly power cycled. 77 78**Position of SOIC-8 flash and pin-header near ATX power connector** 79![][pro_3500_flash] 80 81[pro_3500_flash]: pro_3500_series_flash.avif 82 83## Technology 84 85```{eval-rst} 86+------------------+--------------------------------------------------+ 87| Northbridge | :doc:`../../northbridge/intel/sandybridge/index` | 88+------------------+--------------------------------------------------+ 89| Southbridge | bd82x6x (bd82h61) | 90+------------------+--------------------------------------------------+ 91| CPU | model_206ax | 92+------------------+--------------------------------------------------+ 93| SuperIO | IT8779E (identifies as IT8772F via register) | 94+------------------+--------------------------------------------------+ 95| EC | Fixed function as part of SuperIO | 96+------------------+--------------------------------------------------+ 97| Coprocessor | Intel ME | 98+------------------+--------------------------------------------------+ 99``` 100 101[Pro 3500 Series]: https://support.hp.com/us-en/document/c03364089 102[HP]: https://www.hp.com/ 103[flashrom]: https://flashrom.org/Flashrom 104
