1 /*
2 *
3 * Copyright (C) 2008 Advanced Micro Devices, Inc.
4 * Copyright (C) 2009 coresystems GmbH
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30 #include <libpayload-config.h>
31 #include <libpayload.h>
32 #include <coreboot_tables.h>
33
34 /*
35 * Some of this is x86 specific, and the rest of it is generic. Right now,
36 * since we only support x86, we'll avoid trying to make lots of infrastructure
37 * we don't need. If in the future, we want to use coreboot on some other
38 * architecture, then take out the generic parsing code and move it elsewhere.
39 */
40
41 /* === Parsing code === */
42 /* This is the generic parsing code. */
43
cb_parse_x86_rom_var_mtrr(void * ptr,struct sysinfo_t * info)44 static void cb_parse_x86_rom_var_mtrr(void *ptr, struct sysinfo_t *info)
45 {
46 struct cb_x86_rom_mtrr *rom_mtrr = ptr;
47 info->x86_rom_var_mtrr_index = rom_mtrr->index;
48 }
49
cb_parse_arch_specific(struct cb_record * rec,struct sysinfo_t * info)50 int cb_parse_arch_specific(struct cb_record *rec, struct sysinfo_t *info)
51 {
52 switch(rec->tag) {
53 case CB_TAG_X86_ROM_MTRR:
54 cb_parse_x86_rom_var_mtrr(rec, info);
55 break;
56 default:
57 return 0;
58 }
59 return 1;
60 }
61
62 /* This pointer gets set in head.S and is passed in from coreboot. */
63 void *cb_header_ptr;
64
get_coreboot_info(struct sysinfo_t * info)65 int get_coreboot_info(struct sysinfo_t *info)
66 {
67 int ret;
68
69 /* Ensure the variable range MTRR index covering the ROM is set to
70 * an invalid value. */
71 info->x86_rom_var_mtrr_index = -1;
72
73 ret = cb_parse_header(cb_header_ptr, 1, info);
74
75 if (ret)
76 ret = cb_parse_header(phys_to_virt(0x00000000), 0x1000, info);
77
78 if (ret)
79 ret = cb_parse_header(phys_to_virt(0x000f0000), 0x1000, info);
80
81 return ret;
82 }
83