1 /*
2 *
3 * Copyright 2013 Google Inc.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * cache.h: Cache maintenance API for ARM64
29 */
30
31 #ifndef ARM64_CACHE_H
32 #define ARM64_CACHE_H
33
34 #include <stddef.h>
35 #include <stdint.h>
36
37 /*
38 * Cache maintenance API
39 */
40
41 /* dcache clean and invalidate all (on current level given by CCSELR) */
42 void dcache_clean_invalidate_all(void);
43
44 /* dcache clean by virtual address to PoC */
45 void dcache_clean_by_mva(void const *addr, size_t len);
46
47 /* dcache clean and invalidate by virtual address to PoC */
48 void dcache_clean_invalidate_by_mva(void const *addr, size_t len);
49
50 /* dcache invalidate by virtual address to PoC */
51 void dcache_invalidate_by_mva(void const *addr, size_t len);
52
53 void dcache_clean_all(void);
54
55 /* dcache invalidate all (on current level given by CCSELR) */
56 void dcache_invalidate_all(void);
57
58 /* returns number of bytes per cache line */
59 unsigned int dcache_line_bytes(void);
60
61 /* dcache and MMU disable */
62 void dcache_mmu_disable(void);
63
64 /* dcache and MMU enable */
65 void dcache_mmu_enable(void);
66
67 /* perform all icache/dcache maintenance needed after loading new code */
68 void cache_sync_instructions(void);
69
70 /* Ensure that loaded program segment is synced back from cache to PoC */
71 void arch_program_segment_loaded(void const *addr, size_t len);
72
73 /* tlb invalidate all */
74 void tlb_invalidate_all(void);
75
76 /* Invalidate all of the instruction cache for PE to PoU. */
icache_invalidate_all(void)77 static inline void icache_invalidate_all(void)
78 {
79 __asm__ __volatile__(
80 "dsb sy\n\t"
81 "ic iallu\n\t"
82 "dsb sy\n\t"
83 "isb\n\t"
84 : : : "memory");
85 }
86
87 #endif /* ARM64_CACHE_H */
88