1/* SPDX-License-Identifier: GPL-2.0-only */ 2 3Method (RPTS, 1, Serialized) 4{ 5 6 /* Store current EC settings in CMOS */ 7 Switch (ToInteger (\_SB.PCI0.LPCB.EC.ECRD (RefOf (\_SB.PCI0.LPCB.EC.TPLE)))) 8 { 9 // 0x00 == Enabled == 0x00 10 // 0x11 == Re-enabled == 0x00 11 // 0x22 == Disabled == 0x01 12 Case (0x00) 13 { 14 \_SB.PCI0.LPCB.TPLC = 0x00 15 } 16 Case (0x11) 17 { 18 \_SB.PCI0.LPCB.TPLC = 0x00 19 } 20 Case (0x22) 21 { 22 \_SB.PCI0.LPCB.TPLC = 0x01 23 } 24 } 25 26 \_SB.PCI0.LPCB.FLKC = 27 \_SB.PCI0.LPCB.EC.ECRD (RefOf (\_SB.PCI0.LPCB.EC.FLKE)) 28 29 Switch (ToInteger (\_SB.PCI0.LPCB.EC.ECRD (RefOf (\_SB.PCI0.LPCB.EC.KLSE)))) 30 { 31 // 0x00 == Disabled == 0x00 32 // 0xdd == Enabled == 0x01 33 Case (0x00) 34 { 35 \_SB.PCI0.LPCB.KLSC = 0x00 36 } 37 Case (0xdd) 38 { 39 \_SB.PCI0.LPCB.KLSC = 0x01 40 } 41 } 42 43 Switch (ToInteger (\_SB.PCI0.LPCB.EC.ECRD (RefOf (\_SB.PCI0.LPCB.EC.KLBE)))) 44 { 45 // 0xdd == On == 0x00 46 // 0xcc == Off == 0x01 47 // 0xbb == Low == 0x02 48 // 0xaa == High == 0x03 49 Case (0xdd) 50 { 51 \_SB.PCI0.LPCB.KLBC = 0x00 52 } 53 Case (0xcc) 54 { 55 \_SB.PCI0.LPCB.KLBC = 0x01 56 } 57 Case (0xbb) 58 { 59 \_SB.PCI0.LPCB.KLBC = 0x02 60 } 61 Case (0xaa) 62 { 63 \_SB.PCI0.LPCB.KLBC = 0x03 64 } 65 } 66 67 /* 68 * Disable ACPI support. 69 * This should always be the last action before entering S4 or S5. 70 */ 71 \_SB.PCI0.LPCB.EC.OSFG = 0x00 72} 73 74Method (RWAK, 1, Serialized) 75{ 76 /* 77 * Enable ACPI support. 78 * This should always be the first action when exiting S4 or S5. 79 */ 80 \_SB.PCI0.LPCB.EC.OSFG = 0x01 81 82 /* Restore EC settings from CMOS */ 83 Switch (ToInteger (\_SB.PCI0.LPCB.TPLC)) 84 { 85 // 0x00 == Enabled == 0x00 86 // 0x00 == Re-enabled == 0x11 87 // 0x01 == Disabled == 0x22 88 Case (0x00) 89 { 90 \_SB.PCI0.LPCB.EC.ECWR (0x00, RefOf(\_SB.PCI0.LPCB.EC.TPLE)) 91 } 92 Case (0x01) 93 { 94 \_SB.PCI0.LPCB.EC.ECWR (0x22, RefOf(\_SB.PCI0.LPCB.EC.TPLE)) 95 } 96 } 97 98 \_SB.PCI0.LPCB.EC.ECWR (\_SB.PCI0.LPCB.FLKC, RefOf(\_SB.PCI0.LPCB.EC.FLKE)) 99 100 Switch (ToInteger (\_SB.PCI0.LPCB.KLSC)) 101 { 102 // 0x00 == Disabled == 0x00 103 // 0x01 == Enabled == 0xdd 104 Case (0x00) 105 { 106 \_SB.PCI0.LPCB.EC.ECWR (0x00, RefOf(\_SB.PCI0.LPCB.EC.KLSE)) 107 } 108 Case (0x01) 109 { 110 \_SB.PCI0.LPCB.EC.ECWR (0xdd, RefOf(\_SB.PCI0.LPCB.EC.KLSE)) 111 } 112 } 113 114 Switch (ToInteger (\_SB.PCI0.LPCB.KLBC)) 115 { 116 // 0x00 == On == 0xdd 117 // 0x01 == Off == 0xcc 118 // 0x02 == Low == 0xbb 119 // 0x03 == High == 0xaa 120 Case (0x00) 121 { 122 \_SB.PCI0.LPCB.EC.ECWR (0xdd, RefOf(\_SB.PCI0.LPCB.EC.KLBE)) 123 } 124 Case (0x01) 125 { 126 \_SB.PCI0.LPCB.EC.ECWR (0xcc, RefOf(\_SB.PCI0.LPCB.EC.KLBE)) 127 } 128 Case (0x02) 129 { 130 \_SB.PCI0.LPCB.EC.ECWR (0xbb, RefOf(\_SB.PCI0.LPCB.EC.KLBE)) 131 } 132 Case (0x03) 133 { 134 \_SB.PCI0.LPCB.EC.ECWR (0xaa, RefOf(\_SB.PCI0.LPCB.EC.KLBE)) 135 } 136 } 137} 138