1# SPDX-License-Identifier: GPL-2.0-only 2 3if BOARD_AMD_MANDOLIN || BOARD_AMD_CEREME 4 5config BOARD_SPECIFIC_OPTIONS 6 def_bool y 7 select SOC_AMD_COMMON_BLOCK_USE_ESPI 8 select SOC_AMD_PICASSO 9 select BOARD_ROMSIZE_KB_8192 if BOARD_AMD_MANDOLIN 10 select BOARD_ROMSIZE_KB_16384 if BOARD_AMD_CEREME 11 select AZALIA_HDA_CODEC_SUPPORT 12 select HAVE_ACPI_RESUME 13 select DRIVERS_UART_ACPI 14 select AMD_SOC_CONSOLE_UART if !AMD_LPC_DEBUG_CARD 15 select AMD_FWM_POSITION_420000_DEFAULT if BOARD_AMD_MANDOLIN 16 select AMD_FWM_POSITION_820000_DEFAULT if BOARD_AMD_CEREME 17 18config FMDFILE 19 default "src/mainboard/amd/mandolin/variants/\$(CONFIG_VARIANT_DIR)/board.fmd" 20 21config AMD_LPC_DEBUG_CARD 22 bool "Enable LPC-Serial debug card on the debug header" 23 default n 24 select MANDOLIN_LPC 25 select SUPERIO_SMSC_SIO1036 26 help 27 AMD's debug card contains an SMSC SIO1036 device which provides an 28 I/O-mapped UART in the system. This is mutually exclusive with 29 AMD_SOC_CONSOLE_UART which selects the SoC's integrated memory-mapped 30 UART for coreboot console output. 31 32choice 33 prompt "SMSC/Microchip 1036 SuperIO config address" 34 depends on SUPERIO_SMSC_SIO1036 35 default SMSC_SIO1036_BASE_164E 36 37config SMSC_SIO1036_BASE_4E 38 bool "0x4e/0x4d base address" 39 40config SMSC_SIO1036_BASE_164E 41 bool "0x164e/0x164d base address" 42 43endchoice 44 45config SUPERIO_ADDR_BASE 46 hex 47 default 0x4e if SMSC_SIO1036_BASE_4E 48 default 0x164e if SMSC_SIO1036_BASE_164E 49 50config CBFS_SIZE 51 default 0x7cf000 if BOARD_AMD_MANDOLIN # Maximum size for the Mandolin FMAP 52 default 0xfcf000 if BOARD_AMD_CEREME # Maximum size for the Cereme FMAP 53 54config MAINBOARD_DIR 55 default "amd/mandolin" 56 57config VARIANT_DIR 58 default "mandolin" if BOARD_AMD_MANDOLIN 59 default "cereme" if BOARD_AMD_CEREME 60 61config MAINBOARD_PART_NUMBER 62 default "MANDOLIN" if BOARD_AMD_MANDOLIN 63 default "CEREME" if BOARD_AMD_CEREME 64 65config DEVICETREE 66 default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb" 67 68config ONBOARD_VGA_IS_PRIMARY 69 bool 70 default y 71 72config MANDOLIN_HAVE_MCHP_FW 73 bool "Have Microchip EC firmware?" 74 default n 75 76config MANDOLIN_MCHP_FW_FILE 77 string 78 depends on MANDOLIN_HAVE_MCHP_FW 79 default "3rdparty/blobs/mainboard/amd/mandolin/EC_mandolin.bin" if BOARD_AMD_MANDOLIN 80 default "3rdparty/blobs/mainboard/amd/mandolin/EC_cereme.bin" if BOARD_AMD_CEREME 81 help 82 The EC firmware blob is usually the first 128kByte of the stock 83 firmware image. 84 85if !AMD_LPC_DEBUG_CARD 86choice 87 prompt "State of IOMux for LPC/eMMC signals" 88 default MANDOLIN_IOMUX_USE_EMMC 89 help 90 Mandolin is designed to use either LPC or eMMC signals. Use this 91 selection to determine which are configured for this image. 92 93config MANDOLIN_IOMUX_USE_LPC 94 bool "LPC signals" 95 96config MANDOLIN_IOMUX_USE_EMMC 97 bool "eMMC signals" 98 99endchoice 100endif # !AMD_LPC_DEBUG_CARD 101 102config MANDOLIN_LPC 103 bool 104 default y if MANDOLIN_IOMUX_USE_LPC 105 help 106 Picasso's LPC bus signals are MUXed with some of the EMMC signals. 107 Select this option if LPC signals are required. 108 109if !EM100 # EM100 defaults in soc/amd/common/blocks/spi/Kconfig 110config EFS_SPI_READ_MODE 111 default 3 # Quad IO (1-1-4) 112 113config EFS_SPI_SPEED 114 default 0 # 66MHz 115 116config EFS_SPI_MICRON_FLAG 117 default 0 118 119config NORMAL_READ_SPI_SPEED 120 default 1 # 33MHz 121 122config ALT_SPI_SPEED 123 default 1 # 33MHz 124 125config TPM_SPI_SPEED 126 default 1 # 33MHz 127 128endif # !EM100 129 130endif # BOARD_AMD_MANDOLIN || BOARD_AMD_CEREME 131