1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #include <device/azalia_device.h> 4 5 const u32 cim_verb_data[] = { 6 /* Realtek ALC701 on mainboard */ 7 0x10ec0701, 8 0x00000000, 9 0x00000016, 10 11 AZALIA_SUBVENDOR(0, 0x1022D001), // HDA Codec Subsystem ID: 0x1022D001 12 13 AZALIA_RESET(1), // Widget node 0x01 : 14 AZALIA_PIN_CFG(0, 0x12, 0xb7a60140), // Pin widget 0x12 - DMIC 15 AZALIA_PIN_CFG(0, 0x13, 0x40000000), // Pin widget 0x13 - DMIC 16 AZALIA_PIN_CFG(0, 0x14, 0x90170110), // Pin widget 0x14 - FRONT (Port-D) 17 AZALIA_PIN_CFG(0, 0x15, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x15 - I2S-OUT 18 AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x16 - LINE3 (Port-B) 19 AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x17 - I2S-OUT 20 AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x18 - I2S-IN 21 AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x19 - MIC2 (Port-F) 22 AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x1A - LINE1 (Port-C) 23 AZALIA_PIN_CFG(0, 0x1b, 0x04a11050), // Pin widget 0x1B - LINE2 (Port-E) 24 AZALIA_PIN_CFG(0, 0x1d, 0x40600001), // Pin widget 0x1D - PC-BEEP 25 AZALIA_PIN_CFG(0, 0x1e, 0x04451130), // Pin widget 0x1E - S/PDIF-OUT 26 AZALIA_PIN_CFG(0, 0x1f, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x1F - S/PDIF-IN 27 AZALIA_PIN_CFG(0, 0x21, 0x04211020), // Pin widget 0x21 - HP-OUT (Port-I) 28 AZALIA_PIN_CFG(0, 0x29, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x29 - I2S-IN 29 0x02050038, 0x02047901, 0x0205006b, 0x02040260, // NID 0x20 -0 Set Class-D output 30 // power as 2.2W@4 Ohm, and 31 // MIC2-VREFO-R is controlled by 32 // Line2 port. 33 0x0205001a, 0x02048c03, 0x02050045, 0x0204b289, // NID 0x20 - 1 34 0x0205004a, 0x0204201b, 0x0205004a, 0x0204201b, // NID 0x20 - 2 35 0x02050010, 0x02040420, 0x01470c00, 0x02050036, // Dos beep path - 1 36 0x02047151, 0x01470740, 0x0143b000, 0x01470c02, // Dos beep path - 2 37 38 /* Realtek ALC285 on extension card */ 39 0x10ec0285, 40 0x00000000, 41 0x00000028, 42 43 AZALIA_SUBVENDOR(0, 0x1022D002), 44 45 AZALIA_RESET(1), // Widget node 0x01 : 46 AZALIA_PIN_CFG(0, 0x12, 0xb7a60140), // Pin widget 0x12 - DMIC 47 AZALIA_PIN_CFG(0, 0x13, 0x40000000), // Pin widget 0x13 - DMIC 48 AZALIA_PIN_CFG(0, 0x14, 0x90170110), // Pin widget 0x14 - Front (Port-D) 49 AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x16 - NPC 50 AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x17 - I2S OUT 51 AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x18 - I2S IN 52 AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x19 - MIC2 (Port-F) 53 AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x1A - NPC 54 AZALIA_PIN_CFG(0, 0x1b, 0x04a19030), // Pin widget 0x1B - LINE2 (Port-E) 55 AZALIA_PIN_CFG(0, 0x1d, 0x4066192d), // Pin widget 0x1D - BEEP-IN 56 AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)), // Pin widget 0x1E - S/PDIF-OUT 57 AZALIA_PIN_CFG(0, 0x21, 0x04211020), // Pin widget 0x21 - HP1-OUT (Port-I) 58 0x05c50011, 0x05c40003, 0x05c50011, 0x05c40003, // dis. Silence detect delay turn off 59 0x0205003c, 0x0204f254, 0x0205003c, 0x0204f214, // Class-D power on reset 60 0x02050045, 0x0204b009, 0x02050063, 0x02040020, // Set TRS + turn off MIC2 VREFO 61 // gating with HP-JD. 62 0x0205004a, 0x020420b0, 0x02050009, 0x02043803, // Enable HP JD + Set JD2 to 1 port 63 // JD for WoV 64 0x0205000b, 0x0204777a, 0x0205000b, 0x0204777a, // Set TRS + Set JD2 pull up. 65 0x02050038, 0x02043909, 0x05c50000, 0x05c43482, // NID 0x20 set class-D to 2W@4ohm 66 // (+12dB gain) + Set sine 67 // tone gain(0x34) 68 0x05350000, 0x0534002a, 0x05350000, 0x0534002a, // Disable EQ + set 100Hz 2nd High 69 // Pass filter 70 0x0535001d, 0x05340800, 0x0535001e, 0x05340800, // Left Channel-1 71 0x05350005, 0x053403f6, 0x05350006, 0x0534854c, // Left Channel-2 72 0x05350007, 0x05341e09, 0x05350008, 0x05346472, // Left Channel-3 73 0x05350009, 0x053401fb, 0x0535000a, 0x05344836, // Left Channel-4 74 0x0535000b, 0x05341c00, 0x0535000c, 0x05340000, // Left Channel-5 75 0x0535000d, 0x05340200, 0x0535000e, 0x05340000, // Left Channel-6 76 0x05450000, 0x05440000, 0x0545001d, 0x05440800, // Right Channel-1 77 0x0545001e, 0x05440800, 0x05450005, 0x054403f6, // Right Channel-2 78 0x05450006, 0x0544854c, 0x05450007, 0x05441e09, // Right Channel-3 79 0x05450008, 0x05446472, 0x05450009, 0x054401fb, // Right Channel-4 80 0x0545000a, 0x05444836, 0x0545000b, 0x05441c00, // Right Channel-5 81 0x0545000c, 0x05440000, 0x0545000d, 0x05440200, // Right Channel-6 82 0x0545000e, 0x05440000, 0x05350000, 0x0534c02a, // Right Channel-7+ EQ Update & Enable 83 0x05d50006, 0x05d44c50, 0x05d50002, 0x05d46004, // AGC-1 Disable + (Front Gain=0dB ) 84 0x05d50003, 0x05d45e5e, 0x05d50001, 0x05d4d783, // AGC-2 (Back Boost Gain = -0.375dB, 85 // Limiter = -1.125dB) 86 0x05d50009, 0x05d451ff, 0x05d50006, 0x05d44e50, // AGC-3 + AGC Enable 87 0x02050010, 0x02040020, 0x02050040, 0x02048800, // EAPD set to verb-control. 88 0x02050030, 0x02049000, 0x02050037, 0x0204fe15, // Class D silent detection Enable 89 // -84dB threshold 90 0x05b50006, 0x05b40044, 0x05a50001, 0x05a4001f, // Set headphone gain and Set pin1 91 // to GPIO2 92 }; 93 94 const u32 pc_beep_verbs[] = { 95 }; 96 97 AZALIA_ARRAY_SIZES; 98