1/* Bochs/QEMU ACPI DSDT ASL definition */ 2/* SPDX-License-Identifier: GPL-2.0-only */ 3 4#include <acpi/acpi.h> 5DefinitionBlock ( 6 "dsdt.aml", 7 "DSDT", 8 ACPI_DSDT_REV_1, 9 OEM_ID, 10 ACPI_TABLE_CREATOR, 11 0x1 // OEM Revision 12 ) 13{ 14 #include <acpi/dsdt_top.asl> 15 16#include "acpi/dbug.asl" 17 18 19/**************************************************************** 20 * PCI Bus definition 21 ****************************************************************/ 22 23 Scope(\_SB) { 24 Device(PCI0) { 25 Name(_HID, EisaId("PNP0A03")) 26 Name(_UID, 1) 27 } 28 } 29 30#include "acpi/pci-crs.asl" 31#include "acpi/hpet.asl" 32 33 34/**************************************************************** 35 * VGA 36 ****************************************************************/ 37 38 Scope(\_SB.PCI0) { 39 Device(VGA) { 40 Name(_ADR, 0x00020000) 41 OperationRegion(PCIC, PCI_Config, 0, 0x4) 42 Field(PCIC, DWordAcc, NoLock, Preserve) { 43 VEND, 32 44 } 45 Method(_S1D, 0, NotSerialized) { 46 Return (0x00) 47 } 48 Method(_S2D, 0, NotSerialized) { 49 Return (0x00) 50 } 51 Method(_S3D, 0, NotSerialized) { 52 If (VEND == 0x1001b36) { 53 Return (0x03) // QXL 54 } Else { 55 Return (0x00) 56 } 57 } 58 } 59 } 60 61 62/**************************************************************** 63 * PIIX4 PM 64 ****************************************************************/ 65 66 Scope(\_SB.PCI0) { 67 Device(PX13) { 68 Name(_ADR, 0x00010003) 69 OperationRegion(P13C, PCI_Config, 0x00, 0xff) 70 } 71 } 72 73 74/**************************************************************** 75 * PIIX3 ISA bridge 76 ****************************************************************/ 77 78 Scope(\_SB.PCI0) { 79 Device(ISA) { 80 Name(_ADR, 0x00010000) 81 82 /* PIIX PCI to ISA irq remapping */ 83 OperationRegion(P40C, PCI_Config, 0x60, 0x04) 84 85 /* enable bits */ 86 Field(\_SB.PCI0.PX13.P13C, AnyAcc, NoLock, Preserve) { 87 Offset(0x5f), 88 , 7, 89 LPEN, 1, // LPT 90 Offset(0x67), 91 , 3, 92 CAEN, 1, // COM1 93 , 3, 94 CBEN, 1, // COM2 95 } 96 Name(FDEN, 1) 97 } 98 } 99 100#include "acpi/isa.asl" 101 102 103/**************************************************************** 104 * PCI hotplug 105 ****************************************************************/ 106 107 Scope(\_SB.PCI0) { 108 OperationRegion(PCST, SystemIO, 0xae00, 0x08) 109 Field(PCST, DWordAcc, NoLock, WriteAsZeros) { 110 PCIU, 32, 111 PCID, 32, 112 } 113 114 OperationRegion(SEJ, SystemIO, 0xae08, 0x04) 115 Field(SEJ, DWordAcc, NoLock, WriteAsZeros) { 116 B0EJ, 32, 117 } 118 119 /* Methods called by bulk generated PCI devices below */ 120 121 /* Methods called by hotplug devices */ 122 Method(PCEJ, 1, NotSerialized) { 123 // _EJ0 method - eject callback 124 B0EJ = 1 << Arg0 125 Return (0x0) 126 } 127 128 /* Hotplug notification method supplied by SSDT */ 129 External(\_SB.PCI0.PCNT, MethodObj) 130 131 /* PCI hotplug notify method */ 132 Method(PCNF, 0) { 133 // Local0 = iterator 134 Local0 = 0 135 While (Local0 < 31) { 136 Local0++ 137 If (PCIU & (1 << Local0)) { 138 PCNT(Local0, 1) 139 } 140 If (PCID & (1 << Local0)) { 141 PCNT(Local0, 3) 142 } 143 } 144 } 145 } 146 147 148/**************************************************************** 149 * PCI IRQs 150 ****************************************************************/ 151 152 Scope(\_SB) { 153 Scope(PCI0) { 154 Name(_PRT, Package() { 155 /* PCI IRQ routing table, example from ACPI 2.0a specification, 156 section 6.2.8.1 */ 157 /* Note: we provide the same info as the PCI routing 158 table of the Bochs BIOS */ 159 160#define prt_slot(nr, lnk0, lnk1, lnk2, lnk3) \ 161 Package() { nr##ffff, 0, lnk0, 0 }, \ 162 Package() { nr##ffff, 1, lnk1, 0 }, \ 163 Package() { nr##ffff, 2, lnk2, 0 }, \ 164 Package() { nr##ffff, 3, lnk3, 0 } 165 166#define prt_slot0(nr) prt_slot(nr, LNKD, LNKA, LNKB, LNKC) 167#define prt_slot1(nr) prt_slot(nr, LNKA, LNKB, LNKC, LNKD) 168#define prt_slot2(nr) prt_slot(nr, LNKB, LNKC, LNKD, LNKA) 169#define prt_slot3(nr) prt_slot(nr, LNKC, LNKD, LNKA, LNKB) 170 171 prt_slot0(0x0000), 172 /* Device 1 is power mgmt device, and can only use irq 9 */ 173 prt_slot(0x0001, LNKS, LNKB, LNKC, LNKD), 174 prt_slot2(0x0002), 175 prt_slot3(0x0003), 176 prt_slot0(0x0004), 177 prt_slot1(0x0005), 178 prt_slot2(0x0006), 179 prt_slot3(0x0007), 180 prt_slot0(0x0008), 181 prt_slot1(0x0009), 182 prt_slot2(0x000a), 183 prt_slot3(0x000b), 184 prt_slot0(0x000c), 185 prt_slot1(0x000d), 186 prt_slot2(0x000e), 187 prt_slot3(0x000f), 188 prt_slot0(0x0010), 189 prt_slot1(0x0011), 190 prt_slot2(0x0012), 191 prt_slot3(0x0013), 192 prt_slot0(0x0014), 193 prt_slot1(0x0015), 194 prt_slot2(0x0016), 195 prt_slot3(0x0017), 196 prt_slot0(0x0018), 197 prt_slot1(0x0019), 198 prt_slot2(0x001a), 199 prt_slot3(0x001b), 200 prt_slot0(0x001c), 201 prt_slot1(0x001d), 202 prt_slot2(0x001e), 203 prt_slot3(0x001f), 204 }) 205 } 206 207 Field(PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) { 208 PRQ0, 8, 209 PRQ1, 8, 210 PRQ2, 8, 211 PRQ3, 8 212 } 213 214 Method(IQST, 1, NotSerialized) { 215 // _STA method - get status 216 If (0x80 & Arg0) { 217 Return (0x09) 218 } 219 Return (0x0B) 220 } 221 Method(IQCR, 1, Serialized) { 222 // _CRS method - get current settings 223 Name(PRR0, ResourceTemplate() { 224 Interrupt(, Level, ActiveHigh, Shared) { 0 } 225 }) 226 CreateDWordField(PRR0, 0x05, PRRI) 227 If (Arg0 < 0x80) { 228 PRRI = Arg0 229 } 230 Return (PRR0) 231 } 232 233#define define_link(link, uid, reg) \ 234 Device(link) { \ 235 Name(_HID, EISAID("PNP0C0F")) \ 236 Name(_UID, uid) \ 237 Name(_PRS, ResourceTemplate() { \ 238 Interrupt(, Level, ActiveHigh, Shared) { \ 239 5, 10, 11 \ 240 } \ 241 }) \ 242 Method(_STA, 0, NotSerialized) { \ 243 Return (IQST(reg)) \ 244 } \ 245 Method(_DIS, 0, NotSerialized) { \ 246 reg |= 0x80 \ 247 } \ 248 Method(_CRS, 0, NotSerialized) { \ 249 Return (IQCR(reg)) \ 250 } \ 251 Method(_SRS, 1, NotSerialized) { \ 252 CreateDWordField(Arg0, 0x05, PRRI) \ 253 reg = PRRI \ 254 } \ 255 } 256 257 define_link(LNKA, 0, PRQ0) 258 define_link(LNKB, 1, PRQ1) 259 define_link(LNKC, 2, PRQ2) 260 define_link(LNKD, 3, PRQ3) 261 262 Device(LNKS) { 263 Name(_HID, EISAID("PNP0C0F")) 264 Name(_UID, 4) 265 Name(_PRS, ResourceTemplate() { 266 Interrupt(, Level, ActiveHigh, Shared) { 9 } 267 }) 268 269 // The SCI cannot be disabled and is always attached to GSI 9, 270 // so these are no-ops. We only need this link to override the 271 // polarity to active high and match the content of the MADT. 272 Method(_STA, 0, NotSerialized) { Return (0x0b) } 273 Method(_DIS, 0, NotSerialized) { } 274 Method(_CRS, 0, NotSerialized) { Return (_PRS) } 275 Method(_SRS, 1, NotSerialized) { } 276 } 277 } 278 279/**************************************************************** 280 * General purpose events 281 ****************************************************************/ 282 283 Scope(\_GPE) { 284 Name(_HID, "ACPI0006") 285 286 Method(_L00) { 287 } 288 Method(_E01) { 289 } 290 Method(_E02) { 291 } 292 Method(_L03) { 293 } 294 Method(_L04) { 295 } 296 Method(_L05) { 297 } 298 Method(_L06) { 299 } 300 Method(_L07) { 301 } 302 Method(_L08) { 303 } 304 Method(_L09) { 305 } 306 Method(_L0A) { 307 } 308 Method(_L0B) { 309 } 310 Method(_L0C) { 311 } 312 Method(_L0D) { 313 } 314 Method(_L0E) { 315 } 316 Method(_L0F) { 317 } 318 } 319} 320