1 /* SPDX-License-Identifier: GPL-2.0-only */
2
3 #include <arch/pirq_routing.h>
4
5 static const struct irq_routing_table intel_irq_routing_table = {
6 PIRQ_SIGNATURE, /* u32 signature */
7 PIRQ_VERSION, /* u16 version */
8 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
9 0x00, /* Where the interrupt router lies (bus) */
10 (0x01 << 3)|0x0, /* Where the interrupt router lies (dev) */
11 0, /* IRQs devoted exclusively to PCI usage */
12 0x8086, /* Vendor */
13 0x7000, /* Device */
14 0, /* Miniport data */
15 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
16 0x7, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
17 /* clang-format off */
18 {
19 /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
20 {0x00,(0x01 << 3)|0x0, {{0x60, 0xdef8}, {0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0x0def8}}, 0x0, 0x0},
21 {0x00,(0x02 << 3)|0x0, {{0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0xdef8}, {0x60, 0x0def8}}, 0x1, 0x0},
22 {0x00,(0x03 << 3)|0x0, {{0x62, 0xdef8}, {0x63, 0xdef8}, {0x60, 0xdef8}, {0x61, 0x0def8}}, 0x2, 0x0},
23 {0x00,(0x04 << 3)|0x0, {{0x63, 0xdef8}, {0x60, 0xdef8}, {0x61, 0xdef8}, {0x62, 0x0def8}}, 0x3, 0x0},
24 {0x00,(0x05 << 3)|0x0, {{0x60, 0xdef8}, {0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0x0def8}}, 0x4, 0x0},
25 {0x00,(0x06 << 3)|0x0, {{0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0xdef8}, {0x60, 0x0def8}}, 0x5, 0x0},
26 }
27 /* clang-format on */
28 };
write_pirq_routing_table(unsigned long addr)29 unsigned long write_pirq_routing_table(unsigned long addr)
30 {
31 return copy_pirq_routing_table(addr, &intel_irq_routing_table);
32 }
33