1 /* SPDX-License-Identifier: GPL-2.0-only */
2
3 #include <device/device.h>
4 #include <device/pci.h>
5 #include <device/pci_ops.h>
6 #include <pc80/keyboard.h>
7
8 static const unsigned char qemu_i440fx_irqs[] = {
9 11, 10, 10, 11,
10 11, 10, 10, 11,
11 };
12
13 #define D0F0_PAM(x) (0x59 + (x)) /* 0-6 */
14
qemu_nb_init(struct device * dev)15 static void qemu_nb_init(struct device *dev)
16 {
17 /* Map memory at 0xc0000 - 0xfffff */
18 int i;
19 pci_or_config8(dev, D0F0_PAM(0), 0x30);
20 for (i = 1; i <= 6; i++)
21 pci_write_config8(dev, D0F0_PAM(i), 0x33);
22
23 /* This sneaked in here, because Qemu does not emulate a SuperIO chip. */
24 pc_keyboard_init(NO_AUX_DEVICE);
25
26 /* setup IRQ routing */
27 for (i = 0; i < 32; i++) {
28 struct device *d = pcidev_on_root(i, 0);
29 if (d)
30 pci_assign_irqs(d, qemu_i440fx_irqs + (i % 4));
31 }
32 }
33
qemu_nb_read_resources(struct device * dev)34 static void qemu_nb_read_resources(struct device *dev)
35 {
36 pci_dev_read_resources(dev);
37
38 if (CONFIG(ARCH_RAMSTAGE_X86_64)) {
39 /* Reserve page tables in DRAM. FIXME: Remove once x86_64 page tables reside in CBMEM */
40 reserved_ram_range(dev, 0, CONFIG_ARCH_X86_64_PGTBL_LOC, 6 * 0x1000);
41 }
42 }
43
44 struct device_operations nb_operations = {
45 .read_resources = qemu_nb_read_resources,
46 .set_resources = pci_dev_set_resources,
47 .enable_resources = pci_dev_enable_resources,
48 .init = qemu_nb_init,
49 };
50